Ignore:
Timestamp:
Apr 14, 2009, 8:39:12 PM (15 years ago)
Author:
rosiere
Message:

1) Add modelsim simulation systemC
2) Modelsim cosimulation systemC / VHDL is not finish !!!! (cf execute_queue and write_unit)
3) Add multi architecture
5) Add template for comparator, multiplier and divider
6) Change Message
Warning) Various test macro have change, many selftest can't compile

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Execute_loop_Glue/SelfTest/src/test.cpp

    r88 r113  
    4848  sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
    4949 
     50  sc_signal<Tcontrol_t        > **  in_GPR_WRITE_WRITE_UNIT_VAL               ;
     51  sc_signal<Tcontrol_t        > ** out_GPR_WRITE_WRITE_UNIT_ACK               ;
     52  sc_signal<Tcontext_t        > **  in_GPR_WRITE_WRITE_UNIT_OOO_ENGINE_ID     ;
     53  sc_signal<Tgeneral_address_t> **  in_GPR_WRITE_WRITE_UNIT_NUM_REG           ;
     54  sc_signal<Tgeneral_data_t   > **  in_GPR_WRITE_WRITE_UNIT_DATA              ;
     55  sc_signal<Tcontrol_t        > ** out_GPR_WRITE_REGISTER_FILE_VAL            ;
     56  sc_signal<Tcontrol_t        > **  in_GPR_WRITE_REGISTER_FILE_ACK            ;
     57  sc_signal<Tcontext_t        > ** out_GPR_WRITE_REGISTER_FILE_OOO_ENGINE_ID  ;
     58  sc_signal<Tgeneral_address_t> ** out_GPR_WRITE_REGISTER_FILE_NUM_REG        ;
     59  sc_signal<Tgeneral_data_t   > ** out_GPR_WRITE_REGISTER_FILE_DATA           ;
     60  sc_signal<Tcontrol_t        > ** out_GPR_WRITE_READ_UNIT_VAL                ;
     61  sc_signal<Tcontext_t        > ** out_GPR_WRITE_READ_UNIT_OOO_ENGINE_ID      ;
     62  sc_signal<Tgeneral_address_t> ** out_GPR_WRITE_READ_UNIT_NUM_REG            ;
     63  sc_signal<Tgeneral_data_t   > ** out_GPR_WRITE_READ_UNIT_DATA               ;
     64  sc_signal<Tcontrol_t        > **  in_SPR_WRITE_WRITE_UNIT_VAL               ;
     65  sc_signal<Tcontrol_t        > ** out_SPR_WRITE_WRITE_UNIT_ACK               ;
     66  sc_signal<Tcontext_t        > **  in_SPR_WRITE_WRITE_UNIT_OOO_ENGINE_ID     ;
     67  sc_signal<Tspecial_address_t> **  in_SPR_WRITE_WRITE_UNIT_NUM_REG           ;
     68  sc_signal<Tspecial_data_t   > **  in_SPR_WRITE_WRITE_UNIT_DATA              ;
     69  sc_signal<Tcontrol_t        > ** out_SPR_WRITE_REGISTER_FILE_VAL            ;
     70  sc_signal<Tcontrol_t        > **  in_SPR_WRITE_REGISTER_FILE_ACK            ;
     71  sc_signal<Tcontext_t        > ** out_SPR_WRITE_REGISTER_FILE_OOO_ENGINE_ID  ;
     72  sc_signal<Tspecial_address_t> ** out_SPR_WRITE_REGISTER_FILE_NUM_REG        ;
     73  sc_signal<Tspecial_data_t   > ** out_SPR_WRITE_REGISTER_FILE_DATA           ;
     74  sc_signal<Tcontrol_t        > ** out_SPR_WRITE_READ_UNIT_VAL                ;
     75  sc_signal<Tcontext_t        > ** out_SPR_WRITE_READ_UNIT_OOO_ENGINE_ID      ;
     76  sc_signal<Tspecial_address_t> ** out_SPR_WRITE_READ_UNIT_NUM_REG            ;
     77  sc_signal<Tspecial_data_t   > ** out_SPR_WRITE_READ_UNIT_DATA               ;
     78
    5079  ALLOC1_SC_SIGNAL( in_GPR_WRITE_WRITE_UNIT_VAL               ," in_GPR_WRITE_WRITE_UNIT_VAL             ",Tcontrol_t        ,_param->_nb_gpr_write);
    5180  ALLOC1_SC_SIGNAL(out_GPR_WRITE_WRITE_UNIT_ACK               ,"out_GPR_WRITE_WRITE_UNIT_ACK             ",Tcontrol_t        ,_param->_nb_gpr_write);
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