Ignore:
Timestamp:
Apr 14, 2009, 8:39:12 PM (15 years ago)
Author:
rosiere
Message:

1) Add modelsim simulation systemC
2) Modelsim cosimulation systemC / VHDL is not finish !!!! (cf execute_queue and write_unit)
3) Add multi architecture
5) Add template for comparator, multiplier and divider
6) Change Message
Warning) Various test macro have change, many selftest can't compile

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest/src/test.cpp

    r112 r113  
    5050  sc_clock              *  in_CLOCK  = new sc_clock ("clock", 1.0, 0.5);         
    5151  sc_signal<Tcontrol_t> *  in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
     52
     53  sc_signal<Tcontrol_t        >    * out_ADDRESS_VAL                         ;
     54  sc_signal<Tcontrol_t        >    *  in_ADDRESS_ACK                         ; //icache_req_ack and ifetch_queue_ack
     55  sc_signal<Tgeneral_address_t>    * out_ADDRESS_INSTRUCTION_ADDRESS         ;
     56  sc_signal<Tcontrol_t        >   ** out_ADDRESS_INSTRUCTION_ENABLE          ; //[nb_instruction]
     57  sc_signal<Tinst_ifetch_ptr_t>    * out_ADDRESS_INST_IFETCH_PTR             ;
     58  sc_signal<Tbranch_state_t   >    * out_ADDRESS_BRANCH_STATE                ;
     59  sc_signal<Tprediction_ptr_t >    * out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID ;
     60  sc_signal<Tcontrol_t        >    * out_PREDICT_VAL                         ;
     61  sc_signal<Tcontrol_t        >    *  in_PREDICT_ACK                         ;
     62  sc_signal<Tgeneral_address_t>    * out_PREDICT_PC_PREVIOUS                 ;
     63  sc_signal<Tgeneral_address_t>    * out_PREDICT_PC_CURRENT                  ;
     64  sc_signal<Tcontrol_t        >    * out_PREDICT_PC_CURRENT_IS_DS_TAKE       ;
     65  sc_signal<Tgeneral_address_t>    *  in_PREDICT_PC_NEXT                     ;
     66  sc_signal<Tcontrol_t        >    *  in_PREDICT_PC_NEXT_IS_DS_TAKE          ;
     67  sc_signal<Tcontrol_t        >   **  in_PREDICT_INSTRUCTION_ENABLE          ; //[nb_instruction]
     68//sc_signal<Tcontrol_t        >    *  in_PREDICT_BRANCH_IS_CURRENT           ;
     69  sc_signal<Tbranch_state_t   >    *  in_PREDICT_BRANCH_STATE                ;
     70  sc_signal<Tprediction_ptr_t >    *  in_PREDICT_BRANCH_UPDATE_PREDICTION_ID ;
     71  sc_signal<Tinst_ifetch_ptr_t>    *  in_PREDICT_INST_IFETCH_PTR             ;
     72  sc_signal<Tcontrol_t        >    *  in_EVENT_VAL                           ;
     73  sc_signal<Tcontrol_t        >    * out_EVENT_ACK                           ;
     74  sc_signal<Tgeneral_address_t>    *  in_EVENT_ADDRESS                       ;
     75  sc_signal<Tgeneral_address_t>    *  in_EVENT_ADDRESS_NEXT                  ;
     76  sc_signal<Tcontrol_t        >    *  in_EVENT_ADDRESS_NEXT_VAL              ;
     77  sc_signal<Tcontrol_t        >    *  in_EVENT_IS_DS_TAKE                    ;
    5278
    5379  ALLOC0_SC_SIGNAL (out_ADDRESS_VAL                        ,"out_ADDRESS_VAL                        ",Tcontrol_t        );
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