Ignore:
Timestamp:
Apr 14, 2009, 8:39:12 PM (15 years ago)
Author:
rosiere
Message:

1) Add modelsim simulation systemC
2) Modelsim cosimulation systemC / VHDL is not finish !!!! (cf execute_queue and write_unit)
3) Add multi architecture
5) Add template for comparator, multiplier and divider
6) Change Message
Warning) Various test macro have change, many selftest can't compile

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_vhdl_body.cpp

    r81 r113  
    1919    vhdl->set_body ("");
    2020   
    21     for (uint32_t i=0; i<_param._nb_port; i++)
     21    for (uint32_t i=0; i<_param->_nb_port; i++)
    2222      {
    2323        std::string counter_inc, counter_dec;
    2424
    25         if (_param._size_data > 1)
     25        if (_param->_size_data > 1)
    2626          {
    2727            counter_inc = "in_COUNTER_"+toString(i)+"_DATA+1";
     
    3535
    3636        vhdl->set_body ("out_COUNTER_"+toString(i)+"_DATA <=");
    37         if (_param._size_data > 1)
     37        if (_param->_size_data > 1)
    3838          {
    3939            vhdl->set_body ("\tin_COUNTER_"+toString(i)+"_DATA+1 when in_COUNTER_"+toString(i)+"_ADDSUB = '1' and in_COUNTER_"+toString(i)+"_DATA < cst_max else");
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