Ignore:
Timestamp:
Apr 14, 2009, 8:39:12 PM (15 years ago)
Author:
rosiere
Message:

1) Add modelsim simulation systemC
2) Modelsim cosimulation systemC / VHDL is not finish !!!! (cf execute_queue and write_unit)
3) Add multi architecture
5) Add template for comparator, multiplier and divider
6) Change Message
Warning) Various test macro have change, many selftest can't compile

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_vhdl_declaration.cpp

    r81 r113  
    1919    log_printf(FUNC,Counter,"vhdl_declaration","Begin");
    2020   
    21     if (_param._size_data > 1)
     21    if (_param->_size_data > 1)
    2222      {
    23         vhdl->set_constant ("cst_min",_param._size_data,std_logic_others(_param._size_data,0));
    24         vhdl->set_constant ("cst_max",_param._size_data,std_logic_others(_param._size_data,1));
     23        vhdl->set_constant ("cst_min",_param->_size_data,std_logic_others(_param->_size_data,0));
     24        vhdl->set_constant ("cst_max",_param->_size_data,std_logic_others(_param->_size_data,1));
    2525      }
    2626
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