Ignore:
Timestamp:
Apr 14, 2009, 8:39:12 PM (15 years ago)
Author:
rosiere
Message:

1) Add modelsim simulation systemC
2) Modelsim cosimulation systemC / VHDL is not finish !!!! (cf execute_queue and write_unit)
3) Add multi architecture
5) Add template for comparator, multiplier and divider
6) Change Message
Warning) Various test macro have change, many selftest can't compile

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Vhdl_set_signal.cpp

    r95 r113  
    2222  {
    2323    log_printf(FUNC,Behavioural,FUNCTION,"Begin");
    24     set_list(_list_signal, "signal "+ name + "\t: " + type);
     24
     25    test_architecture();
     26
     27    set_list(_architecture[_name_architecture]._list_signal, "signal "+ name + "\t: " + type);
     28   
    2529    log_printf(FUNC,Behavioural,FUNCTION,"End");
    2630  };
     
    3943  {
    4044    log_printf(FUNC,Behavioural,FUNCTION,"Begin");
    41     _list_signal.push_back ("signal "+ name+"\t: "+type+"\t:= "+init);
     45
     46    test_architecture();
     47   
     48    _architecture[_name_architecture]._list_signal.push_back ("signal "+ name+"\t: "+type+"\t:= "+init);
     49
    4250    log_printf(FUNC,Behavioural,FUNCTION,"End");
    4351  };
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