Ignore:
Timestamp:
Apr 30, 2009, 3:51:41 PM (15 years ago)
Author:
moulu
Message:

1) added a generic multiplier (systemC isn't working with 8bits)
2) added a partial functionnal unit vhdl.

Location:
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop
Files:
11 added
16 edited

Legend:

Unmodified
Added
Removed

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Makefile.deps

    r81 r116  
    1616include                         $(DIR_MORPHEO)/Behavioural/Custom/Makefile.deps
    1717endif
     18ifndef Shifter
     19include                         $(DIR_MORPHEO)/Behavioural/Generic/Shifter/Makefile.deps
     20endif
    1821
    1922#-----[ Library ]------------------------------------------
    … …  
    2124                                        $(Custom_LIBRARY)       \
    2225                                        -lFunctionnal_unit      \
    23                                         $(Behavioural_LIBRARY) 
     26                                        $(Behavioural_LIBRARY)  \
     27                                        -lFunctionnal_unit      \
     28                                        $(Shifter_LIBRARY)     
    2429
    2530Functionnal_unit_DIR_LIBRARY    =       -L$(DIR_MORPHEO)/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/lib  \
    26                                         $(Custom_DIR_LIBRARY)   \
    27                                         $(Behavioural_DIR_LIBRARY)
     31                                        $(Custom_DIR_LIBRARY)      \
     32                                        $(Behavioural_DIR_LIBRARY) \
     33                                        $(Shifter_DIR_LIBRARY)
    2834
    29 Functionnal_unit_DEPENDENCIES   =       Custom_library  \
    30                                         Behavioural_library
     35Functionnal_unit_DEPENDENCIES   =       Custom_library          \
     36                                        Behavioural_library     \
     37                                        Shifter_library
    3138
    32 Functionnal_unit_CLEAN          =       Custom_library_clean    \
    33                                         Behavioural_library_clean
     39Functionnal_unit_CLEAN          =       Custom_library_clean      \
     40                                        Behavioural_library_clean \
     41                                        Shifter_library_clean
    3442
    3543#-----[ Rules ]--------------------------------------------

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Operation.h

    r101 r116  
    1 #ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_operation_h
    2 #define morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_operation_h
     1#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_operation_Operation_h
     2#define morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_operation_Operation_h
    33
    44/*

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h

    r97 r116  
    1 #ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_Types_h
    2 #define morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_Types_h
     1#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_operation_Types_h
     2#define morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_execute_unit_execute_unit_functionnal_unit_operation_Types_h
    33
    44/*

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/src/Operation.cpp

    r101 r116  
    5050    op->_exception    = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE;
    5151    op->_no_sequence  = 0;
    52   //op->_address      = 0;
     52#ifdef SYSTEMC_VHDL_COMPATIBILITY
     53    op->_address      = 0;
     54#else
     55  //op->_address      = 0;
     56#endif
    5357  };
    5458
    … …  
    7680    op->_exception    = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE;
    7781    op->_no_sequence  = 0;
    78   //op->_address      = 0;
     82#ifdef SYSTEMC_VHDL_COMPATIBILITY
     83    op->_address      = 0;
     84#else
     85  //op->_address      = 0;
     86#endif
    7987  };
    8088
    … …  
    102110    op->_exception    = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE;
    103111    op->_no_sequence  = 0;
    104   //op->_address      = 0;
     112#ifdef SYSTEMC_VHDL_COMPATIBILITY
     113    op->_address      = 0;
     114#else
     115  //op->_address      = 0;
     116#endif
    105117  };
    106118
    … …  
    140152    op->_exception    = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE;
    141153    op->_no_sequence  = 0;
    142   //op->_address      = 0;
     154#ifdef SYSTEMC_VHDL_COMPATIBILITY
     155    op->_address      = 0;
     156#else
     157  //op->_address      = 0;
     158#endif
    143159  };
    144160
    … …  
    178194    op->_exception    = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE;
    179195    op->_no_sequence  = 0;
    180   //op->_address      = 0;
     196#ifdef SYSTEMC_VHDL_COMPATIBILITY
     197    op->_address      = 0;
     198#else
     199  //op->_address      = 0;
     200#endif
    181201  };
    182202
    … …  
    201221    op->_exception    = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE;
    202222    op->_no_sequence  = 0;
    203   //op->_address      = 0;
     223#ifdef SYSTEMC_VHDL_COMPATIBILITY
     224    op->_address      = 0;
     225#else
     226  //op->_address      = 0;
     227#endif
    204228  };
    205229
    … …  
    224248    op->_exception    = (overflow==1)?EXCEPTION_ALU_RANGE:EXCEPTION_ALU_NONE;
    225249    op->_no_sequence  = 0;
    226   //op->_address      = 0;
     250#ifdef SYSTEMC_VHDL_COMPATIBILITY
     251    op->_address      = 0;
     252#else
     253  //op->_address      = 0;
     254#endif
    227255  };
    228256
    … …  
    243271    op->_exception    = EXCEPTION_ALU_NONE;
    244272    op->_no_sequence  = 0;
    245   //op->_address      = 0;
     273#ifdef SYSTEMC_VHDL_COMPATIBILITY
     274    op->_address      = 0;
     275#else
     276  //op->_address      = 0;
     277#endif
    246278  };
    247279
    … …  
    262294    op->_exception    = EXCEPTION_ALU_NONE;
    263295    op->_no_sequence  = 0;
    264   //op->_address      = 0;
     296#ifdef SYSTEMC_VHDL_COMPATIBILITY
     297    op->_address      = 0;
     298#else
     299  //op->_address      = 0;
     300#endif
    265301  };
    266302
    … …  
    281317    op->_exception    = EXCEPTION_ALU_NONE;
    282318    op->_no_sequence  = 0;
    283   //op->_address      = 0;
     319#ifdef SYSTEMC_VHDL_COMPATIBILITY
     320    op->_address      = 0;
     321#else
     322  //op->_address      = 0;
     323#endif
    284324  };
    285325
    … …  
    299339    op->_exception    = EXCEPTION_ALU_NONE;
    300340    op->_no_sequence  = 0;
    301   //op->_address      = 0;
     341#ifdef SYSTEMC_VHDL_COMPATIBILITY
     342    op->_address      = 0;
     343#else
     344  //op->_address      = 0;
     345#endif
    302346  };
    303347
    … …  
    320364    op->_exception    = EXCEPTION_ALU_NONE;
    321365    op->_no_sequence  = 0;
    322   //op->_address      = 0;
     366#ifdef SYSTEMC_VHDL_COMPATIBILITY
     367    op->_address      = 0;
     368#else
     369  //op->_address      = 0;
     370#endif
    323371  };
    324372
    … …  
    402450    op->_exception    = EXCEPTION_ALU_NONE;
    403451    op->_no_sequence  = 0;
    404   //op->_address      = 0;
     452#ifdef SYSTEMC_VHDL_COMPATIBILITY
     453    op->_address      = 0;
     454#else
     455  //op->_address      = 0;
     456#endif
    405457  };
    406458
    … …  
    421473    op->_exception    = EXCEPTION_ALU_NONE;
    422474    op->_no_sequence  = 0;
    423   //op->_address      = 0;
     475#ifdef SYSTEMC_VHDL_COMPATIBILITY
     476    op->_address      = 0;
     477#else
     478  //op->_address      = 0;
     479#endif
    424480  };
    425481
    … …  
    440496    op->_exception    = EXCEPTION_ALU_NONE;
    441497    op->_no_sequence  = 0;
    442   //op->_address      = 0;
     498#ifdef SYSTEMC_VHDL_COMPATIBILITY
     499    op->_address      = 0;
     500#else
     501  //op->_address      = 0;
     502#endif
    443503  };
    444504
    … …  
    459519    op->_exception    = EXCEPTION_ALU_NONE;
    460520    op->_no_sequence  = 0;
    461   //op->_address      = 0;
     521#ifdef SYSTEMC_VHDL_COMPATIBILITY
     522    op->_address      = 0;
     523#else
     524  //op->_address      = 0;
     525#endif
    462526  };
    463527
    … …  
    478542    op->_exception    = EXCEPTION_ALU_NONE;
    479543    op->_no_sequence  = 0;
    480   //op->_address      = 0;
     544#ifdef SYSTEMC_VHDL_COMPATIBILITY
     545    op->_address      = 0;
     546#else
     547  //op->_address      = 0;
     548#endif
    481549  };
    482550
    … …  
    497565    op->_exception    = EXCEPTION_ALU_NONE;
    498566    op->_no_sequence  = 0;
    499   //op->_address      = 0;
     567#ifdef SYSTEMC_VHDL_COMPATIBILITY
     568    op->_address      = 0;
     569#else
     570  //op->_address      = 0;
     571#endif
    500572  };
    501573
    … …  
    517589    op->_exception    = EXCEPTION_ALU_NONE;
    518590    op->_no_sequence  = 0;
    519   //op->_address      = 0;
     591#ifdef SYSTEMC_VHDL_COMPATIBILITY
     592    op->_address      = 0;
     593#else
     594  //op->_address      = 0;
     595#endif
    520596  };
    521597
    … …  
    537613    op->_exception    = EXCEPTION_ALU_NONE;
    538614    op->_no_sequence  = 0;
    539   //op->_address      = 0;
     615#ifdef SYSTEMC_VHDL_COMPATIBILITY
     616    op->_address      = 0;
     617#else
     618  //op->_address      = 0;
     619#endif
    540620  };
    541621
    … …  
    557637    op->_exception    = EXCEPTION_ALU_NONE;
    558638    op->_no_sequence  = 0;
    559   //op->_address      = 0;
     639#ifdef SYSTEMC_VHDL_COMPATIBILITY
     640    op->_address      = 0;
     641#else
     642  //op->_address      = 0;
     643#endif
    560644  };
    561645
    … …  
    577661    op->_exception    = EXCEPTION_ALU_NONE;
    578662    op->_no_sequence  = 0;
    579   //op->_address      = 0;
     663#ifdef SYSTEMC_VHDL_COMPATIBILITY
     664    op->_address      = 0;
     665#else
     666  //op->_address      = 0;
     667#endif
    580668  };
    581669
    … …  
    598686    op->_exception    = EXCEPTION_ALU_NONE;
    599687    op->_no_sequence  = 0;
    600   //op->_address      = 0;
     688#ifdef SYSTEMC_VHDL_COMPATIBILITY
     689    op->_address      = 0;
     690#else
     691  //op->_address      = 0;
     692#endif
    601693  };
    602694
    … …  
    619711    op->_exception    = EXCEPTION_ALU_NONE;
    620712    op->_no_sequence  = 0;
    621   //op->_address      = 0;
     713#ifdef SYSTEMC_VHDL_COMPATIBILITY
     714    op->_address      = 0;
     715#else
     716  //op->_address      = 0;
     717#endif
    622718  };
    623719
    … …  
    640736    op->_exception    = EXCEPTION_ALU_NONE;
    641737    op->_no_sequence  = 0;
    642   //op->_address      = 0;
     738#ifdef SYSTEMC_VHDL_COMPATIBILITY
     739    op->_address      = 0;
     740#else
     741  //op->_address      = 0;
     742#endif
    643743  };
    644744
    … …  
    661761    op->_exception    = EXCEPTION_ALU_NONE;
    662762    op->_no_sequence  = 0;
    663   //op->_address      = 0;
     763#ifdef SYSTEMC_VHDL_COMPATIBILITY
     764    op->_address      = 0;
     765#else
     766  //op->_address      = 0;
     767#endif
    664768  };
    665769
    … …  
    693797    op->_exception    = EXCEPTION_ALU_NONE;
    694798    op->_no_sequence  = 0;
    695   //op->_address      = 0;
     799#ifdef SYSTEMC_VHDL_COMPATIBILITY
     800    op->_address      = 0;
     801#else
     802  //op->_address      = 0;
     803#endif
    696804  };
    697805
    … …  
    725833    op->_exception    = EXCEPTION_ALU_NONE;
    726834    op->_no_sequence  = 0;
    727   //op->_address      = 0;
     835#ifdef SYSTEMC_VHDL_COMPATIBILITY
     836    op->_address      = 0;
     837#else
     838  //op->_address      = 0;
     839#endif
    728840  };
    729841
    … …  
    757869    op->_exception    = EXCEPTION_ALU_NONE;
    758870    op->_no_sequence  = 0;
    759   //op->_address      = 0;
     871#ifdef SYSTEMC_VHDL_COMPATIBILITY
     872    op->_address      = 0;
     873#else
     874  //op->_address      = 0;
     875#endif
    760876  };
    761877
    … …  
    789905    op->_exception    = EXCEPTION_ALU_NONE;
    790906    op->_no_sequence  = 0;
    791   //op->_address      = 0;
     907#ifdef SYSTEMC_VHDL_COMPATIBILITY
     908    op->_address      = 0;
     909#else
     910  //op->_address      = 0;
     911#endif
    792912  };
    793913
    … …  
    9121032    op->_exception    = EXCEPTION_ALU_NONE;
    9131033    op->_no_sequence  = 0;
    914   //op->_address      = 0;
     1034#ifdef SYSTEMC_VHDL_COMPATIBILITY
     1035    op->_address      = 0;
     1036#else
     1037  //op->_address      = 0;
     1038#endif
    9151039  };
    9161040
    … …  
    9361060    op->_exception    = EXCEPTION_ALU_NONE;
    9371061    op->_no_sequence  = 0;
    938   //op->_address      = 0;
     1062#ifdef SYSTEMC_VHDL_COMPATIBILITY
     1063    op->_address      = 0;
     1064#else
     1065  //op->_address      = 0;
     1066#endif
    9391067  };
    9401068
    … …  
    9601088    op->_exception    = EXCEPTION_ALU_NONE;
    9611089    op->_no_sequence  = 0;
    962   //op->_address      = 0;
     1090#ifdef SYSTEMC_VHDL_COMPATIBILITY
     1091    op->_address      = 0;
     1092#else
     1093  //op->_address      = 0;
     1094#endif
    9631095  };
    9641096

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/src/main.cpp

    r115 r116  
    6060        timing[i][j]._delay = timing[i][j]._latence = 1;
    6161    }
    62 
     62  timing[4][1]._delay = 1;
     63  timing[4][1]._latence = 7;
     64  timing[4][2]._delay = 1;
     65  timing[4][2]._latence = 7;
    6366  try
    6467    {

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/SelfTest/src/test.cpp

    r104 r116  
    238238 
    239239  transaction_in.push_back(execute_transaction(_param,0,0,0,  0,OPERATION_ALU_L_ADD     ,TYPE_ALU,0,0xdeadbeef,0x12344321,0x12345678,0              ,1,63,0x24689999,1,15,0              ,EXCEPTION_NONE     ,0));
     240
     241 
    240242  transaction_in.push_back(execute_transaction(_param,0,0,0,  1,OPERATION_ALU_L_ADD     ,TYPE_ALU,0,0xffffffff,0x12345678,0x12345678,0              ,1,56,0x2468acf0,1,3 ,0              ,EXCEPTION_NONE     ,0));
    241243  transaction_in.push_back(execute_transaction(_param,0,0,0,  2,OPERATION_ALU_L_ADD     ,TYPE_ALU,1,0x12345678,0x12345678,0xffffffff,0              ,1,56,0x2468acf0,1,3 ,0              ,EXCEPTION_NONE     ,0));
    … …  
    245247  transaction_in.push_back(execute_transaction(_param,0,0,0,  5,OPERATION_ALU_L_ADD     ,TYPE_ALU,1,0x80000000,0x80001000,0x0       ,0              ,1,1 ,0x1000    ,1,0 ,FLAG_CY|FLAG_OV,EXCEPTION_ALU_RANGE,0));
    246248  transaction_in.push_back(execute_transaction(_param,0,0,0,  6,OPERATION_ALU_L_ADD     ,TYPE_ALU,1,0x7fffffff,0x00000001,0x0       ,FLAG_CY|FLAG_OV,1,1 ,0x80000000,1,0 ,        FLAG_OV,EXCEPTION_ALU_RANGE,0));
    247                                                                                       
    248                                                                                       
     249 
     250 
    249251  transaction_in.push_back(execute_transaction(_param,0,0,0,  7,OPERATION_ALU_L_ADDC    ,TYPE_ALU,0,0xdeadbeef,0x12344321,0x12345678,0              ,1,63,0x24689999,1,15,0              ,EXCEPTION_NONE     ,0));
    250252  transaction_in.push_back(execute_transaction(_param,0,0,0,  8,OPERATION_ALU_L_ADDC    ,TYPE_ALU,0,0xffffffff,0x12345678,0x12345678,0              ,1,56,0x2468acf0,1,3 ,0              ,EXCEPTION_NONE     ,0));
    … …  
    254256  transaction_in.push_back(execute_transaction(_param,0,0,0, 12,OPERATION_ALU_L_ADDC    ,TYPE_ALU,1,0x80000000,0x80001000,0x0       ,0              ,1,1 ,0x1000    ,1,0 ,FLAG_CY|FLAG_OV,EXCEPTION_ALU_RANGE,0));
    255257  transaction_in.push_back(execute_transaction(_param,0,0,0, 13,OPERATION_ALU_L_ADDC    ,TYPE_ALU,1,0x7fffffff,0x00000001,0x0       ,0              ,1,1 ,0x80000000,1,0 ,        FLAG_OV,EXCEPTION_ALU_RANGE,0));
    256                                                                                       
     258 
    257259  transaction_in.push_back(execute_transaction(_param,0,0,0, 14,OPERATION_ALU_L_ADDC    ,TYPE_ALU,0,0xdeadbeef,0x12344320,0x12345678,FLAG_CY        ,1,63,0x24689999,1,15,0              ,EXCEPTION_NONE     ,0));
    258260  transaction_in.push_back(execute_transaction(_param,0,0,0, 15,OPERATION_ALU_L_ADDC    ,TYPE_ALU,0,0xffffffff,0x12345677,0x12345678,FLAG_CY        ,1,56,0x2468acf0,1,3 ,0              ,EXCEPTION_NONE     ,0));
    … …  
    262264  transaction_in.push_back(execute_transaction(_param,0,0,0, 19,OPERATION_ALU_L_ADDC    ,TYPE_ALU,1,0x80000000,0x8000000f,0x0       ,FLAG_CY        ,1,1 ,0x00000010,1,0 ,FLAG_CY|FLAG_OV,EXCEPTION_ALU_RANGE,0));
    263265  transaction_in.push_back(execute_transaction(_param,0,0,0, 20,OPERATION_ALU_L_ADDC    ,TYPE_ALU,1,0x7fffffff,0x00000000,0x0       ,FLAG_CY        ,1,1 ,0x80000000,1,0 ,        FLAG_OV,EXCEPTION_ALU_RANGE,0));
    264                                                                                       
    265                                                                                        
     266 
     267 
    266268  transaction_in.push_back(execute_transaction(_param,0,0,0, 21,OPERATION_ALU_L_AND     ,TYPE_ALU,0,0xdeadbeef,0x0000ffff,0x00ff00ff,0              ,1,63,0x000000ff,0,15,FLAG_CY        ,EXCEPTION_NONE     ,0));
    267269  transaction_in.push_back(execute_transaction(_param,0,0,0, 22,OPERATION_ALU_L_OR      ,TYPE_ALU,0,0xdeadbeef,0x0000ffff,0x00ff00ff,0              ,1,63,0x00ffffff,0,15,FLAG_CY        ,EXCEPTION_NONE     ,0));
    268270  transaction_in.push_back(execute_transaction(_param,0,0,0, 23,OPERATION_ALU_L_XOR     ,TYPE_ALU,0,0xdeadbeef,0x0000ffff,0x00ff00ff,0              ,1,63,0x00ffff00,0,15,FLAG_CY        ,EXCEPTION_NONE     ,0));
    269                                                                                       
     271 
    270272  transaction_in.push_back(execute_transaction(_param,0,0,0, 24,OPERATION_MOVE_L_CMOV    ,TYPE_MOVE,0,0x0       ,0xdeadbeef,0x12345678,0              ,1,63,0x12345678,0,15,FLAG_CY        ,EXCEPTION_NONE     ,0));
    271273  transaction_in.push_back(execute_transaction(_param,0,0,0, 25,OPERATION_MOVE_L_CMOV    ,TYPE_MOVE,0,0x0       ,0xdeadbeef,0x12345678,FLAG_F         ,1,63,0xdeadbeef,0,15,FLAG_CY        ,EXCEPTION_NONE     ,0));
    272274  transaction_in.push_back(execute_transaction(_param,0,0,0, 26,OPERATION_MOVE_L_MOVHI   ,TYPE_MOVE,1,0xdeadbeef,0x0       ,0x0       ,FLAG_F         ,1,63,0xbeef0000,0,15,FLAG_CY        ,EXCEPTION_NONE     ,0));
    273                                                                                       
    274                                                                                       
     275 
     276 
    275277  transaction_in.push_back(execute_transaction(_param,0,0,0, 27,OPERATION_BRANCH_L_TEST_F  ,TYPE_BRANCH,1,0xdeadbeef,0x0       ,0x0       ,0              ,0,63,0xbeef0000,0,15,FLAG_CY        ,EXCEPTION_NONE     ,0,0x00000000));
    276278  transaction_in.push_back(execute_transaction(_param,0,0,0, 28,OPERATION_BRANCH_L_TEST_F  ,TYPE_BRANCH,1,0xdeadbeef,0x0       ,0x0       ,FLAG_F         ,0,63,0xbeef0000,0,15,FLAG_CY        ,EXCEPTION_NONE     ,1,0xdeadbeef));
    277279  transaction_in.push_back(execute_transaction(_param,0,0,0, 29,OPERATION_BRANCH_L_TEST_NF ,TYPE_BRANCH,1,0xdeadbeef,0x0       ,0x0       ,FLAG_F         ,0,63,0xbeef0000,0,15,FLAG_CY        ,EXCEPTION_NONE     ,0,0x00000000));
    278280  transaction_in.push_back(execute_transaction(_param,0,0,0, 30,OPERATION_BRANCH_L_TEST_NF ,TYPE_BRANCH,1,0xdeadbeef,0x0       ,0x0       ,0              ,0,63,0xbeef0000,0,15,FLAG_CY        ,EXCEPTION_NONE     ,1,0xdeadbeef));
    279                                                                                       
    280                                                                                        
     281 
     282 
    281283  transaction_in.push_back(execute_transaction(_param,0,0,0, 31,OPERATION_BRANCH_L_JALR    ,TYPE_BRANCH,0,0xdeadbeef,0x0       ,0x12345678,0              ,0,63,0xdeadbeef,0,15,FLAG_CY        ,EXCEPTION_NONE     ,1,0x12345678>>2)); // jr
    282284  transaction_in.push_back(execute_transaction(_param,0,0,0, 32,OPERATION_BRANCH_L_JALR    ,TYPE_BRANCH,1,0xdeadbeef,0x0       ,0x12345678,0              ,1,63,0xdeadbeef<<2,0,15,FLAG_CY        ,EXCEPTION_NONE     ,1,0x12345678>>2)); // jal
    283285  transaction_in.push_back(execute_transaction(_param,0,0,0, 33,OPERATION_BRANCH_L_JALR    ,TYPE_BRANCH,1,0xdeadbeef,0x0       ,0x12345678,0              ,1,63,0xdeadbeef<<2,0,15,FLAG_CY        ,EXCEPTION_NONE     ,1,0x12345678>>2)); // jalr
    284                                                             
     286 
    285287  transaction_in.push_back(execute_transaction(_param,0,0,0, 34,OPERATION_EXTEND_L_EXTEND_S,TYPE_EXTEND,1,8         ,0x12345678,0x0       ,0              ,1,63,0x00000078,0,15,FLAG_CY        ,EXCEPTION_NONE     ,0));
    286288  transaction_in.push_back(execute_transaction(_param,0,0,0, 35,OPERATION_EXTEND_L_EXTEND_S,TYPE_EXTEND,1,16        ,0x12345678,0x0       ,0              ,1,63,0x00005678,0,15,FLAG_CY        ,EXCEPTION_NONE     ,0));
    … …  
    296298  transaction_in.push_back(execute_transaction(_param,0,0,0, 41,OPERATION_EXTEND_L_EXTEND_Z,TYPE_EXTEND,1,16        ,0xdeadbeef,0x0       ,0              ,1,63,0x0000beef,0,15,FLAG_CY        ,EXCEPTION_NONE     ,0));
    297299  transaction_in.push_back(execute_transaction(_param,0,0,0, 42,OPERATION_EXTEND_L_EXTEND_Z,TYPE_EXTEND,1,32        ,0xdeadbeef,0x0       ,0              ,1,63,0xdeadbeef,0,15,FLAG_CY        ,EXCEPTION_NONE     ,0));
    298                                                             
     300 
    299301  transaction_in.push_back(execute_transaction(_param,0,0,0, 43,OPERATION_SHIFT_L_SLL     ,TYPE_SHIFT,1,0         ,0xdeadbeef,0x0       ,0              ,1,63,0xdeadbeef,0,15,FLAG_CY        ,EXCEPTION_NONE     ,0));
    300302  transaction_in.push_back(execute_transaction(_param,0,0,0, 44,OPERATION_SHIFT_L_SLL     ,TYPE_SHIFT,1,4         ,0xdeadbeef,0x0       ,0              ,1,63,0xeadbeef0,0,15,FLAG_CY        ,EXCEPTION_NONE     ,0));
    … …  
    344346  transaction_in.push_back(execute_transaction(_param,0,0,0, 88,OPERATION_SHIFT_L_ROR     ,TYPE_SHIFT,1,24        ,0x12345678,0x0       ,0              ,1,63,0x34567812,0,15,FLAG_CY        ,EXCEPTION_NONE     ,0));
    345347  transaction_in.push_back(execute_transaction(_param,0,0,0, 89,OPERATION_SHIFT_L_ROR     ,TYPE_SHIFT,1,32        ,0x12345678,0x0       ,0              ,1,63,0x12345678,0,15,FLAG_CY        ,EXCEPTION_NONE     ,0));
    346                                                             
     348 
    347349  transaction_in.push_back(execute_transaction(_param,0,0,0, 90,OPERATION_FIND_L_FF1     ,TYPE_FIND,0,0         ,0x12345678,0x0       ,0              ,1,63,4         ,0,15,FLAG_CY        ,EXCEPTION_NONE     ,0));
    348350  transaction_in.push_back(execute_transaction(_param,0,0,0, 91,OPERATION_FIND_L_FF1     ,TYPE_FIND,0,0         ,0x0       ,0x0       ,0              ,1,63,0          ,0,15,FLAG_CY        ,EXCEPTION_NONE     ,0));
    … …  
    355357  transaction_in.push_back(execute_transaction(_param,0,0,0, 98,OPERATION_FIND_L_FL1     ,TYPE_FIND,0,0         ,0x1       ,0x0       ,0              ,1,63,1          ,0,15,FLAG_CY        ,EXCEPTION_NONE     ,0));
    356358  transaction_in.push_back(execute_transaction(_param,0,0,0, 99,OPERATION_FIND_L_FL1     ,TYPE_FIND,0,0         ,0x80000000,0x0       ,0              ,1,63,32         ,0,15,FLAG_CY        ,EXCEPTION_NONE     ,0));
    357 
     359 
    358360  transaction_in.push_back(execute_transaction(_param,0,0,0,100,OPERATION_ALU_L_SUB     ,TYPE_ALU,0,0         ,0x12344321,0x1       ,0              ,1,63,0x12344320,1,15,0              ,EXCEPTION_NONE     ,0));
    359361  transaction_in.push_back(execute_transaction(_param,0,0,0,101,OPERATION_ALU_L_SUB     ,TYPE_ALU,0,0         ,0x12345678,0xffffffff,0              ,1,56,0x12345679,1,3 ,0              ,EXCEPTION_NONE     ,0));
    … …  
    363365  transaction_in.push_back(execute_transaction(_param,0,0,0,105,OPERATION_ALU_L_SUB     ,TYPE_ALU,0,0         ,0x80001000,0x80000000,0              ,1,1 ,0x1000    ,1,0 ,        FLAG_OV,EXCEPTION_ALU_RANGE,0));
    364366  transaction_in.push_back(execute_transaction(_param,0,0,0,106,OPERATION_ALU_L_SUB     ,TYPE_ALU,0,0         ,0x00000001,0x7fffffff,FLAG_CY|FLAG_OV,1,1 ,0x80000002,1,0 ,FLAG_CY        ,EXCEPTION_NONE     ,0));
    365 
     367 
    366368  transaction_in.push_back(execute_transaction(_param,0,0,0,120,OPERATION_TEST_L_SFEQ    ,TYPE_TEST,0,0         ,0xdead    ,0xdead    ,0              ,0,63,0x0       ,1,15,FLAG_F         ,EXCEPTION_NONE     ,0)); // + == +
    367369  transaction_in.push_back(execute_transaction(_param,0,0,0,121,OPERATION_TEST_L_SFEQ    ,TYPE_TEST,0,0         ,0x25071959,0x21071981,0              ,0,63,0x0       ,1,15,0              ,EXCEPTION_NONE     ,0)); // + >  +
    … …  
    484486  transaction_in.push_back(execute_transaction(_param,0,0,0,300,OPERATION_TEST_L_SFLTS   ,TYPE_TEST,0,0         ,0x33333333,0xdeadbeef,0              ,0,63,0x0       ,1,15,0              ,EXCEPTION_NONE     ,0)); // + >  - (in unsigned)
    485487  transaction_in.push_back(execute_transaction(_param,0,0,0,301,OPERATION_TEST_L_SFLTS   ,TYPE_TEST,0,0         ,0x11111111,0xdeadbeef,0              ,0,63,0x0       ,1,15,0              ,EXCEPTION_NONE     ,0)); // + <  - (in unsigned)
    486 
     488  /*
    487489  transaction_in.push_back(execute_transaction(_param,0,0,0,400,OPERATION_SPECIAL_L_MTSPR   ,TYPE_SPECIAL,1,GROUP_ICACHE<<11,   3,0xdeadbeef,0              ,0,63,0xdeadbeef,0, 0,0              ,EXCEPTION_ALU_SPR_ACCESS_MUST_WRITE  ,0,(GROUP_ICACHE<<11)|   3));
    488490  transaction_in.push_back(execute_transaction(_param,0,0,0,401,OPERATION_SPECIAL_L_MTSPR   ,TYPE_SPECIAL,1,GROUP_ICACHE<<11,   5,0xdeadbeef,0              ,0,63,0xdeadbeef,0, 0,0              ,EXCEPTION_ALU_SPR_ACCESS_MUST_WRITE  ,0,(GROUP_ICACHE<<11)|   5));
    … …  
    568570  transaction_in.push_back(execute_transaction(_param,0,0,0,627,OPERATION_SPECIAL_L_MFSPR   ,TYPE_SPECIAL,1,GROUP_CUSTOM_7<<11, 0,0x0       ,0              ,1,63,0xe       ,0, 0,0              ,EXCEPTION_ALU_NONE                   ,0,(GROUP_CUSTOM_7<<11)|0));
    569571  transaction_in.push_back(execute_transaction(_param,0,0,0,628,OPERATION_SPECIAL_L_MFSPR   ,TYPE_SPECIAL,1,GROUP_CUSTOM_7<<11, 0,0x0       ,0              ,1,63,0xa       ,0, 0,0              ,EXCEPTION_ALU_NONE                   ,0,(GROUP_CUSTOM_7<<11)|0));
    570 
     572  */
    571573  transaction_in.push_back(execute_transaction(_param,0,0,0,700,OPERATION_MUL_L_MUL     ,TYPE_MUL,0,0         ,0x00000001,0x00000001,0              ,1,63,0x00000001,1,15,0              ,EXCEPTION_NONE     ,0));
    572574  transaction_in.push_back(execute_transaction(_param,0,0,0,701,OPERATION_MUL_L_MUL     ,TYPE_MUL,0,0         ,0x00002107,0x00001981,0              ,1,63,0x034a5387,1,15,0              ,EXCEPTION_NONE     ,0));
    … …  
    574576  transaction_in.push_back(execute_transaction(_param,0,0,0,703,OPERATION_MUL_L_MUL     ,TYPE_MUL,0,0         ,0x40000000,0x00000002,0              ,1,63,0x80000000,1,15,0              ,EXCEPTION_NONE     ,0));
    575577  transaction_in.push_back(execute_transaction(_param,0,0,0,704,OPERATION_MUL_L_MUL     ,TYPE_MUL,0,0         ,0x40000000,0x00000004,0              ,1,63,0x00000000,1,15,FLAG_CY|FLAG_OV,EXCEPTION_ALU_RANGE,0));
    576 
     578 
    577579  transaction_in.push_back(execute_transaction(_param,0,0,0,800,OPERATION_MUL_L_MULU    ,TYPE_MUL,0,0         ,0x00000001,0x00000001,0              ,1,63,0x00000001,1,15,0              ,EXCEPTION_NONE     ,0));
    578580  transaction_in.push_back(execute_transaction(_param,0,0,0,801,OPERATION_MUL_L_MULU    ,TYPE_MUL,0,0         ,0x00002107,0x00001981,0              ,1,63,0x034a5387,1,15,0              ,EXCEPTION_NONE     ,0));
    … …  
    580582  transaction_in.push_back(execute_transaction(_param,0,0,0,803,OPERATION_MUL_L_MULU    ,TYPE_MUL,0,0         ,0x40000000,0x00000002,0              ,1,63,0x80000000,1,15,0              ,EXCEPTION_NONE     ,0));
    581583  transaction_in.push_back(execute_transaction(_param,0,0,0,804,OPERATION_MUL_L_MULU    ,TYPE_MUL,0,0         ,0x40000000,0x00000004,0              ,1,63,0x00000000,1,15,FLAG_CY|FLAG_OV,EXCEPTION_ALU_RANGE,0));
    582 
     584 
    583585
    584586
    … …  
    602604      while (nb_transaction_out > 0)
    603605      {
    604           Tcontrol_t val = ((rand()%100) < percent_transaction_execute_in) and not transaction_in.empty();
     606        Tcontrol_t val = ((rand()%100) < percent_transaction_execute_in) and not transaction_in.empty() and transaction_out.empty();
    605607          in_EXECUTE_IN_VAL .write(val);
    606608          in_EXECUTE_OUT_ACK.write((rand()%100) < percent_transaction_execute_out);

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Functionnal_unit.h

    r97 r116  
    1717#include "Common/include/ToString.h"
    1818#include "Common/include/Debug.h"
    19 #include "Behavioural/include/Types.h"
    2019#include "Behavioural/include/Identification.h"
    2120
    22 #include "Behavioural/include/Types.h"
     21#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Operation.h"
     22#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Types.h"
    2323#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Parameters.h"
    24 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Operation.h"
    2524#ifdef STATISTICS
    2625#include "Behavioural/include/Stat.h"
    … …  
    160159  public  : void        transition                (void);
    161160  public  : void        genMoore                  (void);
     161  public  : void        genMealy                  (void);
    162162
    163163#endif                                         

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Parameters.h

    r88 r116  
    1111#include "Common/include/Debug.h"
    1212#include "Behavioural/include/Parameters.h"
     13#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Types.h"
    1314#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/Operation/include/Types.h"
    1415#include "Behavioural/Custom/include/Custom.h"
    … …  
    3839//public : uint32_t            _size_store_queue             ;
    3940//public : uint32_t            _size_load_queue              ;
     41  public : const Tfunctionnal_unit_scheme_t _functionnal_unit_scheme;
    4042
    4143  public : execute_timing_t ** _timing                       ;

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit.cpp

    r88 r116  
    8484        SC_METHOD (genMoore);
    8585        dont_initialize ();
    86         sensitive << (*(in_CLOCK)).neg();
     86        sensitive << (*(in_CLOCK)).neg(); // use internal register
     87       
     88# ifdef SYSTEMCASS_SPECIFIC
     89        // List dependency information
     90# endif   
     91
     92        log_printf(INFO,Functionnal_unit,FUNCTION,"Method - genMealy");
     93
     94        SC_METHOD (genMealy);
     95        dont_initialize ();
     96        sensitive << (*(in_CLOCK)).neg()  // use internal register
     97//                << (*(in_EXECUTE_IN_VAL ))
     98                  << (*(in_EXECUTE_OUT_ACK));
     99
    87100       
    88101# ifdef SYSTEMCASS_SPECIFIC

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_genMoore.cpp

    r97 r116  
    2020
    2121#undef  FUNCTION
    22 #define FUNCTION "Functionnal_unit::genMealy"
     22#define FUNCTION "Functionnal_unit::genMoore"
    2323  void Functionnal_unit::genMoore (void)
    2424  {
    … …  
    2727
    2828    {
    29       internal_EXECUTE_IN_ACK = not reg_BUSY_IN;
    30      
    31       PORT_WRITE(out_EXECUTE_IN_ACK           , internal_EXECUTE_IN_ACK);
    32     }
    33 
    34     {
    35       internal_EXECUTE_OUT_VAL = reg_BUSY_OUT and (_execute_operation_out->_timing._latence == 0);
    36      
    37       PORT_WRITE(out_EXECUTE_OUT_VAL          , internal_EXECUTE_OUT_VAL);
    3829      if (_param->_have_port_context_id)
    3930      PORT_WRITE(out_EXECUTE_OUT_CONTEXT_ID   ,_execute_operation_out->_context_id   );

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_transition.cpp

    r100 r116  
    5858          }
    5959       
     60
     61        if (reg_BUSY_IN and not reg_BUSY_OUT)
     62//      if (not reg_BUSY_OUT_old or)
     63          {
     64            reg_BUSY_OUT = reg_BUSY_IN;
     65            reg_BUSY_IN  = false;
     66
     67            _execute_operation_out->_timing        = _execute_operation_in->_timing       ;
     68            _execute_operation_out->_context_id    = _execute_operation_in->_context_id   ;
     69            _execute_operation_out->_front_end_id  = _execute_operation_in->_front_end_id ;
     70            _execute_operation_out->_ooo_engine_id = _execute_operation_in->_ooo_engine_id;
     71            _execute_operation_out->_packet_id     = _execute_operation_in->_packet_id    ;
     72            _execute_operation_out->_operation     = _execute_operation_in->_operation    ;
     73            _execute_operation_out->_type          = _execute_operation_in->_type         ;
     74            _execute_operation_out->_has_immediat  = _execute_operation_in->_has_immediat ;
     75            _execute_operation_out->_immediat      = _execute_operation_in->_immediat     ;
     76            _execute_operation_out->_data_ra       = _execute_operation_in->_data_ra      ;
     77            _execute_operation_out->_data_rb       = _execute_operation_in->_data_rb      ;
     78            _execute_operation_out->_data_rc       = _execute_operation_in->_data_rc      ;
     79            _execute_operation_out->_data_rd       = _execute_operation_in->_data_rd      ;
     80            _execute_operation_out->_data_re       = _execute_operation_in->_data_re      ;
     81            _execute_operation_out->_write_rd      = _execute_operation_in->_write_rd     ;
     82            _execute_operation_out->_num_reg_rd    = _execute_operation_in->_num_reg_rd   ;
     83            _execute_operation_out->_write_re      = _execute_operation_in->_write_re     ;
     84            _execute_operation_out->_num_reg_re    = _execute_operation_in->_num_reg_re   ;
     85            _execute_operation_out->_exception     = _execute_operation_in->_exception    ;
     86            _execute_operation_out->_no_sequence   = _execute_operation_in->_no_sequence  ;
     87            _execute_operation_out->_address       = _execute_operation_in->_address      ;
     88          }
     89
     90
     91
    6092        // Test if push
    6193        execute_register_t * execute_register = NULL;
    … …  
    178210        }
    179211
    180         if (reg_BUSY_IN and not reg_BUSY_OUT)
    181           {
    182             reg_BUSY_OUT = reg_BUSY_IN;
    183             reg_BUSY_IN  = false;
    184 
    185             _execute_operation_out->_timing        = _execute_operation_in->_timing       ;
    186             _execute_operation_out->_context_id    = _execute_operation_in->_context_id   ;
    187             _execute_operation_out->_front_end_id  = _execute_operation_in->_front_end_id ;
    188             _execute_operation_out->_ooo_engine_id = _execute_operation_in->_ooo_engine_id;
    189             _execute_operation_out->_packet_id     = _execute_operation_in->_packet_id    ;
    190             _execute_operation_out->_operation     = _execute_operation_in->_operation    ;
    191             _execute_operation_out->_type          = _execute_operation_in->_type         ;
    192             _execute_operation_out->_has_immediat  = _execute_operation_in->_has_immediat ;
    193             _execute_operation_out->_immediat      = _execute_operation_in->_immediat     ;
    194             _execute_operation_out->_data_ra       = _execute_operation_in->_data_ra      ;
    195             _execute_operation_out->_data_rb       = _execute_operation_in->_data_rb      ;
    196             _execute_operation_out->_data_rc       = _execute_operation_in->_data_rc      ;
    197             _execute_operation_out->_data_rd       = _execute_operation_in->_data_rd      ;
    198             _execute_operation_out->_data_re       = _execute_operation_in->_data_re      ;
    199             _execute_operation_out->_write_rd      = _execute_operation_in->_write_rd     ;
    200             _execute_operation_out->_num_reg_rd    = _execute_operation_in->_num_reg_rd   ;
    201             _execute_operation_out->_write_re      = _execute_operation_in->_write_re     ;
    202             _execute_operation_out->_num_reg_re    = _execute_operation_in->_num_reg_re   ;
    203             _execute_operation_out->_exception     = _execute_operation_in->_exception    ;
    204             _execute_operation_out->_no_sequence   = _execute_operation_in->_no_sequence  ;
    205             _execute_operation_out->_address       = _execute_operation_in->_address      ;
    206           }
    207212       
    208213        // each cycle : decrease the latence
    … …  
    210215          _execute_operation_out->_timing._latence --;
    211216      }
    212 
     217   
    213218#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
    214219    end_cycle ();

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_vhdl.cpp

    r81 r116  
    99#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/include/Functionnal_unit.h"
    1010#include "Behavioural/include/Vhdl.h"
     11#include "Behavioural/Generic/Shifter/include/Shifter.h"
    1112
    1213namespace morpheo                    {
    … …  
    2526  {
    2627    log_printf(FUNC,Functionnal_unit,FUNCTION,"Begin");
     28
     29    morpheo::behavioural::generic::shifter::Parameters * param_shifter;
     30   
     31    param_shifter = new morpheo::behavioural::generic::shifter::Parameters
     32      (
     33       _param->_size_general_data,     // size_data
     34       1,                     // nb_port
     35       0,                     // shift_value
     36       generic::shifter::external_rotate,       // rotate
     37       generic::shifter::external_direction,    // direction
     38       generic::shifter::external_carry,         // carry
     39       false                 // type_completion_bool
     40       );
     41 
     42    morpheo::behavioural::generic::shifter::Shifter      * shifter;
     43
     44    std::string shifter_name = _name + "_shifter";
     45    shifter = new morpheo::behavioural::generic::shifter::Shifter
     46      (shifter_name.c_str()
     47#ifdef STATISTICS
     48       ,NULL
     49#endif
     50       ,param_shifter
     51       ,USE_VHDL);
     52   
     53    _component->set_component(shifter->_component
     54#ifdef POSITION
     55                              , 50, 50, 50, 50
     56#endif
     57                              , INSTANCE_LIBRARY
     58                              );
    2759
    2860    Vhdl * vhdl = new Vhdl (_name);

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_vhdl_body.cpp

    r81 r116  
    2525    log_printf(FUNC,Functionnal_unit,FUNCTION,"Begin");
    2626    vhdl->set_body ("");
     27    vhdl->set_comment(0,"");
     28    vhdl->set_comment(0,"-----------------------------------");
     29    vhdl->set_comment(0,"-- Registers                       ");
     30    vhdl->set_comment(0,"-----------------------------------");
     31    vhdl->set_comment(0,"");
     32    vhdl->set_body ("");
     33    vhdl->set_body (0,"process (in_CLOCK)");
     34    vhdl->set_body (0,"begin");
     35    vhdl->set_body (1,"if in_CLOCK'event and in_CLOCK = '1' then");
     36
     37    vhdl->set_body (2,"if (in_NRESET = '0') then");
     38    vhdl->set_body (3,"reg_BUSY_IN <= '0';");
     39    vhdl->set_body (3,"reg_BUSY_OUT <= '0';");
     40    vhdl->set_body (2,"else");
     41
     42    vhdl->set_comment (3,"Input Buffer");
     43    vhdl->set_body (3,"if (sig_EXECUTE_IN_ACK = '1') then");
     44    vhdl->set_body (4,"reg_BUSY_IN <= in_EXECUTE_IN_VAL;");
     45    if(_param->_have_port_context_id)
     46      vhdl->set_body (4,"reg_EXECUTE_IN_CONTEXT_ID <= in_EXECUTE_IN_CONTEXT_ID;");
     47    if(_param->_have_port_front_end_id)
     48      vhdl->set_body (4,"reg_EXECUTE_IN_FRONT_END_ID <= in_EXECUTE_IN_FRONT_END_ID;");
     49    if(_param->_have_port_ooo_engine_id)
     50      vhdl->set_body (4,"reg_EXECUTE_IN_OOO_ENGINE_ID <= in_EXECUTE_IN_OOO_ENGINE_ID;");
     51    if(_param->_have_port_rob_ptr)
     52      vhdl->set_body (4,"reg_EXECUTE_IN_PACKET_ID <= in_EXECUTE_IN_PACKET_ID;");
     53    vhdl->set_body (4,"reg_EXECUTE_IN_OPERATION <= in_EXECUTE_IN_OPERATION;");
     54    vhdl->set_body (4,"reg_EXECUTE_IN_TYPE <= in_EXECUTE_IN_TYPE;");
     55    vhdl->set_body (4,"reg_EXECUTE_IN_DATA_RA <= in_EXECUTE_IN_DATA_RA;");
     56    vhdl->set_body (4,"reg_EXECUTE_IN_DATA_RB <= in_EXECUTE_IN_DATA_RB;");
     57    vhdl->set_body (4,"reg_EXECUTE_IN_DATA_RC <= in_EXECUTE_IN_DATA_RC;");
     58    vhdl->set_body (4,"reg_EXECUTE_IN_HAS_IMMEDIAT <= in_EXECUTE_IN_HAS_IMMEDIAT;");   
     59    vhdl->set_body (4,"reg_EXECUTE_IN_IMMEDIAT <= in_EXECUTE_IN_IMMEDIAT;");
     60    vhdl->set_body (4,"reg_EXECUTE_IN_WRITE_RD <= in_EXECUTE_IN_WRITE_RD;");
     61    vhdl->set_body (4,"reg_EXECUTE_IN_NUM_REG_RD <= in_EXECUTE_IN_NUM_REG_RD;");
     62    vhdl->set_body (4,"reg_EXECUTE_IN_WRITE_RE <= in_EXECUTE_IN_WRITE_RE;");
     63    vhdl->set_body (4,"reg_EXECUTE_IN_NUM_REG_RE <= in_EXECUTE_IN_NUM_REG_RE;");
     64    vhdl->set_body (3,"end if;");
     65
     66    vhdl->set_comment (3,"Output Buffer");
     67    vhdl->set_body (3,"if (sig_EXECUTE_OUT_UPDATE = '1') then");
     68    vhdl->set_body (4,"reg_BUSY_OUT <= reg_BUSY_IN;");
     69    if(_param->_have_port_context_id)
     70      vhdl->set_body (4,"reg_EXECUTE_OUT_CONTEXT_ID <= sig_EXECUTE_OUT_CONTEXT_ID;");
     71    if(_param->_have_port_front_end_id)
     72      vhdl->set_body (4,"reg_EXECUTE_OUT_FRONT_END_ID <= sig_EXECUTE_OUT_FRONT_END_ID;");
     73    if(_param->_have_port_ooo_engine_id)
     74      vhdl->set_body (4,"reg_EXECUTE_OUT_OOO_ENGINE_ID <= sig_EXECUTE_OUT_OOO_ENGINE_ID;");
     75    if(_param->_have_port_rob_ptr)
     76      vhdl->set_body (4,"reg_EXECUTE_OUT_PACKET_ID <= sig_EXECUTE_OUT_PACKET_ID;");
     77    vhdl->set_body (4,"reg_EXECUTE_OUT_WRITE_RD <= sig_EXECUTE_OUT_WRITE_RD;");
     78    vhdl->set_body (4,"reg_EXECUTE_OUT_NUM_REG_RD <= sig_EXECUTE_OUT_NUM_REG_RD;");
     79    vhdl->set_body (4,"reg_EXECUTE_OUT_DATA_RD <= sig_EXECUTE_OUT_DATA_RD;");
     80    vhdl->set_body (4,"reg_EXECUTE_OUT_WRITE_RE <= sig_EXECUTE_OUT_WRITE_RE;");
     81    vhdl->set_body (4,"reg_EXECUTE_OUT_NUM_REG_RE <= sig_EXECUTE_OUT_NUM_REG_RE;");
     82    vhdl->set_body (4,"reg_EXECUTE_OUT_DATA_RE <= sig_EXECUTE_OUT_DATA_RE;");
     83    vhdl->set_body (4,"reg_EXECUTE_OUT_EXCEPTION <= sig_EXECUTE_OUT_EXCEPTION;");
     84    vhdl->set_body (4,"reg_EXECUTE_OUT_NO_SEQUENCE <= sig_EXECUTE_OUT_NO_SEQUENCE;");
     85    vhdl->set_body (4,"reg_EXECUTE_OUT_ADDRESS <= sig_EXECUTE_OUT_ADDRESS;");
     86    vhdl->set_body (3,"end if;");
     87    vhdl->set_body (2,"end if;");
     88    vhdl->set_body (1,"end if;");
     89    vhdl->set_body (0,"end process;");
     90
     91    vhdl->set_body ("");
     92    vhdl->set_comment(0,"");
     93    vhdl->set_comment(0,"-----------------------------------");
     94    vhdl->set_comment(0,"-- Insides                         ");
     95    vhdl->set_comment(0,"-----------------------------------");
     96    vhdl->set_comment(0,"");
     97
     98    vhdl->set_body (0,"");
     99    vhdl->set_body (0,"sig_B_OPERAND <= reg_EXECUTE_IN_IMMEDIAT when (reg_EXECUTE_IN_HAS_IMMEDIAT = '1') else");
     100    vhdl->set_body (1,"reg_EXECUTE_IN_DATA_RB;");
     101
     102    vhdl->set_comment(0,"");
     103    vhdl->set_comment(0,"ALU");
     104    vhdl->set_comment(0,"");
     105
     106    vhdl->set_body (0,"sig_IS_ARITH <= reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_ADD))+") or reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_ADDC))+") or reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_SUB))+");");
     107
     108    vhdl->set_body (0,"sig_IS_LOGIC <= reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_AND))+") or reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_OR))+") or reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_XOR))+");");
     109
     110    vhdl->set_body (0,"sig_CIN_ARITH <= reg_EXECUTE_IN_DATA_RC("+toString(FLAG_POSITION_CY)+") and reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_ADDC))+");");
     111//    vhdl->set_body (0,"sig_CIN_ARITH <= (reg_EXECUTE_IN_DATA_RC("+toString(FLAG_POSITION_CY)+") and reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_ADDC))+")) or reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_SUB))+");");
     112
     113//    vhdl->set_body (0,"sig_ARITH_B_OPERAND <= not (sig_B_OPERAND) when (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_SUB))+") = '1') else");
     114    vhdl->set_body (0,"sig_ARITH_B_OPERAND <= ((not sig_B_OPERAND) + 1) when (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_SUB))+") = '1') else");
     115    vhdl->set_body (1,"sig_B_OPERAND;");
     116
     117    vhdl->set_body (0,"sig_RES_ARITH <= ('0' & reg_EXECUTE_IN_DATA_RA) + ('0' & sig_ARITH_B_OPERAND) + ("+std_logic_cst(_param->_size_general_data-2,0)+" & sig_CIN_ARITH);");
     118
     119    vhdl->set_body (0,"");
     120    vhdl->set_body (0,"sig_A_AND_B <= reg_EXECUTE_IN_DATA_RA and sig_B_OPERAND;");
     121    vhdl->set_body (0,"sig_A_OR_B <= reg_EXECUTE_IN_DATA_RA or sig_B_OPERAND;");
     122    vhdl->set_body (0,"sig_A_XOR_B <= reg_EXECUTE_IN_DATA_RA xor sig_B_OPERAND;");
     123
     124    vhdl->set_body (0,"");
     125    vhdl->set_body (0,"with reg_EXECUTE_IN_OPERATION select");
     126    vhdl->set_body (0,"sig_RES_LOGIC <=");
     127    vhdl->set_body (1,"sig_A_AND_B when "+std_logic_cst(_param->_size_operation,OPERATION_ALU_L_AND)+",");
     128    vhdl->set_body (1,"sig_A_OR_B  when "+std_logic_cst(_param->_size_operation,OPERATION_ALU_L_OR)+",");
     129    vhdl->set_body (1,"sig_A_XOR_B when "+std_logic_cst(_param->_size_operation,OPERATION_ALU_L_XOR)+",");
     130    vhdl->set_body (1,std_logic_cst(_param->_size_general_data,0)+" when others;");
     131
     132    vhdl->set_body (0,"sig_RES_ALU <=");
     133    vhdl->set_body (1,"sig_RES_ARITH ("+toString(_param->_size_general_data-1)+" downto 0) when (sig_IS_ARITH = '1') else");
     134    vhdl->set_body (1,"sig_RES_LOGIC when (sig_IS_LOGIC = '1') else");
     135    vhdl->set_body (1,std_logic_cst(_param->_size_general_data,0)+";");
     136
     137    vhdl->set_body (0,"");
     138    vhdl->set_comment(0,"In ISA l.sub doesn't change carry flag.");
     139    vhdl->set_body (0,"sig_COUT_ALU <= (sig_RES_ARITH("+toString(_param->_size_general_data)+") and (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_ADD))+") or reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_ADDC))+"))) or (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_ALU_L_SUB))+") and reg_EXECUTE_IN_DATA_RC("+toString(FLAG_POSITION_CY)+"));");
     140    vhdl->set_body (0,"sig_OVR_ALU <= ((sig_ARITH_B_OPERAND("+toString(_param->_size_general_data-1)+") and reg_EXECUTE_IN_DATA_RA("+toString(_param->_size_general_data-1)+") and not sig_RES_ARITH("+toString(_param->_size_general_data-1)+")) or (not sig_ARITH_B_OPERAND("+toString(_param->_size_general_data-1)+") and not reg_EXECUTE_IN_DATA_RA("+toString(_param->_size_general_data-1)+") and sig_RES_ARITH("+toString(_param->_size_general_data-1)+"))) and sig_IS_ARITH;");
     141
     142    vhdl->set_body (0,"");
     143    vhdl->set_comment(0,"");
     144    vhdl->set_comment(0,"MOVE");
     145    vhdl->set_comment(0,"");
     146    vhdl->set_body (0,"sig_MOVHI <= reg_EXECUTE_IN_IMMEDIAT("+toString(_param->_size_general_data-17)+" downto 0) & "+std_logic_cst(16,0)+";");
     147   
     148    vhdl->set_body (0,"sig_CMOV <=");
     149    vhdl->set_body (1,"reg_EXECUTE_IN_DATA_RA when (reg_EXECUTE_IN_DATA_RC("+toString(FLAG_POSITION_F)+") = '1') else");
     150    vhdl->set_body (1,"reg_EXECUTE_IN_DATA_RB;");
     151   
     152    vhdl->set_body (0,"sig_RES_MOVE <=");
     153    vhdl->set_body (1,"sig_MOVHI when (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_MOVE_L_MOVHI))+") = '1') else");
     154    vhdl->set_body (1,"sig_CMOV when (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_MOVE_L_CMOV))+") = '1') else");
     155    vhdl->set_body (1,std_logic_cst(_param->_size_general_data,0)+";");
     156
     157    vhdl->set_body (0,"");
     158    vhdl->set_comment(0,"");
     159    vhdl->set_comment(0,"BRANCH");
     160    vhdl->set_comment(0,"");
     161    vhdl->set_body (0,"sig_NOSQ_BRANCH <= (reg_EXECUTE_IN_DATA_RC("+toString(FLAG_POSITION_F)+") and reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_BRANCH_L_TEST_F))+")) or (not reg_EXECUTE_IN_DATA_RC("+toString(FLAG_POSITION_F)+") and reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_BRANCH_L_TEST_NF))+")) or reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_BRANCH_L_JALR))+");");
     162
     163#ifdef SYSTEMC_VHDL_COMPATIBILITY
     164    vhdl->set_body (0,"sig_RES_BRANCH <=");
     165    vhdl->set_body (1,"reg_EXECUTE_IN_IMMEDIAT("+toString(_param->_size_general_data-3)+" downto 0) & "+std_logic_cst(2,0)+"when (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_BRANCH_L_JALR))+") = '1') else");
     166    vhdl->set_body (1,std_logic_cst(_param->_size_general_data,0)+";");
     167#else
     168    vhdl->set_body (0,"sig_RES_BRANCH <= reg_EXECUTE_IN_IMMEDIAT("+toString(_param->_size_general_data-3)+" downto 0) & "+std_logic_cst(2,0)+";");
     169#endif
     170
     171    vhdl->set_body (0,"sig_ADDR_BRANCH <=");
     172    vhdl->set_body (1,"reg_EXECUTE_IN_DATA_RB("+toString(_param->_size_instruction_address+1)+" downto 2) when (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_BRANCH_L_JALR))+") = '1') else");
     173    vhdl->set_body (1,"reg_EXECUTE_IN_IMMEDIAT("+toString(_param->_size_instruction_address-1)+" downto 0);");
     174 
     175    vhdl->set_body ("");
     176    vhdl->set_comment(0,"");
     177    vhdl->set_comment(0,"SHIFTER");
     178    vhdl->set_comment(0,"");
     179
     180    vhdl->set_comment(0,"Instance shifter");
     181    vhdl->set_body   (0,"instance_"+_name+"_shifter : "+_name+"_shifter");
     182    vhdl->set_body   (0,"port map (");
     183    vhdl->set_body   (1,"  in_SHIFTER_0_DATA      \t=>\treg_EXECUTE_IN_DATA_RA");
     184    vhdl->set_body   (1,", in_SHIFTER_0_SHIFT     \t=>\tsig_B_OPERAND("+toString((log2(_param->_size_general_data))-1)+" downto 0)");
     185    vhdl->set_body   (1,", in_SHIFTER_0_DIRECTION \t=>\treg_EXECUTE_IN_OPERATION(0)");
     186    vhdl->set_body   (1,", in_SHIFTER_0_TYPE      \t=>\treg_EXECUTE_IN_OPERATION(1)");
     187    vhdl->set_body   (1,", in_SHIFTER_0_CARRY     \t=>\treg_EXECUTE_IN_OPERATION(2)");
     188    vhdl->set_body   (1,",out_SHIFTER_0_DATA      \t=>\tsig_RES_SHIFTER");
     189    vhdl->set_body   (0,");");
     190    vhdl->set_body   (0,"");
     191
     192    vhdl->set_body ("");
     193    vhdl->set_comment(0,"");
     194    vhdl->set_comment(0,"EXTEND");
     195    vhdl->set_comment(0,"");
     196
     197    vhdl->set_body (0,"sig_EXT_BYTE_S <=");
     198    vhdl->set_body (1,std_logic_cst(_param->_size_general_data-8,(1<<_param->_size_general_data-8)-1)+" & reg_EXECUTE_IN_DATA_RA (7 downto 0) when (reg_EXECUTE_IN_DATA_RA (7) = '1') else");
     199    vhdl->set_body (1,std_logic_cst(_param->_size_general_data-8,0)+" & reg_EXECUTE_IN_DATA_RA (7 downto 0);");
     200    vhdl->set_body (0,"");
     201
     202    vhdl->set_body (0,"sig_EXT_BYTE_Z <=");
     203    vhdl->set_body (1,std_logic_cst(_param->_size_general_data-8,0)+" & reg_EXECUTE_IN_DATA_RA (7 downto 0);");
     204    vhdl->set_body (0,"");
     205
     206    vhdl->set_body (0,"sig_EXT_HALF_WORD_S <=");
     207    vhdl->set_body (1,std_logic_cst(_param->_size_general_data-16,(1<<_param->_size_general_data-16)-1)+" & reg_EXECUTE_IN_DATA_RA (15 downto 0) when (reg_EXECUTE_IN_DATA_RA (15) = '1') else");
     208    vhdl->set_body (1,std_logic_cst(_param->_size_general_data-16,0)+" & reg_EXECUTE_IN_DATA_RA (15 downto 0);");
     209    vhdl->set_body (0,"");
     210
     211    vhdl->set_body (0,"sig_EXT_HALF_WORD_Z <=");
     212    vhdl->set_body (1,std_logic_cst(_param->_size_general_data-16,0)+" & reg_EXECUTE_IN_DATA_RA (15 downto 0);");
     213    vhdl->set_body (0,"");
     214
     215    vhdl->set_body (0,"sig_EXT_WORD_S <=");
     216    vhdl->set_body (1,std_logic_cst(_param->_size_general_data-32,(1<<_param->_size_general_data-32)-1)+" & reg_EXECUTE_IN_DATA_RA (31 downto 0) when (reg_EXECUTE_IN_DATA_RA (31) = '1') else");
     217    vhdl->set_body (1,std_logic_cst(_param->_size_general_data-32,0)+" & reg_EXECUTE_IN_DATA_RA (31 downto 0);");
     218    vhdl->set_body (0,"");
     219
     220    vhdl->set_body (0,"sig_EXT_WORD_Z <=");
     221    vhdl->set_body (1,std_logic_cst(_param->_size_general_data-32,0)+" & reg_EXECUTE_IN_DATA_RA (31 downto 0);");
     222    vhdl->set_body (0,"");
     223
     224    vhdl->set_body (0,"sig_EXT_S <=");
     225    vhdl->set_body (1,"sig_EXT_BYTE_S      when (reg_EXECUTE_IN_IMMEDIAT = 8)  else");
     226    vhdl->set_body (1,"sig_EXT_HALF_WORD_S when (reg_EXECUTE_IN_IMMEDIAT = 16) else");
     227    vhdl->set_body (1,"sig_EXT_WORD_S;");
     228    vhdl->set_body (0,"");
     229
     230    vhdl->set_body (0,"sig_EXT_Z <=");
     231    vhdl->set_body (1,"sig_EXT_BYTE_Z      when (reg_EXECUTE_IN_IMMEDIAT = 8)  else");
     232    vhdl->set_body (1,"sig_EXT_HALF_WORD_Z when (reg_EXECUTE_IN_IMMEDIAT = 16) else");
     233    vhdl->set_body (1,"sig_EXT_WORD_Z;");
     234    vhdl->set_body (0,"");
     235
     236    vhdl->set_body (0,"sig_RES_EXTEND <=");
     237    vhdl->set_body (1,"sig_EXT_Z      when (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_EXTEND_L_EXTEND_Z))+") = '1')  else");
     238    vhdl->set_body (1,"sig_EXT_S;");
     239    vhdl->set_body (0,"");
     240
     241    vhdl->set_body (0,"");
     242    vhdl->set_comment(0,"");
     243    vhdl->set_comment(0,"FIND");
     244    vhdl->set_comment(0,"");
     245
     246    vhdl->set_body (0,"sig_FF1 <=");
     247    for (uint32_t i=0; i<_param->_size_general_data; i++)
     248      vhdl->set_body (1,std_logic_cst(log2(_param->_size_general_data)+1,i+1)+" \twhen (reg_EXECUTE_IN_DATA_RA ("+toString(i)+") = '1') \telse");
     249    vhdl->set_body (1,std_logic_cst(log2(_param->_size_general_data)+1,0)+";");
     250    vhdl->set_body (0,"");
     251
     252    vhdl->set_body (0,"sig_FL1 <=");
     253    for (uint32_t i=_param->_size_general_data; i>0; i--)
     254      vhdl->set_body (1,std_logic_cst(log2(_param->_size_general_data)+1,i)+" \twhen (reg_EXECUTE_IN_DATA_RA ("+toString(i-1)+") = '1') \telse");
     255    vhdl->set_body (1,std_logic_cst(log2(_param->_size_general_data)+1,0)+";");
     256    vhdl->set_body (0,"");
     257
     258    vhdl->set_body (0,"sig_RES_FIND <=");
     259    vhdl->set_body (1,std_logic_cst(_param->_size_general_data-log2(_param->_size_general_data)-1,0)+"&"+"sig_FF1      when (reg_EXECUTE_IN_OPERATION("+toString(log2(OPERATION_FIND_L_FF1))+") = '1')  else");
     260    vhdl->set_body (1,std_logic_cst(_param->_size_general_data-log2(_param->_size_general_data)-1,0)+"&"+"sig_FL1;");
     261    vhdl->set_body (0,"");
     262
     263    vhdl->set_body (0,"");
     264    vhdl->set_comment(0,"");
     265    vhdl->set_comment(0,"SPECIAL");
     266    vhdl->set_comment(0,"");
     267
     268    vhdl->set_body (0,"sig_SPR_IS_HERE <=");
     269    //    vhdl->set_body (1,"'1' when (sig_A_OR_B("+toString(_param->_size_special_address_group+_param->_size_special_address_register-1)+" downto "+toString(_param->_size_special_address_register)+") = "+std_logic_cst(_param->_size_special_address_group,GROUP_MAC)+") else");
     270    vhdl->set_body (1,"'1' when (sig_A_OR_B(15 downto 0) = "+std_logic_cst(_param->_size_special_address_group,GROUP_MAC)+") else");
     271    vhdl->set_body (1,"'0';");
     272
     273    vhdl->set_comment(0,"MFSPR");
     274    vhdl->set_body (0,"sig_MFSPR <=");
     275    vhdl->set_body (1,"reg_MACLO"+toString((_param->_have_port_context_id == 1) ? "(reg_EXECUTE_IN_CONTEXT_ID)" : "(0)")+" when (sig_SPR_IS_HERE = '1' and sig_A_OR_B("+toString(_param->_size_special_address_register-1)+" downto 0) = "+std_logic_cst(_param->_size_special_address_register,SPR_MACLO)+") else");
     276    vhdl->set_body (1,"reg_MACHI"+toString((_param->_have_port_context_id == 1) ? "(reg_EXECUTE_IN_CONTEXT_ID)" : "(0)")+" when (sig_SPR_IS_HERE = '1' and sig_A_OR_B("+toString(_param->_size_special_address_register-1)+" downto 0) = "+std_logic_cst(_param->_size_special_address_register,SPR_MACHI)+") else");
     277    vhdl->set_body (1,std_logic_cst(_param->_size_spr,0)+";");
     278    vhdl->set_body (0,"");
     279
     280    vhdl->set_body (0,"");
     281
     282    vhdl->set_comment(0,"MTSPR");
     283    vhdl->set_body (0,"process (in_CLOCK)");
     284    vhdl->set_body (0,"begin");
     285    vhdl->set_body (1,"if in_CLOCK'event and in_CLOCK = '1' then");
     286    vhdl->set_body (2,"if (sig_SPR_IS_HERE = '1') then");
     287    vhdl->set_body (3,"if (sig_A_OR_B("+toString(_param->_size_special_address_register-1)+" downto 0) = "+std_logic_cst(_param->_size_special_address_register,SPR_MACLO)+") then");
     288    vhdl->set_body (4,"reg_MACLO"+toString((_param->_have_port_context_id == 1) ? "(reg_EXECUTE_IN_CONTEXT_ID)" : "(0)")+" <= reg_EXECUTE_IN_DATA_RB;");
     289    vhdl->set_body (3,"end if;");
     290    vhdl->set_body (3,"if (sig_A_OR_B("+toString(_param->_size_special_address_register-1)+" downto 0) = "+std_logic_cst(_param->_size_special_address_register,SPR_MACHI)+") then");
     291    vhdl->set_body (4,"reg_MACHI"+toString((_param->_have_port_context_id == 1) ? "(reg_EXECUTE_IN_CONTEXT_ID)" : "(0)")+" <= reg_EXECUTE_IN_DATA_RB;");
     292    vhdl->set_body (3,"end if;");
     293    vhdl->set_body (2,"end if;");
     294    vhdl->set_body (1,"end if;");
     295    vhdl->set_body (0,"end process;");
     296    vhdl->set_body (0,"");
     297
     298    vhdl->set_body (0,"sig_RES_SPECIAL <=");
     299    vhdl->set_body (1,"sig_MFSPR when (reg_EXECUTE_IN_OPERATION = "+std_logic_cst(_param->_size_operation,OPERATION_SPECIAL_L_MFSPR)+")  else");
     300    vhdl->set_body (1,"reg_EXECUTE_IN_DATA_RB when (reg_EXECUTE_IN_OPERATION = "+std_logic_cst(_param->_size_operation,OPERATION_SPECIAL_L_MTSPR)+")  else");
     301    vhdl->set_body (1,std_logic_cst(_param->_size_general_data,0)+";");
     302    vhdl->set_body (0,"");
     303
     304    vhdl->set_body (0,"");
     305    vhdl->set_comment(0,"");
     306    vhdl->set_comment(0,"TRANSACTION");
     307    vhdl->set_comment(0,"");
     308//     vhdl->set_body (0,"sig_EXECUTE_OUT_VAL <= reg_BUSY_IN;");
     309//     vhdl->set_body (0,"sig_EXECUTE_IN_ACK <= not reg_BUSY_IN or (reg_BUSY_IN and in_EXECUTE_OUT_ACK);");
     310   
     311    vhdl->set_body (0,"sig_EXECUTE_OUT_VAL <= reg_BUSY_OUT;");
     312    vhdl->set_body (0,"sig_EXECUTE_OUT_UPDATE <= not reg_BUSY_OUT or (reg_BUSY_OUT and in_EXECUTE_OUT_ACK);");
     313    vhdl->set_body (0,"sig_EXECUTE_IN_ACK <= not reg_BUSY_IN or (reg_BUSY_IN and sig_EXECUTE_OUT_UPDATE);");
     314   
     315    vhdl->set_body ("");
     316    vhdl->set_comment(0,"");
     317    vhdl->set_comment(0,"-----------------------------------");
     318    vhdl->set_comment(0,"--                                  ");
     319    vhdl->set_comment(0,"-----------------------------------");
     320    vhdl->set_comment(0,"");
     321    vhdl->set_body ("");
     322    if(_param->_have_port_context_id)
     323      vhdl->set_body (0,"sig_EXECUTE_OUT_CONTEXT_ID <= reg_EXECUTE_IN_CONTEXT_ID;");
     324
     325    if(_param->_have_port_front_end_id)
     326      vhdl->set_body (0,"sig_EXECUTE_OUT_FRONT_END_ID <= reg_EXECUTE_IN_FRONT_END_ID;");
     327
     328    if(_param->_have_port_ooo_engine_id)
     329      vhdl->set_body (0,"sig_EXECUTE_OUT_OOO_ENGINE_ID <= reg_EXECUTE_IN_OOO_ENGINE_ID;");
     330
     331    if(_param->_have_port_rob_ptr)
     332      vhdl->set_body (0,"sig_EXECUTE_OUT_PACKET_ID <= reg_EXECUTE_IN_PACKET_ID;");
     333
     334    vhdl->set_body (0,"sig_EXECUTE_OUT_WRITE_RD <=  reg_EXECUTE_IN_WRITE_RD;");
     335
     336    vhdl->set_body (0,"sig_EXECUTE_OUT_NUM_REG_RD <= reg_EXECUTE_IN_NUM_REG_RD;");
     337
     338    vhdl->set_body (0,"with reg_EXECUTE_IN_TYPE select");
     339    vhdl->set_body (0,"sig_EXECUTE_OUT_DATA_RD <=");
     340    vhdl->set_body (1,"sig_RES_ALU when "+std_logic_cst(_param->_size_type,TYPE_ALU)+",");
     341    vhdl->set_body (1,"sig_RES_MOVE when "+std_logic_cst(_param->_size_type,TYPE_MOVE)+",");
     342    vhdl->set_body (1,"sig_RES_BRANCH when "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+",");
     343    vhdl->set_body (1,"sig_RES_SHIFTER when "+std_logic_cst(_param->_size_type,TYPE_SHIFT)+",");
     344    vhdl->set_body (1,"sig_RES_EXTEND when "+std_logic_cst(_param->_size_type,TYPE_EXTEND)+",");
     345    vhdl->set_body (1,"sig_RES_FIND when "+std_logic_cst(_param->_size_type,TYPE_FIND)+",");
     346    vhdl->set_body (1,"sig_RES_SPECIAL when "+std_logic_cst(_param->_size_type,TYPE_SPECIAL)+",");
     347    vhdl->set_body (1,std_logic_cst(_param->_size_general_data,0)+" when others;");
     348
     349    vhdl->set_body (0,"sig_EXECUTE_OUT_WRITE_RE <= reg_EXECUTE_IN_WRITE_RE;");
     350
     351    vhdl->set_body (0,"sig_EXECUTE_OUT_NUM_REG_RE <= reg_EXECUTE_IN_NUM_REG_RE;");
     352
     353    vhdl->set_body (0,"with reg_EXECUTE_IN_TYPE select");
     354    vhdl->set_body (0,"sig_EXECUTE_OUT_DATA_RE <=");
     355    if(FLAG_POSITION_CY > FLAG_POSITION_OV)
     356    vhdl->set_body (1,"sig_COUT_ALU & sig_OVR_ALU when "+std_logic_cst(_param->_size_type,TYPE_ALU)+",");
     357    else
     358    vhdl->set_body (1,"sig_OVR_ALU & sig_COUT_ALU when "+std_logic_cst(_param->_size_type,TYPE_ALU)+",");
     359    vhdl->set_body (1,std_logic_cst(_param->_size_special_data,0)+" when others;");
     360
     361    vhdl->set_body (0,"sig_EXECUTE_OUT_EXCEPTION <=");
     362    vhdl->set_body (1,std_logic_cst(_param->_size_exception,EXCEPTION_ALU_RANGE)+" when (reg_EXECUTE_IN_TYPE = "+std_logic_cst(_param->_size_type,TYPE_ALU)+" and sig_OVR_ALU = '1') else");
     363    vhdl->set_body (1,std_logic_cst(_param->_size_exception,EXCEPTION_ALU_SPR_ACCESS_MUST_READ)+" when (reg_EXECUTE_IN_TYPE = "+std_logic_cst(_param->_size_type,TYPE_SPECIAL)+" and reg_EXECUTE_IN_OPERATION = "+std_logic_cst(_param->_size_operation,OPERATION_SPECIAL_L_MFSPR)+" and sig_SPR_IS_HERE = '0') else");
     364    vhdl->set_body (1,std_logic_cst(_param->_size_exception,EXCEPTION_ALU_SPR_ACCESS_MUST_WRITE)+" when (reg_EXECUTE_IN_TYPE = "+std_logic_cst(_param->_size_type,TYPE_SPECIAL)+" and reg_EXECUTE_IN_OPERATION = "+std_logic_cst(_param->_size_operation,OPERATION_SPECIAL_L_MTSPR)+" and sig_SPR_IS_HERE = '0') else");
     365    vhdl->set_body (1,std_logic_cst(_param->_size_exception,EXCEPTION_NONE)+";");
     366
     367    vhdl->set_body (0,"with reg_EXECUTE_IN_TYPE select");
     368    vhdl->set_body (0,"sig_EXECUTE_OUT_NO_SEQUENCE <=");
     369    vhdl->set_body (1,"sig_NOSQ_BRANCH when "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+",");
     370    vhdl->set_body (1,std_logic_cst(1,0)+"when others;");
     371
     372#ifdef SYSTEMC_VHDL_COMPATIBILITY
     373    vhdl->set_body (0,"with reg_EXECUTE_IN_TYPE select");
     374    vhdl->set_body (0,"sig_EXECUTE_OUT_ADDRESS <=");
     375    vhdl->set_body (1,"sig_ADDR_BRANCH when "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+",");
     376    vhdl->set_body (1,"sig_A_OR_B("+toString(_param->_size_instruction_address-1)+" downto 0) when "+std_logic_cst(_param->_size_type,TYPE_SPECIAL)+",");
     377    vhdl->set_body (1,std_logic_cst(_param->_size_instruction_address,0)+" when others;");
     378#else
     379    vhdl->set_body (0,"with reg_EXECUTE_IN_TYPE select");
     380    vhdl->set_body (0,"sig_EXECUTE_OUT_ADDRESS <=");
     381    vhdl->set_body (1,"sig_ADDR_BRANCH when "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+",");
     382    vhdl->set_body (1,"sig_A_OR_B when others;");
     383//    vhdl->set_body (0,"sig_EXECUTE_OUT_ADDRESS <= sig_ADDR_BRANCH;");
     384#endif
     385
     386    vhdl->set_body ("");
     387    vhdl->set_comment(0,"");
     388    vhdl->set_comment(0,"-----------------------------------");
     389    vhdl->set_comment(0,"-- Outputs                          ");
     390    vhdl->set_comment(0,"-----------------------------------");
     391    vhdl->set_comment(0,"");
     392    vhdl->set_body ("");
     393//     if(_param->_have_port_context_id)
     394//       vhdl->set_body (0,"out_EXECUTE_OUT_CONTEXT_ID <= sig_EXECUTE_OUT_CONTEXT_ID;");
     395//     if(_param->_have_port_front_end_id)
     396//       vhdl->set_body (0,"out_EXECUTE_OUT_FRONT_END_ID <= sig_EXECUTE_OUT_FRONT_END_ID;");
     397//     if(_param->_have_port_ooo_engine_id)
     398//       vhdl->set_body (0,"out_EXECUTE_OUT_OOO_ENGINE_ID <= sig_EXECUTE_OUT_OOO_ENGINE_ID;");
     399//     if(_param->_have_port_rob_ptr)
     400//       vhdl->set_body (0,"out_EXECUTE_OUT_PACKET_ID <= sig_EXECUTE_OUT_PACKET_ID;");
     401//     vhdl->set_body (0,"out_EXECUTE_OUT_WRITE_RD <=  sig_EXECUTE_OUT_WRITE_RD;");
     402//     vhdl->set_body (0,"out_EXECUTE_OUT_NUM_REG_RD <= sig_EXECUTE_OUT_NUM_REG_RD;");
     403//     vhdl->set_body (0,"out_EXECUTE_OUT_DATA_RD <= sig_EXECUTE_OUT_DATA_RD;");
     404//     vhdl->set_body (0,"out_EXECUTE_OUT_WRITE_RE <= sig_EXECUTE_OUT_WRITE_RE;");
     405//     vhdl->set_body (0,"out_EXECUTE_OUT_NUM_REG_RE <= sig_EXECUTE_OUT_NUM_REG_RE;");
     406//     vhdl->set_body (0,"out_EXECUTE_OUT_DATA_RE <= sig_EXECUTE_OUT_DATA_RE;");
     407//     vhdl->set_body (0,"out_EXECUTE_OUT_EXCEPTION <= sig_EXECUTE_OUT_EXCEPTION;");
     408//     vhdl->set_body (0,"out_EXECUTE_OUT_NO_SEQUENCE <= sig_EXECUTE_OUT_NO_SEQUENCE;");
     409//     vhdl->set_body (0,"out_EXECUTE_OUT_ADDRESS <= sig_EXECUTE_OUT_ADDRESS;");
     410//     vhdl->set_body (0,"out_EXECUTE_OUT_VAL <= sig_EXECUTE_OUT_VAL;");
     411//     vhdl->set_body (0,"out_EXECUTE_IN_ACK <= sig_EXECUTE_IN_ACK;");
     412
     413    if(_param->_have_port_context_id)
     414      vhdl->set_body (0,"out_EXECUTE_OUT_CONTEXT_ID <= reg_EXECUTE_OUT_CONTEXT_ID;");
     415    if(_param->_have_port_front_end_id)
     416      vhdl->set_body (0,"out_EXECUTE_OUT_FRONT_END_ID <= reg_EXECUTE_OUT_FRONT_END_ID;");
     417    if(_param->_have_port_ooo_engine_id)
     418      vhdl->set_body (0,"out_EXECUTE_OUT_OOO_ENGINE_ID <= reg_EXECUTE_OUT_OOO_ENGINE_ID;");
     419    if(_param->_have_port_rob_ptr)
     420      vhdl->set_body (0,"out_EXECUTE_OUT_PACKET_ID <= reg_EXECUTE_OUT_PACKET_ID;");
     421    vhdl->set_body (0,"out_EXECUTE_OUT_WRITE_RD <=  reg_EXECUTE_OUT_WRITE_RD;");
     422    vhdl->set_body (0,"out_EXECUTE_OUT_NUM_REG_RD <= reg_EXECUTE_OUT_NUM_REG_RD;");
     423    vhdl->set_body (0,"out_EXECUTE_OUT_DATA_RD <= reg_EXECUTE_OUT_DATA_RD;");
     424    vhdl->set_body (0,"out_EXECUTE_OUT_WRITE_RE <= reg_EXECUTE_OUT_WRITE_RE;");
     425    vhdl->set_body (0,"out_EXECUTE_OUT_NUM_REG_RE <= reg_EXECUTE_OUT_NUM_REG_RE;");
     426    vhdl->set_body (0,"out_EXECUTE_OUT_DATA_RE <= reg_EXECUTE_OUT_DATA_RE;");
     427    vhdl->set_body (0,"out_EXECUTE_OUT_EXCEPTION <= reg_EXECUTE_OUT_EXCEPTION;");
     428    vhdl->set_body (0,"out_EXECUTE_OUT_NO_SEQUENCE <= reg_EXECUTE_OUT_NO_SEQUENCE;");
     429    vhdl->set_body (0,"out_EXECUTE_OUT_ADDRESS <= reg_EXECUTE_OUT_ADDRESS;");
     430    vhdl->set_body (0,"out_EXECUTE_OUT_VAL <= sig_EXECUTE_OUT_VAL;");
     431    vhdl->set_body (0,"out_EXECUTE_IN_ACK <= sig_EXECUTE_IN_ACK;");
     432
    27433    log_printf(FUNC,Functionnal_unit,FUNCTION,"End");
    28434  };

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Functionnal_unit_vhdl_declaration.cpp

    r81 r116  
    2424  {
    2525    log_printf(FUNC,Functionnal_unit,FUNCTION,"Begin");
     26    vhdl->set_signal ("sig_EXECUTE_IN_ACK",1);
     27
     28    vhdl->set_signal ("reg_BUSY_IN",1);
     29
     30    if(_param->_have_port_context_id)
     31      vhdl->set_signal ("reg_EXECUTE_IN_CONTEXT_ID", _param->_size_context_id);
     32    if(_param->_have_port_front_end_id)
     33      vhdl->set_signal ("reg_EXECUTE_IN_FRONT_END_ID", _param->_size_front_end_id);
     34    if(_param->_have_port_ooo_engine_id)
     35      vhdl->set_signal ("reg_EXECUTE_IN_OOO_ENGINE_ID", _param->_size_ooo_engine_id);
     36    if(_param->_have_port_rob_ptr)
     37      vhdl->set_signal ("reg_EXECUTE_IN_PACKET_ID",  _param->_size_rob_ptr);
     38    vhdl->set_signal ("reg_EXECUTE_IN_OPERATION", _param->_size_operation);
     39    vhdl->set_signal ("reg_EXECUTE_IN_TYPE", _param->_size_type);
     40    vhdl->set_signal ("reg_EXECUTE_IN_HAS_IMMEDIAT", 1);
     41    vhdl->set_signal ("reg_EXECUTE_IN_IMMEDIAT", _param->_size_general_data);
     42    vhdl->set_signal ("reg_EXECUTE_IN_DATA_RA", _param->_size_general_data);
     43    vhdl->set_signal ("reg_EXECUTE_IN_DATA_RB", _param->_size_general_data);
     44    vhdl->set_signal ("reg_EXECUTE_IN_DATA_RC", _param->_size_special_data);
     45    vhdl->set_signal ("reg_EXECUTE_IN_WRITE_RD", 1);
     46    vhdl->set_signal ("reg_EXECUTE_IN_NUM_REG_RD", _param->_size_general_register);
     47    vhdl->set_signal ("reg_EXECUTE_IN_WRITE_RE", 1);
     48    vhdl->set_signal ("reg_EXECUTE_IN_NUM_REG_RE", _param->_size_special_register);
     49
     50    vhdl->set_signal ("sig_B_OPERAND",_param->_size_general_data);
     51
     52    vhdl->set_signal ("sig_IS_ARITH",1);
     53    vhdl->set_signal ("sig_IS_LOGIC",1);
     54    vhdl->set_signal ("sig_CIN_ARITH",1);
     55    vhdl->set_signal ("sig_ARITH_B_OPERAND",_param->_size_general_data);
     56    vhdl->set_signal ("sig_RES_ARITH",_param->_size_general_data+1);
     57    vhdl->set_signal ("sig_A_AND_B",_param->_size_general_data);
     58    vhdl->set_signal ("sig_A_OR_B",_param->_size_general_data);
     59    vhdl->set_signal ("sig_A_XOR_B",_param->_size_general_data);
     60    vhdl->set_signal ("sig_RES_LOGIC",_param->_size_general_data);
     61    vhdl->set_signal ("sig_RES_ALU",_param->_size_general_data);
     62    vhdl->set_signal ("sig_OVR_ALU",1);
     63    vhdl->set_signal ("sig_COUT_ALU",1);
     64
     65    vhdl->set_signal ("sig_RES_MOVE",_param->_size_general_data);
     66    vhdl->set_signal ("sig_CMOV",_param->_size_general_data);
     67    vhdl->set_signal ("sig_MOVHI",_param->_size_general_data);
     68
     69    vhdl->set_signal ("sig_RES_BRANCH",_param->_size_general_data);
     70    vhdl->set_signal ("sig_ADDR_BRANCH",_param->_size_instruction_address);
     71    vhdl->set_signal ("sig_NOSQ_BRANCH",1);
     72
     73    vhdl->set_signal ("sig_RES_SHIFTER",_param->_size_general_data);
     74
     75    vhdl->set_signal ("sig_EXT_BYTE_S",_param->_size_general_data);
     76    vhdl->set_signal ("sig_EXT_BYTE_Z",_param->_size_general_data);
     77    vhdl->set_signal ("sig_EXT_HALF_WORD_S",_param->_size_general_data);
     78    vhdl->set_signal ("sig_EXT_HALF_WORD_Z",_param->_size_general_data);
     79    vhdl->set_signal ("sig_EXT_WORD_S",_param->_size_general_data);
     80    vhdl->set_signal ("sig_EXT_WORD_Z",_param->_size_general_data);
     81    vhdl->set_signal ("sig_EXT_S",_param->_size_general_data);
     82    vhdl->set_signal ("sig_EXT_Z",_param->_size_general_data);
     83    vhdl->set_signal ("sig_RES_EXTEND",_param->_size_general_data);
     84
     85    vhdl->set_signal ("sig_FF1",log2(_param->_size_general_data)+1);
     86    vhdl->set_signal ("sig_FL1",log2(_param->_size_general_data)+1);
     87    vhdl->set_signal ("sig_RES_FIND",_param->_size_general_data);
     88
     89    vhdl->set_signal ("sig_SPR_IS_HERE",1);
     90    vhdl->set_signal ("sig_MFSPR",_param->_size_spr);
     91    vhdl->set_signal ("sig_MTSPR",_param->_size_spr);
     92
     93    vhdl->set_signal ("sig_RES_SPECIAL",_param->_size_general_data);
     94
     95
     96    vhdl->set_signal ("sig_EXECUTE_OUT_VAL", 1);
     97    vhdl->set_signal ("sig_EXECUTE_OUT_UPDATE", 1);
     98
     99    vhdl->set_signal ("reg_BUSY_OUT",1);
     100
     101    if(_param->_have_port_context_id){
     102      vhdl->set_signal ("reg_EXECUTE_OUT_CONTEXT_ID", _param->_size_context_id);
     103      vhdl->set_signal ("sig_EXECUTE_OUT_CONTEXT_ID", _param->_size_context_id);}
     104    if(_param->_have_port_front_end_id){
     105      vhdl->set_signal ("reg_EXECUTE_OUT_FRONT_END_ID", _param->_size_front_end_id);
     106      vhdl->set_signal ("sig_EXECUTE_OUT_FRONT_END_ID", _param->_size_front_end_id);}
     107    if(_param->_have_port_ooo_engine_id){
     108      vhdl->set_signal ("reg_EXECUTE_OUT_OOO_ENGINE_ID", _param->_size_ooo_engine_id);
     109      vhdl->set_signal ("sig_EXECUTE_OUT_OOO_ENGINE_ID", _param->_size_ooo_engine_id);}
     110    if(_param->_have_port_rob_ptr){
     111      vhdl->set_signal ("reg_EXECUTE_OUT_PACKET_ID",  _param->_size_rob_ptr);
     112      vhdl->set_signal ("sig_EXECUTE_OUT_PACKET_ID",  _param->_size_rob_ptr);}
     113    vhdl->set_signal ("reg_EXECUTE_OUT_WRITE_RD", 1);
     114    vhdl->set_signal ("sig_EXECUTE_OUT_WRITE_RD", 1);
     115    vhdl->set_signal ("reg_EXECUTE_OUT_NUM_REG_RD", _param->_size_general_register);
     116    vhdl->set_signal ("sig_EXECUTE_OUT_NUM_REG_RD", _param->_size_general_register);
     117    vhdl->set_signal ("reg_EXECUTE_OUT_DATA_RD", _param->_size_general_data);
     118    vhdl->set_signal ("sig_EXECUTE_OUT_DATA_RD", _param->_size_general_data);
     119    vhdl->set_signal ("reg_EXECUTE_OUT_WRITE_RE", 1);
     120    vhdl->set_signal ("sig_EXECUTE_OUT_WRITE_RE", 1);
     121    vhdl->set_signal ("reg_EXECUTE_OUT_NUM_REG_RE", _param->_size_special_register);
     122    vhdl->set_signal ("sig_EXECUTE_OUT_NUM_REG_RE", _param->_size_special_register);
     123    vhdl->set_signal ("reg_EXECUTE_OUT_DATA_RE", _param->_size_special_data);
     124    vhdl->set_signal ("sig_EXECUTE_OUT_DATA_RE", _param->_size_special_data);
     125    vhdl->set_signal ("reg_EXECUTE_OUT_EXCEPTION", _param->_size_exception);
     126    vhdl->set_signal ("sig_EXECUTE_OUT_EXCEPTION", _param->_size_exception);
     127    vhdl->set_signal ("reg_EXECUTE_OUT_NO_SEQUENCE", 1);
     128    vhdl->set_signal ("sig_EXECUTE_OUT_NO_SEQUENCE", 1);
     129    vhdl->set_signal ("reg_EXECUTE_OUT_ADDRESS", _param->_size_instruction_address);
     130    vhdl->set_signal ("sig_EXECUTE_OUT_ADDRESS", _param->_size_instruction_address);
     131
     132    vhdl->set_type    ("Tmac","array ("+toString(_param->_nb_context)+" downto 0) of "+std_logic(_param->_size_spr));
     133    vhdl->set_signal  ("reg_MACLO             ", "Tmac");
     134    vhdl->set_signal  ("reg_MACHI             ", "Tmac");
     135
    26136    log_printf(FUNC,Functionnal_unit,FUNCTION,"End");
    27137  };

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters.cpp

    r97 r116  
    3232                          execute_timing_t** timing             ,
    3333                          morpheo::behavioural::custom::custom_information_t (*get_custom_information) (void),
    34                           bool               is_toplevel)
     34                          bool               is_toplevel):
     35    _functionnal_unit_scheme (FUNCTIONNAL_UNIT_SCHEME_GLOBAL_REGISTERFILE)
    3536  {
    3637    log_printf(FUNC,Functionnal_unit,FUNCTION,"Begin");

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Functionnal_unit/src/Parameters_msg_error.cpp

    r88 r116  
    2828    Parameters_test test("Functionnal_unit");
    2929
    30     for (uint32_t i=0; i<_nb_type; i++)
    31       for (uint32_t j=0; j<_nb_operation; j++)
    32         if (_timing[i][j]._delay != _timing[i][j]._latence)
    33           test.error(toString(_("For the type '%d', and the operation '%d', the delay and the latence must be equal.\n"),i,j));
     30//     for (uint32_t i=0; i<_nb_type; i++)
     31//       for (uint32_t j=0; j<_nb_operation; j++)
     32//      if (_timing[i][j]._delay != _timing[i][j]._latence)
     33//        test.error(toString(_("For the type '%d', and the operation '%d', the delay and the latence must be equal.\n"),i,j));
     34   
     35//     if ((_timing[TYPE_ALU][OPERATION_ALU_ADD]._delay   != 1) or
     36//         (_timing[TYPE_ALU][OPERATION_ALU_ADD]._latence != 1))
     37//       test.error(toString(_("Valid timing for operation [%d][%d] is : {%d,%d}.\n"),TYPE_ALU,OPERATION_ALU_ADD,1,1));
     38
    3439
    3540    if (_have_groupe_MAC and ((_timing[TYPE_SPECIAL][OPERATION_SPECIAL_L_MAC  ]._latence == 0) or
    3641                              (_timing[TYPE_SPECIAL][OPERATION_SPECIAL_L_MACRC]._latence == 0) or
    3742                              (_timing[TYPE_SPECIAL][OPERATION_SPECIAL_L_MSB  ]._latence == 0)))
    38       test.error("The functionnal unit implement a MAC unit, the latence to operation OPERATION_ALU_L_MAC, OPERATION_ALU_L_MACRC and OPERATION_ALU_L_MSB must be higher than 0.\n");
     43      test.error(_("The functionnal unit implements a MAC unit, the latence to operation OPERATION_ALU_L_MAC, OPERATION_ALU_L_MACRC and OPERATION_ALU_L_MSB must be higher than 0.\n"));
    3944
    4045    log_printf(FUNC,Functionnal_unit,FUNCTION,"End");
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