Changeset 128 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp
- Timestamp:
- Jun 26, 2009, 10:43:23 AM (15 years ago)
- File:
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- 1 edited
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp
r124 r128 239 239 _speculative_access_queue_control->clear(); 240 240 241 reg_STORE_QUEUE_PTR_READ = 0;241 reg_STORE_QUEUE_PTR_READ = 0; 242 242 reg_LOAD_QUEUE_CHECK_PRIORITY = 0; 243 243 244 244 for (uint32_t i=0; i< _param->_size_store_queue ; i++) 245 245 { 246 reg_STORE_QUEUE_NB_CHECK [i] = 0; 247 _store_queue [i]._state = STORE_QUEUE_EMPTY; 246 reg_STORE_QUEUE_NB_CHECK [i] = 0; 247 _store_queue [i]._state = STORE_QUEUE_EMPTY; 248 _store_queue [i]._context_id = 0; // not necessary 249 _store_queue [i]._front_end_id = 0; // not necessary 250 _store_queue [i]._ooo_engine_id = 0; // not necessary 251 _store_queue [i]._packet_id = 0; // not necessary 252 _store_queue [i]._operation = 0; // not necessary 253 _store_queue [i]._load_queue_ptr_write = 0; // not necessary 254 _store_queue [i]._address = 0; // not necessary 255 _store_queue [i]._wdata = 0; // not necessary 256 // _store_queue [i]._write_rd = 0; // not necessary 257 // _store_queue [i]._num_reg_rd = 0; // not necessary 258 _store_queue [i]._exception = 0; // not necessary 259 _store_queue [i]._send_commit = 0; // not necessary 248 260 } 249 261 250 262 for (uint32_t i=0; i< _param->_size_load_queue ; i++) 251 _load_queue [i]._state = LOAD_QUEUE_EMPTY; 263 { 264 _load_queue [i]._state = LOAD_QUEUE_EMPTY; 265 _load_queue [i]._context_id = 0; // not necessary 266 _load_queue [i]._front_end_id = 0; // not necessary 267 _load_queue [i]._ooo_engine_id = 0; // not necessary 268 _load_queue [i]._packet_id = 0; // not necessary 269 _load_queue [i]._operation = 0; // not necessary 270 _load_queue [i]._store_queue_ptr_write = 0; // not necessary 271 _load_queue [i]._store_queue_ptr_read = 0; // not necessary 272 _load_queue [i]._store_queue_empty = 0; // not necessary 273 _load_queue [i]._address = 0; // not necessary 274 _load_queue [i]._check_hit_byte = 0; // not necessary 275 _load_queue [i]._check_hit = 0; // not necessary 276 _load_queue [i]._shift = 0; // not necessary 277 _load_queue [i]._is_load_signed = 0; // not necessary 278 _load_queue [i]._access_size = 0; // not necessary 279 _load_queue [i]._rdata = 0; // not necessary 280 _load_queue [i]._write_rd = 0; // not necessary 281 _load_queue [i]._num_reg_rd = 0; // not necessary 282 _load_queue [i]._exception = 0; // not necessary 283 } 252 284 253 285 for (uint32_t i=0; i< _param->_size_speculative_access_queue; i++) 254 _speculative_access_queue [i]._state = SPECULATIVE_ACCESS_QUEUE_EMPTY; 286 { 287 _speculative_access_queue [i]._state = SPECULATIVE_ACCESS_QUEUE_EMPTY; 288 _speculative_access_queue [i]._context_id = 0; // not necessary 289 _speculative_access_queue [i]._front_end_id = 0; // not necessary 290 _speculative_access_queue [i]._ooo_engine_id = 0; // not necessary 291 _speculative_access_queue [i]._packet_id = 0; // not necessary 292 _speculative_access_queue [i]._operation = 0; // not necessary 293 _speculative_access_queue [i]._load_queue_ptr_write = 0; // not necessary 294 _speculative_access_queue [i]._store_queue_ptr_write = 0; // not necessary 295 _speculative_access_queue [i]._store_queue_ptr_read = 0; // not necessary 296 _speculative_access_queue [i]._store_queue_empty = 0; // not necessary 297 _speculative_access_queue [i]._address = 0; // not necessary 298 _speculative_access_queue [i]._write_rd = 0; // not necessary 299 _speculative_access_queue [i]._num_reg_rd = 0; // not necessary 300 _speculative_access_queue [i]._exception = 0; // not necessary 301 } 255 302 } 256 303 else … … 1000 1047 bool have_exception = (exception != EXCEPTION_MEMORY_NONE); 1001 1048 bool need_check= false; 1002 Tlsq_ptr_t 1003 Tlsq_ptr_t 1004 Tcontrol_t 1049 Tlsq_ptr_t store_queue_ptr_write = _speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._store_queue_ptr_write; 1050 Tlsq_ptr_t store_queue_ptr_read = _speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._store_queue_ptr_read ; 1051 Tcontrol_t store_queue_empty = _speculative_access_queue [internal_SPECULATIVE_ACCESS_QUEUE_PTR_READ]._store_queue_empty ; 1005 1052 1006 1053 if (have_exception)
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