Changeset 128 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit
- Timestamp:
- Jun 26, 2009, 10:43:23 AM (15 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_deallocation.cpp
r112 r128 35 35 DELETE0_SIGNAL(out_ADDRESS_BRANCH_STATE ,_param->_size_branch_state ); 36 36 DELETE0_SIGNAL(out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID,_param->_size_depth); 37 DELETE1_SIGNAL(out_ADDRESS_INSTRUCTION_ENABLE ,1,_param->_nb_instruction);37 DELETE1_SIGNAL(out_ADDRESS_INSTRUCTION_ENABLE ,_param->_nb_instruction,1); 38 38 39 39 DELETE0_SIGNAL(out_PREDICT_VAL ,1); … … 48 48 DELETE0_SIGNAL( in_PREDICT_BRANCH_UPDATE_PREDICTION_ID,_param->_size_depth); 49 49 DELETE0_SIGNAL( in_PREDICT_INST_IFETCH_PTR ,_param->_size_inst_ifetch_ptr); 50 DELETE1_SIGNAL(in_PREDICT_INSTRUCTION_ENABLE ,1,_param->_nb_instruction);50 DELETE1_SIGNAL(in_PREDICT_INSTRUCTION_ENABLE ,_param->_nb_instruction,1); 51 51 52 52 DELETE0_SIGNAL( in_EVENT_VAL ,1); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_transition.cpp
r123 r128 28 28 { 29 29 // nothing is valid 30 reg_PC_ACCESS_VAL = 0; 31 32 reg_PC_CURRENT_VAL = 0; 33 34 reg_PC_NEXT_VAL = 1; 35 reg_PC_NEXT = 0x100>>2; 36 reg_PC_NEXT_IS_DS_TAKE = 0; 30 reg_PC_ACCESS_VAL = 0; 31 reg_PC_ACCESS = 0;// not necessary 32 reg_PC_ACCESS_IS_DS_TAKE = 0;// not necessary 33 for (uint32_t i=0; i<_param->_nb_instruction; i++) 34 reg_PC_ACCESS_INSTRUCTION_ENABLE [i] = 0;// not necessary 35 reg_PC_ACCESS_INST_IFETCH_PTR = 0;// not necessary 36 reg_PC_ACCESS_BRANCH_STATE = 0;// not necessary 37 reg_PC_ACCESS_BRANCH_UPDATE_PREDICTION_ID = 0;// not necessary 38 39 reg_PC_CURRENT_VAL = 0; 40 reg_PC_CURRENT = 0;// not necessary 41 reg_PC_CURRENT_IS_DS_TAKE = 0;// not necessary 42 for (uint32_t i=0; i<_param->_nb_instruction; i++) 43 reg_PC_CURRENT_INSTRUCTION_ENABLE [i] = 0;// not necessary 44 reg_PC_CURRENT_INST_IFETCH_PTR = 0;// not necessary 45 reg_PC_CURRENT_BRANCH_STATE = 0;// not necessary 46 reg_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID = 0;// not necessary 47 48 reg_PC_NEXT_VAL = 1; 49 reg_PC_NEXT = 0x100>>2; 50 reg_PC_NEXT_IS_DS_TAKE = 0; 37 51 uint32_t index = reg_PC_NEXT % _param->_nb_instruction; 38 52 for (uint32_t i=0; i<_param->_nb_instruction; i++) 39 reg_PC_NEXT_INSTRUCTION_ENABLE [i] = 0; 40 reg_PC_NEXT_INSTRUCTION_ENABLE [index] = 1; 41 reg_PC_NEXT_INST_IFETCH_PTR = 0; 42 reg_PC_NEXT_BRANCH_STATE = 0; 43 reg_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID = 0; 44 45 46 reg_PC_NEXT_NEXT_VAL = 0; 53 reg_PC_NEXT_INSTRUCTION_ENABLE [i] = 0; 54 reg_PC_NEXT_INSTRUCTION_ENABLE [index] = 1; 55 reg_PC_NEXT_INST_IFETCH_PTR = 0; 56 reg_PC_NEXT_BRANCH_STATE = 0; 57 reg_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID = 0; 58 59 reg_PC_NEXT_NEXT_VAL = 0; 60 reg_PC_NEXT_NEXT = 0;// not necessary 61 reg_PC_NEXT_NEXT_IS_DS_TAKE = 0;// not necessary 47 62 } 48 63 else -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Types.h
r101 r128 47 47 public : ~ifetch_queue_entry_t (void) 48 48 { 49 delete _instruction ;50 delete _instruction_enable;49 delete [] _instruction ; 50 delete [] _instruction_enable; 51 51 } 52 53 // public : friend std::ostream& operator<< (std::ostream& output,54 // ifetch_queue_entry_t & x)55 // {56 // output << ;57 // return output;58 // }59 60 52 }; 61 53 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_transition.cpp
r119 r128 31 31 32 32 for (uint32_t i=0; i<_param->_size_queue; i++) 33 _queue [i]->_state = IFETCH_QUEUE_STATE_EMPTY; 33 { 34 _queue [i]->_state = IFETCH_QUEUE_STATE_EMPTY; 35 _queue [i]->_address = 0; // not necessary 36 _queue [i]->_inst_ifetch_ptr = 0; // not necessary 37 _queue [i]->_branch_state = 0; // not necessary 38 _queue [i]->_branch_update_prediction_id = 0; // not necessary 39 _queue [i]->_exception = 0; // not necessary 40 41 for (uint32_t j=0; j<_param->_nb_instruction; j++) 42 { 43 _queue [i]->_instruction [j] = 0; // not necessary 44 _queue [i]->_instruction_enable [j] = 0; // not necessary 45 } 46 } 34 47 } 35 48 else -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_deallocation.cpp
r123 r128 60 60 DELETE0_SIGNAL(out_DECOD_BRANCH_UPDATE_PREDICTION_ID,_param->_size_depth); 61 61 DELETE0_SIGNAL(out_DECOD_EXCEPTION ,_param->_size_exception_ifetch); 62 DELETE1_SIGNAL(out_DECOD_VAL , 1,_param->_nb_instruction);63 DELETE1_SIGNAL( in_DECOD_ACK , 1,_param->_nb_instruction);62 DELETE1_SIGNAL(out_DECOD_VAL ,_param->_nb_instruction,1); 63 DELETE1_SIGNAL( in_DECOD_ACK ,_param->_nb_instruction,1); 64 64 DELETE1_SIGNAL(out_DECOD_INSTRUCTION ,_param->_nb_instruction,_param->_size_instruction); 65 65
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