Ignore:
Timestamp:
Jun 8, 2009, 10:43:30 PM (15 years ago)
Author:
rosiere
Message:

1) Fix performance
2) add auto generation to SPECINT2000
3) add reset in genMoore and genMealy

Location:
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit
Files:
11 edited

Legend:

Unmodified
Added
Removed

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management.cpp

    r88 r123  
    3838    log_printf(FUNC,Address_management,FUNCTION,"Begin");
    3939
    40 #if DEBUG_Address_management == true
    41     log_printf(INFO,Address_management,FUNCTION,_("<%s> Parameters"),_name.c_str());
     40// #if DEBUG_Address_management == true
     41//     log_printf(INFO,Address_management,FUNCTION,_("<%s> Parameters"),_name.c_str());
    4242
    43     std::cout << *param << std::endl;
    44 #endif   
     43//     std::cout << *param << std::endl;
     44// #endif   
    4545
    4646    log_printf(INFO,Address_management,FUNCTION,"Allocation");

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_genMoore.cpp

    r107 r123  
    2424    log_printf(FUNC,Address_management,FUNCTION,"Begin");
    2525
     26    if (PORT_READ(in_NRESET))
     27      {
    2628    // =========================================
    2729    // ===== ADDRESS ===========================
    … …  
    3032    internal_ADDRESS_VAL = reg_PC_ACCESS_VAL;
    3133
    32     PORT_WRITE(out_ADDRESS_VAL                        ,internal_ADDRESS_VAL                     );
    3334    // Align pc on instruction packet address.
    3435    PORT_WRITE(out_ADDRESS_INSTRUCTION_ADDRESS        ,reg_PC_ACCESS - (reg_PC_ACCESS%_param->_nb_instruction));
    … …  
    4849    internal_PREDICT_VAL = not reg_PC_NEXT_NEXT_VAL;
    4950
    50     PORT_WRITE(out_PREDICT_VAL                  ,internal_PREDICT_VAL);
    5151    PORT_WRITE(out_PREDICT_PC_PREVIOUS          ,reg_PC_CURRENT        );
    5252    PORT_WRITE(out_PREDICT_PC_CURRENT           ,reg_PC_NEXT           );
    5353    PORT_WRITE(out_PREDICT_PC_CURRENT_IS_DS_TAKE,reg_PC_NEXT_IS_DS_TAKE);
    54    
     54      }
     55    else
     56      {
     57    internal_ADDRESS_VAL = 0;
     58    internal_PREDICT_VAL = 0;
     59      }
     60
     61    PORT_WRITE(out_ADDRESS_VAL,internal_ADDRESS_VAL);
     62    PORT_WRITE(out_PREDICT_VAL,internal_PREDICT_VAL);
     63
    5564    log_printf(FUNC,Address_management,FUNCTION,"End");
    5665  };

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_transition.cpp

    r119 r123  
    222222      std::string instruction_enable;
    223223      for (uint32_t i=0; i<_param->_nb_instruction; ++i)
    224         instruction_enable += toString(reg_PC_ACCESS_INSTRUCTION_ENABLE [i])+ " ";
     224        instruction_enable += ((reg_PC_ACCESS_VAL)?(toString(reg_PC_ACCESS_INSTRUCTION_ENABLE [i])):"X") + " ";
    225225
    226226      log_printf(TRACE,Address_management,FUNCTION,"    * Access    : %d %d 0x%.8x (%.8x) - %.2d %.2d %.2d - %s",
    … …  
    238238      std::string instruction_enable;
    239239      for (uint32_t i=0; i<_param->_nb_instruction; ++i)
    240         instruction_enable += toString(reg_PC_CURRENT_INSTRUCTION_ENABLE [i])+ " ";
     240        instruction_enable += ((reg_PC_CURRENT_VAL)?(toString(reg_PC_CURRENT_INSTRUCTION_ENABLE [i])):"X") + " ";
    241241
    242242      log_printf(TRACE,Address_management,FUNCTION,"    * Current   : %d %d 0x%.8x (%.8x) - %.2d %.2d %.2d - %s",
    … …  
    254254      std::string instruction_enable;
    255255      for (uint32_t i=0; i<_param->_nb_instruction; ++i)
    256         instruction_enable += toString(reg_PC_NEXT_INSTRUCTION_ENABLE [i])+ " ";
     256        instruction_enable += ((reg_PC_NEXT_VAL)?(toString(reg_PC_NEXT_INSTRUCTION_ENABLE [i])):"X") + " ";
    257257
    258258      log_printf(TRACE,Address_management,FUNCTION,"    * Next      : %d %d 0x%.8x (%.8x) - %.2d %.2d %.2d - %s",

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue.cpp

    r88 r123  
    3838    log_printf(FUNC,Ifetch_queue,FUNCTION,"Begin");
    3939
    40 #if DEBUG_Ifetch_queue == true
    41     log_printf(INFO,Ifetch_queue,FUNCTION,_("<%s> Parameters"),_name.c_str());
     40// #if DEBUG_Ifetch_queue == true
     41//     log_printf(INFO,Ifetch_queue,FUNCTION,_("<%s> Parameters"),_name.c_str());
    4242
    43     std::cout << *param << std::endl;
    44 #endif   
     43//     std::cout << *param << std::endl;
     44// #endif   
    4545
    4646    log_printf(INFO,Ifetch_queue,FUNCTION,_("<%s> Allocation"),_name.c_str());

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_deallocation.cpp

    r112 r123  
    3636        DELETE0_SIGNAL( in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID,_param->_size_depth          );
    3737        DELETE0_SIGNAL(out_ADDRESS_IFETCH_QUEUE_ID            ,_param->_size_ifetch_queue_ptr);
    38         DELETE1_SIGNAL( in_ADDRESS_INSTRUCTION_ENABLE         ,1,_param->_nb_instruction);
     38        DELETE1_SIGNAL( in_ADDRESS_INSTRUCTION_ENABLE         ,_param->_nb_instruction,1);
    3939     
    40         DELETE1_SIGNAL(out_DECOD_VAL                        ,1,_param->_nb_instruction);
    41         DELETE1_SIGNAL( in_DECOD_ACK                        ,1,_param->_nb_instruction);
    42         DELETE1_SIGNAL(out_DECOD_INSTRUCTION                ,_param->_size_instruction,_param->_nb_instruction);
     40        DELETE1_SIGNAL(out_DECOD_VAL                        ,_param->_nb_instruction,1);
     41        DELETE1_SIGNAL( in_DECOD_ACK                        ,_param->_nb_instruction,1);
     42        DELETE1_SIGNAL(out_DECOD_INSTRUCTION                ,_param->_nb_instruction,_param->_size_instruction);
    4343        DELETE0_SIGNAL(out_DECOD_ADDRESS                    ,_param->_size_instruction_address);
    4444        DELETE0_SIGNAL(out_DECOD_INST_IFETCH_PTR            ,_param->_size_inst_ifetch_ptr );
    … …  
    5151        DELETE0_SIGNAL( in_ICACHE_RSP_PACKET_ID  ,_param->_size_ifetch_queue_ptr);
    5252        DELETE0_SIGNAL( in_ICACHE_RSP_ERROR      ,_param->_size_icache_error);
    53         DELETE1_SIGNAL( in_ICACHE_RSP_INSTRUCTION,_param->_size_instruction,_param->_nb_instruction);
     53        DELETE1_SIGNAL( in_ICACHE_RSP_INSTRUCTION,_param->_nb_instruction,_param->_size_instruction);
    5454
    5555        DELETE0_SIGNAL( in_EVENT_RESET_VAL,1);

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_genMoore.cpp

    r119 r123  
    2323    log_printf(FUNC,Ifetch_queue,FUNCTION,"Begin");
    2424
     25    if (PORT_READ(in_NRESET))
     26      {
    2527    // ==========================================================
    2628    // =====[ ADDRESS ]==========================================
    … …  
    2931      internal_ADDRESS_ACK = (_queue[reg_PTR_WRITE]->_state == IFETCH_QUEUE_STATE_EMPTY);
    3032     
    31       PORT_WRITE(out_ADDRESS_ACK            , internal_ADDRESS_ACK);
    3233      if (_param->_have_port_ifetch_queue_ptr)
    3334      PORT_WRITE(out_ADDRESS_IFETCH_QUEUE_ID, reg_PTR_WRITE);
    … …  
    4344        {
    4445          internal_DECOD_VAL [i] = ack and _queue[reg_PTR_READ]->_instruction_enable [i];
    45           PORT_WRITE(out_DECOD_VAL         [i], internal_DECOD_VAL [i]);
    4646          PORT_WRITE(out_DECOD_INSTRUCTION [i],         _queue[reg_PTR_READ]->_instruction        [i]);
    4747        }
    … …  
    5555      PORT_WRITE(out_DECOD_EXCEPTION                  , _queue[reg_PTR_READ]->_exception                  );
    5656    }
     57      }
     58    else
     59      {
     60        // Reset
     61        internal_ADDRESS_ACK = 0;
     62        for (uint32_t i=0; i<_param->_nb_instruction; i++)
     63          internal_DECOD_VAL [i] = 0;
     64       
     65      }
     66
     67    // Write Output
     68    PORT_WRITE(out_ADDRESS_ACK  , internal_ADDRESS_ACK);
     69    for (uint32_t i=0; i<_param->_nb_instruction; i++)
     70    PORT_WRITE(out_DECOD_VAL [i], internal_DECOD_VAL [i]);
    5771
    5872    log_printf(FUNC,Ifetch_queue,FUNCTION,"End");

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue.cpp

    r88 r123  
    3838    log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"Begin");
    3939
    40 #if DEBUG_Ifetch_unit_Glue == true
    41     log_printf(INFO,Ifetch_unit_Glue,FUNCTION,_("<%s> Parameters"),_name.c_str());
     40// #if DEBUG_Ifetch_unit_Glue == true
     41//     log_printf(INFO,Ifetch_unit_Glue,FUNCTION,_("<%s> Parameters"),_name.c_str());
    4242
    43     std::cout << *param << std::endl;
    44 #endif   
     43//     std::cout << *param << std::endl;
     44// #endif   
    4545
    4646    log_printf(INFO,Ifetch_unit_Glue,FUNCTION,"Allocation");

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_genMealy_event.cpp

    r81 r123  
    2424    log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"Begin");
    2525
     26    if (PORT_READ(in_NRESET))
     27      {
    2628    Tcontrol_t address_ack = PORT_READ(in_EVENT_ADDRESS_ACK);
    2729    Tcontrol_t queue_ack   = PORT_READ(in_EVENT_QUEUE_ACK  );
    … …  
    3133    PORT_WRITE(out_EVENT_ADDRESS_VAL, val         and queue_ack);
    3234    PORT_WRITE(out_EVENT_QUEUE_VAL  , address_ack and val);
    33    
     35      }
     36    else
     37      {
     38    PORT_WRITE(out_EVENT_ACK        , 0);
     39    PORT_WRITE(out_EVENT_ADDRESS_VAL, 0);
     40    PORT_WRITE(out_EVENT_QUEUE_VAL  , 0);
     41      }
     42
    3443    log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"End");
    3544  };

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_genMealy_icache_req.cpp

    r85 r123  
    2424    log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"Begin");
    2525
     26    if (PORT_READ(in_NRESET))
     27      {
    2628    Tcontrol_t address_val = PORT_READ(in_ICACHE_REQ_ADDRESS_VAL);
    2729    Tcontrol_t queue_ack   = PORT_READ(in_ICACHE_REQ_QUEUE_ACK  );
    … …  
    3537    PORT_WRITE(out_ICACHE_REQ_ADDRESS      ,address);
    3638    PORT_WRITE(out_ICACHE_REQ_QUEUE_ADDRESS,address);
     39      }
     40    else
     41      {
     42        // RESET
     43        PORT_WRITE(out_ICACHE_REQ_VAL        , 0);
     44        PORT_WRITE(out_ICACHE_REQ_ADDRESS_ACK, 0);
     45        PORT_WRITE(out_ICACHE_REQ_QUEUE_VAL  , 0);
     46      }
    3747   
    3848    log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"End");

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit.cpp

    r88 r123  
    3737    log_printf(FUNC,Ifetch_unit,FUNCTION,"Begin");
    3838
    39 #if DEBUG_Ifetch_unit == true
    40     log_printf(INFO,Ifetch_unit,FUNCTION,_("<%s> Parameters"),_name.c_str());
     39// #if DEBUG_Ifetch_unit == true
     40//     log_printf(INFO,Ifetch_unit,FUNCTION,_("<%s> Parameters"),_name.c_str());
    4141
    42     std::cout << *param << std::endl;
    43 #endif   
     42//     std::cout << *param << std::endl;
     43// #endif   
    4444
    4545    log_printf(INFO,Ifetch_unit,FUNCTION,"Allocation");

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/src/Ifetch_unit_deallocation.cpp

    r112 r123  
    4040        DELETE0_SIGNAL( in_ICACHE_RSP_PACKET_ID  ,_param->_size_ifetch_queue_ptr   );
    4141        DELETE0_SIGNAL( in_ICACHE_RSP_ERROR      ,_param->_size_icache_error);
    42         DELETE1_SIGNAL( in_ICACHE_RSP_INSTRUCTION,_param->_size_instruction,_param->_nb_instruction);
     42        DELETE1_SIGNAL( in_ICACHE_RSP_INSTRUCTION,_param->_nb_instruction, _param->_size_instruction);
    4343
    4444        DELETE0_SIGNAL(out_PREDICT_VAL                        ,1);
    … …  
    5252        DELETE0_SIGNAL( in_PREDICT_BRANCH_STATE               ,_param->_size_branch_state);
    5353        DELETE0_SIGNAL( in_PREDICT_BRANCH_UPDATE_PREDICTION_ID,_param->_size_depth);
    54         DELETE1_SIGNAL( in_PREDICT_INSTRUCTION_ENABLE         ,1,_param->_nb_instruction);
     54        DELETE1_SIGNAL( in_PREDICT_INSTRUCTION_ENABLE         ,_param->_nb_instruction,1);
    5555
    5656    //  DELETE0_SIGNAL(out_DECOD_CONTEXT_ID                 ,_param->_size_context_id);
    … …  
    6262        DELETE1_SIGNAL(out_DECOD_VAL                        ,1,_param->_nb_instruction);
    6363        DELETE1_SIGNAL( in_DECOD_ACK                        ,1,_param->_nb_instruction);
    64         DELETE1_SIGNAL(out_DECOD_INSTRUCTION                ,_param->_size_instruction,_param->_nb_instruction);
     64        DELETE1_SIGNAL(out_DECOD_INSTRUCTION                ,_param->_nb_instruction,_param->_size_instruction);
    6565
    6666        DELETE0_SIGNAL( in_EVENT_VAL              ,1);
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