Changeset 135 for trunk/IPs/systemC


Ignore:
Timestamp:
Jul 17, 2009, 10:59:05 AM (15 years ago)
Author:
rosiere
Message:

1) Add Vhdl component
2) Inhib VHDL Seltest interface

Location:
trunk/IPs/systemC/processor/Morpheo
Files:
6 added
36 edited

Legend:

Unmodified
Added
Removed

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_allocation.cpp

    r122 r135  
    140140      ALLOC1_VALACK_IN ( in_SPR_READ_ACK           ,ACK);
    141141      ALLOC1_SIGNAL_OUT(out_SPR_READ_OOO_ENGINE_ID ,"ooo_engine_id",Tcontext_t        ,_param->_size_ooo_engine_id);
    142       ALLOC1_SIGNAL_OUT(out_SPR_READ_NUM_REG       ,"num_reg"      ,Tgeneral_address_t,_param->_size_general_register);
    143       ALLOC1_SIGNAL_IN ( in_SPR_READ_DATA          ,"data"         ,Tgeneral_data_t   ,_param->_size_general_data);
     142      ALLOC1_SIGNAL_OUT(out_SPR_READ_NUM_REG       ,"num_reg"      ,Tgeneral_address_t,_param->_size_special_register);
     143      ALLOC1_SIGNAL_IN ( in_SPR_READ_DATA          ,"data"         ,Tgeneral_data_t   ,_param->_size_special_data);
    144144      ALLOC1_SIGNAL_IN ( in_SPR_READ_DATA_VAL      ,"data_val"     ,Tcontrol_t        ,1);
    145145
    … …  
    165165      ALLOC1_VALACK_IN (in_SPR_WRITE_VAL           ,VAL);
    166166      ALLOC1_SIGNAL_IN (in_SPR_WRITE_OOO_ENGINE_ID ,"ooo_engine_id",Tcontext_t        ,_param->_size_ooo_engine_id);
    167       ALLOC1_SIGNAL_IN (in_SPR_WRITE_NUM_REG       ,"num_reg"      ,Tgeneral_address_t,_param->_size_general_register);
    168       ALLOC1_SIGNAL_IN (in_SPR_WRITE_DATA          ,"data"         ,Tgeneral_data_t   ,_param->_size_general_data);
     167      ALLOC1_SIGNAL_IN (in_SPR_WRITE_NUM_REG       ,"num_reg"      ,Tgeneral_address_t,_param->_size_special_register);
     168      ALLOC1_SIGNAL_IN (in_SPR_WRITE_DATA          ,"data"         ,Tgeneral_data_t   ,_param->_size_special_data);
    169169     
    170170      ALLOC1_INTERFACE_END(_param->_nb_spr_write);

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_allocation.cpp

    r122 r135  
    136136       ALLOC1_VALACK_IN ( in_SPR_WRITE_VAL          ,VAL);
    137137       ALLOC1_SIGNAL_IN ( in_SPR_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t        ,_param->_size_ooo_engine_id);
    138        ALLOC1_SIGNAL_IN ( in_SPR_WRITE_NUM_REG      ,"num_reg"      ,Tgeneral_address_t,_param->_size_general_register);
    139        ALLOC1_SIGNAL_IN ( in_SPR_WRITE_DATA         ,"data"         ,Tgeneral_data_t   ,_param->_size_general_data);
     138       ALLOC1_SIGNAL_IN ( in_SPR_WRITE_NUM_REG      ,"num_reg"      ,Tgeneral_address_t,_param->_size_special_register);
     139       ALLOC1_SIGNAL_IN ( in_SPR_WRITE_DATA         ,"data"         ,Tgeneral_data_t   ,_param->_size_special_data);
    140140
    141141       ALLOC1_INTERFACE_END(_param->_nb_spr_write);

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Context_State/src/Context_State_allocation.cpp

    r123 r135  
    158158      ALLOC1_VALACK_OUT(out_SPR_EVENT_VAL                      ,VAL);
    159159      ALLOC1_VALACK_IN ( in_SPR_EVENT_ACK                      ,ACK);
    160       ALLOC1_SIGNAL_OUT(out_SPR_EVENT_EPCR                     ,"epcr"     ,Taddress_t, _param->_size_instruction_address);
    161       ALLOC1_SIGNAL_OUT(out_SPR_EVENT_EEAR                     ,"eear"     ,Taddress_t, _param->_size_instruction_address);
     160      ALLOC1_SIGNAL_OUT(out_SPR_EVENT_EPCR                     ,"epcr"     ,Taddress_t, _param->_size_spr);
     161      ALLOC1_SIGNAL_OUT(out_SPR_EVENT_EEAR                     ,"eear"     ,Taddress_t, _param->_size_spr);
    162162      ALLOC1_SIGNAL_OUT(out_SPR_EVENT_EEAR_WEN                 ,"eear_wen" ,Tcontrol_t,1);
    163163      ALLOC1_SIGNAL_OUT(out_SPR_EVENT_SR_DSX                   ,"sr_dsx"   ,Tcontrol_t,1);

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_genMealy.cpp

    r134 r135  
    200200                PORT_WRITE(out_DECOD_NUM_REG_RE    [i], _decod_instruction->_num_reg_re    );
    201201                PORT_WRITE(out_DECOD_EXCEPTION_USE [i], _decod_instruction->_exception_use );
    202 //              PORT_WRITE(out_DECOD_EXCEPTION     [i], _decod_instruction->_exception     );
     202                PORT_WRITE(out_DECOD_EXCEPTION     [i], _decod_instruction->_exception     );
    203203
    204204                // Branch predictor can accept : the depth is valid

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_vhdl_body.cpp

    r81 r135  
    1717namespace decod {
    1818
     19#define instruction_illegale(tab,num_inst) vhdl->set_comment(tab," ILLEGAL INSTRUCTION  --");\
     20  vhdl->set_body(tab,"internal_DECOD_INSTRUCTION_"+toString(num_inst)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_ILLEGAL_INSTRUCTION)+"; ");  \
     21  vhdl->set_body(tab,"internal_DECOD_INSTRUCTION_"+toString(num_inst)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_ILLEGAL_INSTRUCTION)+"; "); \
     22  vhdl->set_body(tab,"if internal_DECOD_INSTRUCTION_"+toString(num_inst)+"_IS_DELAY_SLOT = '1' then "); \
     23  vhdl->set_body(tab + 1,"internal_DECOD_INSTRUCTION_"+toString(num_inst)+"_ADDRESS_NEXT <= internal_CONTEXT_0_ADDRESS_PREVIOUS; "); \
     24  vhdl->set_body(tab,"else ");                                          \
     25  vhdl->set_body(tab + 1,"internal_DECOD_INSTRUCTION_"+toString(num_inst)+"_ADDRESS_NEXT <= internal_DECOD_INSTRUCTION_"+toString(num_inst)+"_ADDRESS; "); \
     26  vhdl->set_body(tab,"end if;");                                        \
     27  vhdl->set_body(tab,"internal_DECOD_INSTRUCTION_"+toString(num_inst)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_EXCEPTION)+"; ");   
    1928
    2029#undef  FUNCTION
    … …  
    2332  {
    2433    log_printf(FUNC,Decod,FUNCTION,"Begin");
     34
     35    std::string extend_signal;
     36
     37    for(uint32_t i = 0;i < _param->_nb_inst_decod;i++){
     38      vhdl->set_body(0,"internal_DECOD_INSTRUCTION_"+toString(i)+" <= in_IFETCH_0_"+toString(i)+"_INSTRUCTION WHEN in_IFETCH_0_EXCEPTION = "+std_logic_cst(_param->_size_exception_ifetch,EXCEPTION_IFETCH_NONE)+" ELSE "+std_logic_cst(6,OPCOD_10)+" & "+std_logic_cst(2,OPCOD_L_NOP)+" & X\"000000\" ;");
     39      vhdl->set_body(0,"out_DECOD_"+toString(i)+"_VAL <= internal_DECOD_"+toString(i)+"_VAL; ");
     40      vhdl->set_body(0,"out_DECOD_"+toString(i)+"_TYPE <= internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE; ");
     41      vhdl->set_body(0,"out_DECOD_"+toString(i)+"_OPERATION <= internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION; ");
     42      vhdl->set_body(0,"out_DECOD_"+toString(i)+"_HAS_IMMEDIAT <= internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT; ");
     43      vhdl->set_body(0,"out_DECOD_"+toString(i)+"_IMMEDIAT <= internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT; ");
     44      vhdl->set_body(0,"out_DECOD_"+toString(i)+"_READ_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA; ");
     45      vhdl->set_body(0,"out_DECOD_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA; ");
     46      vhdl->set_body(0,"out_DECOD_"+toString(i)+"_READ_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB; ");
     47      vhdl->set_body(0,"out_DECOD_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB; ");
     48      vhdl->set_body(0,"out_DECOD_"+toString(i)+"_READ_RC <= internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC; ");
     49      vhdl->set_body(0,"out_DECOD_"+toString(i)+"_NUM_REG_RC <= internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RC; ");
     50      vhdl->set_body(0,"out_DECOD_"+toString(i)+"_WRITE_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD; ");
     51      vhdl->set_body(0,"out_DECOD_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD; ");
     52      vhdl->set_body(0,"out_DECOD_"+toString(i)+"_WRITE_RE <= internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE; ");
     53      vhdl->set_body(0,"out_DECOD_"+toString(i)+"_NUM_REG_RE <= internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE; ");
     54      vhdl->set_body(0,"out_DECOD_"+toString(i)+"_EXCEPTION_USE <= internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE; ");
     55      vhdl->set_body(0,"out_DECOD_"+toString(i)+"_EXCEPTION <= internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION WHEN in_IFETCH_0_EXCEPTION = "+std_logic_cst(_param->_size_exception_ifetch,EXCEPTION_IFETCH_NONE)+" ELSE "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     56      vhdl->set_body(0,"out_DECOD_"+toString(i)+"_NO_EXECUTE <= internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE; ");
     57      vhdl->set_body(0,"out_DECOD_"+toString(i)+"_IS_DELAY_SLOT <= internal_DECOD_INSTRUCTION_"+toString(i)+"_IS_DELAY_SLOT; ");
     58#ifdef DEBUG
     59      vhdl->set_body(0,"out_DECOD_"+toString(i)+"_ADDRESS <= internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS; ");
     60#endif
     61      vhdl->set_body(0,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS <= in_IFETCH_0_ADDRESS + "+std_logic_cst(_param->_size_instruction_address,i)+" ;");
     62      vhdl->set_body(0,"out_DECOD_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     63      vhdl->set_body(0,"internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= in_IFETCH_"+toString(i)+"_ADDRESS + '1'; ");
     64      vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_BRANCH_CONDITION <= internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION; ");
     65      vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_BRANCH_DIRECTION <= internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_DIRECTION; ");
     66      vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_ADDRESS_SRC <= internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS; ");
     67      vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_ADDRESS_DEST <= internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     68      vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_BRANCH_STATE <= in_IFETCH_0_BRANCH_STATE; ");
     69      vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_VAL <= internal_PREDICT_"+toString(i)+"_VAL; ");
     70
     71      if(_param->_have_port_depth) vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_BRANCH_UPDATE_PREDICTION_ID <= in_IFETCH_0_BRANCH_UPDATE_PREDICTION_ID; ");
     72      if(_param->_have_port_inst_ifetch_ptr) vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_MATCH_INST_IFETCH_PTR <= '1' WHEN in_IFETCH_0_INST_IFETCH_PTR = "+std_logic_cst(_param->_size_inst_ifetch_ptr,i)+" ELSE '0'; ");
     73      else vhdl->set_body(0,"out_PREDICT_"+toString(i)+"_MATCH_INST_IFETCH_PTR <= '1' WHEN internal_DECOD_INSTRUCTION_0_TYPE = "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+" ELSE '0' ; ");
     74    }
     75
    2576    vhdl->set_body ("");
     77
     78    if(_param->_have_port_context_id){
     79
     80    }
     81    else{
     82   
     83      vhdl->set_body(0,"internal_DECOD_INSTRUCTION_0_IS_DELAY_SLOT <= reg_CONTEXT_0_IS_DELAY_SLOT; ");
     84      for(uint32_t i = 1;i < _param->_nb_inst_decod;i++){
     85       
     86        vhdl->set_body(0,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IS_DELAY_SLOT <= internal_HAVE_DECOD_BRANCH"+toString(i-1)+"; ");
     87      }
     88     
     89      vhdl->set_body(0,"out_CONTEXT_EVENT_VAL <= internal_CONTEXT_EVENT_VAL; ");
     90      vhdl->set_body(0,"out_CONTEXT_EVENT_TYPE <= internal_DECOD_INSTRUCTION_0_EVENT_TYPE WHEN in_IFETCH_0_EXCEPTION = "+std_logic_cst(_param->_size_exception_ifetch,EXCEPTION_IFETCH_NONE)+" ELSE "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_EXCEPTION)+"; ");
     91      vhdl->set_body(0,"out_CONTEXT_EVENT_ADDRESS <= internal_DECOD_INSTRUCTION_0_ADDRESS; ");
     92      vhdl->set_body(0,"out_CONTEXT_EVENT_ADDRESS_EPCR <= internal_DECOD_INSTRUCTION_0_ADDRESS_NEXT; ");
     93      vhdl->set_body(0,"out_CONTEXT_EVENT_IS_DELAY_SLOT <= reg_CONTEXT_0_IS_DELAY_SLOT; ");
     94      for(uint32_t i = 0;i < _param->_nb_inst_decod;i++) vhdl->set_body(0,"out_IFETCH_0_"+toString(i)+"_ACK <= internal_IFETCH_0_"+toString(i)+"_ACK; ");
     95    }
     96   
     97    vhdl->set_body(0,"");
     98
     99    vhdl->set_body(0,"internal_CONTEXT_EVENT_VAL <= internal_DECOD_0_VAL AND internal_IFETCH_0_0_ACK WHEN internal_DECOD_INSTRUCTION_0_EVENT_TYPE /= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+" ELSE '0'; ");
     100
     101    for(uint32_t x = 0;x < _param->_nb_context;x++){
     102      if(_param->_nb_inst_decod <= 1){
     103        vhdl->set_body(0,"internal_HAVE_DECOD_BRANCH_0 <= '0'; ");
     104        vhdl->set_body(0,"internal_CAN_CONTINUE_"+toString(x)+" <= in_CONTEXT_"+toString(x)+"_DECOD_ENABLE; ");
     105      }
     106      else{
     107        vhdl->set_body(0,"internal_CAN_CONTINUE_"+toString(x)+" <= in_CONTEXT_"+toString(x)+"_DECOD_ENABLE WHEN internal_DECOD_INSTRUCTION_0_TYPE /= "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+" ELSE ( in_CONTEXT_"+toString(x)+"_DECOD_ENABLE AND in_PREDICT_0_CAN_CONTINUE ); ");
     108        for(uint32_t i = 1;i < _param->_nb_inst_decod;i++) vhdl->set_body(0,"internal_HAVE_DECOD_BRANCH_"+toString(i)+" <= internal_DECOD_BRANCH_"+toString(i-1)+"_VAL; ");
     109      }
     110      vhdl->set_body(0,"internal_CONTEXT_"+toString(x)+"_HAVE_TRANSACTION <= internal_IFETCH_"+toString(x)+"_0_ACK ");
     111      for (uint32_t y = 1; y < _param->_nb_inst_fetch[x]; y++) vhdl->set_body(1,"OR internal_IFETCH_"+toString(x)+"_"+toString(y)+"_ACK ");
     112      vhdl->set_body(0,";");
     113    }
     114
     115    if(_param->_nb_inst_decod <= 1){
     116       
     117        vhdl->set_body(0,"internal_DECOD_BRANCH_0_VAL <= in_PREDICT_0_ACK WHEN internal_DECOD_INSTRUCTION_0_TYPE = "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+" ELSE '1'; ");
     118        vhdl->set_body(0,"internal_DECOD_CONTEXT_EVENT_0_VAL <= in_CONTEXT_EVENT_ACK WHEN internal_DECOD_INSTRUCTION_0_EVENT_TYPE /= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+" ELSE '1'; ");
     119        vhdl->set_body(0,"internal_DECOD_0_VAL <= (( in_IFETCH_0_0_VAL AND internal_CAN_CONTINUE_0 ) AND in_CONTEXT_0_DEPTH_VAL ) AND internal_DECOD_BRANCH_0_VAL AND internal_DECOD_CONTEXT_EVENT_0_VAL; ");
     120        vhdl->set_body(0,"internal_IFETCH_0_0_ACK <= ((( in_IFETCH_0_0_VAL AND internal_CAN_CONTINUE_0 ) AND in_DECOD_0_ACK ) AND in_CONTEXT_0_DEPTH_VAL ) AND internal_DECOD_BRANCH_0_VAL AND internal_DECOD_CONTEXT_EVENT_0_VAL; ");
     121
     122        vhdl->set_body(0,"internal_PREDICT_0_VAL <= NOT( internal_HAVE_DECOD_BRANCH_0 ) AND in_IFETCH_0_0_VAL AND internal_CAN_CONTINUE_0 AND in_CONTEXT_0_DEPTH_VAL AND in_DECOD_0_ACK WHEN internal_DECOD_INSTRUCTION_0_TYPE = "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+" ELSE '0'; ");
     123    }
     124    else{ // TO DO
     125      for(uint32_t i = 0;i < _param->_nb_inst_decod;i++){
     126        vhdl->set_body(0,"internal_PREDICT_"+toString(i)+"_VAL <= NOT( internal_HAVE_DECOD_BRANCH_0 ) AND in_DECOD_"+toString(i)+"_ACK AND in_CONTEXT_0_DEPTH_VAL WHEN ( in_IFETCH_0_0_VAL AND internal_CAN_CONTINUE_0 ) = '1' ELSE '0'; ");
     127       
     128        vhdl->set_body(0,"internal_DECOD_BRANCH_"+toString(i)+"_VAL <= ( in_PREDICT_"+toString(i)+"_ACK AND NOT internal_HAVE_DECOD_BRANCH_0 ) OR NOT( internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE = "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+" ); ");
     129        vhdl->set_body(0,"internal_DECOD_CONTEXT_EVENT_"+toString(i)+"_VAL <= in_CONTEXT_EVENT_ACK OR NOT( internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE = "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+" ); ");
     130        vhdl->set_body(0,"internal_DECOD_"+toString(i)+"_VAL <= (( in_IFETCH_0_0_VAL AND internal_CAN_CONTINUE_0 ) AND in_CONTEXT_0_DEPTH_VAL ) AND internal_DECOD_BRANCH_"+toString(i)+"_VAL AND internal_DECOD_CONTEXT_EVENT_"+toString(i)+"_VAL; ");
     131      }
     132    }
     133
     134    vhdl->set_body(0,"");
     135    vhdl->set_comment(0,"-----------------------------------");
     136    vhdl->set_comment(0,"-- Case process                    ");
     137    vhdl->set_comment(0,"-----------------------------------");
     138    vhdl->set_body(0,"");
     139   
     140    for(uint32_t i = 0;i < _param->_nb_inst_decod;i++){
     141      vhdl->set_body(0,"case_DECOD_INST_"+toString(i)+": process (internal_DECOD_INSTRUCTION_"+toString(i)+")");
     142      vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_0  : "+std_logic(6)+";");
     143      vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_1  : "+std_logic(8)+";");
     144      vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_2  : "+std_logic(8)+";");
     145      vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_3  : "+std_logic(6)+";");
     146      vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_4  : "+std_logic(5)+";");
     147      vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_5  : "+std_logic(5)+";");
     148      vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_6  : "+std_logic(2)+";");
     149      vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_7  : "+std_logic(4)+";");
     150      vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_8  : "+std_logic(1)+";");
     151      vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_9  : "+std_logic(3)+";");
     152      vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_10 : "+std_logic(2)+";");
     153      vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_11 : "+std_logic(2)+";");
     154      vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_12 : "+std_logic(4)+";");
     155      vhdl->set_body(1,"variable internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_13 : "+std_logic(4)+";");
     156     
     157      vhdl->set_body(0,"begin");
     158
     159      //vhdl->set_body(1,"if in_IFETCH_0_EXCEPTION = "+std_logic_cst(_param->_size_exception_ifetch,EXCEPTION_IFETCH_NONE)+" then");
     160      //vhdl->set_body(2,"internal_DECOD_INSTRUCTION_"+toString(i)+" <= in_IFETCH_0_"+toString(i)+"_INSTRUCTION ;");
     161      //vhdl->set_body(1,"else");
     162      //vhdl->set_body(2,"internal_DECOD_INSTRUCTION_"+toString(i)+" <= "+std_logic_cst(6,OPCOD_10)+" & "+std_logic_cst(2,OPCOD_L_NOP)+" & X\"000000\" ;");
     163      //vhdl->set_body(1,"end if;");
     164
     165
     166#ifdef SYSTEMC_VHDL_COMPATIBILITY
     167      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE    <= "+std_logic_cst(1,0)+";");
     168      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE          <= "+std_logic_cst(_param->_size_type,0)+";");
     169      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION     <= "+std_logic_cst(_param->_size_operation,0)+";");
     170      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT  <= "+std_logic_cst(1,0)+";");
     171      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT      <= "+std_logic_cst(_param->_size_general_data,0)+";");
     172      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA       <= "+std_logic_cst(1,0)+";");
     173      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA    <= "+std_logic_cst(_param->_size_general_register_logic,0)+";");
     174      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB       <= "+std_logic_cst(1,0)+";");
     175      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB    <= "+std_logic_cst(_param->_size_general_register_logic,0)+";");
     176      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC       <= "+std_logic_cst(1,0)+";");
     177      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RC    <= "+std_logic_cst(_param->_size_special_register_logic,0)+";");
     178      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD      <= "+std_logic_cst(1,0)+";");
     179      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD    <= "+std_logic_cst(_param->_size_general_register_logic,0)+";");
     180      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE      <= "+std_logic_cst(1,0)+";");
     181      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE    <= "+std_logic_cst(_param->_size_special_register_logic,0)+";");
     182      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,0)+";");
     183      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION     <= "+std_logic_cst(_param->_size_exception_decod,0)+";");
     184      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION <= "+std_logic_cst(_param->_size_branch_condition,0)+";");
     185      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_DIRECTION <= "+std_logic_cst(1,0)+";");
     186#endif         
     187
     188      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_0  := internal_DECOD_INSTRUCTION_"+toString(i)+"(31 downto 26); ");
     189      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_1  := internal_DECOD_INSTRUCTION_"+toString(i)+"(7 downto 0); ");
     190      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_2  := internal_DECOD_INSTRUCTION_"+toString(i)+"(7 downto 0); ");
     191      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_3  := internal_DECOD_INSTRUCTION_"+toString(i)+"(9 downto 8) & internal_DECOD_INSTRUCTION_"+toString(i)+"(3 downto 0); ");
     192      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_4  := internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     193      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_5  := internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     194      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_6  := internal_DECOD_INSTRUCTION_"+toString(i)+"(7 downto 6); ");
     195      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_7  := internal_DECOD_INSTRUCTION_"+toString(i)+"(3 downto 0); ");
     196      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_8  := internal_DECOD_INSTRUCTION_"+toString(i)+"(16); ");
     197      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_9  := internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 23); ");
     198      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_10 := internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 24); ");
     199      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_11 := internal_DECOD_INSTRUCTION_"+toString(i)+"(7 downto 6); ");
     200      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_12 := internal_DECOD_INSTRUCTION_"+toString(i)+"(9 downto 6); ");
     201      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_13 := internal_DECOD_INSTRUCTION_"+toString(i)+"(9 downto 6); ");
     202
     203      vhdl->set_body(1,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT  <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT;");
     204
     205      vhdl->set_body(1,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_0 is");
     206     
     207      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_J)+" => ");
     208      vhdl->set_comment(2," OPCOD_L_J  --");
     209     
     210      // TYPE_0  IMMEDIAT
     211      // OPCOD_L_J
     212     
     213      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_J)._type)+"; ");
     214      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_J)._operation)+"; ");
     215      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     216      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; ");
     217      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     218      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     219      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     220      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     221      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     222      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     223      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION <= "+std_logic_cst(_param->_size_branch_condition,BRANCH_CONDITION_NONE_WITHOUT_WRITE_STACK)+"; ");
     224      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_DIRECTION <= '1'; ");
     225      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '1'; ");
     226      extend_signal = "";
     227      for(uint32_t cp = 0;cp < _param->_size_instruction_address - 26;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & ";
     228      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= in_IFETCH_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); ");
     229      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     230     
     231      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_JAL)+" => ");
     232      vhdl->set_comment(2," OPCOD_L_JAL  --");
     233     
     234      // TYPE_0  IMMEDIAT
     235      // OPCOD_L_JAL
     236     
     237      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_JAL)._type)+"; ");
     238      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_JAL)._operation)+"; ");
     239      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     240      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \"00\" & internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT + '1'; ");
     241      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; ");
     242      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     243      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     244      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     245      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= "+std_logic_cst(_param->_size_general_register_logic,9)+"; ");
     246      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     247      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     248      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     249      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION <= "+std_logic_cst(_param->_size_branch_condition,BRANCH_CONDITION_NONE_WITH_WRITE_STACK)+"; ");
     250      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_DIRECTION <= '1'; ");
     251      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     252      extend_signal = "";
     253      for(uint32_t cp = 0;cp < _param->_size_instruction_address - 26;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & ";
     254      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= in_IFETCH_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); ");
     255      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     256     
     257      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_BNF)+" => ");
     258      vhdl->set_comment(2," OPCOD_L_BNF  --");
     259     
     260      // TYPE_0  IMMEDIAT
     261      // OPCOD_L_BNF
     262     
     263      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_BNF)._type)+"; ");
     264      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_BNF)._operation)+"; ");
     265      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     266      extend_signal = "";
     267      for(uint32_t cp = 0;cp < _param->_size_general_data - 26;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & ";
     268      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \"00\" & in_IFETCH_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); ");
     269      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; ");
     270      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     271      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '1'; ");
     272      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RC <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; ");
     273      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     274      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     275      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     276      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     277      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION <= "+std_logic_cst(_param->_size_branch_condition,BRANCH_CONDITION_FLAG_UNSET)+"; ");
     278      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_DIRECTION <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25); ");
     279      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     280      extend_signal = "";
     281      for(uint32_t cp = 0;cp < _param->_size_instruction_address - 26;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & ";
     282      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= in_IFETCH_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); ");
     283      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     284     
     285      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_BF)+" => ");
     286      vhdl->set_comment(2," OPCOD_L_BF  --");
     287     
     288      // TYPE_0  IMMEDIAT
     289      // OPCOD_L_BF
     290     
     291      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_BF)._type)+"; ");
     292      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_BF)._operation)+"; ");
     293      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     294      extend_signal = "";
     295      for(uint32_t cp = 0;cp < _param->_size_general_data - 26;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & ";
     296      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \"00\" & in_IFETCH_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); ");
     297      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; ");
     298      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     299      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '1'; ");
     300      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RC <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; ");
     301      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     302      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     303      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     304      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     305      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION <= "+std_logic_cst(_param->_size_branch_condition,BRANCH_CONDITION_FLAG_SET)+"; ");
     306      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_DIRECTION <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25); ");
     307      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     308      extend_signal = "";
     309      for(uint32_t cp = 0;cp < _param->_size_instruction_address - 26;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & ";
     310      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= in_IFETCH_"+toString(i)+"_ADDRESS + ( "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 0) ); ");
     311      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     312     
     313      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_RFE)+" => ");
     314      vhdl->set_comment(2," OPCOD_L_RFE  --");
     315     
     316      // TYPE_0  IMMEDIAT
     317      // OPCOD_L_RFE
     318     
     319      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_RFE)._type)+"; ");
     320      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_RFE)._operation)+"; ");
     321      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     322      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; ");
     323      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     324      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     325      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     326      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     327      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     328      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     329      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '1'; ");
     330      //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     331      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     332     
     333      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_JR)+" => ");
     334      vhdl->set_comment(2," OPCOD_L_JR  --");
     335     
     336      // TYPE_0  IMMEDIAT
     337      // OPCOD_L_JR
     338     
     339      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_JR)._type)+"; ");
     340      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_JR)._operation)+"; ");
     341      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     342      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; ");
     343      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     344      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     345      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     346      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     347      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     348      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     349      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     350      vhdl->set_body(3,"if internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11) = "+std_logic_cst(_param->_size_general_register_logic,9)+" then ");
     351      vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION <= "+std_logic_cst(_param->_size_branch_condition,BRANCH_CONDITION_READ_STACK)+"; ");
     352      vhdl->set_body(3,"else ");
     353      vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION <= "+std_logic_cst(_param->_size_branch_condition,BRANCH_CONDITION_READ_REGISTER_WITHOUT_WRITE_STACK)+"; ");
     354      vhdl->set_body(3,"end if; ");
     355      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_DIRECTION <= '1'; ");
     356      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     357      //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     358      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     359     
     360      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_JALR)+" => ");
     361      vhdl->set_comment(2," OPCOD_L_JALR  --");
     362     
     363      // TYPE_0  IMMEDIAT
     364      // OPCOD_L_JALR
     365     
     366      vhdl->set_body(3,"if internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11) = "+std_logic_cst(_param->_size_general_register_logic,9)+" then ");
     367      instruction_illegale(3,i)
     368      // illegal instruction
     369      vhdl->set_body(3,"else ");
     370      vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_JALR)._type)+"; ");
     371      vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_JALR)._operation)+"; ");
     372      vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     373      vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \"00\" & internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT + '1'; ");
     374      vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; ");
     375      vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     376      vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     377      vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     378      vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     379      vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= "+std_logic_cst(_param->_size_general_register_logic,9)+"; ");
     380      vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     381      vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     382      vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     383      vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION <= "+std_logic_cst(_param->_size_branch_condition,BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK)+"; ");
     384      vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_DIRECTION <= '1'; ");
     385      vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     386      //vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     387      vhdl->set_body(4,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     388      vhdl->set_body(3,"end if; ");
     389     
     390      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_MACI)+" => ");
     391      vhdl->set_comment(2," OPCOD_L_MACI  --");
     392     
     393      // TYPE_0  IMMEDIAT
     394      // OPCOD_L_MACI
     395     
     396      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MACI)._type)+"; ");
     397      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MACI)._operation)+"; ");
     398      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     399      extend_signal = "";
     400      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & ";
     401      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 21) & internal_DECOD_INSTRUCTION_"+toString(i)+" (10 downto 0); ");
     402      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     403      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     404      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     405      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     406      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     407      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     408      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     409      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     410      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     411      //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     412      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_SPR_ACCESS)+"; ");
     413     
     414      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_CUST1)+" => ");
     415      vhdl->set_comment(2," OPCOD_L_CUST1  --");
     416     
     417      // TYPE_0  IMMEDIAT
     418      // OPCOD_L_CUST1
     419
     420      instruction_illegale(2,i)
     421      // illegal instruction
     422     
     423      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_CUST2)+" => ");
     424      vhdl->set_comment(2," OPCOD_L_CUST2  --");
     425     
     426      // TYPE_0  IMMEDIAT
     427      // OPCOD_L_CUST2
     428     
     429      instruction_illegale(2,i)
     430      // illegal instruction
     431     
     432      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_CUST3)+" => ");
     433      vhdl->set_comment(2," OPCOD_L_CUST3  --");
     434     
     435      // TYPE_0  IMMEDIAT
     436      // OPCOD_L_CUST3
     437     
     438      instruction_illegale(2,i)
     439      // illegal instruction
     440     
     441      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_CUST4)+" => ");
     442      vhdl->set_comment(2," OPCOD_L_CUST4  --");
     443     
     444      // TYPE_0  IMMEDIAT
     445      // OPCOD_L_CUST4
     446     
     447      instruction_illegale(2,i)
     448      // illegal instruction
     449     
     450      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_CUST5)+" => ");
     451      vhdl->set_comment(2," OPCOD_L_CUST5  --");
     452     
     453      // TYPE_0  IMMEDIAT
     454      // OPCOD_L_CUST5
     455     
     456      instruction_illegale(2,i)
     457      // illegal instruction
     458     
     459      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_CUST6)+" => ");
     460      vhdl->set_comment(2," OPCOD_L_CUST6  --");
     461     
     462      // TYPE_0  IMMEDIAT
     463      // OPCOD_L_CUST6
     464     
     465      instruction_illegale(2,i)
     466      // illegal instruction
     467     
     468      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_CUST7)+" => ");
     469      vhdl->set_comment(2," OPCOD_L_CUST7  --");
     470     
     471      // TYPE_0  IMMEDIAT
     472      // OPCOD_L_CUST7
     473     
     474      instruction_illegale(2,i)
     475      // illegal instruction
     476     
     477      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_CUST8)+" => ");
     478      vhdl->set_comment(2," OPCOD_L_CUST8  --");
     479     
     480      // TYPE_0  IMMEDIAT
     481      // OPCOD_L_CUST8
     482     
     483      instruction_illegale(2,i)
     484      // illegal instruction
     485     
     486      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_LD)+" => ");
     487      vhdl->set_comment(2," OPCOD_L_LD  --");
     488     
     489      // TYPE_0  IMMEDIAT
     490      // OPCOD_L_LD
     491     
     492      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_LD)._type)+"; ");
     493      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_LD)._operation)+"; ");
     494      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     495      extend_signal = "";
     496      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & ";
     497      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); ");
     498      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     499      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     500      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     501      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     502      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     503      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     504      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     505      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITH_ALIGNMENT)+"; ");
     506      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     507      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     508      //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     509      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     510     
     511      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_LWS)+" => ");
     512      vhdl->set_comment(2," OPCOD_L_LWS  --");
     513     
     514      // TYPE_0  IMMEDIAT
     515      // OPCOD_L_LWS
     516     
     517      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_LWS)._type)+"; ");
     518      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_LWS)._operation)+"; ");
     519      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     520      extend_signal = "";
     521      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & ";
     522      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); ");
     523      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     524      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     525      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     526      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     527      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     528      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     529      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     530      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITH_ALIGNMENT)+"; ");
     531      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     532      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     533      //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     534      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     535     
     536      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_LWZ)+" => ");
     537      vhdl->set_comment(2," OPCOD_L_LWZ  --");
     538     
     539      // TYPE_0  IMMEDIAT
     540      // OPCOD_L_LWZ
     541     
     542      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_LWZ)._type)+"; ");
     543      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_LWZ)._operation)+"; ");
     544      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     545      extend_signal = "";
     546      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & ";
     547      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); ");
     548      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     549      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     550      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     551      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     552      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     553      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     554      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     555      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITH_ALIGNMENT)+"; ");
     556      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     557      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     558      //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     559      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     560     
     561      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_LBS)+" => ");
     562      vhdl->set_comment(2," OPCOD_L_LBS  --");
     563     
     564      // TYPE_0  IMMEDIAT
     565      // OPCOD_L_LBS
     566     
     567      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_LBS)._type)+"; ");
     568      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_LBS)._operation)+"; ");
     569      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     570      extend_signal = "";
     571      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & ";
     572      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); ");
     573      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     574      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     575      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     576      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     577      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     578      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     579      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     580      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT)+"; ");
     581      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     582      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     583      //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     584      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     585     
     586      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_LBZ)+" => ");
     587      vhdl->set_comment(2," OPCOD_L_LBZ  --");
     588     
     589      // TYPE_0  IMMEDIAT
     590      // OPCOD_L_LBZ
     591     
     592      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_LBZ)._type)+"; ");
     593      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_LBZ)._operation)+"; ");
     594      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     595      extend_signal = "";
     596      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & ";
     597      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); ");
     598      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     599      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     600      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     601      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     602      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     603      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     604      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     605      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT)+"; ");
     606      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     607      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     608      //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     609      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     610     
     611      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_LHS)+" => ");
     612      vhdl->set_comment(2," OPCOD_L_LHS  --");
     613     
     614      // TYPE_0  IMMEDIAT
     615      // OPCOD_L_LHS
     616     
     617      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_LHS)._type)+"; ");
     618      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_LHS)._operation)+"; ");
     619      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     620      extend_signal = "";
     621      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & ";
     622      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); ");
     623      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     624      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     625      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     626      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     627      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     628      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     629      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     630      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITH_ALIGNMENT)+"; ");
     631      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     632      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     633      //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     634      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     635     
     636      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_LHZ)+" => ");
     637      vhdl->set_comment(2," OPCOD_L_LHZ  --");
     638     
     639      // TYPE_0  IMMEDIAT
     640      // OPCOD_L_LHZ
     641     
     642      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_LHZ)._type)+"; ");
     643      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_LHZ)._operation)+"; ");
     644      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     645      extend_signal = "";
     646      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & ";
     647      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); ");
     648      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     649      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     650      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     651      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     652      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     653      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     654      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     655      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITH_ALIGNMENT)+"; ");
     656      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     657      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     658      //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     659      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     660     
     661      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_ADDI)+" => ");
     662      vhdl->set_comment(2," OPCOD_L_ADDI  --");
     663     
     664      // TYPE_0  IMMEDIAT
     665      // OPCOD_L_ADDI
     666     
     667      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_ADDI)._type)+"; ");
     668      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_ADDI)._operation)+"; ");
     669      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     670      extend_signal = "";
     671      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & ";
     672      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); ");
     673      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     674      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     675      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     676      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     677      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     678      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     679      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     680      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; ");
     681      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; ");
     682      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     683      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     684      //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     685      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     686     
     687      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_ADDIC)+" => ");
     688      vhdl->set_comment(2," OPCOD_L_ADDIC  --");
     689     
     690      // TYPE_0  IMMEDIAT
     691      // OPCOD_L_ADDIC
     692     
     693      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_ADDIC)._type)+"; ");
     694      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_ADDIC)._operation)+"; ");
     695      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     696      extend_signal = "";
     697      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & ";
     698      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); ");
     699      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     700      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     701      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     702      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '1'; ");
     703      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RC <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; ");
     704      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     705      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     706      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     707      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; ");
     708      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; ");
     709      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     710      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     711      //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     712      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     713     
     714      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_ANDI)+" => ");
     715      vhdl->set_comment(2," OPCOD_L_ANDI  --");
     716     
     717      // TYPE_0  IMMEDIAT
     718      // OPCOD_L_ANDI
     719     
     720      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_ANDI)._type)+"; ");
     721      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_ANDI)._operation)+"; ");
     722      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     723      extend_signal = "";
     724      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "0";
     725      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); ");
     726      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     727      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     728      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     729      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     730      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     731      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     732      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     733      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     734      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     735      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     736      //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     737      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     738     
     739      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_ORI)+" => ");
     740      vhdl->set_comment(2," OPCOD_L_ORI  --");
     741     
     742      // TYPE_0  IMMEDIAT
     743      // OPCOD_L_ORI
     744     
     745      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_ORI)._type)+"; ");
     746      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_ORI)._operation)+"; ");
     747      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     748      extend_signal = "";
     749      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "0";
     750      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); ");
     751      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     752      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     753      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     754      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     755      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     756      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     757      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     758      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     759      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     760      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     761      //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     762      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     763     
     764      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_XORI)+" => ");
     765      vhdl->set_comment(2," OPCOD_L_XORI  --");
     766     
     767      // TYPE_0  IMMEDIAT
     768      // OPCOD_L_XORI
     769     
     770      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_XORI)._type)+"; ");
     771      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_XORI)._operation)+"; ");
     772      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     773      extend_signal = "";
     774      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & ";
     775      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); ");
     776      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     777      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     778      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     779      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     780      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     781      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     782      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     783      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     784      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     785      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     786      //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     787      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     788     
     789      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_MULI)+" => ");
     790      vhdl->set_comment(2," OPCOD_L_MULI  --");
     791     
     792      // TYPE_0  IMMEDIAT
     793      // OPCOD_L_MULI
     794     
     795      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MULI)._type)+"; ");
     796      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MULI)._operation)+"; ");
     797      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     798      extend_signal = "";
     799      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & ";
     800      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); ");
     801      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     802      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     803      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     804      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     805      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     806      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     807      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     808      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; ");
     809      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; ");
     810      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     811      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     812      //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     813      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     814     
     815      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_MFSPR)+" => ");
     816      vhdl->set_comment(2," OPCOD_L_MFSPR  --");
     817     
     818      // TYPE_0  IMMEDIAT
     819      // OPCOD_L_MFSPR
     820     
     821      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MFSPR)._type)+"; ");
     822      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MFSPR)._operation)+"; ");
     823      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     824      extend_signal = "";
     825      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "0";
     826      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); ");
     827      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     828      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     829      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     830      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     831      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     832      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     833      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     834      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     835      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     836      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     837      //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     838      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_SPR_ACCESS)+"; ");
     839     
     840      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_MTSPR)+" => ");
     841      vhdl->set_comment(2," OPCOD_L_MTSPR  --");
     842     
     843      // TYPE_0  IMMEDIAT
     844      // OPCOD_L_MTSPR
     845     
     846      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MTSPR)._type)+"; ");
     847      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MTSPR)._operation)+"; ");
     848      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     849      extend_signal = "";
     850      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "0";
     851      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 21) & internal_DECOD_INSTRUCTION_"+toString(i)+" (10 downto 0); ");
     852      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     853      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     854      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     855      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     856      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     857      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     858      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     859      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     860      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     861      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     862      //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     863      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_SPR_ACCESS)+"; ");
     864     
     865      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_SD)+" => ");
     866      vhdl->set_comment(2," OPCOD_L_SD  --");
     867     
     868      // TYPE_0  IMMEDIAT
     869      // OPCOD_L_SD
     870     
     871      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SD)._type)+"; ");
     872      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SD)._operation)+"; ");
     873      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     874      extend_signal = "";
     875      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & ";
     876      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 21) & internal_DECOD_INSTRUCTION_"+toString(i)+" (10 downto 0); ");
     877      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     878      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     879      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     880      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     881      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     882      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     883      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     884      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITH_ALIGNMENT)+"; ");
     885      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     886      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     887      //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     888      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     889     
     890      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_SW)+" => ");
     891      vhdl->set_comment(2," OPCOD_L_SW  --");
     892     
     893      // TYPE_0  IMMEDIAT
     894      // OPCOD_L_SW
     895     
     896      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SW)._type)+"; ");
     897      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SW)._operation)+"; ");
     898      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     899      extend_signal = "";
     900      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & ";
     901      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 21) & internal_DECOD_INSTRUCTION_"+toString(i)+" (10 downto 0); ");
     902      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     903      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     904      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     905      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     906      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     907      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     908      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     909      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITH_ALIGNMENT)+"; ");
     910      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     911      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     912      //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     913      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     914     
     915      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_SB)+" => ");
     916      vhdl->set_comment(2," OPCOD_L_SB  --");
     917     
     918      // TYPE_0  IMMEDIAT
     919      // OPCOD_L_SB
     920     
     921      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SB)._type)+"; ");
     922      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SB)._operation)+"; ");
     923      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     924      extend_signal = "";
     925      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & ";
     926      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 21) & internal_DECOD_INSTRUCTION_"+toString(i)+" (10 downto 0); ");
     927      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     928      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     929      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     930      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     931      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     932      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     933      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     934      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT)+"; ");
     935      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     936      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     937      //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     938      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     939     
     940      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_L_SH)+" => ");
     941      vhdl->set_comment(2," OPCOD_L_SH  --");
     942     
     943      // TYPE_0  IMMEDIAT
     944      // OPCOD_L_SH
     945     
     946      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SH)._type)+"; ");
     947      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SH)._operation)+"; ");
     948      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     949      extend_signal = "";
     950      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(25) & ";
     951      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (25 downto 21) & internal_DECOD_INSTRUCTION_"+toString(i)+" (10 downto 0); ");
     952      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     953      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     954      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     955      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     956      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     957      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     958      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     959      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_MEMORY_WITH_ALIGNMENT)+"; ");
     960      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     961      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     962      //vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     963      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     964     
     965      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_1)+" => ");
     966      vhdl->set_comment(2," OPCOD_1  ORFPX32/64  --");
     967     
     968      // TYPE_1  ORFPX32/64
     969     
     970      vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_1 is");
     971     
     972      vhdl->set_body(4,"WHEN others => ");
     973      instruction_illegale(4,i)
     974     
     975      // illegal instruction
     976     
     977      vhdl->set_body(3,"end case;");
     978     
     979      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_2)+" => ");
     980      vhdl->set_comment(2," OPCOD_2  ORVDX64  --");
     981     
     982      // TYPE_2  ORVDX64
     983     
     984      vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_2 is");
     985     
     986      vhdl->set_body(4,"WHEN others => ");
     987      instruction_illegale(4,i)
     988     
     989      // illegal instruction
     990     
     991      vhdl->set_body(3,"end case;");
     992     
     993      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_3)+" => ");
     994      vhdl->set_comment(2," OPCOD_3  Register-Register  --");
     995     
     996      // TYPE_3  Register-Register
     997     
     998      vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_3 is");
     999     
     1000      vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_ADD)+" => ");
     1001      vhdl->set_comment(4," OPCOD_L_ADD  --");
     1002     
     1003      // TYPE_3  Register-Register
     1004      // OPCOD_L_ADD
     1005     
     1006      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_ADD)._type)+"; ");
     1007      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_ADD)._operation)+"; ");
     1008      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     1009      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1010      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1011      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     1012      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     1013      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1014      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     1015      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     1016      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     1017      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; ");
     1018      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; ");
     1019      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1020      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1021      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1022      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1023     
     1024      vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_ADDC)+" => ");
     1025      vhdl->set_comment(4," OPCOD_L_ADDC  --");
     1026     
     1027      // TYPE_3  Register-Register
     1028      // OPCOD_L_ADDC
     1029     
     1030      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_ADDC)._type)+"; ");
     1031      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_ADDC)._operation)+"; ");
     1032      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     1033      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1034      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1035      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     1036      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     1037      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '1'; ");
     1038      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RC <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; ");
     1039      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     1040      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     1041      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     1042      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; ");
     1043      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; ");
     1044      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1045      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1046      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1047      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1048     
     1049      vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_SUB)+" => ");
     1050      vhdl->set_comment(4," OPCOD_L_SUB  --");
     1051     
     1052      // TYPE_3  Register-Register
     1053      // OPCOD_L_SUB
     1054     
     1055      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SUB)._type)+"; ");
     1056      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SUB)._operation)+"; ");
     1057      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     1058      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1059      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1060      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     1061      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     1062      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1063      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     1064      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     1065      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     1066      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; ");
     1067      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; ");
     1068      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1069      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1070      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1071      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1072     
     1073      vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_AND)+" => ");
     1074      vhdl->set_comment(4," OPCOD_L_AND  --");
     1075     
     1076      // TYPE_3  Register-Register
     1077      // OPCOD_L_AND
     1078     
     1079      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_AND)._type)+"; ");
     1080      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_AND)._operation)+"; ");
     1081      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     1082      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1083      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1084      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     1085      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     1086      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1087      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     1088      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     1089      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     1090      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1091      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1092      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1093      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1094      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1095     
     1096      vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_OR)+" => ");
     1097      vhdl->set_comment(4," OPCOD_L_OR  --");
     1098     
     1099      // TYPE_3  Register-Register
     1100      // OPCOD_L_OR
     1101     
     1102      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_OR)._type)+"; ");
     1103      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_OR)._operation)+"; ");
     1104      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     1105      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1106      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1107      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     1108      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     1109      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1110      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     1111      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     1112      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     1113      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1114      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1115      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1116      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1117      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1118     
     1119      vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_XOR)+" => ");
     1120      vhdl->set_comment(4," OPCOD_L_XOR  --");
     1121     
     1122      // TYPE_3  Register-Register
     1123      // OPCOD_L_XOR
     1124     
     1125      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_XOR)._type)+"; ");
     1126      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_XOR)._operation)+"; ");
     1127      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     1128      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1129      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1130      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     1131      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     1132      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1133      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     1134      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     1135      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     1136      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1137      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1138      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1139      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1140      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1141     
     1142      vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_CMOV)+" => ");
     1143      vhdl->set_comment(4," OPCOD_L_CMOV  --");
     1144     
     1145      // TYPE_3  Register-Register
     1146      // OPCOD_L_CMOV
     1147     
     1148      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_CMOV)._type)+"; ");
     1149      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_CMOV)._operation)+"; ");
     1150      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     1151      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1152      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1153      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     1154      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     1155      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '1'; ");
     1156      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RC <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; ");
     1157      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     1158      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     1159      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     1160      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1161      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1162      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1163      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1164      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1165     
     1166      vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_FF1)+" => ");
     1167      vhdl->set_comment(4," OPCOD_L_FF1  --");
     1168     
     1169      // TYPE_3  Register-Register
     1170      // OPCOD_L_FF1
     1171     
     1172      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_FF1)._type)+"; ");
     1173      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_FF1)._operation)+"; ");
     1174      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     1175      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1176      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1177      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     1178      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1179      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     1180      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     1181      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     1182      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1183      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1184      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1185      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1186      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1187     
     1188      vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_FL1)+" => ");
     1189      vhdl->set_comment(4," OPCOD_L_FL1  --");
     1190     
     1191      // TYPE_3  Register-Register
     1192      // OPCOD_L_FL1
     1193     
     1194      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_FL1)._type)+"; ");
     1195      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_FL1)._operation)+"; ");
     1196      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     1197      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1198      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1199      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     1200      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1201      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     1202      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     1203      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     1204      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1205      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1206      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1207      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1208      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1209     
     1210      vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_MUL)+" => ");
     1211      vhdl->set_comment(4," OPCOD_L_MUL  --");
     1212     
     1213      // TYPE_3  Register-Register
     1214      // OPCOD_L_MUL
     1215     
     1216      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MUL)._type)+"; ");
     1217      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MUL)._operation)+"; ");
     1218      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     1219      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1220      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1221      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     1222      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     1223      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1224      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     1225      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     1226      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     1227      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; ");
     1228      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; ");
     1229      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1230      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1231      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1232      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1233     
     1234      vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_DIV)+" => ");
     1235      vhdl->set_comment(4," OPCOD_L_DIV  --");
     1236     
     1237      // TYPE_3  Register-Register
     1238      // OPCOD_L_DIV
     1239     
     1240      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_DIV)._type)+"; ");
     1241      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_DIV)._operation)+"; ");
     1242      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     1243      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1244      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1245      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     1246      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     1247      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1248      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     1249      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     1250      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     1251      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; ");
     1252      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; ");
     1253      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1254      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1255      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1256      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1257     
     1258      vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_DIVU)+" => ");
     1259      vhdl->set_comment(4," OPCOD_L_DIVU  --");
     1260     
     1261      // TYPE_3  Register-Register
     1262      // OPCOD_L_DIVU
     1263     
     1264      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_DIVU)._type)+"; ");
     1265      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_DIVU)._operation)+"; ");
     1266      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     1267      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1268      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1269      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     1270      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     1271      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1272      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     1273      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     1274      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     1275      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; ");
     1276      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; ");
     1277      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1278      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1279      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1280      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1281     
     1282      vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_L_MULU)+" => ");
     1283      vhdl->set_comment(4," OPCOD_L_MULU  --");
     1284     
     1285      // TYPE_3  Register-Register
     1286      // OPCOD_L_MULU
     1287     
     1288      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MULU)._type)+"; ");
     1289      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MULU)._operation)+"; ");
     1290      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     1291      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1292      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1293      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     1294      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     1295      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1296      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     1297      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     1298      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     1299      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_CY_OV)+"; ");
     1300      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_RANGE)+"; ");
     1301      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1302      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1303      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1304      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1305     
     1306      vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_11)+" => ");
     1307      vhdl->set_comment(4," OPCOD_11  Shift/Rotate with register  --");
     1308     
     1309      // TYPE_11  Shift/Rotate with register
     1310     
     1311      vhdl->set_body(5,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_11 is");
     1312     
     1313      vhdl->set_body(6,"WHEN "+std_logic_cst(2,OPCOD_L_SLL)+" => ");
     1314      vhdl->set_comment(6," OPCOD_L_SLL  --");
     1315     
     1316      // TYPE_11  Shift/Rotate with register
     1317      // OPCOD_L_SLL
     1318     
     1319      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SLL)._type)+"; ");
     1320      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SLL)._operation)+"; ");
     1321      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     1322      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1323      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1324      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     1325      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     1326      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1327      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     1328      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     1329      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     1330      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1331      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1332      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1333      //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1334      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1335     
     1336      vhdl->set_body(6,"WHEN "+std_logic_cst(2,OPCOD_L_SRL)+" => ");
     1337      vhdl->set_comment(6," OPCOD_L_SRL  --");
     1338     
     1339      // TYPE_11  Shift/Rotate with register
     1340      // OPCOD_L_SRL
     1341     
     1342      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SRL)._type)+"; ");
     1343      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SRL)._operation)+"; ");
     1344      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     1345      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1346      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1347      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     1348      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     1349      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1350      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     1351      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     1352      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     1353      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1354      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1355      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1356      //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1357      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1358     
     1359      vhdl->set_body(6,"WHEN "+std_logic_cst(2,OPCOD_L_SRA)+" => ");
     1360      vhdl->set_comment(6," OPCOD_L_SRA  --");
     1361     
     1362      // TYPE_11  Shift/Rotate with register
     1363      // OPCOD_L_SRA
     1364     
     1365      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SRA)._type)+"; ");
     1366      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SRA)._operation)+"; ");
     1367      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     1368      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1369      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1370      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     1371      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     1372      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1373      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     1374      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     1375      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     1376      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1377      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1378      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1379      //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1380      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1381     
     1382      vhdl->set_body(6,"WHEN "+std_logic_cst(2,OPCOD_L_ROR)+" => ");
     1383      vhdl->set_comment(6," OPCOD_L_ROR  --");
     1384     
     1385      // TYPE_11  Shift/Rotate with register
     1386      // OPCOD_L_ROR
     1387     
     1388      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_ROR)._type)+"; ");
     1389      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_ROR)._operation)+"; ");
     1390      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     1391      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1392      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1393      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     1394      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     1395      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1396      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     1397      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     1398      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     1399      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1400      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1401      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1402      //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1403      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1404     
     1405      vhdl->set_body(6,"WHEN others => ");
     1406      instruction_illegale(6,i)
     1407     
     1408      // TYPE_11  Shift/Rotate with register
     1409      // illegal instruction
     1410     
     1411      vhdl->set_body(5,"end case;");
     1412     
     1413      vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_12)+" => ");
     1414      vhdl->set_comment(4," OPCOD_12  extend  --");
     1415     
     1416      // TYPE_12  extend
     1417     
     1418      vhdl->set_body(5,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_12 is");
     1419     
     1420      vhdl->set_body(6,"WHEN "+std_logic_cst(4,OPCOD_L_EXTHS)+" => ");
     1421      vhdl->set_comment(6," OPCOD_L_EXTHS  --");
     1422     
     1423      // TYPE_12  extend
     1424      // OPCOD_L_EXTHS
     1425     
     1426      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_EXTHS)._type)+"; ");
     1427      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_EXTHS)._operation)+"; ");
     1428      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     1429      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+std_logic_cst(_param->_size_general_data,16)+"; ");
     1430      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1431      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1432      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     1433      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1434      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     1435      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     1436      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     1437      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1438      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1439      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1440      //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1441      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1442     
     1443      vhdl->set_body(6,"WHEN "+std_logic_cst(4,OPCOD_L_EXTHZ)+" => ");
     1444      vhdl->set_comment(6," OPCOD_L_EXTHZ  --");
     1445     
     1446      // TYPE_12  extend
     1447      // OPCOD_L_EXTHZ
     1448     
     1449      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_EXTHZ)._type)+"; ");
     1450      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_EXTHZ)._operation)+"; ");
     1451      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     1452      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+std_logic_cst(_param->_size_general_data,16)+"; ");
     1453      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1454      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1455      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     1456      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1457      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     1458      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     1459      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     1460      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1461      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1462      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1463      //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1464      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1465     
     1466      vhdl->set_body(6,"WHEN "+std_logic_cst(4,OPCOD_L_EXTBS)+" => ");
     1467      vhdl->set_comment(6," OPCOD_L_EXTBS  --");
     1468     
     1469      // TYPE_12  extend
     1470      // OPCOD_L_EXTBS
     1471     
     1472      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_EXTBS)._type)+"; ");
     1473      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_EXTBS)._operation)+"; ");
     1474      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     1475      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+std_logic_cst(_param->_size_general_data,8)+"; ");
     1476      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1477      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1478      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     1479      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1480      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     1481      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     1482      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     1483      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1484      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1485      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1486      //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1487      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1488     
     1489      vhdl->set_body(6,"WHEN "+std_logic_cst(4,OPCOD_L_EXTBZ)+" => ");
     1490      vhdl->set_comment(6," OPCOD_L_EXTBZ  --");
     1491     
     1492      // TYPE_12  extend
     1493      // OPCOD_L_EXTBZ
     1494     
     1495      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_EXTBZ)._type)+"; ");
     1496      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_EXTBZ)._operation)+"; ");
     1497      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     1498      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+std_logic_cst(_param->_size_general_data,8)+"; ");
     1499      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1500      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1501      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     1502      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1503      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     1504      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     1505      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     1506      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1507      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1508      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1509      //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1510      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1511     
     1512      vhdl->set_body(6,"WHEN others => ");
     1513      instruction_illegale(6,i)
     1514     
     1515      // TYPE_12  extend
     1516      // illegal instruction
     1517     
     1518      vhdl->set_body(5,"end case;");
     1519     
     1520      vhdl->set_body(4,"WHEN "+std_logic_cst(6,OPCOD_13)+" => ");
     1521      vhdl->set_comment(4," OPCOD_13  extend (64b)  --");
     1522     
     1523      // TYPE_13  extend (64b)
     1524     
     1525      vhdl->set_body(5,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_13 is");
     1526     
     1527      vhdl->set_body(6,"WHEN "+std_logic_cst(4,OPCOD_L_EXTWS)+" => ");
     1528      vhdl->set_comment(6," OPCOD_L_EXTWS  --");
     1529     
     1530      // TYPE_13  extend (64b)
     1531      // OPCOD_L_EXTWS
     1532     
     1533      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_EXTWS)._type)+"; ");
     1534      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_EXTWS)._operation)+"; ");
     1535      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     1536      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+std_logic_cst(_param->_size_general_data,32)+"; ");
     1537      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1538      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1539      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     1540      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1541      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     1542      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     1543      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     1544      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1545      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1546      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1547      //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1548      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1549     
     1550      vhdl->set_body(6,"WHEN "+std_logic_cst(4,OPCOD_L_EXTWZ)+" => ");
     1551      vhdl->set_comment(6," OPCOD_L_EXTWZ  --");
     1552     
     1553      // TYPE_13  extend (64b)
     1554      // OPCOD_L_EXTWZ
     1555     
     1556      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_EXTWZ)._type)+"; ");
     1557      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_EXTWZ)._operation)+"; ");
     1558      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     1559      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+std_logic_cst(_param->_size_general_data,32)+"; ");
     1560      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1561      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1562      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     1563      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1564      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     1565      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     1566      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     1567      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1568      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1569      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1570      //vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1571      vhdl->set_body(7,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1572     
     1573      vhdl->set_body(6,"WHEN others => ");
     1574      instruction_illegale(6,i)
     1575     
     1576      // TYPE_13  extend (64b)
     1577      // illegal instruction
     1578     
     1579      vhdl->set_body(5,"end case;");
     1580     
     1581      vhdl->set_body(4,"WHEN others => ");
     1582      instruction_illegale(4,i)
     1583     
     1584      // TYPE_3  Register-Register
     1585      // illegal instruction
     1586     
     1587      vhdl->set_body(3,"end case;");
     1588     
     1589      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_4)+" => ");
     1590      vhdl->set_comment(2," OPCOD_4  Set flag with register  --");
     1591     
     1592      // TYPE_4  Set flag with register
     1593     
     1594      vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_4 is");
     1595     
     1596      vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFEQ)+" => ");
     1597      vhdl->set_comment(4," OPCOD_L_SFEQ  --");
     1598     
     1599      // TYPE_4  Set flag with register
     1600      // OPCOD_L_SFEQ
     1601     
     1602      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFEQ)._type)+"; ");
     1603      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFEQ)._operation)+"; ");
     1604      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     1605      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1606      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1607      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     1608      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     1609      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1610      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     1611      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     1612      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; ");
     1613      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1614      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1615      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1616      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1617      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1618     
     1619      vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFNE)+" => ");
     1620      vhdl->set_comment(4," OPCOD_L_SFNE  --");
     1621     
     1622      // TYPE_4  Set flag with register
     1623      // OPCOD_L_SFNE
     1624     
     1625      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFNE)._type)+"; ");
     1626      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFNE)._operation)+"; ");
     1627      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     1628      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1629      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1630      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     1631      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     1632      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1633      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     1634      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     1635      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; ");
     1636      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1637      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1638      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1639      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1640      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1641     
     1642      vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFGTU)+" => ");
     1643      vhdl->set_comment(4," OPCOD_L_SFGTU  --");
     1644     
     1645      // TYPE_4  Set flag with register
     1646      // OPCOD_L_SFGTU
     1647     
     1648      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFGTU)._type)+"; ");
     1649      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFGTU)._operation)+"; ");
     1650      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     1651      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1652      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1653      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     1654      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     1655      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1656      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     1657      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     1658      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; ");
     1659      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1660      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1661      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1662      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1663      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1664     
     1665      vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFGEU)+" => ");
     1666      vhdl->set_comment(4," OPCOD_L_SFGEU  --");
     1667     
     1668      // TYPE_4  Set flag with register
     1669      // OPCOD_L_SFGEU
     1670     
     1671      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFGEU)._type)+"; ");
     1672      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFGEU)._operation)+"; ");
     1673      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     1674      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1675      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1676      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     1677      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     1678      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1679      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     1680      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     1681      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; ");
     1682      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1683      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1684      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1685      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1686      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1687     
     1688      vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFLTU)+" => ");
     1689      vhdl->set_comment(4," OPCOD_L_SFLTU  --");
     1690     
     1691      // TYPE_4  Set flag with register
     1692      // OPCOD_L_SFLTU
     1693     
     1694      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFLTU)._type)+"; ");
     1695      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFLTU)._operation)+"; ");
     1696      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     1697      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1698      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1699      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     1700      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     1701      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1702      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     1703      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     1704      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; ");
     1705      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1706      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1707      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1708      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1709      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1710     
     1711      vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFLEU)+" => ");
     1712      vhdl->set_comment(4," OPCOD_L_SFLEU  --");
     1713     
     1714      // TYPE_4  Set flag with register
     1715      // OPCOD_L_SFLEU
     1716     
     1717      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFLEU)._type)+"; ");
     1718      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFLEU)._operation)+"; ");
     1719      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     1720      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1721      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1722      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     1723      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     1724      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1725      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     1726      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     1727      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; ");
     1728      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1729      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1730      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1731      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1732      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1733     
     1734      vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFGTS)+" => ");
     1735      vhdl->set_comment(4," OPCOD_L_SFGTS  --");
     1736     
     1737      // TYPE_4  Set flag with register
     1738      // OPCOD_L_SFGTS
     1739     
     1740      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFGTS)._type)+"; ");
     1741      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFGTS)._operation)+"; ");
     1742      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     1743      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1744      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1745      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     1746      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     1747      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1748      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     1749      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     1750      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; ");
     1751      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1752      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1753      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1754      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1755      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1756     
     1757      vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFGES)+" => ");
     1758      vhdl->set_comment(4," OPCOD_L_SFGES  --");
     1759     
     1760      // TYPE_4  Set flag with register
     1761      // OPCOD_L_SFGES
     1762     
     1763      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFGES)._type)+"; ");
     1764      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFGES)._operation)+"; ");
     1765      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     1766      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1767      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1768      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     1769      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     1770      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1771      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     1772      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     1773      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; ");
     1774      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1775      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1776      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1777      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1778      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1779     
     1780      vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFLTS)+" => ");
     1781      vhdl->set_comment(4," OPCOD_L_SFLTS  --");
     1782     
     1783      // TYPE_4  Set flag with register
     1784      // OPCOD_L_SFLTS
     1785     
     1786      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFLTS)._type)+"; ");
     1787      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFLTS)._operation)+"; ");
     1788      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     1789      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1790      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1791      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     1792      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     1793      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1794      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     1795      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     1796      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; ");
     1797      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1798      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1799      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1800      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1801      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1802     
     1803      vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFLES)+" => ");
     1804      vhdl->set_comment(4," OPCOD_L_SFLES  --");
     1805     
     1806      // TYPE_4  Set flag with register
     1807      // OPCOD_L_SFLES
     1808     
     1809      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFLES)._type)+"; ");
     1810      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFLES)._operation)+"; ");
     1811      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     1812      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1813      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1814      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     1815      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     1816      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1817      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     1818      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     1819      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; ");
     1820      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1821      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1822      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1823      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1824      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1825     
     1826      vhdl->set_body(4,"WHEN others => ");
     1827      instruction_illegale(4,i)
     1828     
     1829      // TYPE_4  Set flag with register
     1830      // illegal instruction
     1831     
     1832      vhdl->set_body(3,"end case;");
     1833     
     1834      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_5)+" => ");
     1835      vhdl->set_comment(2," OPCOD_5  Set flag with immediat  --");
     1836     
     1837      // TYPE_5  Set flag with immediat
     1838     
     1839      vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_5 is");
     1840     
     1841      vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFEQI)+" => ");
     1842      vhdl->set_comment(4," OPCOD_L_SFEQI  --");
     1843     
     1844      // TYPE_5  Set flag with immediat
     1845      // OPCOD_L_SFEQI
     1846     
     1847      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFEQI)._type)+"; ");
     1848      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFEQI)._operation)+"; ");
     1849      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     1850      extend_signal = "";
     1851      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & ";
     1852      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); ");
     1853      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1854      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1855      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     1856      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1857      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     1858      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     1859      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; ");
     1860      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1861      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1862      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1863      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1864      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1865     
     1866      vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFNEI)+" => ");
     1867      vhdl->set_comment(4," OPCOD_L_SFNEI  --");
     1868     
     1869      // TYPE_5  Set flag with immediat
     1870      // OPCOD_L_SFNEI
     1871     
     1872      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFNEI)._type)+"; ");
     1873      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFNEI)._operation)+"; ");
     1874      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     1875      extend_signal = "";
     1876      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & ";
     1877      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); ");
     1878      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1879      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1880      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     1881      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1882      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     1883      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     1884      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; ");
     1885      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1886      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1887      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1888      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1889      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1890     
     1891      vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFGTUI)+" => ");
     1892      vhdl->set_comment(4," OPCOD_L_SFGTUI  --");
     1893     
     1894      // TYPE_5  Set flag with immediat
     1895      // OPCOD_L_SFGTUI
     1896     
     1897      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFGTUI)._type)+"; ");
     1898      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFGTUI)._operation)+"; ");
     1899      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     1900      extend_signal = "";
     1901      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & ";
     1902      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); ");
     1903      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1904      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1905      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     1906      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1907      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     1908      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     1909      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; ");
     1910      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1911      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1912      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1913      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1914      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1915     
     1916      vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFGEUI)+" => ");
     1917      vhdl->set_comment(4," OPCOD_L_SFGEUI  --");
     1918     
     1919      // TYPE_5  Set flag with immediat
     1920      // OPCOD_L_SFGEUI
     1921     
     1922      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFGEUI)._type)+"; ");
     1923      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFGEUI)._operation)+"; ");
     1924      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     1925      extend_signal = "";
     1926      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & ";
     1927      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); ");
     1928      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1929      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1930      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     1931      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1932      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     1933      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     1934      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; ");
     1935      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1936      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1937      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1938      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1939      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1940     
     1941      vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFLTUI)+" => ");
     1942      vhdl->set_comment(4," OPCOD_L_SFLTUI  --");
     1943     
     1944      // TYPE_5  Set flag with immediat
     1945      // OPCOD_L_SFLTUI
     1946     
     1947      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFLTUI)._type)+"; ");
     1948      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFLTUI)._operation)+"; ");
     1949      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     1950      extend_signal = "";
     1951      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & ";
     1952      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); ");
     1953      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1954      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1955      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     1956      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1957      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     1958      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     1959      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; ");
     1960      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1961      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1962      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1963      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1964      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1965     
     1966      vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFLEUI)+" => ");
     1967      vhdl->set_comment(4," OPCOD_L_SFLEUI  --");
     1968     
     1969      // TYPE_5  Set flag with immediat
     1970      // OPCOD_L_SFLEUI
     1971     
     1972      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFLEUI)._type)+"; ");
     1973      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFLEUI)._operation)+"; ");
     1974      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     1975      extend_signal = "";
     1976      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & ";
     1977      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); ");
     1978      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     1979      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     1980      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     1981      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     1982      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     1983      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     1984      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; ");
     1985      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     1986      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     1987      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     1988      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     1989      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     1990     
     1991      vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFGTSI)+" => ");
     1992      vhdl->set_comment(4," OPCOD_L_SFGTSI  --");
     1993     
     1994      // TYPE_5  Set flag with immediat
     1995      // OPCOD_L_SFGTSI
     1996     
     1997      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFGTSI)._type)+"; ");
     1998      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFGTSI)._operation)+"; ");
     1999      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     2000      extend_signal = "";
     2001      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & ";
     2002      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); ");
     2003      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     2004      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     2005      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     2006      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     2007      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     2008      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     2009      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; ");
     2010      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     2011      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     2012      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     2013      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     2014      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     2015     
     2016      vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFGESI)+" => ");
     2017      vhdl->set_comment(4," OPCOD_L_SFGESI  --");
     2018     
     2019      // TYPE_5  Set flag with immediat
     2020      // OPCOD_L_SFGESI
     2021     
     2022      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFGESI)._type)+"; ");
     2023      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFGESI)._operation)+"; ");
     2024      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     2025      extend_signal = "";
     2026      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & ";
     2027      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); ");
     2028      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     2029      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     2030      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     2031      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     2032      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     2033      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     2034      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; ");
     2035      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     2036      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     2037      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     2038      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     2039      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     2040     
     2041      vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFLTSI)+" => ");
     2042      vhdl->set_comment(4," OPCOD_L_SFLTSI  --");
     2043     
     2044      // TYPE_5  Set flag with immediat
     2045      // OPCOD_L_SFLTSI
     2046     
     2047      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFLTSI)._type)+"; ");
     2048      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFLTSI)._operation)+"; ");
     2049      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     2050      extend_signal = "";
     2051      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & ";
     2052      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); ");
     2053      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     2054      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     2055      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     2056      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     2057      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     2058      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     2059      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; ");
     2060      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     2061      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     2062      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     2063      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     2064      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     2065     
     2066      vhdl->set_body(4,"WHEN "+std_logic_cst(5,OPCOD_L_SFLESI)+" => ");
     2067      vhdl->set_comment(4," OPCOD_L_SFLESI  --");
     2068     
     2069      // TYPE_5  Set flag with immediat
     2070      // OPCOD_L_SFLESI
     2071     
     2072      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SFLESI)._type)+"; ");
     2073      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SFLESI)._operation)+"; ");
     2074      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     2075      extend_signal = "";
     2076      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "internal_DECOD_INSTRUCTION_"+toString(i)+"(15) & ";
     2077      vhdl->set_body(3,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= "+extend_signal+"internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); ");
     2078      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     2079      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     2080      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     2081      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     2082      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     2083      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '1'; ");
     2084      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE <= "+std_logic_cst(_param->_size_special_register_logic,SPR_LOGIC_SR_F)+"; ");
     2085      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     2086      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     2087      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     2088      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     2089      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     2090     
     2091      vhdl->set_body(4,"WHEN others => ");
     2092      instruction_illegale(4,i)
     2093     
     2094      // TYPE_5  Set flag with immediat
     2095      // illegal instruction
     2096     
     2097      vhdl->set_body(3,"end case;");
     2098     
     2099      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_6)+" => ");
     2100      vhdl->set_comment(2," OPCOD_6  Shift/Rotate with immediat  --");
     2101     
     2102      // TYPE_6  Shift/Rotate with immediat
     2103     
     2104      vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_6 is");
     2105     
     2106      vhdl->set_body(4,"WHEN "+std_logic_cst(2,OPCOD_L_SLLI)+" => ");
     2107      vhdl->set_comment(4," OPCOD_L_SLLI  --");
     2108     
     2109      // TYPE_6  Shift/Rotate with immediat
     2110      // OPCOD_L_SLLI
     2111     
     2112      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SLLI)._type)+"; ");
     2113      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SLLI)._operation)+"; ");
     2114      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     2115      extend_signal = "";
     2116      for(uint32_t cp = 0;cp < _param->_size_general_data - 6;cp++) extend_signal += "0";
     2117      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (5 downto 0); ");
     2118      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     2119      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     2120      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     2121      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     2122      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     2123      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     2124      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     2125      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     2126      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     2127      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     2128      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     2129      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     2130     
     2131      vhdl->set_body(4,"WHEN "+std_logic_cst(2,OPCOD_L_SRLI)+" => ");
     2132      vhdl->set_comment(4," OPCOD_L_SRLI  --");
     2133     
     2134      // TYPE_6  Shift/Rotate with immediat
     2135      // OPCOD_L_SRLI
     2136     
     2137      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SRLI)._type)+"; ");
     2138      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SRLI)._operation)+"; ");
     2139      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     2140      extend_signal = "";
     2141      for(uint32_t cp = 0;cp < _param->_size_general_data - 6;cp++) extend_signal += "0";
     2142      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (5 downto 0); ");
     2143      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     2144      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     2145      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     2146      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     2147      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     2148      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     2149      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     2150      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     2151      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     2152      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     2153      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     2154      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     2155     
     2156      vhdl->set_body(4,"WHEN "+std_logic_cst(2,OPCOD_L_SRAI)+" => ");
     2157      vhdl->set_comment(4," OPCOD_L_SRAI  --");
     2158     
     2159      // TYPE_6  Shift/Rotate with immediat
     2160      // OPCOD_L_SRAI
     2161     
     2162      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SRAI)._type)+"; ");
     2163      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SRAI)._operation)+"; ");
     2164      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     2165      extend_signal = "";
     2166      for(uint32_t cp = 0;cp < _param->_size_general_data - 6;cp++) extend_signal += "0";
     2167      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (5 downto 0); ");
     2168      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     2169      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     2170      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     2171      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     2172      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     2173      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     2174      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     2175      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     2176      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     2177      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     2178      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     2179      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     2180     
     2181      vhdl->set_body(4,"WHEN "+std_logic_cst(2,OPCOD_L_RORI)+" => ");
     2182      vhdl->set_comment(4," OPCOD_L_RORI  --");
     2183     
     2184      // TYPE_6  Shift/Rotate with immediat
     2185      // OPCOD_L_RORI
     2186     
     2187      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_RORI)._type)+"; ");
     2188      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_RORI)._operation)+"; ");
     2189      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     2190      extend_signal = "";
     2191      for(uint32_t cp = 0;cp < _param->_size_general_data - 6;cp++) extend_signal += "0";
     2192      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (5 downto 0); ");
     2193      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     2194      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     2195      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     2196      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     2197      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     2198      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     2199      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     2200      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     2201      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     2202      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     2203      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     2204      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     2205     
     2206      vhdl->set_body(4,"WHEN others => ");
     2207      instruction_illegale(4,i)
     2208     
     2209      // TYPE_6  Shift/Rotate with immediat
     2210      // illegal instruction
     2211     
     2212      vhdl->set_body(3,"end case;");
     2213     
     2214      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_7)+" => ");
     2215      vhdl->set_comment(2," OPCOD_7  multiply with HI-LO  --");
     2216     
     2217      // TYPE_7  multiply with HI-LO
     2218     
     2219      vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_7 is");
     2220     
     2221      vhdl->set_body(4,"WHEN "+std_logic_cst(4,OPCOD_L_MAC)+" => ");
     2222      vhdl->set_comment(4," OPCOD_L_MAC  --");
     2223     
     2224      // TYPE_7  multiply with HI-LO
     2225      // OPCOD_L_MAC
     2226     
     2227      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MAC)._type)+"; ");
     2228      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MAC)._operation)+"; ");
     2229      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     2230      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     2231      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     2232      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     2233      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     2234      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     2235      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     2236      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     2237      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     2238      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     2239      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     2240      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     2241      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_SPR_ACCESS)+"; ");
     2242     
     2243      vhdl->set_body(4,"WHEN "+std_logic_cst(4,OPCOD_L_MSB)+" => ");
     2244      vhdl->set_comment(4," OPCOD_L_MSB  --");
     2245     
     2246      // TYPE_7  multiply with HI-LO
     2247      // OPCOD_L_MSB
     2248     
     2249      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MSB)._type)+"; ");
     2250      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MSB)._operation)+"; ");
     2251      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     2252      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '1'; ");
     2253      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_INSTRUCTION_"+toString(i)+"(20 downto 16); ");
     2254      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '1'; ");
     2255      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 11); ");
     2256      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     2257      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     2258      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     2259      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     2260      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     2261      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     2262      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     2263      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_SPR_ACCESS)+"; ");
     2264     
     2265      vhdl->set_body(4,"WHEN others => ");
     2266      instruction_illegale(4,i)
     2267     
     2268      // TYPE_7  multiply with HI-LO
     2269      // illegal instruction
     2270     
     2271      vhdl->set_body(3,"end case;");
     2272     
     2273      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_8)+" => ");
     2274      vhdl->set_comment(2," OPCOD_8  acces at HI-LO  --");
     2275     
     2276      // TYPE_8  acces at HI-LO
     2277     
     2278      vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_8 is");
     2279     
     2280      vhdl->set_body(4,"WHEN "+std_logic_cst(1,OPCOD_L_MOVHI)+" => ");
     2281      vhdl->set_comment(4," OPCOD_L_MOVHI  --");
     2282     
     2283      // TYPE_8  acces at HI-LO
     2284      // OPCOD_L_MOVHI
     2285     
     2286      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MOVHI)._type)+"; ");
     2287      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MOVHI)._operation)+"; ");
     2288      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     2289      extend_signal = "";
     2290      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "0";
     2291      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); ");
     2292      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; ");
     2293      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     2294      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     2295      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     2296      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     2297      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     2298      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     2299      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     2300      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     2301      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     2302      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     2303     
     2304      vhdl->set_body(4,"WHEN "+std_logic_cst(1,OPCOD_L_MACRC)+" => ");
     2305      vhdl->set_comment(4," OPCOD_L_MACRC  --");
     2306     
     2307      // TYPE_8  acces at HI-LO
     2308      // OPCOD_L_MACRC
     2309     
     2310      vhdl->set_body(5,"if internal_DECOD_INSTRUCTION_"+toString(i)+"(15 downto 0) = \"0000000000000000\" then ");
     2311      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MACRC)._type)+"; ");
     2312      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MACRC)._operation)+"; ");
     2313      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     2314      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; ");
     2315      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     2316      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     2317      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '1'; ");
     2318      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_INSTRUCTION_"+toString(i)+"(25 downto 21); ");
     2319      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     2320      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     2321      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     2322      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     2323      //vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     2324      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_SPR_ACCESS)+"; ");
     2325      vhdl->set_body(5,"else ");
     2326      instruction_illegale(6,i)
     2327      // illegal instruction
     2328      vhdl->set_body(5,"end if; ");
     2329     
     2330      vhdl->set_body(4,"WHEN others => ");
     2331      instruction_illegale(4,i)
     2332     
     2333      // TYPE_8  acces at HI-LO
     2334      // illegal instruction
     2335     
     2336      vhdl->set_body(3,"end case;");
     2337     
     2338      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_9)+" => ");
     2339      vhdl->set_comment(2," OPCOD_9  special  --");
     2340     
     2341      // TYPE_9  special
     2342     
     2343      vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_9 is");
     2344     
     2345      vhdl->set_body(4,"WHEN "+std_logic_cst(3,OPCOD_L_SYS)+" => ");
     2346      vhdl->set_comment(4," OPCOD_L_SYS  --");
     2347     
     2348      // TYPE_9  special
     2349      // OPCOD_L_SYS
     2350     
     2351      vhdl->set_body(5,"if internal_DECOD_INSTRUCTION_"+toString(i)+"(22 downto 16) = \"0000000\" then ");
     2352      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_SYS)._type)+"; ");
     2353      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_SYS)._operation)+"; ");
     2354      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     2355      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; ");
     2356      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     2357      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     2358      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     2359      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     2360      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_SYSCALL)+"; ");
     2361      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_SYSCALL)+"; ");
     2362      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '1'; ");
     2363      //vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     2364      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_EXCEPTION)+"; ");
     2365      vhdl->set_body(5,"else ");
     2366      instruction_illegale(6,i)
     2367      // illegal instruction
     2368      vhdl->set_body(5,"end if; ");
     2369     
     2370      vhdl->set_body(4,"WHEN "+std_logic_cst(3,OPCOD_L_TRAP)+" => ");
     2371      vhdl->set_comment(4," OPCOD_L_TRAP  --");
     2372     
     2373      // TYPE_9  special
     2374      // OPCOD_L_TRAP
     2375     
     2376      vhdl->set_body(5,"if internal_DECOD_INSTRUCTION_"+toString(i)+"(22 downto 16) = \"0000000\" then ");
     2377      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_TRAP)._type)+"; ");
     2378      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_TRAP)._operation)+"; ");
     2379      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '1'; ");
     2380      extend_signal = "";
     2381      for(uint32_t cp = 0;cp < _param->_size_general_data - 16;cp++) extend_signal += "0";
     2382      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT <= \""+extend_signal+"\" & internal_DECOD_INSTRUCTION_"+toString(i)+" (15 downto 0); ");
     2383      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; ");
     2384      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     2385      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     2386      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     2387      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     2388      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_TRAP)+"; ");
     2389      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     2390      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '1'; ");
     2391      //vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     2392      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     2393      vhdl->set_body(5,"else ");
     2394      instruction_illegale(6,i)
     2395      // illegal instruction
     2396      vhdl->set_body(5,"end if; ");
     2397     
     2398      vhdl->set_body(4,"WHEN "+std_logic_cst(3,OPCOD_L_MSYNC)+" => ");
     2399      vhdl->set_comment(4," OPCOD_L_MSYNC  --");
     2400     
     2401      // TYPE_9  special
     2402      // OPCOD_L_MSYNC
     2403     
     2404      vhdl->set_body(5,"if internal_DECOD_INSTRUCTION_"+toString(i)+"(22 downto 0) = \"00000000000000000000000\" then ");
     2405      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_MSYNC)._type)+"; ");
     2406      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_MSYNC)._operation)+"; ");
     2407      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     2408      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; ");
     2409      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     2410      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     2411      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     2412      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     2413      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     2414      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     2415      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     2416      //vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     2417      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_MSYNC)+"; ");
     2418      vhdl->set_body(5,"else ");
     2419      instruction_illegale(6,i)
     2420      // illegal instruction
     2421      vhdl->set_body(5,"end if; ");
     2422     
     2423      vhdl->set_body(4,"WHEN "+std_logic_cst(3,OPCOD_L_PSYNC)+" => ");
     2424      vhdl->set_comment(4," OPCOD_L_PSYNC  --");
     2425     
     2426      // TYPE_9  special
     2427      // OPCOD_L_PSYNC
     2428     
     2429      vhdl->set_body(5,"if internal_DECOD_INSTRUCTION_"+toString(i)+"(22 downto 0) = \"00000000000000000000000\" then ");
     2430      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_PSYNC)._type)+"; ");
     2431      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_PSYNC)._operation)+"; ");
     2432      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     2433      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; ");
     2434      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     2435      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     2436      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     2437      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     2438      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     2439      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     2440      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     2441      //vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     2442      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_PSYNC)+"; ");
     2443      vhdl->set_body(5,"else ");
     2444      instruction_illegale(6,i)
     2445      // illegal instruction
     2446      vhdl->set_body(5,"end if; ");
     2447     
     2448      vhdl->set_body(4,"WHEN "+std_logic_cst(3,OPCOD_L_CSYNC)+" => ");
     2449      vhdl->set_comment(4," OPCOD_L_CSYNC  --");
     2450     
     2451      // TYPE_9  special
     2452      // OPCOD_L_CSYNC
     2453     
     2454      vhdl->set_body(5,"if internal_DECOD_INSTRUCTION_"+toString(i)+"(23) = '0' then ");
     2455      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_CSYNC)._type)+"; ");
     2456      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_CSYNC)._operation)+"; ");
     2457      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     2458      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; ");
     2459      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     2460      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     2461      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     2462      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     2463      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     2464      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     2465      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '0'; ");
     2466      //vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     2467      vhdl->set_body(6,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_CSYNC)+"; ");
     2468      vhdl->set_body(5,"else ");
     2469      instruction_illegale(6,i)
     2470      // illegal instruction
     2471      vhdl->set_body(5,"end if; ");
     2472     
     2473      vhdl->set_body(4,"WHEN others => ");
     2474      instruction_illegale(4,i)
     2475     
     2476      // TYPE_9  special
     2477      // illegal instruction
     2478     
     2479      vhdl->set_body(3,"end case;");
     2480     
     2481      vhdl->set_body(2,"WHEN "+std_logic_cst(6,OPCOD_10)+" => ");
     2482      vhdl->set_comment(2," OPCOD_10  no operation  --");
     2483     
     2484      // TYPE_10  no operation
     2485     
     2486      vhdl->set_body(3,"case internal_DECOD_INSTRUCTION_"+toString(i)+"_OPCOD_TYPE_10 is");
     2487     
     2488      vhdl->set_body(4,"WHEN "+std_logic_cst(2,OPCOD_L_NOP)+" => ");
     2489      vhdl->set_comment(4," OPCOD_L_NOP  --");
     2490     
     2491      // TYPE_10  no operation
     2492      // OPCOD_L_NOP
     2493     
     2494      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE <= "+std_logic_cst(_param->_size_type,instruction_information(INSTRUCTION_L_NOP)._type)+"; ");
     2495      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION <= "+std_logic_cst(_param->_size_operation,instruction_information(INSTRUCTION_L_NOP)._operation)+"; ");
     2496      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT <= '0'; ");
     2497      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA <= '0'; ");
     2498      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB <= '0'; ");
     2499      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC <= '0'; ");
     2500      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD <= '0'; ");
     2501      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE <= '0'; ");
     2502      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE <= "+std_logic_cst(_param->_size_exception_use,EXCEPTION_USE_NONE)+"; ");
     2503      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION <= "+std_logic_cst(_param->_size_exception_decod,EXCEPTION_DECOD_NONE)+"; ");
     2504      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE <= '1'; ");
     2505      //vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT; ");
     2506      vhdl->set_body(5,"internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE <= "+std_logic_cst(_param->_size_event_type,EVENT_TYPE_NONE)+"; ");
     2507     
     2508      vhdl->set_body(4,"WHEN others => ");
     2509      instruction_illegale(4,i)
     2510     
     2511      // TYPE_10  no operation
     2512      // illegal instruction
     2513     
     2514      vhdl->set_body(3,"end case;");
     2515     
     2516      vhdl->set_body(2,"WHEN others => ");
     2517      instruction_illegale(2,i)
     2518     
     2519      // TYPE_0  IMMEDIAT
     2520      // illegal instruction
     2521     
     2522      vhdl->set_body(1,"end case;");
     2523      vhdl->set_body(0,"end process case_DECOD_INST_"+toString(i)+";");
     2524      vhdl->set_body(0,"");
     2525
     2526
     2527    }
     2528
     2529    vhdl->set_body(0,"");
     2530    vhdl->set_comment(0,"-----------------------------------");
     2531    vhdl->set_comment(0,"-- Registers                       ");
     2532    vhdl->set_comment(0,"-----------------------------------");
     2533    vhdl->set_body(0,"");
     2534   
     2535    vhdl->set_body(0,"reg_DECOD : process (in_CLOCK)");
     2536    vhdl->set_body(0,"begin");
     2537    vhdl->set_body(1,"if in_CLOCK'event AND in_CLOCK = '1' then");
     2538    vhdl->set_body(2,"if in_NRESET = '0' then");
     2539   
     2540    for(uint32_t i = 0;i < _param->_nb_context;i++){
     2541      vhdl->set_body(3,"reg_CONTEXT_"+toString(i)+"_ADDRESS_PREVIOUS <= "+std_logic_cst(_param->_size_instruction_address,0xfc)+";");
     2542      vhdl->set_body(3,"reg_CONTEXT_"+toString(i)+"_IS_DELAY_SLOT <= '0';");
     2543    }
     2544
     2545    vhdl->set_body(2,"else");
     2546   
     2547    for(uint32_t i = 0;i < _param->_nb_context;i++){
     2548      vhdl->set_body(3,"if internal_CONTEXT_"+toString(i)+"_HAVE_TRANSACTION = '1' then");
     2549
     2550      vhdl->set_body(4,"reg_CONTEXT_"+toString(i)+"_ADDRESS_PREVIOUS <= internal_CONTEXT_"+toString(i)+"_ADDRESS_PREVIOUS ;");
     2551      vhdl->set_body(4,"if internal_DECOD_INSTRUCTION_"+toString(_param->_nb_inst_decod - 1)+"_TYPE = "+std_logic_cst(_param->_size_type,TYPE_BRANCH)+" then");
     2552      vhdl->set_body(5,"reg_CONTEXT_"+toString(i)+"_IS_DELAY_SLOT <= '1';");
     2553      vhdl->set_body(4,"else");
     2554      vhdl->set_body(5,"reg_CONTEXT_"+toString(i)+"_IS_DELAY_SLOT <= '0';");
     2555      vhdl->set_body(4,"end if;");
     2556
     2557      //vhdl->set_body(3,"else");
     2558
     2559      //vhdl->set_body(4,"reg_CONTEXT_"+toString(i)+"_ADDRESS_PREVIOUS <= reg_CONTEXT_"+toString(i)+"_ADDRESS_PREVIOUS ;");
     2560      //vhdl->set_body(4,"reg_CONTEXT_"+toString(i)+"_IS_DELAY_SLOT <= reg_CONTEXT_"+toString(i)+"_IS_DELAY_SLOT ;");
     2561     
     2562      vhdl->set_body(3,"end if;");
     2563    }
     2564
     2565    vhdl->set_body(2,"end if;");
     2566    vhdl->set_body(1,"end if;");
     2567    vhdl->set_body(0,"end process reg_DECOD;");
     2568    vhdl->set_body(0,"");
     2569
    262570    log_printf(FUNC,Decod,FUNCTION,"End");
    272571  };

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod/src/Decod_vhdl_declaration.cpp

    r81 r135  
    2323  {
    2424    log_printf(FUNC,Decod,FUNCTION,"Begin");
     25
     26    vhdl->set_signal ("internal_CONTEXT_EVENT_VAL",1);
     27
     28    for(uint32_t x = 0;x < _param->_nb_context;x++){
     29      vhdl->set_signal ("internal_CONTEXT_"+toString(x)+"_HAVE_TRANSACTION",1);
     30      vhdl->set_signal ("reg_CONTEXT_"+toString(x)+"_IS_DELAY_SLOT",1);
     31      vhdl->set_signal ("internal_CONTEXT_"+toString(x)+"_IS_DELAY_SLOT",1);
     32      vhdl->set_signal ("internal_CONTEXT_"+toString(x)+"_ADDRESS_PREVIOUS",_param->_size_instruction_address);
     33      vhdl->set_signal ("reg_CONTEXT_"+toString(x)+"_ADDRESS_PREVIOUS",_param->_size_instruction_address);
     34      vhdl->set_signal ("internal_HAVE_DECOD_BRANCH_"+toString(x),1);
     35      vhdl->set_signal ("internal_CAN_CONTINUE_"+toString(x),1);
     36      for (uint32_t y = 0; y < _param->_nb_inst_fetch[x]; y++) vhdl->set_signal ("internal_IFETCH_"+toString(x)+"_"+toString(y)+"_ACK",1);
     37    }
     38
     39    for(uint32_t i = 0;i < _param->_nb_inst_decod;i++){
     40      vhdl->set_signal ("internal_DECOD_"+toString(i)+"_VAL",1);
     41      vhdl->set_signal ("internal_PREDICT_"+toString(i)+"_VAL",1);
     42      vhdl->set_signal ("internal_DECOD_BRANCH_"+toString(i)+"_VAL",1);
     43      vhdl->set_signal ("internal_DECOD_CONTEXT_EVENT_"+toString(i)+"_VAL",1);
     44      vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i),_param->_size_instruction);
     45      vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_TYPE    ",_param->_size_type);
     46      vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_OPERATION    ",_param->_size_operation);
     47      vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_NO_EXECUTE    ",1);
     48      vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_IS_DELAY_SLOT    ",1);
     49#ifdef DEBUG
     50      vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS    ",_param->_size_instruction_address);
     51#endif
     52      vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT    ",_param->_size_instruction_address);
     53      vhdl->set_signal ("internal_DECOD_IN_INSTRUCTION_"+toString(i)+"_ADDRESS_NEXT    ",_param->_size_instruction_address);
     54      vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_HAS_IMMEDIAT    ",1);
     55      vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_IMMEDIAT    ",_param->_size_general_data);
     56      vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RA    ",1);
     57      vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RA    ",_param->_size_general_register_logic);
     58      vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RB    ",1);
     59      vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RB    ",_param->_size_general_register_logic);
     60      vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_READ_RC    ",1);
     61      vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RC    ",_param->_size_special_register_logic);
     62      vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RD    ",1);
     63      vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RD    ",_param->_size_general_register_logic);
     64      vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_WRITE_RE    ",1);
     65      vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_NUM_REG_RE    ",_param->_size_special_register_logic);
     66      vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION_USE    ",_param->_size_exception_use);
     67      vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_EXCEPTION    ",_param->_size_exception_decod);
     68      vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_CONDITION    ",_param->_size_branch_condition);
     69      //vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_STACK_WRITE    ",1);
     70      vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_BRANCH_DIRECTION    ",1);
     71      vhdl->set_signal ("internal_DECOD_INSTRUCTION_"+toString(i)+"_EVENT_TYPE    ",_param->_size_event_type);
     72    }
     73
    2574    log_printf(FUNC,Decod,FUNCTION,"End");
    2675  };

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/Makefile.deps

    r82 r135  
    1313include                         $(DIR_MORPHEO)/Behavioural/Makefile.deps
    1414endif
     15ifndef Queue
     16include                         $(DIR_MORPHEO)/Behavioural/Generic/Queue/Makefile.deps
     17endif
    1518
    1619#-----[ Directory ]----------------------------------------
    … …  
    2124
    2225Decod_queue_LIBRARY             =       -lDecod_queue   \
     26                                        $(Queue_LIBRARY)                \
    2327                                        $(Behavioural_LIBRARY) 
    2428
    2529Decod_queue_DIR_LIBRARY         =       -L$(Decod_queue_DIR)/lib        \
     30                                        $(Queue_DIR_LIBRARY)            \
    2631                                        $(Behavioural_DIR_LIBRARY)
    2732
    … …  
    3136                                @\
    3237                                $(MAKE) Behavioural_library;            \
     38                                $(MAKE) Queue_library;                  \
    3339                                $(MAKE) --directory=$(Decod_queue_DIR) --makefile=Makefile;
    3440
    … …  
    3642                                @\
    3743                                $(MAKE) Behavioural_library_clean;      \
     44                                $(MAKE) Queue_library_clean;            \
    3845                                $(MAKE) --directory=$(Decod_queue_DIR) --makefile=Makefile clean;

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/doc/sty/header.sty

    r82 r135  
    22%\def\review{\number\day/\number\month/\number\year\xspace}
    33
    4 \title{Decod_queue}
     4\title{Decod\_queue}
    55 
    66\author{}

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Parameters.h

    r111 r135  
    3434   
    3535  public : uint32_t              _nb_bank;
     36  public : uint32_t              _size_internal_queue    ; // data size in queue
    3637
    3738    //-----[ methods ]-----------------------------------------------------------
    … …  
    6061}; // end namespace multi_front_end
    6162}; // end namespace core
    62 
    6363}; // end namespace behavioural
    6464}; // end namespace morpheo             

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_vhdl.cpp

    r82 r135  
    99#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/include/Decod_queue.h"
    1010#include "Behavioural/include/Vhdl.h"
     11#include "Behavioural/Generic/Queue/include/Queue.h"
    1112
    1213namespace morpheo                    {
    … …  
    2425  {
    2526    log_begin(Decod_queue,FUNCTION);
     27
     28    //----- Queue -----
     29   
     30    morpheo::behavioural::generic::queue::Parameters * param_queue;
     31    morpheo::behavioural::generic::queue::Queue      * queue;
     32   
     33    param_queue = new morpheo::behavioural::generic::queue::Parameters
     34      (_param->_size_queue,
     35       _param->_size_internal_queue,
     36       0,
     37       false,
     38       false
     39       );
     40   
     41    std::string queue_name = _name + "_queue";
     42    queue = new morpheo::behavioural::generic::queue::Queue
     43      (queue_name.c_str()
     44#ifdef STATISTICS
     45       ,NULL
     46#endif
     47       ,param_queue
     48       ,USE_VHDL);
     49   
     50    _component->set_component(queue->_component
     51#ifdef POSITION
     52                              , 0, 0, 0, 0
     53#endif
     54                              , INSTANCE_LIBRARY
     55                              );
    2656
    2757    Vhdl * vhdl = new Vhdl (_name);

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_vhdl_body.cpp

    r82 r135  
    2323  {
    2424    log_begin(Decod_queue,FUNCTION);
    25     vhdl->set_body ("");
     25
     26    vhdl->set_body(0,"");
     27    vhdl->set_comment(0,"-----------------------------------");
     28    vhdl->set_comment(0,"-- Instance queue                  ");
     29    vhdl->set_comment(0,"-----------------------------------");
     30    vhdl->set_body(0,"");
     31
     32    vhdl->set_body   (0,"instance_"+_name+"_queue : "+_name+"_queue");
     33    vhdl->set_body   (0,"port map (");
     34    vhdl->set_body   (1,"  in_CLOCK => in_CLOCK ");
     35    vhdl->set_body   (1,", in_NRESET => in_NRESET");
     36    vhdl->set_body   (1,", in_INSERT_VAL => internal_QUEUE_INSERT_VAL");
     37    vhdl->set_body   (1,",out_INSERT_ACK => internal_QUEUE_INSERT_ACK");
     38    vhdl->set_body   (1,", in_INSERT_DATA => internal_QUEUE_INSERT_DATA");
     39    vhdl->set_body   (1,",out_RETIRE_VAL => internal_QUEUE_RETIRE_VAL");
     40    vhdl->set_body   (1,", in_RETIRE_ACK => internal_QUEUE_RETIRE_ACK");
     41    vhdl->set_body   (1,",out_RETIRE_DATA => internal_QUEUE_RETIRE_DATA");
     42    vhdl->set_body   (0,");");
     43
     44    vhdl->set_body(0,"");
     45    vhdl->set_comment(0,"-----------------------------------");
     46    vhdl->set_comment(0,"-- Entree Queue                    ");
     47    vhdl->set_comment(0,"-----------------------------------");
     48    vhdl->set_body(0,"");
     49
     50    for(uint32_t i=0;i < _param->_nb_inst_decod;i++){
     51
     52      vhdl->set_body(0,"");
     53      vhdl->set_comment(0,"-----------------------------------");
     54      vhdl->set_comment(0,"-- Instruction "+toString(i)+"                   ");
     55      vhdl->set_comment(0,"-----------------------------------");
     56      vhdl->set_body(0,"");
     57
     58      if(_param->_have_port_context_id) vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_CONTEXT_ID <= in_DECOD_IN_"+toString(i)+"_CONTEXT_ID ;");
     59      if(_param->_have_port_depth) vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_DEPTH <= in_DECOD_IN_"+toString(i)+"_DEPTH ;");
     60      vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_TYPE <= in_DECOD_IN_"+toString(i)+"_TYPE ;");
     61      vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_OPERATION <= in_DECOD_IN_"+toString(i)+"_OPERATION ;");
     62      vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_NO_EXECUTE <= in_DECOD_IN_"+toString(i)+"_NO_EXECUTE ;");
     63      vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_IS_DELAY_SLOT <= in_DECOD_IN_"+toString(i)+"_IS_DELAY_SLOT ;");
     64#ifdef DEBUG
     65      vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_ADDRESS <= in_DECOD_IN_"+toString(i)+"_ADDRESS ;");
     66#endif
     67      vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_ADDRESS_NEXT <= in_DECOD_IN_"+toString(i)+"_ADDRESS_NEXT ;");
     68      vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_HAS_IMMEDIAT <= in_DECOD_IN_"+toString(i)+"_HAS_IMMEDIAT ;");
     69      vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_IMMEDIAT <= in_DECOD_IN_"+toString(i)+"_IMMEDIAT ;");
     70      vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_READ_RA <= in_DECOD_IN_"+toString(i)+"_READ_RA ;");
     71      vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_NUM_REG_RA <= in_DECOD_IN_"+toString(i)+"_NUM_REG_RA ;");
     72      vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_READ_RB <= in_DECOD_IN_"+toString(i)+"_READ_RB ;");
     73      vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_NUM_REG_RB <= in_DECOD_IN_"+toString(i)+"_NUM_REG_RB ;");
     74      vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_READ_RC <= in_DECOD_IN_"+toString(i)+"_READ_RC ;");
     75      vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_NUM_REG_RC <= in_DECOD_IN_"+toString(i)+"_NUM_REG_RC ;");
     76      vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_WRITE_RD <= in_DECOD_IN_"+toString(i)+"_WRITE_RD ;");
     77      vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_NUM_REG_RD <= in_DECOD_IN_"+toString(i)+"_NUM_REG_RD ;");
     78      vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_WRITE_RE <= in_DECOD_IN_"+toString(i)+"_WRITE_RE ;");
     79      vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_NUM_REG_RE <= in_DECOD_IN_"+toString(i)+"_NUM_REG_RE ;");
     80      vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_EXCEPTION_USE <= in_DECOD_IN_"+toString(i)+"_EXCEPTION_USE ;");
     81      vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_EXCEPTION <= in_DECOD_IN_"+toString(i)+"_EXCEPTION ;");
     82      vhdl->set_body(0,"internal_DECOD_IN_"+toString(i)+"_VAL <= in_DECOD_IN_"+toString(i)+"_VAL ;");
     83      vhdl->set_body(0,"out_DECOD_IN_"+toString(i)+"_ACK <= internal_QUEUE_INSERT_ACK ;");
     84    }
     85
     86    vhdl->set_body(0,"");
     87
     88    vhdl->set_body(0,"internal_QUEUE_INSERT_VAL <= '0'");
     89    for(uint32_t i=0;i < _param->_nb_inst_decod;i++){
     90      vhdl->set_body(1," OR internal_DECOD_IN_"+toString(i)+"_VAL");
     91    }
     92    vhdl->set_body(1,";");
     93
     94    vhdl->set_body(0,"");
     95
     96    if(_param->_have_port_context_id){
     97      if(_param->_size_nb_inst_decod < 2){
     98        for(uint32_t i_context=0;i_context < _param->_nb_context;i_context++)
     99          vhdl->set_body(0,"internal_NB_INST_"+toString(i_context)+"_ALL <= ( reg_NB_INST_"+toString(i_context)+"_ALL OR ( internal_DECOD_IN_0_VAL AND ( internal_QUEUE_INSERT_ACK AND internal_DECOD_OUT_0_CONTEXT_ID = "+std_logic_conv(_param->_size_context_id,i_context)+" ))) AND ( NOT ( internal_OUT_DECOD_OUT_0_VAL AND ( internal_DECOD_OUT_0_CONTEXT_ID = "+std_logic_conv(_param->_size_context_id,i_context)+" AND ( NOT internal_DECOD_OUT_0_VAL ))));");
     100      }
     101      else{
     102        for(uint32_t i_context=0;i_context < _param->_nb_context;i_context++){
     103         
     104          for(uint32_t i_inst=0;i_inst < _param->_nb_inst_decod;i_inst++){
     105            vhdl->set_body(0,"internal_NB_INST_OUT_"+toString(i_context)+"_"+toString(i_inst)+"_CONTEXT <= "+std_logic_conv(_param->_size_nb_inst_decod,1)+" WHEN( internal_DECOD_OUT_"+toString(i_inst)+"_CONTEXT_ID = "+std_logic_conv(_param->_size_context_id,i_context)+" AND internal_OUT_DECOD_OUT_"+toString(i_inst)+"_VAL = '1' AND internal_DECOD_OUT_"+toString(i_inst)+"_VAL = '0' ) ELSE "+std_logic_conv(_param->_size_nb_inst_decod,0)+";");
     106            vhdl->set_body(0,"internal_NB_INST_IN_"+toString(i_context)+"_"+toString(i_inst)+"_CONTEXT <= "+std_logic_conv(_param->_size_nb_inst_decod,1)+" WHEN( internal_DECOD_IN_"+toString(i_inst)+"_VAL = '1' AND internal_QUEUE_INSERT_ACK = '1' AND internal_DECOD_IN_"+toString(i_inst)+"_CONTEXT_ID = "+std_logic_conv(_param->_size_context_id,i_context)+" ) ELSE "+std_logic_conv(_param->_size_nb_inst_decod,0)+";");
     107          }
     108         
     109          vhdl->set_body(0,"");
     110         
     111          vhdl->set_body(0,"internal_NB_INST_"+toString(i_context)+"_ALL <= reg_NB_INST_"+toString(i_context)+"_ALL");
     112         
     113          for(uint32_t i_inst=0;i_inst < _param->_nb_inst_decod;i_inst++){
     114            vhdl->set_body(1,"+ internal_NB_INST_IN_"+toString(i_context)+"_"+toString(i_inst)+"_CONTEXT");
     115            vhdl->set_body(1,"- internal_NB_INST_OUT_"+toString(i_context)+"_"+toString(i_inst)+"_CONTEXT");
     116          }
     117          vhdl->set_body(1,";");
     118        }
     119      }
     120    }
     121    else{
     122      if(_param->_size_nb_inst_decod < 2) vhdl->set_body(0,"internal_NB_INST_0_ALL <= ( reg_NB_INST_0_ALL OR ( internal_DECOD_IN_0_VAL AND internal_QUEUE_INSERT_ACK )) AND ( NOT ( internal_OUT_DECOD_OUT_0_VAL AND ( NOT internal_DECOD_OUT_0_VAL )));");
     123      else{
     124        for(uint32_t i_inst=0;i_inst < _param->_nb_inst_decod;i_inst++){
     125          vhdl->set_body(0,"internal_NB_INST_OUT_0_"+toString(i_inst)+"_CONTEXT <= "+std_logic_conv(_param->_size_nb_inst_decod,1)+" WHEN(( internal_OUT_DECOD_OUT_"+toString(i_inst)+"_VAL = '1' ) AND internal_DECOD_OUT_"+toString(i_inst)+"_VAL = '0' ) ELSE "+std_logic_conv(_param->_size_nb_inst_decod,0)+";");
     126          vhdl->set_body(0,"internal_NB_INST_IN_0_"+toString(i_inst)+"_CONTEXT <= "+std_logic_conv(_param->_size_nb_inst_decod,1)+" WHEN( internal_DECOD_IN_"+toString(i_inst)+"_VAL = '1' AND internal_QUEUE_INSERT_ACK = '1' ) ELSE "+std_logic_conv(_param->_size_nb_inst_decod,0)+";");
     127        }
     128       
     129        vhdl->set_body(0,"");
     130       
     131        vhdl->set_body(0,"internal_NB_INST_0_ALL <= reg_NB_INST_0_ALL");
     132        for(uint32_t i=0;i < _param->_nb_inst_decod;i++){
     133          vhdl->set_body(1," + internal_NB_INST_IN_0_"+toString(i)+"_CONTEXT");
     134          vhdl->set_body(1," - internal_NB_INST_OUT_0_"+toString(i)+"_CONTEXT");
     135        }
     136        vhdl->set_body(1,";");
     137      }
     138    }
     139
     140    vhdl->set_body(0,"");
     141    vhdl->set_comment(0,"-----------------------------------");
     142    vhdl->set_comment(0,"-- Sortie Queue                    ");
     143    vhdl->set_comment(0,"-----------------------------------");
     144    vhdl->set_body(0,"");
     145
     146    for(uint32_t i=0;i < _param->_nb_inst_decod;i++){
     147
     148      vhdl->set_body(0,"");
     149      vhdl->set_comment(0,"-----------------------------------");
     150      vhdl->set_comment(0,"-- Instruction "+toString(i)+"                   ");
     151      vhdl->set_comment(0,"-----------------------------------");
     152      vhdl->set_body(0,"");
     153
     154      if(_param->_have_port_context_id){
     155        vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_CONTEXT_ID <= internal_DECOD_OUT_"+toString(i)+"_CONTEXT_ID");
     156        for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){
     157         
     158          vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_CONTEXT_ID ");
     159        }
     160        vhdl->set_body(0," ;");
     161      }
     162      if(_param->_have_port_depth){
     163        vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_DEPTH <= internal_DECOD_OUT_"+toString(i)+"_DEPTH");
     164        for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){
     165         
     166          vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_DEPTH ");
     167        }
     168        vhdl->set_body(0," ;");
     169      }
     170      vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_TYPE <= internal_DECOD_OUT_"+toString(i)+"_TYPE");
     171      for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){
     172       
     173        vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_TYPE ");
     174      }
     175      vhdl->set_body(0," ;");
     176      vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_OPERATION <= internal_DECOD_OUT_"+toString(i)+"_OPERATION");
     177      for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){
     178       
     179        vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_OPERATION ");
     180      }
     181      vhdl->set_body(0," ;");
     182      vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_NO_EXECUTE <= internal_DECOD_OUT_"+toString(i)+"_NO_EXECUTE");
     183      for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){
     184       
     185        vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_NO_EXECUTE ");
     186      }
     187      vhdl->set_body(0," ;");
     188      vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_IS_DELAY_SLOT <= internal_DECOD_OUT_"+toString(i)+"_IS_DELAY_SLOT");
     189      for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){
     190       
     191        vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_IS_DELAY_SLOT ");
     192      }
     193      vhdl->set_body(0," ;");
     194#ifdef DEBUG
     195      vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_ADDRESS <= internal_DECOD_OUT_"+toString(i)+"_ADDRESS");
     196      for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){
     197       
     198        vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_ADDRESS ");
     199      }
     200      vhdl->set_body(0," ;");
     201#endif
     202      vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_ADDRESS_NEXT <= internal_DECOD_OUT_"+toString(i)+"_ADDRESS_NEXT");
     203      for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){
     204       
     205        vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_ADDRESS_NEXT ");
     206      }
     207      vhdl->set_body(0," ;");
     208      vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_HAS_IMMEDIAT <= internal_DECOD_OUT_"+toString(i)+"_HAS_IMMEDIAT");
     209      for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){
     210       
     211        vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_HAS_IMMEDIAT ");
     212      }
     213      vhdl->set_body(0," ;");
     214      vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_IMMEDIAT <= internal_DECOD_OUT_"+toString(i)+"_IMMEDIAT");
     215      for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){
     216       
     217        vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_IMMEDIAT ");
     218      }
     219      vhdl->set_body(0," ;");
     220      vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_READ_RA <= internal_DECOD_OUT_"+toString(i)+"_READ_RA");
     221      for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){
     222       
     223        vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_READ_RA ");
     224      }
     225      vhdl->set_body(0," ;");
     226      vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_NUM_REG_RA <= internal_DECOD_OUT_"+toString(i)+"_NUM_REG_RA");
     227      for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){
     228       
     229        vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_NUM_REG_RA ");
     230      }
     231      vhdl->set_body(0," ;");
     232      vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_READ_RB <= internal_DECOD_OUT_"+toString(i)+"_READ_RB");
     233      for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){
     234       
     235        vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_READ_RB ");
     236      }
     237      vhdl->set_body(0," ;");
     238      vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_NUM_REG_RB <= internal_DECOD_OUT_"+toString(i)+"_NUM_REG_RB");
     239      for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){
     240       
     241        vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_NUM_REG_RB ");
     242      }
     243      vhdl->set_body(0," ;");
     244      vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_READ_RC <= internal_DECOD_OUT_"+toString(i)+"_READ_RC");
     245      for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){
     246       
     247        vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_READ_RC ");
     248      }
     249      vhdl->set_body(0," ;");
     250      vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_NUM_REG_RC <= internal_DECOD_OUT_"+toString(i)+"_NUM_REG_RC");
     251      for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){
     252       
     253        vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_NUM_REG_RC ");
     254      }
     255      vhdl->set_body(0," ;");
     256      vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_WRITE_RD <= internal_DECOD_OUT_"+toString(i)+"_WRITE_RD");
     257      for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){
     258       
     259        vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_WRITE_RD ");
     260      }
     261      vhdl->set_body(0," ;");
     262      vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_NUM_REG_RD <= internal_DECOD_OUT_"+toString(i)+"_NUM_REG_RD");
     263      for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){
     264       
     265        vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_NUM_REG_RD ");
     266      }
     267      vhdl->set_body(0," ;");
     268      vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_WRITE_RE <= internal_DECOD_OUT_"+toString(i)+"_WRITE_RE");
     269      for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){
     270       
     271        vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_WRITE_RE ");
     272      }
     273      vhdl->set_body(0," ;");
     274      vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_NUM_REG_RE <= internal_DECOD_OUT_"+toString(i)+"_NUM_REG_RE");
     275      for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){
     276       
     277        vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_NUM_REG_RE ");
     278      }
     279      vhdl->set_body(0," ;");
     280      vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_EXCEPTION_USE <= internal_DECOD_OUT_"+toString(i)+"_EXCEPTION_USE");
     281      for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){
     282       
     283        vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod+1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_EXCEPTION_USE ");
     284      }
     285      vhdl->set_body(0," ;");
     286      vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_EXCEPTION <= internal_DECOD_OUT_"+toString(i)+"_EXCEPTION");
     287      for(uint32_t cp = i;cp < _param->_nb_inst_decod - 1;cp++){
     288       
     289        vhdl->set_body(1," WHEN( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod + 1,cp*2 + 1)+") ELSE internal_DECOD_OUT_"+toString(cp + 1)+"_EXCEPTION ");
     290      }
     291      vhdl->set_body(0," ;");
     292
     293      vhdl->set_body(0,"");
     294
     295      if(_param->_have_port_depth){
     296        if(_param->_have_port_context_id){
     297         
     298          vhdl->set_body(0,"internal_DECOD_"+toString(i)+"_VALID <= '1' WHEN(( in_DEPTH_0_FULL = '1' AND internal_DECOD_OUT_"+toString(i)+"_CONTEXT_ID = "+std_logic_conv(_param->_size_context_id,0)+" ) ");
     299          for(uint32_t i_context = 1;i_context < _param->_nb_context;i_context++)
     300            vhdl->set_body(2," OR ( in_DEPTH_"+toString(i_context)+"_FULL = '1' AND internal_DECOD_OUT_"+toString(i)+"_CONTEXT_ID = "+std_logic_conv(_param->_size_context_id,i_context)+" ) ");
     301         
     302          vhdl->set_body(1," ) ELSE '1' WHEN(( in_DEPTH_0_MIN = in_DEPTH_0_MAX AND internal_DECOD_OUT_"+toString(i)+"_CONTEXT_ID = "+std_logic_conv(_param->_size_context_id,0)+" ) ");
     303          for(uint32_t i_context = 1;i_context < _param->_nb_context;i_context++)
     304            vhdl->set_body(2," OR ( in_DEPTH_"+toString(i_context)+"_MIN = in_DEPTH_"+toString(i_context)+"_MAX AND internal_DECOD_OUT_"+toString(i)+"_CONTEXT_ID = "+std_logic_conv(_param->_size_context_id,i_context)+" ) ");
     305         
     306          vhdl->set_body(1," ) ELSE '1' WHEN((( internal_DECOD_OUT_"+toString(i)+"_DEPTH > in_DEPTH_0_MIN ) AND ( internal_DECOD_OUT_"+toString(i)+"_DEPTH < in_DEPTH_0_MAX ) AND ( in_DEPTH_0_MIN < in_DEPTH_0_MAX ) AND ( internal_DECOD_OUT_"+toString(i)+"_CONTEXT_ID = "+std_logic_conv(_param->_size_context_id,0)+" )) ");
     307          for(uint32_t i_context = 1;i_context < _param->_nb_context;i_context++)
     308            vhdl->set_body(2," OR (( internal_DECOD_OUT_"+toString(i)+"_DEPTH > in_DEPTH_"+toString(i_context)+"_MIN ) AND ( internal_DECOD_OUT_"+toString(i)+"_DEPTH < in_DEPTH_"+toString(i_context)+"_MAX ) AND ( in_DEPTH_"+toString(i_context)+"_MIN < in_DEPTH_"+toString(i_context)+"_MAX ) AND internal_DECOD_OUT_"+toString(i)+"_CONTEXT_ID = "+std_logic_conv(_param->_size_context_id,i_context)+" ) ");
     309         
     310          vhdl->set_body(1," ) ELSE '1' WHEN(((( internal_DECOD_OUT_"+toString(i)+"_DEPTH > in_DEPTH_0_MAX ) OR ( internal_DECOD_OUT_"+toString(i)+"_DEPTH < in_DEPTH_0_MIN )) AND ( in_DEPTH_0_MIN > in_DEPTH_0_MAX ) AND ( internal_DECOD_OUT_"+toString(i)+"_CONTEXT_ID = "+std_logic_conv(_param->_size_context_id,0)+" ))");
     311          for(uint32_t i_context = 1;i_context < _param->_nb_context;i_context++)
     312            vhdl->set_body(2," OR ((( internal_DECOD_OUT_"+toString(i)+"_DEPTH > in_DEPTH_"+toString(i_context)+"_MAX ) OR ( internal_DECOD_OUT_"+toString(i)+"_DEPTH < in_DEPTH_"+toString(i_context)+"_MIN )) AND ( in_DEPTH_"+toString(i_context)+"_MIN > in_DEPTH_"+toString(i_context)+"_MAX ) AND internal_DECOD_OUT_"+toString(i)+"_CONTEXT_ID = "+std_logic_conv(_param->_size_context_id,i_context)+" ) ");
     313         
     314          vhdl->set_body(1," ) ELSE '0' ;");
     315        }
     316        else{
     317          vhdl->set_body(0,"internal_DECOD_"+toString(i)+"_VALID <= '1' WHEN( in_DEPTH_0_FULL = '1' ) ELSE '1' WHEN( in_DEPTH_0_MIN = in_DEPTH_0_MAX ) ELSE '1' WHEN(( internal_DECOD_OUT_"+toString(i)+"_DEPTH > in_DEPTH_0_MIN ) AND ( internal_DECOD_OUT_"+toString(i)+"_DEPTH < in_DEPTH_0_MAX ) AND ( in_DEPTH_0_MIN < in_DEPTH_0_MAX )) ELSE '1' WHEN((( internal_DECOD_OUT_"+toString(i)+"_DEPTH > in_DEPTH_0_MAX ) OR ( internal_DECOD_OUT_"+toString(i)+"_DEPTH < in_DEPTH_0_MIN )) AND ( in_DEPTH_0_MIN > in_DEPTH_0_MAX )) ELSE '0' ;");
     318        }
     319       
     320        vhdl->set_body(0,"");
     321       
     322        vhdl->set_body(0,"internal_OUT_DECOD_OUT_"+toString(i)+"_VAL <= ( internal_QUEUE_OUT_"+toString(i)+"_VAL AND internal_QUEUE_RETIRE_VAL AND internal_DECOD_"+toString(i)+"_VALID ) WHEN( internal_QUEUE_NEW_HEAD = '1' ) ELSE reg_DECOD_OUT_"+toString(i)+"_VAL ;");
     323      }
     324      else vhdl->set_body(0,"internal_OUT_DECOD_OUT_"+toString(i)+"_VAL <= ( internal_QUEUE_OUT_"+toString(i)+"_VAL AND internal_QUEUE_RETIRE_VAL ) WHEN( internal_QUEUE_NEW_HEAD = '1' ) ELSE reg_DECOD_OUT_"+toString(i)+"_VAL ;");
     325     
     326      vhdl->set_body(0,"");
     327     
     328      vhdl->set_body(0,"internal_DECOD_OUT_"+toString(i)+"_VAL <= '0' WHEN(( in_DECOD_OUT_"+toString(i)+"_ACK = '1' ) AND ( internal_INDEX_"+toString(i)+" = "+std_logic_conv(_param->_size_nb_inst_decod + 1,i*2 + 1)+" ))");
     329      for(uint32_t cp = 0;cp < i;cp++){
     330       
     331        vhdl->set_body(1," ELSE '0' WHEN(( in_DECOD_OUT_"+toString(cp)+"_ACK = '1' ) AND ( internal_INDEX_"+toString(cp)+" = "+std_logic_conv(_param->_size_nb_inst_decod + 1,i*2 + 1)+" ))");
     332      }
     333      vhdl->set_body(1," ELSE '1' WHEN( internal_OUT_DECOD_OUT_"+toString(i)+"_VAL = '1' ) ELSE '0' ;");
     334
     335      vhdl->set_body(0,"");
     336
     337      vhdl->set_body(0,"out_DECOD_OUT_"+toString(i)+"_VAL <= internal_INDEX_"+toString(i)+"(0) ;");
     338
     339      vhdl->set_body(0,"");
     340
     341      vhdl->set_body(0,"internal_INDEX_"+toString(i)+" <= ");
     342      for(uint32_t cp = i;cp < _param->_nb_inst_decod;cp++){
     343       
     344        vhdl->set_body(1,std_logic_conv(_param->_size_nb_inst_decod + 1,cp*2 + 1)+" WHEN( internal_OUT_DECOD_OUT_"+toString(cp)+"_VAL = '1'");
     345        for(uint32_t cp2 = 0;cp2 < i;cp2++){
     346       
     347          vhdl->set_body(2," AND NOT( internal_INDEX_"+toString(cp2)+" = "+std_logic_conv(_param->_size_nb_inst_decod + 1,cp*2 + 1)+" )");
     348        }
     349        vhdl->set_body(1," ) ELSE ");
     350      }
     351      vhdl->set_body(1,std_logic_conv(_param->_size_nb_inst_decod + 1,0)+" ;");
     352    }
     353
     354    vhdl->set_body(0,"");
     355
     356    vhdl->set_body(0,"internal_QUEUE_NEW_HEAD <= NOT( '0'");
     357    for(uint32_t i=0;i < _param->_nb_inst_decod;i++){
     358      vhdl->set_body(1," OR reg_DECOD_OUT_"+toString(i)+"_VAL");
     359    }
     360    vhdl->set_body(1,");");
     361
     362    vhdl->set_body(0,"");
     363
     364    vhdl->set_body(0,"internal_QUEUE_RETIRE_ACK <= NOT( '0'");
     365    for(uint32_t i=0;i < _param->_nb_inst_decod;i++){
     366      vhdl->set_body(1," OR internal_DECOD_OUT_"+toString(i)+"_VAL");
     367    }
     368    vhdl->set_body(1,");");
     369
     370    vhdl->set_body(0,"");
     371
     372    for(uint32_t i=0;i < _param->_nb_context;i++){
     373      vhdl->set_body(0,"out_NB_INST_"+toString(i)+"_ALL <= reg_NB_INST_"+toString(i)+"_ALL ;");
     374    }
     375
     376    vhdl->set_body(0,"");
     377    vhdl->set_comment(0,"-----------------------------------");
     378    vhdl->set_comment(0,"-- Registers                       ");
     379    vhdl->set_comment(0,"-----------------------------------");
     380    vhdl->set_body(0,"");
     381   
     382    vhdl->set_body(0,"reg_DECOD_write: process (in_CLOCK)");
     383    vhdl->set_body(0,"begin");
     384    vhdl->set_body(1,"if in_CLOCK'event AND in_CLOCK = '1' then");
     385    vhdl->set_body(2,"if in_NRESET = '0' then");
     386   
     387    for(uint32_t i=0;i < _param->_nb_context;i++){
     388      vhdl->set_body(3,"reg_NB_INST_"+toString(i)+"_ALL <= "+std_logic_conv(_param->_size_nb_inst_decod,0)+";");
     389    }
     390    for(uint32_t i=0;i < _param->_nb_inst_decod;i++){
     391      vhdl->set_body(3,"reg_DECOD_OUT_"+toString(i)+"_VAL <= '0';");
     392    }
     393
     394    vhdl->set_body(2,"else");
     395   
     396    for(uint32_t i=0;i < _param->_nb_context;i++){
     397      vhdl->set_body(3,"reg_NB_INST_"+toString(i)+"_ALL <= internal_NB_INST_"+toString(i)+"_ALL;");
     398    } 
     399    for(uint32_t i=0;i < _param->_nb_inst_decod;i++){
     400      vhdl->set_body(3,"reg_DECOD_OUT_"+toString(i)+"_VAL <= internal_DECOD_OUT_"+toString(i)+"_VAL;");
     401    }
     402
     403    vhdl->set_body(2,"end if;");
     404    vhdl->set_body(1,"end if;");
     405    vhdl->set_body(0,"end process reg_DECOD_write;");
     406
    26407    log_end(Decod_queue,FUNCTION);
    27408  };

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Decod_queue_vhdl_declaration.cpp

    r82 r135  
    2323  {
    2424    log_begin(Decod_queue,FUNCTION);
     25
     26    vhdl->set_signal ("internal_QUEUE_INSERT_DATA    ",_param->_size_internal_queue);
     27    vhdl->set_signal ("internal_QUEUE_RETIRE_DATA    ",_param->_size_internal_queue);
     28    vhdl->set_signal ("internal_QUEUE_INSERT_VAL     ",1);
     29    vhdl->set_signal ("internal_QUEUE_RETIRE_VAL     ",1);
     30    vhdl->set_signal ("internal_QUEUE_INSERT_ACK     ",1);
     31    vhdl->set_signal ("internal_QUEUE_RETIRE_ACK     ",1);
     32
     33    vhdl->set_signal ("internal_QUEUE_NEW_HEAD       ",1);
     34   
     35    uint32_t min = 0;
     36    uint32_t max, size;
     37
     38    for(uint32_t i = 0;i < _param->_nb_context;i++){
     39     
     40      vhdl->set_signal ("reg_NB_INST_"+toString(i)+"_ALL",_param->_size_nb_inst_decod);
     41      vhdl->set_signal ("internal_NB_INST_"+toString(i)+"_ALL",_param->_size_nb_inst_decod);
     42
     43      for(uint32_t i_inst = 0;i_inst < _param->_nb_inst_decod;i_inst++){
     44        vhdl->set_signal ("internal_NB_INST_IN_"+toString(i)+"_"+toString(i_inst)+"_CONTEXT",_param->_size_nb_inst_decod);
     45        vhdl->set_signal ("internal_NB_INST_OUT_"+toString(i)+"_"+toString(i_inst)+"_CONTEXT",_param->_size_nb_inst_decod);
     46      }
     47    }
     48   
     49    for(uint32_t i = 0;i < _param->_nb_inst_decod;i++){
     50      vhdl->set_signal ("reg_DECOD_OUT_"+toString(i)+"_VAL",1);
     51      vhdl->set_signal ("internal_DECOD_OUT_"+toString(i)+"_VAL",1);
     52      vhdl->set_signal ("internal_OUT_DECOD_OUT_"+toString(i)+"_VAL",1);
     53      vhdl->set_signal ("internal_DECOD_"+toString(i)+"_VALID",1);
     54      vhdl->set_signal ("internal_INDEX_"+toString(i),_param->_size_nb_inst_decod + 1);
     55     
     56      max = min;
     57
     58      if(_param->_have_port_context_id)
     59        {
     60          size = _param->_size_context_id;
     61          max = min-1+size;
     62          vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_CONTEXT_ID",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     63          vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_CONTEXT_ID",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     64          min = max+1;
     65        }
     66     
     67      if(_param->_have_port_depth)
     68        {
     69          size = _param->_size_depth;
     70          max = min-1+size;
     71          vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_DEPTH",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     72          vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_DEPTH",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     73          min = max+1;
     74        }
     75     
     76      size = _param->_size_type;
     77      max = min-1+size;
     78      vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_TYPE",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     79      vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_TYPE",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     80      min = max+1;
     81     
     82      size = _param->_size_operation;
     83      max = min-1+size;
     84      vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_OPERATION",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     85      vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_OPERATION",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     86      min = max+1;
     87     
     88      size = 1;
     89      max = min-1+size;
     90      vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_NO_EXECUTE",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     91      vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_NO_EXECUTE",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     92      min = max+1;
     93     
     94      size = 1;
     95      max = min-1+size;
     96      vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_IS_DELAY_SLOT",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     97      vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_IS_DELAY_SLOT",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     98      min = max+1;
     99     
     100#ifdef DEBUG
     101      size = _param->_size_instruction_address;
     102      max = min-1+size;
     103      vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_ADDRESS",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     104      vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_ADDRESS",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     105      min = max+1;
     106#endif
     107     
     108      size = _param->_size_instruction_address;
     109      max = min-1+size;
     110      vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_ADDRESS_NEXT",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     111      vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_ADDRESS_NEXT",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     112      min = max+1;
     113     
     114      size = 1;
     115      max = min-1+size;
     116      vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_HAS_IMMEDIAT",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     117      vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_HAS_IMMEDIAT",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     118      min = max+1;
     119     
     120      size = _param->_size_general_data;
     121      max = min-1+size;
     122      vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_IMMEDIAT",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     123      vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_IMMEDIAT",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     124      min = max+1;
     125     
     126      size = 1;
     127      max = min-1+size;
     128      vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_READ_RA",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     129      vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_READ_RA",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     130      min = max+1;
     131     
     132      size = _param->_size_general_register_logic;
     133      max = min-1+size;
     134      vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_NUM_REG_RA",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     135      vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_NUM_REG_RA",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     136      min = max+1;
     137     
     138      size = 1;
     139      max = min-1+size;
     140      vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_READ_RB",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     141      vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_READ_RB",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     142      min = max+1;
     143     
     144      size = _param->_size_general_register_logic;
     145      max = min-1+size;
     146      vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_NUM_REG_RB",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     147      vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_NUM_REG_RB",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     148      min = max+1;
     149     
     150      size = 1;
     151      max = min-1+size;
     152      vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_READ_RC",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     153      vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_READ_RC",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     154      min = max+1;
     155     
     156      size = _param->_size_special_register_logic;
     157      max = min-1+size;
     158      vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_NUM_REG_RC",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     159      vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_NUM_REG_RC",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     160      min = max+1;
     161     
     162      size = 1;
     163      max = min-1+size;
     164      vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_WRITE_RD",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     165      vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_WRITE_RD",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     166      min = max+1;
     167     
     168      size = _param->_size_general_register_logic;
     169      max = min-1+size;
     170      vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_NUM_REG_RD",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     171      vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_NUM_REG_RD",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     172      min = max+1;
     173     
     174      size = 1;
     175      max = min-1+size;
     176      vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_WRITE_RE",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     177      vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_WRITE_RE",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     178      min = max+1;
     179     
     180      size = _param->_size_special_register_logic;
     181      max = min-1+size;
     182      vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_NUM_REG_RE",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     183      vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_NUM_REG_RE",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     184      min = max+1;
     185     
     186      size = _param->_size_exception_use;
     187      max = min-1+size;
     188      vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_EXCEPTION_USE",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     189      vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_EXCEPTION_USE",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     190      min = max+1;
     191     
     192      size = _param->_size_exception_decod;
     193      max = min-1+size;
     194      vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_EXCEPTION",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     195      vhdl->set_alias ("internal_DECOD_OUT_"+toString(i)+"_EXCEPTION",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     196      min = max+1;
     197     
     198      size = 1;
     199      max = min-1+size;
     200      vhdl->set_alias ("internal_DECOD_IN_"+toString(i)+"_VAL",std_logic(size),"internal_QUEUE_INSERT_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     201      vhdl->set_alias ("internal_QUEUE_OUT_"+toString(i)+"_VAL",std_logic(size),"internal_QUEUE_RETIRE_DATA",std_logic_range(_param->_size_internal_queue,max,min));
     202      min = max+1;
     203
     204    }
     205
    25206    log_end(Decod_queue,FUNCTION);
    26207  };

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/src/Parameters.cpp

    r111 r135  
    4141
    4242    test();
     43
     44    _size_internal_queue =
     45      (1                            + // _val
     46       _size_context_id             + // _context_id
     47       _size_depth                  + // _depth
     48       _size_type                   + // _type   
     49       _size_operation              + // _operation
     50       1                            + // _no_execute
     51       1                            + // _is_delay_slot
     52#ifdef DEBUG
     53       _size_instruction_address    + // _address
     54#endif
     55       _size_instruction_address    + // _address_next
     56       1                            + // _has_immediat
     57       _size_general_data           + // _immediat
     58       1                            + // _read_ra
     59       _size_general_register_logic + // _num_reg_ra
     60       1                            + // _read_rb
     61       _size_general_register_logic + // _num_reg_rb
     62       1                            + // _read_rc
     63       _size_special_register_logic + // _num_reg_rc
     64       1                            + // _write_rd
     65       _size_general_register_logic + // _num_reg_rd
     66       1                            + // _write_re
     67       _size_special_register_logic + // _num_reg_re
     68       _size_exception_use          + // _exception_use
     69       _size_exception_decod          // _exception
     70       ) * _nb_inst_decod;
    4371
    4472    if (is_toplevel)

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_allocation.cpp

    r112 r135  
    7070    {
    7171      ALLOC1_INTERFACE_BEGIN("address", OUT, SOUTH, _("Access at request icache."),_param->_nb_instruction);
     72      INTERFACE1_TEST(false,_param->_nb_instruction);
    7273
    7374      ALLOC1_SIGNAL_OUT(out_ADDRESS_INSTRUCTION_ENABLE         ,"instruction_enable"         ,Tcontrol_t        ,1);
    … …  
    9697    {
    9798      ALLOC1_INTERFACE_BEGIN("predict", IN, NORTH, _("Request the prediction unit."),_param->_nb_instruction);
     99      INTERFACE1_TEST(false,_param->_nb_instruction);
    98100
    99101      ALLOC1_SIGNAL_IN (in_PREDICT_INSTRUCTION_ENABLE          ,"instruction_enable"         ,Tcontrol_t        ,1);

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_vhdl_body.cpp

    r81 r135  
    2323  {
    2424    log_printf(FUNC,Address_management,FUNCTION,"Begin");
    25     vhdl->set_body ("");
     25
     26    vhdl->set_body   (0,"");
     27    vhdl->set_comment(0,"=========================================");
     28    vhdl->set_comment(0,"===== CONSTANT ==========================");
     29    vhdl->set_comment(0,"=========================================");
     30    vhdl->set_body   (0,"");
     31    vhdl->set_body   (0,"internal_EVENT_ACK <= '1';");
     32    vhdl->set_body   (0,"     out_EVENT_ACK <= internal_EVENT_ACK;");
     33
     34    vhdl->set_body   (0,"");
     35    vhdl->set_comment(0,"=========================================");
     36    vhdl->set_comment(0,"===== TRANSITION ========================");
     37    vhdl->set_comment(0,"=========================================");
     38    vhdl->set_body   (0,"");
     39   
     40    vhdl->set_body   (0,"TRANSITION : process (in_CLOCK)");
     41
     42    vhdl->set_body   (0,"");
     43    vhdl->set_body   (0,"variable var_PC_ACCESS_VAL                            : "+std_logic(1)+";");
     44    vhdl->set_body   (0,"variable var_PC_ACCESS                                : "+std_logic(_param->_size_instruction_address)+";");
     45    vhdl->set_body   (0,"variable var_PC_ACCESS_IS_DS_TAKE                     : "+std_logic(1)+";");
     46    vhdl->set_body   (0,"variable var_PC_ACCESS_INSTRUCTION_ENABLE             : Tinstruction_enable;");
     47    if (_param->_have_port_inst_ifetch_ptr)
     48    vhdl->set_body   (0,"variable var_PC_ACCESS_INST_IFETCH_PTR                : "+std_logic(_param->_size_inst_ifetch_ptr)+";");
     49    vhdl->set_body   (0,"variable var_PC_ACCESS_BRANCH_STATE                   : "+std_logic(_param->_size_branch_state)+";");
     50    if (_param->_have_port_depth)
     51    vhdl->set_body   (0,"variable var_PC_ACCESS_BRANCH_UPDATE_PREDICTION_ID    : "+std_logic(_param->_size_depth)+";");
     52    vhdl->set_body   (0,"");
     53    vhdl->set_body   (0,"variable var_PC_CURRENT_VAL                           : "+std_logic(1)+";");
     54    vhdl->set_body   (0,"variable var_PC_CURRENT                               : "+std_logic(_param->_size_instruction_address)+";");
     55    vhdl->set_body   (0,"variable var_PC_CURRENT_IS_DS_TAKE                    : "+std_logic(1)+";");
     56    vhdl->set_body   (0,"variable var_PC_CURRENT_INSTRUCTION_ENABLE            : Tinstruction_enable;");
     57    if (_param->_have_port_inst_ifetch_ptr)
     58    vhdl->set_body   (0,"variable var_PC_CURRENT_INST_IFETCH_PTR               : "+std_logic(_param->_size_inst_ifetch_ptr)+";");
     59    vhdl->set_body   (0,"variable var_PC_CURRENT_BRANCH_STATE                  : "+std_logic(_param->_size_branch_state)+";");
     60    if (_param->_have_port_depth)
     61    vhdl->set_body   (0,"variable var_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID   : "+std_logic(_param->_size_depth)+";");
     62    vhdl->set_body   (0,"");
     63    vhdl->set_body   (0,"variable var_PC_NEXT_VAL                              : "+std_logic(1)+";");
     64    vhdl->set_body   (0,"variable var_PC_NEXT                                  : "+std_logic(_param->_size_instruction_address)+";");
     65    vhdl->set_body   (0,"variable var_PC_NEXT_IS_DS_TAKE                       : "+std_logic(1)+";");
     66    vhdl->set_body   (0,"variable var_PC_NEXT_INSTRUCTION_ENABLE               : Tinstruction_enable;");
     67    if (_param->_have_port_inst_ifetch_ptr)
     68    vhdl->set_body   (0,"variable var_PC_NEXT_INST_IFETCH_PTR                  : "+std_logic(_param->_size_inst_ifetch_ptr)+";");
     69    vhdl->set_body   (0,"variable var_PC_NEXT_BRANCH_STATE                     : "+std_logic(_param->_size_branch_state)+";");
     70    if (_param->_have_port_depth)
     71    vhdl->set_body   (0,"variable var_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID      : "+std_logic(_param->_size_depth)+";");
     72    vhdl->set_body   (0,"");
     73    vhdl->set_body   (0,"variable var_PC_NEXT_NEXT_VAL                         : "+std_logic(1)+";");
     74    vhdl->set_body   (0,"variable var_PC_NEXT_NEXT                             : "+std_logic(_param->_size_instruction_address)+";");
     75    vhdl->set_body   (0,"variable var_PC_NEXT_NEXT_IS_DS_TAKE                  : "+std_logic(1)+";");
     76//  vhdl->set_body   (0,"variable var_PC_NEXT_NEXT_INSTRUCTION_ENABLE          : Tinstruction_enable;");
     77//  if (_param->_have_port_inst_ifetch_ptr)
     78//  vhdl->set_body   (0,"variable var_PC_NEXT_NEXT_INST_IFETCH_PTR             : "+std_logic(_param->_size_inst_ifetch_ptr)+";");
     79//  vhdl->set_body   (0,"variable var_PC_NEXT_NEXT_BRANCH_STATE                : "+std_logic(_param->_size_branch_state)+";");
     80//  if (_param->_have_port_depth)
     81//  vhdl->set_body   (0,"variable var_PC_NEXT_NEXT_BRANCH_UPDATE_PREDICTION_ID : "+std_logic(_param->_size_depth)+";");
     82    vhdl->set_body   (0,"");
     83    vhdl->set_body   (0,"begin  -- TRANSITION");
     84    vhdl->set_body   (1,"if (in_CLOCK'event and in_CLOCK = '1')then");
     85    vhdl->set_body   (1,"");
     86    vhdl->set_body   (2,"if (in_NRESET = '0') then");
     87    vhdl->set_body   (3,"");
     88
     89    {
     90      vhdl->set_body   (3,"reg_PC_ACCESS_VAL                       <= '0';");
     91#ifdef SYSTEMC_VHDL_COMPATIBILITY
     92      vhdl->set_body   (3,"reg_PC_ACCESS                           <= "+std_logic_cst(_param->_size_instruction_address,0)+";");
     93#endif
     94      vhdl->set_body   (3,"reg_PC_CURRENT_VAL                      <= '0';");
     95#ifdef SYSTEMC_VHDL_COMPATIBILITY
     96      vhdl->set_body   (3,"reg_PC_CURRENT                          <= "+std_logic_cst(_param->_size_instruction_address,0)+";");
     97#endif
     98      vhdl->set_body   (3,"reg_PC_NEXT_VAL                         <= '1';");
     99      vhdl->set_body   (3,"reg_PC_NEXT                             <= "+std_logic_cst(_param->_size_instruction_address,0x100>>2)+";");
     100      vhdl->set_body   (3,"reg_PC_NEXT_IS_DS_TAKE                  <= '0';");
     101      uint32_t index = reg_PC_NEXT % _param->_nb_instruction;
     102      for (uint32_t i=0; i<_param->_nb_instruction; i++)
     103        {
     104          std::string value = (i != index)?"'0'":"'1'";
     105          vhdl->set_body   (3,"reg_PC_NEXT_INSTRUCTION_ENABLE ("+toString(i)+") <= "+value+";");
     106        }
     107      if (_param->_have_port_inst_ifetch_ptr)
     108      vhdl->set_body   (3,"reg_PC_NEXT_INST_IFETCH_PTR             <= "+std_logic_cst(_param->_size_inst_ifetch_ptr,0)+";");
     109      vhdl->set_body   (3,"reg_PC_NEXT_BRANCH_STATE                <= "+std_logic_cst(_param->_size_branch_state   ,0)+";");
     110      if (_param->_have_port_depth)
     111      vhdl->set_body   (3,"reg_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID <= "+std_logic_cst(_param->_size_depth          ,0)+";");
     112      vhdl->set_body   (3,"reg_PC_NEXT_NEXT_VAL                    <= '0';");
     113#ifdef SYSTEMC_VHDL_COMPATIBILITY
     114      vhdl->set_body   (3,"reg_PC_NEXT_NEXT                        <= "+std_logic_cst(_param->_size_instruction_address,0)+";");
     115#endif
     116    }
     117    vhdl->set_body   (3,"");
     118    vhdl->set_body   (2,"else");
     119
     120    vhdl->set_body   (3,"var_PC_ACCESS_VAL                            := reg_PC_ACCESS_VAL                            ;");
     121    vhdl->set_body   (3,"var_PC_ACCESS                                := reg_PC_ACCESS                                ;");
     122    vhdl->set_body   (3,"var_PC_ACCESS_IS_DS_TAKE                     := reg_PC_ACCESS_IS_DS_TAKE                     ;");
     123    vhdl->set_body   (3,"var_PC_ACCESS_INSTRUCTION_ENABLE             := reg_PC_ACCESS_INSTRUCTION_ENABLE             ;");
     124    if (_param->_have_port_inst_ifetch_ptr)
     125    vhdl->set_body   (3,"var_PC_ACCESS_INST_IFETCH_PTR                := reg_PC_ACCESS_INST_IFETCH_PTR                ;");
     126    vhdl->set_body   (3,"var_PC_ACCESS_BRANCH_STATE                   := reg_PC_ACCESS_BRANCH_STATE                   ;");
     127    if (_param->_have_port_depth)
     128    vhdl->set_body   (3,"var_PC_ACCESS_BRANCH_UPDATE_PREDICTION_ID    := reg_PC_ACCESS_BRANCH_UPDATE_PREDICTION_ID    ;");
     129    vhdl->set_body   (3,"");
     130    vhdl->set_body   (3,"var_PC_CURRENT_VAL                           := reg_PC_CURRENT_VAL                           ;");
     131    vhdl->set_body   (3,"var_PC_CURRENT                               := reg_PC_CURRENT                               ;");
     132    vhdl->set_body   (3,"var_PC_CURRENT_IS_DS_TAKE                    := reg_PC_CURRENT_IS_DS_TAKE                    ;");
     133    vhdl->set_body   (3,"var_PC_CURRENT_INSTRUCTION_ENABLE            := reg_PC_CURRENT_INSTRUCTION_ENABLE            ;");
     134    if (_param->_have_port_inst_ifetch_ptr)
     135    vhdl->set_body   (3,"var_PC_CURRENT_INST_IFETCH_PTR               := reg_PC_CURRENT_INST_IFETCH_PTR               ;");
     136    vhdl->set_body   (3,"var_PC_CURRENT_BRANCH_STATE                  := reg_PC_CURRENT_BRANCH_STATE                  ;");
     137    if (_param->_have_port_depth)
     138    vhdl->set_body   (3,"var_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID   := reg_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID   ;");
     139    vhdl->set_body   (3,"");
     140    vhdl->set_body   (3,"var_PC_NEXT_VAL                              := reg_PC_NEXT_VAL                              ;");
     141    vhdl->set_body   (3,"var_PC_NEXT                                  := reg_PC_NEXT                                  ;");
     142    vhdl->set_body   (3,"var_PC_NEXT_IS_DS_TAKE                       := reg_PC_NEXT_IS_DS_TAKE                       ;");
     143    vhdl->set_body   (3,"var_PC_NEXT_INSTRUCTION_ENABLE               := reg_PC_NEXT_INSTRUCTION_ENABLE               ;");
     144    if (_param->_have_port_inst_ifetch_ptr)
     145    vhdl->set_body   (3,"var_PC_NEXT_INST_IFETCH_PTR                  := reg_PC_NEXT_INST_IFETCH_PTR                  ;");
     146    vhdl->set_body   (3,"var_PC_NEXT_BRANCH_STATE                     := reg_PC_NEXT_BRANCH_STATE                     ;");
     147    if (_param->_have_port_depth)
     148    vhdl->set_body   (3,"var_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID      := reg_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID      ;");
     149    vhdl->set_body   (3,"");
     150    vhdl->set_body   (3,"var_PC_NEXT_NEXT_VAL                         := reg_PC_NEXT_NEXT_VAL                         ;");
     151    vhdl->set_body   (3,"var_PC_NEXT_NEXT                             := reg_PC_NEXT_NEXT                             ;");
     152    vhdl->set_body   (3,"var_PC_NEXT_NEXT_IS_DS_TAKE                  := reg_PC_NEXT_NEXT_IS_DS_TAKE                  ;");
     153//  vhdl->set_body   (3,"var_PC_NEXT_NEXT_INSTRUCTION_ENABLE          := reg_PC_NEXT_NEXT_INSTRUCTION_ENABLE          ;");
     154//  if (_param->_have_port_inst_ifetch_ptr)
     155//  vhdl->set_body   (3,"var_PC_NEXT_NEXT_INST_IFETCH_PTR             := reg_PC_NEXT_NEXT_INST_IFETCH_PTR             ;");
     156//  vhdl->set_body   (3,"var_PC_NEXT_NEXT_BRANCH_STATE                := reg_PC_NEXT_NEXT_BRANCH_STATE                ;");
     157//  if (_param->_have_port_depth)
     158//  vhdl->set_body   (3,"var_PC_NEXT_NEXT_BRANCH_UPDATE_PREDICTION_ID := reg_PC_NEXT_NEXT_BRANCH_UPDATE_PREDICTION_ID ;");
     159
     160    {
     161      vhdl->set_comment(3,"=========================================");
     162      vhdl->set_comment(3,"===== PREDICT ===========================");
     163      vhdl->set_comment(3,"=========================================");
     164
     165      vhdl->set_body   (3,"if ((internal_PREDICT_VAL and in_PREDICT_ACK) = '1') then");
     166      vhdl->set_body   (4,"if (var_PC_NEXT_IS_DS_TAKE = '1') then");
     167      if (_param->_have_port_inst_ifetch_ptr)
     168      vhdl->set_body   (5,"var_PC_CURRENT_INST_IFETCH_PTR             := in_PREDICT_INST_IFETCH_PTR;");
     169      vhdl->set_body   (5,"var_PC_CURRENT_BRANCH_STATE                := in_PREDICT_BRANCH_STATE;");
     170      if (_param->_have_port_depth)
     171      vhdl->set_body   (5,"var_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID := in_PREDICT_BRANCH_UPDATE_PREDICTION_ID;");
     172      vhdl->set_body   (5,"else");
     173      if (_param->_have_port_inst_ifetch_ptr)
     174      vhdl->set_body   (5,"var_PC_NEXT_INST_IFETCH_PTR                := in_PREDICT_INST_IFETCH_PTR;");
     175      vhdl->set_body   (5,"var_PC_NEXT_BRANCH_STATE                   := in_PREDICT_BRANCH_STATE;");
     176      if (_param->_have_port_depth)
     177      vhdl->set_body   (5,"var_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID    := in_PREDICT_BRANCH_UPDATE_PREDICTION_ID;");
     178      vhdl->set_body   (4,"end if;");
     179
     180      vhdl->set_body   (4,"var_PC_NEXT_NEXT_VAL                       := '1'; -- address is valid");
     181      vhdl->set_body   (4,"var_PC_NEXT_NEXT                           := in_PREDICT_PC_NEXT;");
     182      vhdl->set_body   (4,"var_PC_NEXT_NEXT_IS_DS_TAKE                := in_PREDICT_PC_NEXT_IS_DS_TAKE;");
     183      for (uint32_t i=0; i<_param->_nb_instruction; i++)
     184      vhdl->set_body   (4,"var_PC_NEXT_INSTRUCTION_ENABLE("+toString(i)+") := in_PREDICT_"+toString(i)+"_INSTRUCTION_ENABLE;");     
     185
     186      vhdl->set_body   (3,"end if;");
     187    }
     188
     189    {
     190      vhdl->set_comment(3,"=========================================");
     191      vhdl->set_comment(3,"===== ADDRESS ===========================");
     192      vhdl->set_comment(3,"=========================================");
     193
     194      vhdl->set_body   (3,"if ((internal_ADDRESS_VAL and in_ADDRESS_ACK) = '1') then");
     195
     196      vhdl->set_body   (4,"var_PC_ACCESS_VAL := '0'; -- transaction with icache");
     197
     198      vhdl->set_body   (3,"end if;");
     199    }
     200
     201    {
     202      vhdl->set_comment(3,"=========================================");
     203      vhdl->set_comment(3,"===== Shift Register ====================");
     204      vhdl->set_comment(3,"=========================================");
     205
     206      vhdl->set_body   (3,"if ((var_PC_NEXT_NEXT_VAL and var_PC_NEXT_VAL and var_PC_CURRENT_VAL and not var_PC_ACCESS_VAL) = '1') then");
     207      vhdl->set_body   (4,"var_PC_ACCESS_VAL                          := '1'; -- new request");
     208      vhdl->set_body   (4,"var_PC_CURRENT_VAL                         := '0'; -- invalid current");
     209      vhdl->set_body   (4,"var_PC_ACCESS                              := var_PC_CURRENT;");
     210      vhdl->set_body   (4,"var_PC_ACCESS_IS_DS_TAKE                   := var_PC_CURRENT_IS_DS_TAKE;");
     211      if (_param->_have_port_inst_ifetch_ptr)
     212      vhdl->set_body   (4,"var_PC_ACCESS_INST_IFETCH_PTR              := var_PC_CURRENT_INST_IFETCH_PTR;");
     213      vhdl->set_body   (4,"var_PC_ACCESS_BRANCH_STATE                 := var_PC_CURRENT_BRANCH_STATE;");
     214      if (_param->_have_port_depth)
     215      vhdl->set_body   (4,"var_PC_ACCESS_BRANCH_UPDATE_PREDICTION_ID  := var_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID;");
     216//    for (uint32_t i=0; i<_param->_nb_instruction; i++)
     217//    vhdl->set_body   (4,"var_PC_ACCESS_INSTRUCTION_ENABLE("+toString(i)+") := var_PC_CURRENT_INSTRUCTION_ENABLE("+toString(i)+");");
     218      vhdl->set_body   (4,"var_PC_ACCESS_INSTRUCTION_ENABLE           := var_PC_CURRENT_INSTRUCTION_ENABLE;");
     219      vhdl->set_body   (3,"end if;");
     220
     221      vhdl->set_body   (3,"if ((var_PC_NEXT_NEXT_VAL and var_PC_NEXT_VAL and not var_PC_CURRENT_VAL) = '1') then");
     222      vhdl->set_body   (4,"var_PC_CURRENT_VAL                         := '1'; -- new request");
     223      vhdl->set_body   (4,"var_PC_NEXT_VAL                            := '0'; -- invalid next");
     224      vhdl->set_body   (4,"var_PC_CURRENT                             := var_PC_NEXT;");
     225      vhdl->set_body   (4,"var_PC_CURRENT_IS_DS_TAKE                  := var_PC_NEXT_IS_DS_TAKE;");
     226      if (_param->_have_port_inst_ifetch_ptr)
     227      vhdl->set_body   (4,"var_PC_CURRENT_INST_IFETCH_PTR             := var_PC_NEXT_INST_IFETCH_PTR;");
     228      vhdl->set_body   (4,"var_PC_CURRENT_BRANCH_STATE                := var_PC_NEXT_BRANCH_STATE;");
     229      if (_param->_have_port_depth)
     230      vhdl->set_body   (4,"var_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID := var_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID;");
     231//    for (uint32_t i=0; i<_param->_nb_instruction; i++)
     232//    vhdl->set_body   (4,"var_PC_CURRENT_INSTRUCTION_ENABLE("+toString(i)+") := var_PC_NEXT_INSTRUCTION_ENABLE("+toString(i)+");");
     233      vhdl->set_body   (4,"var_PC_CURRENT_INSTRUCTION_ENABLE          := var_PC_NEXT_INSTRUCTION_ENABLE;");
     234      vhdl->set_body   (3,"end if;");
     235
     236      vhdl->set_body   (3,"if ((var_PC_NEXT_NEXT_VAL and not var_PC_NEXT_VAL) = '1') then");
     237      vhdl->set_body   (4,"var_PC_NEXT_VAL                            := '1'; -- new request");
     238      vhdl->set_body   (4,"var_PC_NEXT_NEXT_VAL                       := '0'; -- invalid next_next");
     239      vhdl->set_body   (4,"var_PC_NEXT                                := var_PC_NEXT_NEXT;");
     240      vhdl->set_body   (4,"var_PC_NEXT_IS_DS_TAKE                     := var_PC_NEXT_NEXT_IS_DS_TAKE;");
     241//    if (_param->_have_port_inst_ifetch_ptr)
     242//    vhdl->set_body   (4,"var_PC_NEXT_INST_IFETCH_PTR                := var_PC_NEXT_NEXT_INST_IFETCH_PTR;");
     243//    vhdl->set_body   (4,"var_PC_NEXT_BRANCH_STATE                   := var_PC_NEXT_NEXT_BRANCH_STATE;");
     244//    if (_param->_have_port_depth)
     245//    vhdl->set_body   (4,"var_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID    := var_PC_NEXT_NEXT_BRANCH_UPDATE_PREDICTION_ID;");
     246//    for (uint32_t i=0; i<_param->_nb_instruction; i++)
     247//    vhdl->set_body   (4,"var_PC_NEXT_INSTRUCTION_ENABLE("+toString(i)+") := var_PC_NEXT_NEXT_INSTRUCTION_ENABLE("+toString(i)+");");
     248//    vhdl->set_body   (4,"var_PC_NEXT_INSTRUCTION_ENABLE             := var_PC_NEXT_NEXT_INSTRUCTION_ENABLE;");
     249      vhdl->set_body   (3,"end if;");
     250    }
     251
     252    {
     253      vhdl->set_comment(3,"=========================================");
     254      vhdl->set_comment(3,"===== EVENT =============================");
     255      vhdl->set_comment(3,"=========================================");
     256
     257      vhdl->set_body   (3,"if ((in_EVENT_VAL and internal_EVENT_ACK) = '1') then");
     258      vhdl->set_body   (4,"var_PC_ACCESS_VAL                       := '0';");
     259      vhdl->set_body   (4,"var_PC_CURRENT_VAL                      := '0';");
     260      vhdl->set_body   (4,"var_PC_NEXT_VAL                         := '1';");
     261      vhdl->set_body   (4,"var_PC_NEXT                             := in_EVENT_ADDRESS;");
     262      vhdl->set_body   (4,"var_PC_NEXT_IS_DS_TAKE                  := in_EVENT_IS_DS_TAKE;");
     263
     264      if (is_power2(_param->_nb_instruction))
     265        {
     266          uint32_t    size  = log2(_param->_nb_instruction);
     267
     268          if (size != 0)
     269            {
     270              std::string range = "var_PC_NEXT"+std_logic_range(size-1,0);
     271             
     272              for (uint32_t i=0; i<_param->_nb_instruction; i++)
     273                {
     274                  vhdl->set_body   (4,"if ("+range+" = "+std_logic_cst(size,i)+") then");
     275                  vhdl->set_body   (4,"var_PC_NEXT_INSTRUCTION_ENABLE("+toString(i)+") := '1';");
     276                  vhdl->set_body   (4,"else");
     277                  vhdl->set_body   (4,"var_PC_NEXT_INSTRUCTION_ENABLE("+toString(i)+") := '0';");
     278                  vhdl->set_body   (4,"end if;");
     279                }
     280            }
     281          else
     282            vhdl->set_body   (4,"var_PC_NEXT_INSTRUCTION_ENABLE(0) := '1';");
     283        }
     284      else
     285        {
     286          throw ERRORMORPHEO(FUNCTION,_("Not Yet supported, Comming Soon."));
     287        }
     288 
     289      vhdl->set_body   (4,"var_PC_NEXT_NEXT_VAL                    := in_EVENT_ADDRESS_NEXT_VAL;");
     290      vhdl->set_body   (4,"var_PC_NEXT_NEXT                        := in_EVENT_ADDRESS_NEXT;");
     291      vhdl->set_body   (4,"var_PC_NEXT_NEXT_IS_DS_TAKE             := '0';");
     292     
     293      vhdl->set_body   (3,"end if;");
     294    }
     295
     296    vhdl->set_comment(3,"---------------------------------------------------------------------------");
     297    vhdl->set_comment(3,"WRITE Register");
     298    vhdl->set_comment(3,"---------------------------------------------------------------------------");
     299
     300    vhdl->set_body   (3,"reg_PC_ACCESS_VAL                            <= var_PC_ACCESS_VAL                            ;");
     301    vhdl->set_body   (3,"reg_PC_ACCESS                                <= var_PC_ACCESS                                ;");
     302    vhdl->set_body   (3,"reg_PC_ACCESS_IS_DS_TAKE                     <= var_PC_ACCESS_IS_DS_TAKE                     ;");
     303    vhdl->set_body   (3,"reg_PC_ACCESS_INSTRUCTION_ENABLE             <= var_PC_ACCESS_INSTRUCTION_ENABLE             ;");
     304    if (_param->_have_port_inst_ifetch_ptr)
     305    vhdl->set_body   (3,"reg_PC_ACCESS_INST_IFETCH_PTR                <= var_PC_ACCESS_INST_IFETCH_PTR                ;");
     306    vhdl->set_body   (3,"reg_PC_ACCESS_BRANCH_STATE                   <= var_PC_ACCESS_BRANCH_STATE                   ;");
     307    if (_param->_have_port_depth)
     308    vhdl->set_body   (3,"reg_PC_ACCESS_BRANCH_UPDATE_PREDICTION_ID    <= var_PC_ACCESS_BRANCH_UPDATE_PREDICTION_ID    ;");
     309    vhdl->set_body   (3,"");
     310    vhdl->set_body   (3,"reg_PC_CURRENT_VAL                           <= var_PC_CURRENT_VAL                           ;");
     311    vhdl->set_body   (3,"reg_PC_CURRENT                               <= var_PC_CURRENT                               ;");
     312    vhdl->set_body   (3,"reg_PC_CURRENT_IS_DS_TAKE                    <= var_PC_CURRENT_IS_DS_TAKE                    ;");
     313    vhdl->set_body   (3,"reg_PC_CURRENT_INSTRUCTION_ENABLE            <= var_PC_CURRENT_INSTRUCTION_ENABLE            ;");
     314    if (_param->_have_port_inst_ifetch_ptr)
     315    vhdl->set_body   (3,"reg_PC_CURRENT_INST_IFETCH_PTR               <= var_PC_CURRENT_INST_IFETCH_PTR               ;");
     316    vhdl->set_body   (3,"reg_PC_CURRENT_BRANCH_STATE                  <= var_PC_CURRENT_BRANCH_STATE                  ;");
     317    if (_param->_have_port_depth)
     318    vhdl->set_body   (3,"reg_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID   <= var_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID   ;");
     319    vhdl->set_body   (3,"");
     320    vhdl->set_body   (3,"reg_PC_NEXT_VAL                              <= var_PC_NEXT_VAL                              ;");
     321    vhdl->set_body   (3,"reg_PC_NEXT                                  <= var_PC_NEXT                                  ;");
     322    vhdl->set_body   (3,"reg_PC_NEXT_IS_DS_TAKE                       <= var_PC_NEXT_IS_DS_TAKE                       ;");
     323    vhdl->set_body   (3,"reg_PC_NEXT_INSTRUCTION_ENABLE               <= var_PC_NEXT_INSTRUCTION_ENABLE               ;");
     324    if (_param->_have_port_inst_ifetch_ptr)
     325    vhdl->set_body   (3,"reg_PC_NEXT_INST_IFETCH_PTR                  <= var_PC_NEXT_INST_IFETCH_PTR                  ;");
     326    vhdl->set_body   (3,"reg_PC_NEXT_BRANCH_STATE                     <= var_PC_NEXT_BRANCH_STATE                     ;");
     327    if (_param->_have_port_depth)
     328    vhdl->set_body   (3,"reg_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID      <= var_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID      ;");
     329    vhdl->set_body   (3,"");
     330    vhdl->set_body   (3,"reg_PC_NEXT_NEXT_VAL                         <= var_PC_NEXT_NEXT_VAL                         ;");
     331    vhdl->set_body   (3,"reg_PC_NEXT_NEXT                             <= var_PC_NEXT_NEXT                             ;");
     332    vhdl->set_body   (3,"reg_PC_NEXT_NEXT_IS_DS_TAKE                  <= var_PC_NEXT_NEXT_IS_DS_TAKE                  ;");
     333//  vhdl->set_body   (3,"reg_PC_NEXT_NEXT_INSTRUCTION_ENABLE          <= var_PC_NEXT_NEXT_INSTRUCTION_ENABLE          ;");
     334//  if (_param->_have_port_inst_ifetch_ptr)
     335//  vhdl->set_body   (3,"reg_PC_NEXT_NEXT_INST_IFETCH_PTR             <= var_PC_NEXT_NEXT_INST_IFETCH_PTR             ;");
     336//  vhdl->set_body   (3,"reg_PC_NEXT_NEXT_BRANCH_STATE                <= var_PC_NEXT_NEXT_BRANCH_STATE                ;");
     337//  if (_param->_have_port_depth)
     338//  vhdl->set_body   (3,"reg_PC_NEXT_NEXT_BRANCH_UPDATE_PREDICTION_ID <= var_PC_NEXT_NEXT_BRANCH_UPDATE_PREDICTION_ID ;");
     339
     340
     341    vhdl->set_body   (2,"end if; -- reset");
     342    vhdl->set_body   (1,"end if; -- clock");
     343    vhdl->set_body   (0,"end process; -- TRANSITION");
     344
     345    vhdl->set_comment(0,"=========================================");
     346    vhdl->set_comment(0,"===== ADDRESS ===========================");
     347    vhdl->set_comment(0,"=========================================");
     348
     349    vhdl->set_body   (0,"internal_ADDRESS_VAL                   <= reg_PC_ACCESS_VAL;");
     350    vhdl->set_body   (0,"     out_ADDRESS_VAL                   <= internal_ADDRESS_VAL;");
     351
     352    if (is_power2(_param->_nb_instruction))
     353      {
     354        uint32_t    size  = log2(_param->_nb_instruction);
     355
     356        vhdl->set_body   (0,"out_ADDRESS_INSTRUCTION_ADDRESS        <= reg_PC_ACCESS and not "+std_logic_cst(_param->_size_instruction_address,(1<<size)-1)+";");
     357      }
     358    else
     359      {
     360        throw ERRORMORPHEO(FUNCTION,_("Not Yet supported, Comming Soon."));
     361      }
     362
     363
     364    if (_param->_have_port_inst_ifetch_ptr)
     365    vhdl->set_body   (0,"out_ADDRESS_INST_IFETCH_PTR            <= reg_PC_ACCESS_INST_IFETCH_PTR;");
     366    vhdl->set_body   (0,"out_ADDRESS_BRANCH_STATE               <= reg_PC_ACCESS_BRANCH_STATE;");
     367    if (_param->_have_port_depth)
     368    vhdl->set_body   (0,"out_ADDRESS_BRANCH_UPDATE_PREDICTION_ID<= reg_PC_ACCESS_BRANCH_UPDATE_PREDICTION_ID;");
     369    for (uint32_t i=0; i<_param->_nb_instruction; i++)
     370    vhdl->set_body   (0,"out_ADDRESS_"+toString(i)+"_INSTRUCTION_ENABLE <= reg_PC_ACCESS_INSTRUCTION_ENABLE ("+toString(i)+");");
     371
     372    vhdl->set_comment(0,"=========================================");
     373    vhdl->set_comment(0,"===== PREDICT ===========================");
     374    vhdl->set_comment(0,"=========================================");
     375
     376    vhdl->set_body   (0,"internal_PREDICT_VAL              <= not reg_PC_NEXT_NEXT_VAL;");
     377    vhdl->set_body   (0,"     out_PREDICT_VAL              <= internal_PREDICT_VAL;  ");
     378    vhdl->set_body   (0,"out_PREDICT_PC_PREVIOUS           <= reg_PC_CURRENT;        ");
     379    vhdl->set_body   (0,"out_PREDICT_PC_CURRENT            <= reg_PC_NEXT;           ");
     380    vhdl->set_body   (0,"out_PREDICT_PC_CURRENT_IS_DS_TAKE <= reg_PC_NEXT_IS_DS_TAKE;");
     381
    26382    log_printf(FUNC,Address_management,FUNCTION,"End");
    27383  };

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/src/Address_management_vhdl_declaration.cpp

    r81 r135  
    2323  {
    2424    log_printf(FUNC,Address_management,FUNCTION,"Begin");
     25
     26    vhdl->set_type    ("Tinstruction_enable  ","array "+_std_logic_range(_param->_nb_instruction)+" of std_logic");
     27
     28    vhdl->set_signal  ("reg_PC_ACCESS_VAL                           ", 1);
     29    vhdl->set_signal  ("reg_PC_ACCESS                               ", _param->_size_instruction_address);
     30    vhdl->set_signal  ("reg_PC_ACCESS_IS_DS_TAKE                    ", 1);
     31    vhdl->set_signal  ("reg_PC_ACCESS_INSTRUCTION_ENABLE            ", "Tinstruction_enable");
     32    if (_param->_have_port_inst_ifetch_ptr)
     33    vhdl->set_signal  ("reg_PC_ACCESS_INST_IFETCH_PTR               ", _param->_size_inst_ifetch_ptr);
     34    vhdl->set_signal  ("reg_PC_ACCESS_BRANCH_STATE                  ", _param->_size_branch_state);
     35    if (_param->_have_port_depth)
     36    vhdl->set_signal  ("reg_PC_ACCESS_BRANCH_UPDATE_PREDICTION_ID   ", _param->_size_depth);
     37
     38
     39    vhdl->set_signal  ("reg_PC_CURRENT_VAL                          ", 1);
     40    vhdl->set_signal  ("reg_PC_CURRENT                              ", _param->_size_instruction_address);
     41    vhdl->set_signal  ("reg_PC_CURRENT_IS_DS_TAKE                   ", 1);
     42    vhdl->set_signal  ("reg_PC_CURRENT_INSTRUCTION_ENABLE           ", "Tinstruction_enable");
     43    if (_param->_have_port_inst_ifetch_ptr)
     44    vhdl->set_signal  ("reg_PC_CURRENT_INST_IFETCH_PTR              ",_param->_size_inst_ifetch_ptr);
     45    vhdl->set_signal  ("reg_PC_CURRENT_BRANCH_STATE                 ", _param->_size_branch_state);
     46    if (_param->_have_port_depth)
     47    vhdl->set_signal  ("reg_PC_CURRENT_BRANCH_UPDATE_PREDICTION_ID  ", _param->_size_depth);
     48
     49    vhdl->set_signal  ("reg_PC_NEXT_VAL                             ", 1);
     50    vhdl->set_signal  ("reg_PC_NEXT                                 ", _param->_size_instruction_address);
     51    vhdl->set_signal  ("reg_PC_NEXT_IS_DS_TAKE                      ", 1);
     52    vhdl->set_signal  ("reg_PC_NEXT_INSTRUCTION_ENABLE              ", "Tinstruction_enable");
     53    if (_param->_have_port_inst_ifetch_ptr)
     54    vhdl->set_signal  ("reg_PC_NEXT_INST_IFETCH_PTR                 ",_param->_size_inst_ifetch_ptr);
     55    vhdl->set_signal  ("reg_PC_NEXT_BRANCH_STATE                    ", _param->_size_branch_state);
     56    if (_param->_have_port_depth)
     57    vhdl->set_signal  ("reg_PC_NEXT_BRANCH_UPDATE_PREDICTION_ID     ", _param->_size_depth);
     58
     59    vhdl->set_signal  ("reg_PC_NEXT_NEXT_VAL                        ", 1);
     60    vhdl->set_signal  ("reg_PC_NEXT_NEXT                            ", _param->_size_instruction_address);
     61    vhdl->set_signal  ("reg_PC_NEXT_NEXT_IS_DS_TAKE                 ", 1);
     62//  vhdl->set_signal  ("reg_PC_NEXT_NEXT_INSTRUCTION_ENABLE         ", "Tinstruction_enable");
     63//  if (_param->_have_port_inst_ifetch_ptr)
     64//  vhdl->set_signal  ("reg_PC_NEXT_NEXT_INST_IFETCH_PTR            ",_param->_size_inst_ifetch_ptr);
     65//  vhdl->set_signal  ("reg_PC_NEXT_NEXT_BRANCH_STATE               ", _param->_size_branch_state);
     66//  if (_param->_have_port_depth)
     67//  vhdl->set_signal  ("reg_PC_NEXT_NEXT_BRANCH_UPDATE_PREDICTION_ID", _param->_size_depth);
     68
     69    vhdl->set_signal  ("internal_PREDICT_VAL                        ", 1);
     70    vhdl->set_signal  ("internal_ADDRESS_VAL                        ", 1);
     71    vhdl->set_signal  ("internal_EVENT_ACK                          ", 1);
     72
    2573    log_printf(FUNC,Address_management,FUNCTION,"End");
    2674  };

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/include/Types.h

    r128 r135  
    2727      IFETCH_QUEUE_STATE_ERROR_WAIT_RSP   // A event occure -> flush the queue but, ack rsp
    2828    } ifetch_queue_state_t;
     29
     30#define IFETCH_QUEUE_STATE_SIZE 2
    2931
    3032  class ifetch_queue_entry_t

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_vhdl_body.cpp

    r81 r135  
    2323  {
    2424    log_printf(FUNC,Ifetch_queue,FUNCTION,"Begin");
    25     vhdl->set_body ("");
     25
     26    vhdl->set_comment(0,"=========================================");
     27    vhdl->set_comment(0,"===== CONSTANT ==========================");
     28    vhdl->set_comment(0,"=========================================");
     29    vhdl->set_body   (0,"");
     30    vhdl->set_body   (0,"internal_ICACHE_RSP_ACK                               <= '1';");
     31    vhdl->set_body   (0,"internal_EVENT_RESET_ACK                              <= '1';");
     32    vhdl->set_body   (0,"out_EVENT_RESET_ACK                                   <= '1';");
     33    vhdl->set_body   (0,"out_ICACHE_RSP_ACK                                    <= '1';");
     34    vhdl->set_body   (0,"");
     35    vhdl->set_comment(0,"---------------------------------------------------------------------------");
     36    vhdl->set_comment(0,"TRANSLATION ");
     37    vhdl->set_comment(0,"---------------------------------------------------------------------------");
     38    vhdl->set_body   (0,"TRANSITION : process (in_CLOCK)");
     39    vhdl->set_body   (0,"variable have_instruction_decod         : std_logic;");
     40    vhdl->set_body   (0,"variable have_instruction_enable        : std_logic;");
     41    //    vhdl->set_body   (0,"variable reg_INSTRUCTION_ENABLE_VAR     : std_logic;");
     42    if (_param->_size_queue>1) {
     43    vhdl->set_body   (0,"variable var_PTR_READ                   :"+ std_logic(log2(_param->_size_queue))+";");
     44    vhdl->set_body   (0,"variable var_PTR_WRITE                  :"+ std_logic(log2(_param->_size_queue))+";");
     45    }
     46//     vhdl->set_body   (0,"variable var_EMPTY                      : std_logic;");
     47    vhdl->set_body   (0,"variable var_STATE                      :  Tstate;");
     48    vhdl->set_body   (0,"variable var_INSTRUCTION_ENABLE         :  Tenable;");
     49    vhdl->set_body   (0,"variable var_ADDRESS                    :  Tadress;");
     50    if(_param->_have_port_inst_ifetch_ptr)
     51    vhdl->set_body   (0,"variable var_INST_IFETCH_PTR            : Tinst_ptr;");
     52    vhdl->set_body   (0,"variable var_BRANCH_STATE               : Tbranch_state;");
     53    if(_param->_have_port_depth)
     54    vhdl->set_body   (0,"variable var_BRANCH_UPDATE_PREDICTION_ID      : "+std_logic(_param->_size_depth)+";");
     55    //    vhdl->set_body   (0,"variable var_internal_ICACHE_RSP_ACK    : std_logic;");
     56    if (_param->_have_port_ifetch_queue_ptr)
     57    vhdl->set_body   (0,"variable var_internal_ICACHE_RSP_PACKET_ID    : "+std_logic(_param->_size_ifetch_queue_ptr)+";");
     58    vhdl->set_body   (0,"variable var_EXCEPTION                  : Texception;");
     59
     60
     61    vhdl->set_body   (0,"begin  -- TRANSITION");
     62    vhdl->set_body   (1,"if (in_CLOCK'event and in_CLOCK = '1')then");
     63    vhdl->set_body   (0,"");
     64    vhdl->set_comment(2,"---------------------------------------------------------------------------");
     65    vhdl->set_comment(2,"Reset");
     66    vhdl->set_comment(2,"---------------------------------------------------------------------------");
     67    vhdl->set_body   (2,"if (in_NRESET = '0') then");
     68    if (_param->_size_queue>1)
     69      {
     70        vhdl->set_body   (3,"reg_PTR_READ  <= "+std_logic_cst( log2(_param->_size_queue), 0)+";");
     71        vhdl->set_body   (3,"reg_PTR_WRITE <= "+std_logic_cst( log2(_param->_size_queue), 0)+";");
     72      }
     73//     vhdl->set_body     (3,"var_EMPTY := '1';");
     74   
     75    for (uint32_t i=0; i<_param->_size_queue; i++)
     76      {
     77        vhdl->set_body (3,"reg_STATE("+toString(i)+")  <= IFETCH_QUEUE_STATE_EMPTY;");
     78      }
     79
     80    vhdl->set_body   (3,"");
     81    vhdl->set_body   (2,"else");
     82    vhdl->set_body   (3,"");
     83    //    std::string write = (_param->_size_queue==1)?"0":"conv_integer(reg_PTR_WRITE)";
     84    //    vhdl->set_body (3,"var_STATE                                  := reg_STATE ("+write+");");
     85    vhdl->set_body (3,"var_STATE                                  := reg_STATE ;");
     86    if (_param->_size_queue>1)
     87      {
     88        vhdl->set_body   (3,"var_PTR_READ                           := reg_PTR_READ;");
     89        vhdl->set_body   (3,"var_PTR_WRITE                          := reg_PTR_WRITE;");
     90      }
     91
     92//     if (_param->_size_queue>1)
     93//       {
     94//     vhdl->set_body   (3,"var_EMPTY                       := reg_EMPTY                      ;");
     95//       }
     96    vhdl->set_body   (3,"var_INSTRUCTION_ENABLE          := reg_INSTRUCTION_ENABLE         ;");
     97    vhdl->set_body   (3,"var_ADDRESS                     := reg_ADDRESS                    ;");
     98    if(_param->_have_port_inst_ifetch_ptr)
     99    vhdl->set_body   (3,"var_INST_IFETCH_PTR             := reg_INST_IFETCH_PTR            ;");
     100    if (_param->_have_port_ifetch_queue_ptr)
     101      //    vhdl->set_body   (3,"var_BRANCH_UPDATE_PREDICTION_ID := reg_BRANCH_UPDATE_PREDICTION_ID;");
     102    vhdl->set_body   (3,"var_BRANCH_STATE                := reg_BRANCH_STATE               ;");
     103    vhdl->set_body   (3,"var_EXCEPTION                   := reg_EXCEPTION                  ;");
     104
     105    vhdl->set_comment(3,"---------------------------------------------------------------------------");
     106    vhdl->set_comment(3,"ADDRESS ");
     107    vhdl->set_comment(3,"---------------------------------------------------------------------------");
     108    {
     109    std::string reg_ptr_write = (_param->_size_queue==1)?"0":"conv_integer(reg_PTR_WRITE)";
     110    vhdl->set_body (3,"if ((in_ADDRESS_VAL and internal_ADDRESS_ACK) = '1') then");
     111    vhdl->set_body   (3,"var_STATE ("+reg_ptr_write+")              := IFETCH_QUEUE_STATE_WAIT_RSP;");
     112    for (uint32_t i=0; i<_param->_nb_instruction; i++)
     113    vhdl->set_body   (3,"var_INSTRUCTION_ENABLE ("+reg_ptr_write+")("+toString(i)+")   := in_address_"+toString(i)+"_instruction_enable;");
     114
     115    vhdl->set_body   (3,"var_ADDRESS("+reg_ptr_write+")                                := in_ADDRESS_INSTRUCTION_ADDRESS;");
     116    if(_param->_have_port_inst_ifetch_ptr)
     117      {
     118        vhdl->set_body   (3,"var_INST_IFETCH_PTR("+reg_ptr_write+")                    := in_ADDRESS_INST_IFETCH_PTR;");
     119      }
     120    vhdl->set_body   (3,"var_BRANCH_STATE("+reg_ptr_write+")                           := in_ADDRESS_BRANCH_STATE;");
     121    if(_param->_have_port_depth)
     122      vhdl->set_body   (3,"var_BRANCH_UPDATE_PREDICTION_ID          := in_ADDRESS_BRANCH_UPDATE_PREDICTION_ID;");
     123    if (_param->_size_queue>1)
     124      {
     125        vhdl->set_body   (3,"if (var_PTR_WRITE ="+std_logic_cst( log2(_param->_size_queue),_param->_size_queue-1)+") then");
     126        vhdl->set_body   (3,"var_PTR_WRITE                          := "+std_logic_cst( log2(_param->_size_queue), 0)+";");
     127        vhdl->set_body   (3,"else");
     128        if (_param->_size_ifetch_queue_ptr == 1)
     129        vhdl->set_body   (3,"var_PTR_WRITE                          := not var_PTR_WRITE;");
     130        else
     131        vhdl->set_body   (3,"var_PTR_WRITE                          := (var_PTR_WRITE +"+std_logic_cst( log2(_param->_size_queue),1)+");");
     132        vhdl->set_body (3,"end if;");
     133      }
     134    vhdl->set_body (3,"end if;");
     135    }
     136    vhdl->set_comment(3,"---------------------------------------------------------------------------");
     137    vhdl->set_comment(3,"DECOD ");
     138    vhdl->set_comment(3,"---------------------------------------------------------------------------");
     139   
     140//      have_instruction_decod <= ((internal_DECOD_0_VAL and in_DECOD_0_ACK) or
     141//                                 (internal_DECOD_1_VAL and in_DECOD_1_ACK) or
     142//                                 (internal_DECOD_2_VAL and in_DECOD_2_ACK) or
     143//                                 (internal_DECOD_3_VAL and in_DECOD_3_ACK));
     144    vhdl->set_body   (3,"have_instruction_decod  := '0';");
     145    vhdl->set_body   (3,"have_instruction_enable := '0';");
     146    std::string reg_ptr_read = (_param->_size_queue==1)?"0":"conv_integer(reg_PTR_READ)";
     147    for (uint32_t i=0; i<_param->_nb_instruction; i++)
     148      {
     149        vhdl->set_body (3,"if ((internal_DECOD_"+toString(i)+"_VAL and in_DECOD_"+toString(i)+"_ACK) = '1') then");
     150        vhdl->set_body (4,"have_instruction_decod                    := '1';");
     151        vhdl->set_body (4,"var_INSTRUCTION_ENABLE ("+reg_ptr_read+")("+toString(i)+")  := '0';");
     152        vhdl->set_body (3,"end if;");
     153        vhdl->set_body (4,"have_instruction_enable                   := have_instruction_enable or var_INSTRUCTION_ENABLE ("+reg_ptr_read+")("+toString(i)+");");
     154      }
     155    vhdl->set_body (3,"if (have_instruction_decod = '1') then");
     156    vhdl->set_body (3,"if (have_instruction_enable = '0') then");
     157    vhdl->set_body (4,"var_STATE ("+reg_ptr_read+")                  := IFETCH_QUEUE_STATE_EMPTY;");
     158   
     159    if(_param->_size_queue>1)
     160      {
     161        vhdl->set_body   (4,"if (var_PTR_READ ="+std_logic_cst( log2(_param->_size_queue),_param->_size_queue-1)+") then");
     162        vhdl->set_body   (4,"var_PTR_READ                            := "+std_logic_cst( log2(_param->_size_queue), 0)+";  else");
     163        if (_param->_size_ifetch_queue_ptr == 1)
     164        vhdl->set_body   (4,"var_PTR_READ                            := not var_PTR_READ;");
     165        else
     166        vhdl->set_body   (4,"var_PTR_READ                            := var_PTR_READ +"+std_logic_cst( log2(_param->_size_queue),1)+";");
     167        vhdl->set_body   (4,"end if;");
     168      }
     169    vhdl->set_body (3,"end if;");
     170    vhdl->set_body (3,"end if;");
     171   
     172    vhdl->set_comment(3,"---------------------------------------------------------------------------");
     173    vhdl->set_comment(3,"ICACHE_RSP ");
     174    vhdl->set_comment(3,"---------------------------------------------------------------------------");
     175       {       std::string address;
     176       if (_param->_have_port_ifetch_queue_ptr)
     177         {
     178           address="conv_integer(var_internal_ICACHE_RSP_PACKET_ID)";
     179         }
     180       else
     181         {
     182           address="0";
     183         }
     184       vhdl->set_body (3,"if ((in_ICACHE_RSP_VAL and internal_ICACHE_RSP_ACK)= '1') then");
     185       if (_param->_have_port_ifetch_queue_ptr)
     186         {
     187           vhdl->set_body(4,"var_internal_ICACHE_RSP_PACKET_ID      := in_ICACHE_RSP_PACKET_ID;");
     188         }
     189       for (uint32_t i=0; i<_param->_nb_instruction; i++)
     190         vhdl->set_body(3,"reg_DATA("+address+")("+toString(i)+") <= in_ICACHE_RSP_"+toString(i)+"_INSTRUCTION ;");
     191       
     192       vhdl->set_body(4,"if (in_ICACHE_RSP_ERROR                   = ICACHE_ERROR_NONE) then");
     193       vhdl->set_body(5,"var_EXCEPTION("+address+")               := EXCEPTION_IFETCH_NONE;");
     194       vhdl->set_body(4,"else if (in_ICACHE_RSP_ERROR              = ICACHE_ERROR_BUS_ERROR) then");
     195       vhdl->set_body(5,"var_EXCEPTION("+address+")               := EXCEPTION_IFETCH_BUS_ERROR;");
     196       vhdl->set_body (4,"end if;");
     197       vhdl->set_body (4,"end if;");
     198       vhdl->set_body(4,"if (var_STATE("+address+")                = IFETCH_QUEUE_STATE_WAIT_RSP) then");
     199       vhdl->set_body(5," var_STATE("+address+")                  := IFETCH_QUEUE_STATE_HAVE_RSP;");
     200       vhdl->set_body(4,"else if var_STATE("+address+")            = IFETCH_QUEUE_STATE_ERROR_WAIT_RSP then");
     201       vhdl->set_body(5," var_STATE("+address+")                  := IFETCH_QUEUE_STATE_EMPTY;");
     202       vhdl->set_body (4,"end if;");
     203       vhdl->set_body (4,"end if;");
     204       vhdl->set_body (3,"end if;");
     205     }
     206   
     207    vhdl->set_comment(3,"---------------------------------------------------------------------------");
     208    vhdl->set_comment(3,"EVENT_RESET");   
     209    vhdl->set_comment(3,"---------------------------------------------------------------------------");
     210    vhdl->set_body (3,"if ((in_EVENT_RESET_VAL and internal_EVENT_RESET_ACK) = '1' ) then");
     211    for (uint32_t i=0; i<_param->_size_queue; i++) {
     212      vhdl->set_body(4,"if (var_STATE("+toString(i)+")        = IFETCH_QUEUE_STATE_ERROR_WAIT_RSP) then ");
     213      vhdl->set_body(4,"var_STATE("+toString(i)+")           := IFETCH_QUEUE_STATE_ERROR_WAIT_RSP;");
     214      vhdl->set_body(4,"else if var_STATE("+toString(i)+")    = IFETCH_QUEUE_STATE_WAIT_RSP        then ");
     215      vhdl->set_body(4,"var_STATE("+toString(i)+")           := IFETCH_QUEUE_STATE_ERROR_WAIT_RSP;");
     216      vhdl->set_body(4,"else var_STATE("+toString(i)+")      := IFETCH_QUEUE_STATE_EMPTY;");
     217      if (_param->_size_queue>1)
     218        vhdl->set_body(5,"var_PTR_READ                    := var_PTR_WRITE;");
     219//       else
     220//      vhdl->set_body(5,"reg_EMPTY                       <= '1';");
     221
     222      vhdl->set_body(4,"end if;");
     223      vhdl->set_body(4,"end if;");
     224    }
     225    //vhdl->set_body (3,"end if;");
     226    vhdl->set_body (3,"end if;");
     227
     228    vhdl->set_comment(3,"---------------------------------------------------------------------------");
     229    vhdl->set_comment(3,"WRITE Register");
     230    vhdl->set_comment(3,"---------------------------------------------------------------------------");
     231    {
     232    if (_param->_size_queue>1) {
     233    vhdl->set_body (3,"reg_PTR_READ                                                <= var_PTR_READ;");
     234    vhdl->set_body (3,"reg_PTR_WRITE                                               <= var_PTR_WRITE;");
     235    }
     236//     vhdl->set_body (3,"reg_EMPTY                                                   <= var_EMPTY;");
     237    std::string reg_ptr_write = (_param->_size_queue==1)?"0":"conv_integer(reg_PTR_WRITE)";
     238    //    vhdl->set_body (3,"reg_STATE             ("+reg_ptr_write+")                   <= var_STATE;");
     239    vhdl->set_body (3,"reg_STATE                                                   <= var_STATE;");
     240    for (uint32_t i=0; i<_param->_nb_instruction; i++)
     241    vhdl->set_body (3,"reg_INSTRUCTION_ENABLE("+reg_ptr_write+")("+toString(i)+")  <= var_INSTRUCTION_ENABLE("+reg_ptr_write+")("+toString(i)+");");
     242    //    vhdl->set_body (3,"reg_ADDRESS           ("+reg_ptr_write+")                   <= var_ADDRESS;");
     243    vhdl->set_body (3,"reg_ADDRESS                                                 <= var_ADDRESS;");
     244    if(_param->_have_port_inst_ifetch_ptr)
     245      //    vhdl->set_body (3,"reg_INST_IFETCH_PTR   ("+reg_ptr_write+")                   <= var_INST_IFETCH_PTR;");
     246    vhdl->set_body (3,"reg_INST_IFETCH_PTR                                         <= var_INST_IFETCH_PTR;");
     247    //    vhdl->set_body (3,"reg_BRANCH_STATE      ("+reg_ptr_write+")                   <= var_BRANCH_STATE;");
     248    vhdl->set_body (3,"reg_BRANCH_STATE                                            <= var_BRANCH_STATE;");
     249    if(_param->_have_port_depth)
     250    vhdl->set_body (3,"reg_BRANCH_UPDATE_PREDICTION_ID("+reg_ptr_write+")          <= var_BRANCH_UPDATE_PREDICTION_ID;");
     251    if (_param->_size_queue>1)
     252    vhdl->set_body (3,"reg_PTR_WRITE                                               <= var_PTR_WRITE;");
     253
     254    std::string reg_ptr_read = (_param->_size_queue==1)?"0":"conv_integer(reg_PTR_READ)";
     255    for (uint32_t i=0; i<_param->_nb_instruction; i++)
     256    vhdl->set_body (3,"reg_INSTRUCTION_ENABLE("+reg_ptr_read+") ("+toString(i)+")  <= var_INSTRUCTION_ENABLE("+reg_ptr_read+")("+toString(i)+");");
     257    //    vhdl->set_body (3,"reg_STATE("+reg_ptr_read+")                                 <= var_STATE;");
     258    if(_param->_size_queue>1)
     259    vhdl->set_body (3,"reg_PTR_READ                                                <= var_PTR_READ ;");
     260    //    vhdl->set_body (3,"internal_ICACHE_RSP_ACK                                     <= internal_ICACHE_RSP_ACK;");
     261    if (_param->_have_port_ifetch_queue_ptr)
     262      {
     263    vhdl->set_body (3,"internal_ICACHE_RSP_PACKET_ID                               <= var_internal_ICACHE_RSP_PACKET_ID;");
     264    std::string address;
     265    if (_param->_have_port_ifetch_queue_ptr)
     266        address="conv_integer(var_internal_ICACHE_RSP_PACKET_ID)";
     267      else
     268        address="0";
     269    //    vhdl->set_body (3,"reg_EXCEPTION("+address+")                                  <= var_EXCEPTION;");
     270    vhdl->set_body (3,"reg_EXCEPTION                                               <= var_EXCEPTION;");
     271      }
     272    }
     273    vhdl->set_body (2,"end if;");
     274    vhdl->set_body (1,"end if;");
     275    vhdl->set_body (0,"end process; -- TRANSITION");
     276   
     277
     278     vhdl->set_comment(0,"---------------------------------------------------------------------------");
     279     vhdl->set_comment(0,"GENMOORE");
     280     vhdl->set_comment(0,"---------------------------------------------------------------------------");
     281     vhdl->set_comment(0,"---------------------------------------------------------------------------");
     282     vhdl->set_comment(0,"ADDRESS ");
     283     vhdl->set_comment(0,"---------------------------------------------------------------------------");
     284     {
     285       std::string reg_ptr_write = (_param->_size_queue==1)?"0":"conv_integer(reg_PTR_WRITE)";
     286       vhdl->set_body (1,"internal_ADDRESS_ACK          <= '1' WHEN (reg_STATE("+reg_ptr_write+") = IFETCH_QUEUE_STATE_EMPTY) ELSE");
     287       vhdl->set_body (1,"'0';");
     288       vhdl->set_body (1,"out_ADDRESS_ACK               <= internal_ADDRESS_ACK;");
     289       if (_param->_have_port_ifetch_queue_ptr) {
     290         vhdl->set_body (1,"out_ADDRESS_IFETCH_QUEUE_ID <= reg_PTR_WRITE;");
     291       }
     292     }
     293     vhdl->set_comment(0,"---------------------------------------------------------------------------");
     294     vhdl->set_comment(0,"DECOD ");
     295     vhdl->set_comment(0,"---------------------------------------------------------------------------");
     296     {
     297       std::string reg_ptr_read = (_param->_size_queue==1)?"0":"conv_integer(reg_PTR_READ)";
     298       vhdl->set_body (0,"internal_ack <= '1' WHEN (reg_STATE("+reg_ptr_read+") = IFETCH_QUEUE_STATE_HAVE_RSP) ELSE");
     299       vhdl->set_body (0,"'0';");
     300       for (uint32_t j=0; j<_param->_nb_instruction; j++)
     301         {
     302           vhdl->set_body(0,"internal_DECOD_"+toString(j)+"_VAL <= (internal_ack AND reg_INSTRUCTION_ENABLE("+reg_ptr_read+")("+toString(j)+"));");
     303           vhdl->set_body(0,"out_DECOD_"+toString(j)+"_VAL                   <= internal_DECOD_"+toString(j)+"_VAL;");
     304           vhdl->set_body(0,"out_DECOD_"+toString(j)+"_INSTRUCTION           <= reg_DATA("+reg_ptr_read+")("+toString(j)+") ;");
     305         }
     306       vhdl->set_body(0,"out_DECOD_ADDRESS                                   <= reg_ADDRESS("+reg_ptr_read+");");
     307       if (_param->_have_port_inst_ifetch_ptr)
     308         vhdl->set_body(0,"out_DECOD_INST_IFETCH_PTR                         <= reg_INST_IFETCH_PTR("+reg_ptr_read+");");
     309       vhdl->set_body(0,"out_DECOD_BRANCH_STATE                              <= reg_BRANCH_STATE("+reg_ptr_read+");");
     310       if (_param->_have_port_depth)
     311         vhdl->set_body(0,"out_DECOD_BRANCH_UPDATE_PREDICTION_ID             <= reg_BRANCH_UPDATE_PREDICTION_ID("+reg_ptr_read+");");
     312       vhdl->set_body(0,"out_DECOD_EXCEPTION                                 <= reg_EXCEPTION("+reg_ptr_read+");");
     313     }
     314     vhdl->set_body(0,"");
     315
    26316    log_printf(FUNC,Ifetch_queue,FUNCTION,"End");
    27317  };

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Ifetch_queue_vhdl_declaration.cpp

    r81 r135  
    2323  {
    2424    log_printf(FUNC,Ifetch_queue,FUNCTION,"Begin");
     25
     26    vhdl->set_constant ("IFETCH_QUEUE_STATE_EMPTY           ",IFETCH_QUEUE_STATE_SIZE,IFETCH_QUEUE_STATE_EMPTY);
     27//  vhdl->set_constant ("IFETCH_QUEUE_STATE_WAIT_REQ        ",IFETCH_QUEUE_STATE_SIZE,IFETCH_QUEUE_STATE_WAIT_REQ);
     28    vhdl->set_constant ("IFETCH_QUEUE_STATE_WAIT_RSP        ",IFETCH_QUEUE_STATE_SIZE,IFETCH_QUEUE_STATE_WAIT_RSP);
     29    vhdl->set_constant ("IFETCH_QUEUE_STATE_HAVE_RSP        ",IFETCH_QUEUE_STATE_SIZE,IFETCH_QUEUE_STATE_HAVE_RSP);
     30    vhdl->set_constant ("IFETCH_QUEUE_STATE_ERROR_WAIT_RSP  ",IFETCH_QUEUE_STATE_SIZE,IFETCH_QUEUE_STATE_ERROR_WAIT_RSP);
     31   
     32    vhdl->set_constant ("EXCEPTION_IFETCH_NONE              ",_param->_size_exception_ifetch,EXCEPTION_IFETCH_NONE);
     33    vhdl->set_constant ("EXCEPTION_IFETCH_BUS_ERROR         ",_param->_size_exception_ifetch,EXCEPTION_IFETCH_BUS_ERROR);
     34
     35    vhdl->set_constant ("ICACHE_ERROR_NONE                  ",_param->_size_icache_error,ICACHE_ERROR_NONE);   
     36    vhdl->set_constant ("ICACHE_ERROR_BUS_ERROR             ",_param->_size_icache_error,ICACHE_ERROR_BUS_ERROR);   
     37
     38    if (_param->_size_queue>1)
     39      {
     40    vhdl->set_signal  ("reg_PTR_READ                        ", log2(_param->_size_queue));
     41    vhdl->set_signal  ("reg_PTR_WRITE                       ", log2(_param->_size_queue));
     42      }
     43     if (_param->_have_port_ifetch_queue_ptr)
     44       {
     45         if (_param->_size_queue>1)
     46           vhdl->set_signal  ("reg_PACKET_PTR                 ", log2(_param->_size_queue));
     47         else
     48           vhdl->set_signal  ("reg_PACKET_PTR                 ", 1);
     49       }
     50
     51    vhdl->set_signal  ("reg_EMPTY                            ", 1);     
     52
     53    vhdl->set_type    ("Tcase                                ","array ("+toString(_param->_nb_instruction-1)+" downto 0) of "+std_logic(_param->_size_instruction));
     54    vhdl->set_type    ("Tcase_enable                         ","array ("+toString(_param->_nb_instruction-1)+" downto 0) of std_logic");
     55
     56    vhdl->set_type    ("Tstate                               ","array ("+toString(_param->_size_queue-1)+" downto 0) of "+std_logic(IFETCH_QUEUE_STATE_SIZE));
     57    vhdl->set_signal  ("reg_STATE                            ", "Tstate");
     58   
     59    vhdl->set_type    ("Tqueue                               ","array ("+toString(_param->_size_queue-1)+" downto 0) of Tcase");
     60    vhdl->set_signal  ("reg_DATA                             ", "Tqueue");
     61   
     62    vhdl->set_type    ("Tenable                              ","array ("+toString(_param->_size_queue-1)+" downto 0) of Tcase_enable");
     63    vhdl->set_signal  ("reg_INSTRUCTION_ENABLE               ", "Tenable");
     64    vhdl->set_type    ("Tadress                              ","array ("+toString(_param->_size_queue-1)+" downto 0) of "+std_logic(_param->_size_instruction));
     65    vhdl->set_signal  ("reg_ADDRESS                          ", "Tadress");
     66
     67    if (_param->_have_port_inst_ifetch_ptr)
     68      {
     69       vhdl->set_type    ("Tinst_ptr                         ","array ("+toString(_param->_size_queue-1)+" downto 0) of "+std_logic(_param->_size_inst_ifetch_ptr));
     70       vhdl->set_signal  ("reg_INST_IFETCH_PTR               ", "Tinst_ptr");
     71      }
     72    if (_param->_have_port_depth)
     73      {
     74        vhdl->set_type    ("Tbranch                           ","array ("+toString(_param->_size_queue-1)+" downto 0) of "+std_logic(_param->_size_depth));
     75        vhdl->set_signal  ("reg_BRANCH_UPDATE_PREDICTION_ID   ", "Tbranch");
     76      }
     77    vhdl->set_type    ("Tbranch_state                         ","array ("+toString(_param->_size_queue-1)+" downto 0) of "+std_logic(_param->_size_branch_state));
     78    vhdl->set_signal  ("reg_BRANCH_STATE                      ", "Tbranch_state");
     79    vhdl->set_type    ("Texception                            ","array ("+toString(_param->_size_queue-1)+" downto 0) of "+std_logic(_param->_size_exception_ifetch));
     80    vhdl->set_signal  ("reg_EXCEPTION                         ", "Texception");
     81   
     82    for (uint32_t i=0; i<_param->_nb_instruction; ++i)
     83    vhdl->set_signal  ("internal_DECOD_"+toString(i)+"_VAL                      ", 1);
     84    vhdl->set_signal  ("internal_ADDRESS_ACK                  ", 1);   
     85    vhdl->set_signal  ("internal_ICACHE_RSP_ACK               ", 1);
     86    vhdl->set_signal  ("internal_EVENT_RESET_ACK              ", 1);
     87    if(_param->_have_port_ifetch_queue_ptr)
     88    vhdl->set_signal  ("internal_ICACHE_RSP_PACKET_ID         ", _param->_size_ifetch_queue_ptr);
     89    vhdl->set_signal  ("internal_ack                          ", 1);
     90
    2591    log_printf(FUNC,Ifetch_queue,FUNCTION,"End");
    2692  };

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/src/Parameters.cpp

    r109 r135  
    3838      {
    3939        _size_instruction_address   = size_general_data;
    40         _size_ifetch_queue_ptr      = log2(size_queue);
     40        _size_ifetch_queue_ptr      = log2(_size_queue);
    4141        _size_inst_ifetch_ptr       = log2(nb_instruction);
    4242        _size_depth                 = size_branch_update_prediction;

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Register/src/Branch_Target_Buffer_Register_allocation.cpp

    r112 r135  
    7474      ALLOC2_SIGNAL_OUT(out_PREDICT_ADDRESS_SRC ,"address_src" ,Tgeneral_data_t    ,_param->_size_instruction_address);
    7575      ALLOC2_SIGNAL_OUT(out_PREDICT_ADDRESS_DEST,"address_dest",Tgeneral_data_t    ,_param->_size_instruction_address);
    76       ALLOC2_SIGNAL_OUT(out_PREDICT_CONDITION   ,"condition"   ,Tbranch_condition_t,_param->_size_branch_state);
     76      ALLOC2_SIGNAL_OUT(out_PREDICT_CONDITION   ,"condition"   ,Tbranch_condition_t,_param->_size_branch_condition);
    7777      ALLOC2_SIGNAL_OUT(out_PREDICT_LAST_TAKE   ,"last_take"   ,Tcontrol_t         ,1);
    7878      ALLOC2_SIGNAL_OUT(out_PREDICT_IS_ACCURATE ,"is_accurate" ,Tcontrol_t         ,1);
    … …  
    9696      ALLOC1_SIGNAL_IN ( in_DECOD_ADDRESS_SRC    ,"address_src"    ,Tgeneral_data_t    ,_param->_size_instruction_address);
    9797      ALLOC1_SIGNAL_IN ( in_DECOD_ADDRESS_DEST   ,"address_dest"   ,Tgeneral_data_t    ,_param->_size_instruction_address);
    98       ALLOC1_SIGNAL_IN ( in_DECOD_CONDITION      ,"condition"      ,Tbranch_condition_t,_param->_size_branch_state);
     98      ALLOC1_SIGNAL_IN ( in_DECOD_CONDITION      ,"condition"      ,Tbranch_condition_t,_param->_size_branch_condition);
    9999      ALLOC1_SIGNAL_IN ( in_DECOD_LAST_TAKE      ,"last_take"      ,Tcontrol_t         ,1);
    100100      ALLOC1_SIGNAL_IN ( in_DECOD_MISS_PREDICTION,"miss_prediction",Tcontrol_t         ,1);
    … …  
    119119      ALLOC1_SIGNAL_IN ( in_UPDATE_ADDRESS_SRC    ,"address_src"    ,Tgeneral_data_t    ,_param->_size_instruction_address);
    120120      ALLOC1_SIGNAL_IN ( in_UPDATE_ADDRESS_DEST   ,"address_dest"   ,Tgeneral_data_t    ,_param->_size_instruction_address);
    121       ALLOC1_SIGNAL_IN ( in_UPDATE_CONDITION      ,"condition"      ,Tbranch_condition_t,_param->_size_branch_state);
     121      ALLOC1_SIGNAL_IN ( in_UPDATE_CONDITION      ,"condition"      ,Tbranch_condition_t,_param->_size_branch_condition);
    122122      ALLOC1_SIGNAL_IN ( in_UPDATE_LAST_TAKE      ,"last_take"      ,Tcontrol_t         ,1);
    123123      ALLOC1_SIGNAL_IN ( in_UPDATE_MISS_PREDICTION,"miss_prediction",Tcontrol_t         ,1);

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp

    r134 r135  
    156156//    ALLOC1_SIGNAL_IN ( in_COMMIT_OPERATION         ,"operation"  ,Toperation_t      ,_param->_size_operation       );
    157157//    ALLOC1_SIGNAL_IN ( in_COMMIT_TYPE              ,"type"       ,Ttype_t           ,_param->_size_type            );
    158       ALLOC1_SIGNAL_IN ( in_COMMIT_FLAGS             ,"flags"      ,Tspecial_data_t   ,_param->_size_general_data    );
     158      ALLOC1_SIGNAL_IN ( in_COMMIT_FLAGS             ,"flags"      ,Tspecial_data_t   ,_param->_size_special_data    );
    159159      ALLOC1_SIGNAL_IN ( in_COMMIT_EXCEPTION         ,"exception"  ,Texception_t      ,_param->_size_exception       );
    160160      ALLOC1_SIGNAL_IN ( in_COMMIT_NO_SEQUENCE       ,"no_sequence",Tcontrol_t        ,1                             );

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/include/Stat_List_unit.h

    r131 r135  
    3636namespace register_translation_unit {
    3737namespace stat_list_unit {
    38 
    3938
    4039  class Stat_List_unit

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_vhdl_body.cpp

    r81 r135  
    2424  {
    2525    log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin");
    26     vhdl->set_body ("");
     26
     27    uint32_t size_bank        = log2(_param->_nb_bank);
     28    uint32_t size_gpr_ptr     = log2(_param->_nb_general_register_by_bank);
     29    uint32_t size_spr_ptr     = log2(_param->_nb_special_register_by_bank);
     30
     31    uint32_t LSB_gpr_num_reg  = 0;
     32    uint32_t MSB_gpr_num_reg  = log2(_param->_nb_general_register_by_bank) - 1;
     33    uint32_t LSB_gpr_num_bank = MSB_gpr_num_reg+1;
     34    uint32_t MSB_gpr_num_bank = _param->_size_general_register -1 ;
     35
     36    uint32_t LSB_spr_num_reg  = 0;
     37    uint32_t MSB_spr_num_reg  = log2(_param->_nb_special_register_by_bank) - 1;
     38    uint32_t LSB_spr_num_bank = MSB_spr_num_reg+1;
     39    uint32_t MSB_spr_num_bank = _param->_size_special_register -1;
     40
     41
     42    vhdl->set_comment(0,"=====================================================");
     43    vhdl->set_comment(0,"=====[ CONSTANT ]====================================");
     44    vhdl->set_comment(0,"=====================================================");
     45   
     46    for (uint32_t j=0; j<_param->_nb_inst_insert; j++)
     47    vhdl->set_body (0,"internal_INSERT_"+toString(j)+"_ACK <= '1';");
     48
     49    for (uint32_t j=0; j<_param->_nb_inst_insert; j++)
     50    vhdl->set_body (0,"     out_INSERT_"+toString(j)+"_ACK <= internal_INSERT_"+toString(j)+"_ACK;");
     51
     52    for (uint32_t j=0; j<_param->_nb_inst_retire; j++)
     53    vhdl->set_body (0,"internal_RETIRE_"+toString(j)+"_ACK <= '1';");
     54
     55    for (uint32_t j=0; j<_param->_nb_inst_retire; j++)
     56    vhdl->set_body (0,"     out_RETIRE_"+toString(j)+"_ACK <= internal_RETIRE_"+toString(j)+"_ACK;");
     57   
     58
     59    vhdl->set_body   (0,"");
     60    vhdl->set_body   (0,"transition: process (in_CLOCK)");
     61
     62//     vhdl->set_body   (0,"variable gpr_stat_list_next : Tstat_list_gpr;");
     63//     vhdl->set_body   (0,"variable spr_stat_list_next : Tstat_list_spr;");
     64
     65    vhdl->set_body   (0,"begin  -- process transition");
     66    vhdl->set_body   (1,"if in_CLOCK'event and in_CLOCK = '1' then");
     67    vhdl->set_body   (2,"if in_NRESET = '0' then");
     68
     69    uint32_t gpr = 0;
     70    uint32_t spr = 0;
     71
     72    vhdl->set_comment(3,"Init Stat List");
     73    vhdl->set_comment(3,"xxx_stat_list : ");
     74
     75    vhdl->set_comment(3,"  [0] is_free");
     76    vhdl->set_comment(3,"  [1] is_link");
     77
     78    vhdl->set_body   (3,"");
     79    vhdl->set_comment(3,"gpr_stat_list");
     80    vhdl->set_body   (3,"");
     81    for (uint32_t i=0; i<_param->_nb_bank; i++)
     82      for (uint32_t j=0; j<_param->_nb_general_register_by_bank; j++)
     83        if ((gpr++)<_param->_nb_gpr_use_init)
     84          {
     85            vhdl->set_body   (3,"gpr_stat_list("+toString(i)+")("+toString(j)+")<=\"10\";");
     86          }
     87        else
     88          {
     89            vhdl->set_body   (3,"gpr_stat_list("+toString(i)+")("+toString(j)+")<=\"00\";");
     90          }
     91
     92    vhdl->set_body   (3,"");
     93    vhdl->set_comment(3,"spr_stat_list");
     94    vhdl->set_body   (3,"");
     95    for (uint32_t i=0; i<_param->_nb_bank; i++)
     96      for (uint32_t j=0; j<_param->_nb_special_register_by_bank; j++)
     97        if ((spr++)<_param->_nb_spr_use_init)
     98          {
     99            vhdl->set_body   (3,"spr_stat_list("+toString(i)+")("+toString(j)+")<=\"10\";");
     100          }
     101        else
     102          {
     103            vhdl->set_body   (3,"spr_stat_list("+toString(i)+")("+toString(j)+")<=\"00\";");
     104          }
     105
     106    vhdl->set_body   (3,"");
     107    vhdl->set_comment(3,"Init Pointer");
     108
     109#ifdef SYSTEMC_VHDL_COMPATIBILITY
     110    if (size_gpr_ptr>0)
     111    vhdl->set_body   (3,"reg_GPR_PTR_FREE <= "+std_logic_cst(size_gpr_ptr,1)+";");
     112    if (size_spr_ptr>0)
     113    vhdl->set_body   (3,"reg_SPR_PTR_FREE <= "+std_logic_cst(size_spr_ptr,1)+";");
     114#else
     115    if (size_gpr_ptr>0)
     116    vhdl->set_body   (3,"reg_GPR_PTR_FREE <= "+std_logic_cst(size_gpr_ptr,0)+";");
     117    if (size_spr_ptr>0)
     118    vhdl->set_body   (3,"reg_SPR_PTR_FREE <= "+std_logic_cst(size_spr_ptr,0)+";");
     119#endif
     120
     121    vhdl->set_body   (2,"else"); //   in_CLOCK'event and in_CLOCK = '1'
     122
     123//     vhdl->set_body   (2,"gpr_stat_list_next := gpr_stat_list;");
     124//     vhdl->set_body   (2,"spr_stat_list_next := spr_stat_list;");
     125
     126    vhdl->set_comment(3,"=====================================================");
     127    vhdl->set_comment(3,"=====[ INSERT ]======================================");
     128    vhdl->set_comment(3,"=====================================================");
     129
     130    for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
     131      {
     132        vhdl->set_body   (3,"if ((in_INSERT_"+toString(i)+"_VAL and internal_INSERT_"+toString(i)+"_ACK) = '1') then");
     133
     134        {
     135          vhdl->set_body   (4,"if (in_INSERT_"+toString(i)+"_WRITE_RD = '1') then");
     136          std::string port = "in_INSERT_"+toString(i)+"_NUM_REG_RD_PHY_NEW";
     137          std::string num_bank = (size_bank   >0)?("conv_integer("+port+std_logic_range(MSB_gpr_num_bank,LSB_gpr_num_bank)+")"):"0";
     138          std::string num_reg  = (size_gpr_ptr>0)?("conv_integer("+port+std_logic_range(MSB_gpr_num_reg ,LSB_gpr_num_reg )+")"):"0";
     139          std::string addr     = "("+num_bank+")("+num_reg+")";
     140
     141          vhdl->set_body   (5,"gpr_stat_list"+addr+" <= \"10\";");
     142          vhdl->set_body   (4,"end if;"); // write_rd
     143        }
     144
     145        {
     146          vhdl->set_body   (4,"if (in_INSERT_"+toString(i)+"_WRITE_RE = '1') then");
     147          std::string port = "in_INSERT_"+toString(i)+"_NUM_REG_RE_PHY_NEW";
     148          std::string num_bank = (size_bank   >0)?("conv_integer("+port+std_logic_range(MSB_spr_num_bank,LSB_spr_num_bank)+")"):"0";
     149          std::string num_reg  = (size_spr_ptr>0)?("conv_integer("+port+std_logic_range(MSB_spr_num_reg ,LSB_spr_num_reg )+")"):"0";
     150          std::string addr     = "("+num_bank+")("+num_reg+")";
     151          vhdl->set_body   (5,"spr_stat_list"+addr+" <= \"10\";");
     152          vhdl->set_body   (4,"end if;"); // write_re
     153        }
     154
     155        vhdl->set_body   (3,"end if;"); // transaction insert
     156      }
     157
     158    vhdl->set_comment(3,"=====================================================");
     159    vhdl->set_comment(3,"=====[ RETIRE ]======================================");
     160    vhdl->set_comment(3,"=====================================================");
     161
     162    for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
     163      {
     164        vhdl->set_body   (3,"if ((in_RETIRE_"+toString(i)+"_VAL and internal_RETIRE_"+toString(i)+"_ACK) = '1') then");
     165       
     166        std::string restore = "in_RETIRE_"+toString(i)+"_RESTORE";
     167
     168        // write rd
     169        vhdl->set_body   (4,"if (in_RETIRE_"+toString(i)+"_WRITE_RD = '1') then");
     170        {
     171          std::string restore_old = "in_RETIRE_"+toString(i)+"_RESTORE_RD_PHY_OLD";
     172         
     173          {
     174            std::string port = "in_RETIRE_"+toString(i)+"_NUM_REG_RD_PHY_OLD";
     175            std::string num_bank = (size_bank   >0)?("conv_integer("+port+std_logic_range(MSB_gpr_num_bank,LSB_gpr_num_bank)+")"):"0";
     176            std::string num_reg  = (size_gpr_ptr>0)?("conv_integer("+port+std_logic_range(MSB_gpr_num_reg ,LSB_gpr_num_reg )+")"):"0";
     177            std::string addr     = "("+num_bank+")("+num_reg+")";
     178            vhdl->set_body   (5,"gpr_stat_list"+addr+"(1) <= "+restore+" and "+restore_old+";");
     179          }
     180         
     181          {
     182            std::string port = "in_RETIRE_"+toString(i)+"_NUM_REG_RD_PHY_NEW";
     183            std::string num_bank = (size_bank   >0)?("conv_integer("+port+std_logic_range(MSB_gpr_num_bank,LSB_gpr_num_bank)+")"):"0";
     184            std::string num_reg  = (size_gpr_ptr>0)?("conv_integer("+port+std_logic_range(MSB_gpr_num_reg ,LSB_gpr_num_reg )+")"):"0";
     185            std::string addr     = "("+num_bank+")("+num_reg+")";
     186
     187            vhdl->set_body   (5,"if ("+restore+" = '1') then");
     188            vhdl->set_body   (5,"gpr_stat_list"+addr+"(1) <= '0';");
     189            vhdl->set_body   (5,"end if;"); // write_rd
     190          }
     191        }
     192
     193        vhdl->set_body   (4,"end if;"); // write_rd
     194
     195        // write re
     196        vhdl->set_body   (4,"if (in_RETIRE_"+toString(i)+"_WRITE_RE = '1') then");
     197        {
     198          std::string restore_old = "in_RETIRE_"+toString(i)+"_RESTORE_RE_PHY_OLD";
     199         
     200          {
     201            std::string port = "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_OLD";
     202            std::string num_bank = (size_bank   >0)?("conv_integer("+port+std_logic_range(MSB_spr_num_bank,LSB_spr_num_bank)+")"):"0";
     203            std::string num_reg  = (size_spr_ptr>0)?("conv_integer("+port+std_logic_range(MSB_spr_num_reg ,LSB_spr_num_reg )+")"):"0";
     204            std::string addr     = "("+num_bank+")("+num_reg+")";
     205            vhdl->set_body   (5,"spr_stat_list"+addr+"(1) <= "+restore+" and "+restore_old+";");
     206          }
     207         
     208          {
     209            std::string port = "in_RETIRE_"+toString(i)+"_NUM_REG_RE_PHY_NEW";
     210            std::string num_bank = (size_bank   >0)?("conv_integer("+port+std_logic_range(MSB_spr_num_bank,LSB_spr_num_bank)+")"):"0";
     211            std::string num_reg  = (size_spr_ptr>0)?("conv_integer("+port+std_logic_range(MSB_spr_num_reg ,LSB_spr_num_reg )+")"):"0";
     212            std::string addr     = "("+num_bank+")("+num_reg+")";
     213           
     214            vhdl->set_body   (5,"if ("+restore+" = '1') then");
     215            vhdl->set_body   (5,"spr_stat_list"+addr+"(1) <= '0';");
     216            vhdl->set_body   (5,"end if;"); // write_re
     217          }
     218        }
     219
     220        vhdl->set_body   (4,"end if;"); // write_re
     221        vhdl->set_body   (3,"end if;"); // transaction retire
     222      }
     223
     224    for (uint32_t i=0; i<_param->_nb_reg_free; i++)
     225      {
     226        {
     227          vhdl->set_comment(3,"=====================================================");
     228          vhdl->set_comment(3,"=====[ PUSH_GPR ]====================================");
     229          vhdl->set_comment(3,"=====================================================");
     230          vhdl->set_body   (3,"if ((internal_PUSH_GPR_"+toString(i)+"_VAL and in_PUSH_GPR_"+toString(i)+"_ACK) = '1') then");
     231
     232          std::string num_bank = (size_bank   >0)?("conv_integer(internal_PUSH_GPR_"+toString(i)+"_NUM_BANK)"):"0";
     233          std::string num_reg  = (size_gpr_ptr>0)?("conv_integer(internal_PUSH_GPR_"+toString(i)+"_NUM_REG )"):"0";
     234          std::string addr     = "("+num_bank+")("+num_reg+")";
     235         
     236          vhdl->set_body   (4,"gpr_stat_list"+addr+"(0) <= '1';");
     237          vhdl->set_body   (3,"end if;");
     238        }
     239
     240        {
     241          vhdl->set_comment(3,"=====================================================");
     242          vhdl->set_comment(3,"=====[ PUSH_SPR ]====================================");
     243          vhdl->set_comment(3,"=====================================================");
     244          vhdl->set_body   (3,"if ((internal_PUSH_SPR_"+toString(i)+"_VAL and in_PUSH_SPR_"+toString(i)+"_ACK) = '1') then");
     245
     246          std::string num_bank = (size_bank   >0)?("conv_integer(internal_PUSH_SPR_"+toString(i)+"_NUM_BANK)"):"0";
     247          std::string num_reg  = (size_spr_ptr>0)?("conv_integer(internal_PUSH_SPR_"+toString(i)+"_NUM_REG )"):"0";
     248          std::string addr     = "("+num_bank+")("+num_reg+")";
     249         
     250          vhdl->set_body   (4,"spr_stat_list"+addr+"(0) <= '1';");
     251          vhdl->set_body   (3,"end if;");
     252        }
     253      }
     254
     255    vhdl->set_comment(3,"=====================================================");
     256    vhdl->set_comment(3,"=====[ POINTER ]=====================================");
     257    vhdl->set_comment(3,"=====================================================");
     258
     259    if (size_gpr_ptr>0)
     260      {
     261        if (is_power2(_param->_nb_general_register_by_bank))
     262          {
     263            if (size_gpr_ptr == 1)
     264              vhdl->set_body   (3,"reg_GPR_PTR_FREE <= not reg_GPR_PTR_FREE;");
     265            else
     266              vhdl->set_body   (3,"reg_GPR_PTR_FREE <= reg_GPR_PTR_FREE - "+std_logic_cst(size_gpr_ptr,1)+";");
     267          }
     268        else
     269          {
     270            throw ERRORMORPHEO(FUNCTION,_(" No Yet Supported : the Number of GPR must a power of 2."));
     271          }
     272      }
     273   
     274    if (size_spr_ptr>0)
     275      {
     276        if (is_power2(_param->_nb_special_register_by_bank))
     277          {
     278            if (size_spr_ptr == 1)
     279              vhdl->set_body   (3,"reg_SPR_PTR_FREE <= not reg_SPR_PTR_FREE;");
     280            else
     281              vhdl->set_body   (3,"reg_SPR_PTR_FREE <= reg_SPR_PTR_FREE - "+std_logic_cst(size_spr_ptr,1)+";");
     282          }
     283        else
     284          {
     285            throw ERRORMORPHEO(FUNCTION,_(" No Yet Supported : the Number of SPR must a power of 2."));
     286          }
     287      }
     288
     289    vhdl->set_body   (2,"end if;"); //   in_CLOCK'event and in_CLOCK = '1'
     290    vhdl->set_body   (1,"end if;"); //   if in_NRESET = '0'
     291    vhdl->set_body   (0,"end process transition;");
     292   
     293    {
     294    vhdl->set_body   (0,"");
     295    vhdl->set_comment(0,"=====================================================");
     296    vhdl->set_comment(0,"=====[ PUSH_GPR ]====================================");
     297    vhdl->set_comment(0,"=====================================================");
     298    vhdl->set_body   (0,"");
     299
     300    for (uint32_t i=0; i<_param->_nb_reg_free; i++)
     301      {
     302        uint32_t offset     = i*_param->_nb_bank_by_port_free;
     303        std::string address;
     304       
     305        if (size_gpr_ptr > 0)
     306          {
     307            address = "internal_PUSH_GPR_"+toString(i)+"_NUM_REG";
     308            vhdl->set_body   (0,"internal_PUSH_GPR_"+toString(i)+"_NUM_REG  <= reg_GPR_PTR_FREE;");
     309          }
     310        else
     311          {
     312            address = "0";
     313          }
     314       
     315        vhdl->set_body   (0,"internal_PUSH_GPR_"+toString(i)+"_VAL      <= '1' when");
     316        vhdl->set_body   (1,"false");
     317       
     318        for (uint32_t j=0; j<_param->_nb_bank_by_port_free; j++)
     319          {
     320            std::string num_bank = toString(offset+j);
     321            std::string num_reg  = "conv_integer("+address+")";
     322            std::string addr     = "("+num_bank+")("+num_reg+")";
     323         
     324            vhdl->set_body   (1,"or (gpr_stat_list"+addr+" = \"00\")");
     325          }
     326        vhdl->set_body   (1,"else '0';");
     327       
     328        if (size_bank > 0)
     329          {
     330        vhdl->set_body   (0,"internal_PUSH_GPR_"+toString(i)+"_NUM_BANK <= ");
     331        for (uint32_t j=0; j<_param->_nb_bank_by_port_free-1; j++)
     332          {
     333            uint32_t   _num_bank = offset+j;
     334            std::string num_bank = toString(_num_bank);
     335            std::string num_reg  = "conv_integer("+address+")";
     336            std::string addr     = "("+num_bank+")("+num_reg+")";
     337         
     338            vhdl->set_body   (1,std_logic_cst(size_bank,_num_bank)+" when (gpr_stat_list"+addr+" = \"00\") else");
     339          }
     340        vhdl->set_body   (1,std_logic_cst(size_bank,offset+_param->_nb_bank_by_port_free-1)+";");
     341          }
     342
     343        vhdl->set_body   (0,"out_PUSH_GPR_"+toString(i)+"_VAL     <= internal_PUSH_GPR_"+toString(i)+"_VAL;");
     344
     345        if (is_power2(_param->_nb_general_register_by_bank))
     346          {
     347            std::string num_bank = (size_bank    > 0)?("internal_PUSH_GPR_"+toString(i)+"_NUM_BANK"):"";
     348            std::string num_reg  = (size_gpr_ptr > 0)?address:"";
     349            std::string conc     = ((size_gpr_ptr*size_bank) > 0)?" & ":"";
     350
     351        vhdl->set_body   (0,"out_PUSH_GPR_"+toString(i)+"_NUM_REG <=  "+num_bank+conc+num_reg+";");
     352          }
     353        else
     354          {
     355            throw ERRORMORPHEO(FUNCTION,_(" No Yet Supported : the Number of GPR must a power of 2."));
     356          }
     357      }
     358      }
     359
     360
     361    {
     362    vhdl->set_body   (0,"");
     363    vhdl->set_comment(0,"=====================================================");
     364    vhdl->set_comment(0,"=====[ PUSH_SPR ]====================================");
     365    vhdl->set_comment(0,"=====================================================");
     366    vhdl->set_body   (0,"");
     367
     368    for (uint32_t i=0; i<_param->_nb_reg_free; i++)
     369      {
     370        uint32_t offset     = i*_param->_nb_bank_by_port_free;
     371        std::string address;
     372       
     373        if (size_spr_ptr > 0)
     374          {
     375            address = "internal_PUSH_SPR_"+toString(i)+"_NUM_REG";
     376            vhdl->set_body   (0,"internal_PUSH_SPR_"+toString(i)+"_NUM_REG  <= reg_SPR_PTR_FREE;");
     377          }
     378        else
     379          {
     380            address = "0";
     381          }
     382       
     383        vhdl->set_body   (0,"internal_PUSH_SPR_"+toString(i)+"_VAL      <= '1' when");
     384        vhdl->set_body   (1,"false");
     385       
     386        for (uint32_t j=0; j<_param->_nb_bank_by_port_free; j++)
     387          {
     388            std::string num_bank = toString(offset+j);
     389            std::string num_reg  = "conv_integer("+address+")";
     390            std::string addr     = "("+num_bank+")("+num_reg+")";
     391         
     392            vhdl->set_body   (1,"or (spr_stat_list"+addr+" = \"00\")");
     393          }
     394        vhdl->set_body   (1,"else '0';");
     395       
     396        if (size_bank > 0)
     397          {
     398        vhdl->set_body   (0,"internal_PUSH_SPR_"+toString(i)+"_NUM_BANK <= ");
     399        for (uint32_t j=0; j<_param->_nb_bank_by_port_free-1; j++)
     400          {
     401            uint32_t   _num_bank = offset+j;
     402            std::string num_bank = toString(_num_bank);
     403            std::string num_reg  = "conv_integer("+address+")";
     404            std::string addr     = "("+num_bank+")("+num_reg+")";
     405         
     406            vhdl->set_body   (1,std_logic_cst(size_bank,_num_bank)+" when (spr_stat_list"+addr+" = \"00\") else");
     407          }
     408        vhdl->set_body   (1,std_logic_cst(size_bank,offset+_param->_nb_bank_by_port_free-1)+";");
     409          }
     410
     411        vhdl->set_body   (0,"out_PUSH_SPR_"+toString(i)+"_VAL     <= internal_PUSH_SPR_"+toString(i)+"_VAL;");
     412
     413        if (is_power2(_param->_nb_special_register_by_bank))
     414          {
     415            std::string num_bank = (size_bank    > 0)?("internal_PUSH_SPR_"+toString(i)+"_NUM_BANK"):"";
     416            std::string num_reg  = (size_spr_ptr > 0)?address:"";
     417            std::string conc     = ((size_spr_ptr*size_bank) > 0)?" & ":"";
     418
     419        vhdl->set_body   (0,"out_PUSH_SPR_"+toString(i)+"_NUM_REG <=  "+num_bank+conc+num_reg+";");
     420          }
     421        else
     422          {
     423            throw ERRORMORPHEO(FUNCTION,_(" No Yet Supported : the Number of SPR must a power of 2."));
     424          }
     425      }
     426    }
     427
    27428    log_printf(FUNC,Stat_List_unit,FUNCTION,"End");
    28429  };

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/src/Stat_List_unit_vhdl_declaration.cpp

    r81 r135  
    2424  {
    2525    log_printf(FUNC,Stat_List_unit,FUNCTION,"Begin");
     26
     27    uint32_t size_bank     = log2(_param->_nb_bank);
     28    uint32_t size_gpr_ptr  = log2(_param->_nb_general_register_by_bank);
     29    uint32_t size_spr_ptr  = log2(_param->_nb_special_register_by_bank);
     30
     31    // bit 0 : _is_free
     32    // bit 1 : _is_link
     33    vhdl->set_type  ("Tone_stat_list_gpr   ", "array " + _std_logic_range(_param->_nb_general_register_by_bank) + " of " + std_logic(2));
     34    vhdl->set_type  ("Tstat_list_gpr       ", "array " + _std_logic_range(_param->_nb_bank) + " of Tone_stat_list_gpr");
     35    vhdl->set_signal("gpr_stat_list        ", "Tstat_list_gpr");
     36                                           
     37    vhdl->set_type  ("Tone_stat_list_spr   ", "array " + _std_logic_range(_param->_nb_special_register_by_bank) + " of " + std_logic(2));
     38    vhdl->set_type  ("Tstat_list_spr       ", "array " + _std_logic_range(_param->_nb_bank) + " of Tone_stat_list_spr");
     39    vhdl->set_signal("spr_stat_list        ", "Tstat_list_spr");
     40
     41    if (size_gpr_ptr>0)
     42    vhdl->set_signal("reg_GPR_PTR_FREE     ",size_gpr_ptr);
     43    if (size_spr_ptr>0)
     44    vhdl->set_signal("reg_SPR_PTR_FREE     ",size_spr_ptr);
     45
     46    for (uint32_t i=0; i<_param->_nb_inst_insert; i ++)
     47    vhdl->set_signal ("internal_INSERT_"+toString(i)+"_ACK",1);
     48
     49    for (uint32_t i=0; i<_param->_nb_inst_retire; i ++)
     50    vhdl->set_signal ("internal_RETIRE_"+toString(i)+"_ACK",1);
     51
     52    for (uint32_t i=0; i<_param->_nb_reg_free; i ++)
     53      {
     54        vhdl->set_signal ("internal_PUSH_GPR_"+toString(i)+"_VAL     " ,1);
     55        if (size_bank>0)
     56        vhdl->set_signal ("internal_PUSH_GPR_"+toString(i)+"_NUM_BANK" ,size_bank);
     57        if (size_gpr_ptr>0)
     58        vhdl->set_signal ("internal_PUSH_GPR_"+toString(i)+"_NUM_REG " ,size_gpr_ptr);
     59
     60        vhdl->set_signal ("internal_PUSH_SPR_"+toString(i)+"_VAL     " ,1);
     61        if (size_bank>0)
     62        vhdl->set_signal ("internal_PUSH_SPR_"+toString(i)+"_NUM_BANK" ,size_bank);
     63        if (size_spr_ptr>0)
     64        vhdl->set_signal ("internal_PUSH_SPR_"+toString(i)+"_NUM_REG " ,size_spr_ptr);
     65      }
     66         
    2667    log_printf(FUNC,Stat_List_unit,FUNCTION,"End");
    2768  };

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp

    r123 r135  
    277277      {
    278278        name = _name+"_rename_unit_"+toString(i);
    279         log_printf(TRACE,OOO_Engine,FUNCTION,_("Create   : %s"),name.c_str());
     279        log_printf(TRACE,OOO_Engine,FUNCTION,_("<%s> : Create   : %s"),_name.c_str(),name.c_str());
    280280       
    281281        _component_rename_unit [i] = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::Rename_unit
    … …  
    296296    {
    297297      name = _name+"_commit_unit";
    298       log_printf(TRACE,OOO_Engine,FUNCTION,_("Create   : %s"),name.c_str());
     298      log_printf(TRACE,OOO_Engine,FUNCTION,_("<%s> : Create   : %s"),_name.c_str(),name.c_str());
    299299     
    300300      _component_commit_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::Commit_unit
    … …  
    315315    {
    316316      name = _name+"_issue_queue";
    317       log_printf(TRACE,OOO_Engine,FUNCTION,_("Create   : %s"),name.c_str());
     317      log_printf(TRACE,OOO_Engine,FUNCTION,_("<%s> : Create   : %s"),_name.c_str(),name.c_str());
    318318     
    319319      _component_issue_queue = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::Issue_queue
    … …  
    334334    {
    335335      name = _name+"_reexecute_unit";
    336       log_printf(TRACE,OOO_Engine,FUNCTION,_("Create   : %s"),name.c_str());
     336      log_printf(TRACE,OOO_Engine,FUNCTION,_("<%s> : Create   : %s"),_name.c_str(),name.c_str());
    337337     
    338338      _component_reexecute_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::reexecute_unit::Reexecute_unit
    … …  
    353353    {
    354354      name = _name+"_special_register_unit";
    355       log_printf(TRACE,OOO_Engine,FUNCTION,_("Create   : %s"),name.c_str());
     355      log_printf(TRACE,OOO_Engine,FUNCTION,_("<%s> : Create   : %s"),_name.c_str(),name.c_str());
    356356     
    357357      _component_special_register_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::special_register_unit::Special_Register_unit
    … …  
    372372    {
    373373      name = _name+"_glue";
    374       log_printf(TRACE,OOO_Engine,FUNCTION,_("Create   : %s"),name.c_str());
     374      log_printf(TRACE,OOO_Engine,FUNCTION,_("<%s> : Create   : %s"),_name.c_str(),name.c_str());
    375375     
    376376      _component_glue = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::ooo_engine_glue::OOO_Engine_Glue
    … …  
    398398      {
    399399        src = _name+"_rename_unit_"+toString(i);
    400         log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
     400        log_printf(TRACE,OOO_Engine,FUNCTION,_("<%s> : Instance : %s"),_name.c_str(),src.c_str());
    401401       
    402402        {
    … …  
    746746    {
    747747      src = _name+"_commit_unit";
    748       log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
     748      log_printf(TRACE,OOO_Engine,FUNCTION,_("<%s> : Instance : %s"),_name.c_str(),src.c_str());
    749749           
    750750      {
    … …  
    11471147    {
    11481148      src = _name+"_issue_queue";
    1149       log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
     1149      log_printf(TRACE,OOO_Engine,FUNCTION,_("<%s> : Instance : %s"),_name.c_str(),src.c_str());
    11501150           
    11511151      {
    … …  
    13521352    {
    13531353      src = _name+"_reexecute_unit";
    1354       log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
     1354      log_printf(TRACE,OOO_Engine,FUNCTION,_("<%s> : Instance : %s"),_name.c_str(),src.c_str());
    13551355           
    13561356      {
    … …  
    14901490    {
    14911491      src = _name+"_special_register_unit";
    1492       log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
     1492      log_printf(TRACE,OOO_Engine,FUNCTION,_("<%s> : Instance : %s"),_name.c_str(),src.c_str());
    14931493           
    14941494      {
    … …  
    15711571    {
    15721572      src = _name+"_glue";
    1573       log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
     1573      log_printf(TRACE,OOO_Engine,FUNCTION,_("<%s> : Instance : %s"),_name.c_str(),src.c_str());
    15741574           
    15751575      {

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Allocation.h

    r128 r135  
    154154
    155155#define ALLOC0_INTERFACE_END()
     156
     157#ifdef VHDL_TESTBENCH
     158#define INTERFACE0_TEST(value)                  \
     159  do                                            \
     160    {                                           \
     161      interface->make_testbench(value);         \
     162    } while(0)
     163#else
     164#define INTERFACE0_TEST(value)
     165#endif
    156166
    157167#define ALLOC0_VAL_ACK_IN(  sig, name, type)                            \
    … …  
    351361      delete [] interface;                                              \
    352362    } while (0)
     363
     364#ifdef VHDL_TESTBENCH
     365#define INTERFACE1_TEST(value,x1)               \
     366  do                                            \
     367    {                                           \
     368      for (uint32_t it1=0; it1<x1; it1++)       \
     369        interface [it1]->make_testbench(value); \
     370    } while(0)
     371#else
     372#define INTERFACE1_TEST(value,x1)
     373#endif
    353374
    354375#define ALLOC1_VAL_ACK_IN( sig, name, type)                             \
    … …  
    571592      delete [] interface;                                              \
    572593    } while (0)
     594
     595#ifdef VHDL_TESTBENCH
     596#define INTERFACE2_TEST(value,x1,x2)                   \
     597  do                                                    \
     598    {                                                   \
     599      for (uint32_t it1=0; it1<x1; it1++)               \
     600        for (uint32_t it2=0; it2<x2; it2++)             \
     601          interface [it1][it2]->make_testbench(value);  \
     602    } while(0)
     603#else
     604#define INTERFACE2_TEST(value,x1,x2)
     605#endif
    573606
    574607#define _ALLOC2_VAL_ACK_IN( sig, name, type, x1, x2)                    \
    … …  
    861894    } while (0)
    862895
     896#ifdef VHDL_TESTBENCH
     897#define INTERFACE3_TEST(value,x1,x2,x3)                         \
     898  do                                                            \
     899    {                                                           \
     900      for (uint32_t it1=0; it1<x1; it1++)                       \
     901        for (uint32_t it2=0; it2<x2; it2++)                     \
     902          for (uint32_t it3=0; it3<x3; it3++)                   \
     903            interface [it1][it2][it3]->make_testbench(value);   \
     904    } while(0)
     905#else
     906#define INTERFACE3_TEST(value,x1,x2,x3)
     907#endif
     908
    863909// #define _ALLOC3_VAL_ACK_IN( sig, name, type, x1, x2, x3)
    864910// #define _ALLOC3_VAL_ACK_OUT( sig, name, type, x1, x2, x3)

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interface.h

    r113 r135  
    5555#ifdef VHDL_TESTBENCH
    5656  private   : uint32_t              _nb_cycle     ;
     57  protected : bool                  _make_testbench;
    5758#endif
    5859   
    … …  
    232233  public    : Signal *              get_reset            (void);
    233234
     235  public    : void                  make_testbench       (bool value) {_make_testbench = value;}
    234236  public    : void                  testbench            (void);
    235237  public    : void                  testbench_cycle      (void);

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h

    r134 r135  
    1010#define MORPHEO_MAJOR_VERSION "0"
    1111#define MORPHEO_MINOR_VERSION "2"
    12 #define MORPHEO_REVISION      "134"
     12#define MORPHEO_REVISION      "135"
    1313#define MORPHEO_CODENAME      "Castor"
    1414
    15 #define MORPHEO_DATE_DAY      "15" 
     15#define MORPHEO_DATE_DAY      "17" 
    1616#define MORPHEO_DATE_MONTH    "07"
    1717#define MORPHEO_DATE_YEAR     "2009"

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Vhdl.h

    r113 r135  
    2323namespace morpheo              {
    2424  namespace behavioural          {
     25
     26#define id1(x1)          toString(x1)
     27#define id2(x1,x2)       toString(x1)+"_"+toString(x2)
     28#define id3(x1,x2,x3)    toString(x1)+"_"+toString(x2)+"_"+toString(x3)
     29#define id4(x1,x2,x3,x4) toString(x1)+"_"+toString(x2)+"_"+toString(x3)+"_"+toString(x4)
    2530
    2631#define VHDL_EXTENSION ".vhdl"

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/mkf.info

    r116 r135  
    1919#target_dep             all             Generic/RegisterFile/RegisterFile_Multi_Banked/SelfTest
    2020#target_dep             all             Generic/Select/Select_Priority_Fixed/SelfTest
     21 target_dep             all             Core/Multi_Front_end/Front_end/Ifetch_unit/Address_management/SelfTest
     22 target_dep             all             Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_queue/SelfTest
     23 target_dep             all             Core/Multi_Front_end/Front_end/Decod_unit/Decod/SelfTest
     24 target_dep             all             Core/Multi_Front_end/Front_end/Decod_unit/Decod_queue/SelfTest
     25 target_dep             all             Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest
    2126#target_dep             all             Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest
    2227#target_dep             all             Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface.cpp

    r113 r135  
    3838#ifdef VHDL_TESTBENCH
    3939    _nb_cycle      = 0;
     40    _make_testbench= true;
    4041#endif
    4142

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_fifo_testbench_test.cpp

    r88 r135  
    5252       
    5353        vhdl->set_body("");
    54         vhdl->set_body(test_name + " <= '1' when ("+reset_name+" = '0') else "+test_name_tmp+";");
     54//      vhdl->set_body(test_name + " <= '1' when ("+reset_name+" = '0') else "+test_name_tmp+";");
     55
     56        if (_make_testbench)
     57          vhdl->set_body(test_name + " <= '1' when ("+reset_name+" = '0') else "+test_name_tmp+";");
     58        else
     59          vhdl->set_body(test_name + " <= '1';");
    5560
    5661// #ifdef VHDL_TESTBENCH_ASSERT

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Interface_testbench_test.cpp

    r95 r135  
    2626    std::string test_name_ok = testbench_test_ok  (vhdl);
    2727
    28     vhdl->set_body(test_name + " <= '1' when ("+reset_name+" = '0') else "+test_name_ok+";");
     28//     vhdl->set_body(test_name + " <= '1' when ("+reset_name+" = '0') else "+test_name_ok+";");
     29
     30    if (_make_testbench)
     31      vhdl->set_body(test_name + " <= '1' when ("+reset_name+" = '0') else "+test_name_ok+";");
     32    else
     33      vhdl->set_body(test_name + " <= '1';");
    2934
    3035    log_printf(FUNC,Behavioural,"testbench_test","End");

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_link.cpp

    r131 r135  
    102102    if (not source_have_multi_consumer)
    103103      connect (signal_dest);
    104     else
    105       msgWarning(_("Source have multi consumer !\n"));
     104//     else
     105//       msgWarning(_("Source have multi consumer !\n"));
    106106
    107107    log_printf(FUNC,Behavioural,FUNCTION,"End");

  • trunk/IPs/systemC/processor/Morpheo/Files/debug.sim

    r134 r135  
    44
    55  <parameter  name="use_systemc"                            value="1"       />
    6   <parameter  name="use_vhdl"                               value="0"       />
     6  <parameter  name="use_vhdl"                               value="1"       />
    77  <parameter  name="use_vhdl_testbench"                     value="0"       />
    88  <parameter  name="use_vhdl_testbench_assert"              value="0"       />
    … …  
    2525  <parameter  name="simulation_file_with_date"              value="0"       />
    2626                                                           
    27   <parameter  name="debug_level"                            value="0"       />
     27  <parameter  name="debug_level"                            value="3"       />
    2828  <parameter  name="debug_cycle_start"                      value="0"       />
    2929  <parameter  name="debug_cycle_stop"                       value="100"     />
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