Changeset 15 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/RegisterFile_Multi_Banked_Glue/src/RegisterFile_Multi_Banked_Glue_vhdl_testbench_transition.cpp

Timestamp:

Apr 5, 2007, 4:17:30 PM (17 years ago)

Author:

rosiere

Message:

Interface normalisé
Début du banc de registres multi niveaux

File:

• trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/RegisterFile_Multi_Banked_Glue/src/RegisterFile_Multi_Banked_Glue_vhdl_testbench_transition.cpp (modified) (4 diffs)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/RegisterFile_Multi_Banked_Glue/src/RegisterFile_Multi_Banked_Glue_vhdl_testbench_transition.cpp

@@ -7 +7 @@
  */
 
-#include "Behavioural/Generic/RegisterFile_Multi_Banked/RegisterFile_Multi_Banked_Glue/include/RegisterFile_Multi_Banked_Glue.h"
+#include "Behavioural/Generic/RegisterFile/RegisterFile_Multi_Banked/RegisterFile_Multi_Banked_Glue/include/RegisterFile_Multi_Banked_Glue.h"
 
 namespace morpheo                    {
 namespace behavioural {
 namespace generic {
+namespace registerfile{
 namespace registerfile_multi_banked {
 namespace registerfile_multi_banked_glue {
@@ -35 +36 @@
        _vhdl_testbench->add_input (PORT_READ( in_READ_IN_ADDRESS   [i]));
        _vhdl_testbench->add_input (PORT_READ(out_READ_IN_DATA      [i]));
-       _vhdl_testbench->add_input (PORT_READ( in_READ_SELECT_VAL   [i]));
-       _vhdl_testbench->add_output(PORT_READ(out_READ_SELECT_ACK   [i]));
      }
-                                                      
+
+   for (uint32_t i=0; i<_param._nb_bank; i++)
+     for (uint32_t j=0; j<_param._nb_port_read_by_bank; j++)
+       for (uint32_t k=0; k<_param._nb_port_select_by_bank_read_port [j]; k++)
+         {
+           _vhdl_testbench->add_output(PORT_READ(out_READ_SELECT_VAL [i][j][k]));
+           _vhdl_testbench->add_input (PORT_READ( in_READ_SELECT_ACK [i][j][k]));
+         }
+   
     for (uint32_t i=0; i<_param._nb_bank; i++)
       for (uint32_t j=0; j<_param._nb_port_read_by_bank; j++)
@@ -54 +61 @@
        _vhdl_testbench->add_input (PORT_READ( in_WRITE_IN_ADDRESS  [i]));
        _vhdl_testbench->add_input (PORT_READ( in_WRITE_IN_DATA     [i]));
-       _vhdl_testbench->add_input (PORT_READ( in_WRITE_SELECT_VAL  [i]));
-       _vhdl_testbench->add_output(PORT_READ(out_WRITE_SELECT_ACK  [i]));
      }
+   
+   for (uint32_t i=0; i<_param._nb_bank; i++)
+     for (uint32_t j=0; j<_param._nb_port_write_by_bank; j++)
+       for (uint32_t k=0; k<_param._nb_port_select_by_bank_write_port [j]; k++)
+         {
+           _vhdl_testbench->add_output(PORT_READ(out_WRITE_SELECT_VAL [i][j][k]));
+           _vhdl_testbench->add_input (PORT_READ( in_WRITE_SELECT_ACK [i][j][k]));
+         }
    
     for (uint32_t i=0; i<_param._nb_bank; i++)
@@ -80 +93 @@
 }; // end namespace registerfile_multi_banked_glue
 }; // end namespace registerfile_multi_banked
+}; // end namespace registerfile
 }; // end namespace generic