Changeset 15 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_body.cpp

Timestamp:

Apr 5, 2007, 4:17:30 PM (17 years ago)

Author:

rosiere

Message:

Interface normalisé
Début du banc de registres multi niveaux

File:

• trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_body.cpp (modified) (3 diffs)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/src/Branch_History_Table_vhdl_body.cpp

@@ -20 +20 @@
   void Branch_History_Table::vhdl_body (Vhdl & vhdl)
   {
-    vhdl.set_body ("-- Output : always at '1'");
-    for (uint32_t i=0; i<_param._nb_branch_complete; i++)
-      vhdl.set_body ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" <= '1';");
-    for (uint32_t i=0; i<_param._nb_prediction     ; i++)
-      vhdl.set_body ("out_PREDICT_ACK_"+toString(i)+"         <= '1';");
-    vhdl.set_body ("");
+//     vhdl.set_body ("-- Output : always at '1'");
+//     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
+//       vhdl.set_body ("out_BRANCH_COMPLETE_ACK_"+toString(i)+" <= '1';");
+//     for (uint32_t i=0; i<_param._nb_prediction     ; i++)
+//       vhdl.set_body ("out_PREDICT_ACK_"+toString(i)+"         <= '1';");
+//     vhdl.set_body ("");
 
     list<string> list_port_map;
@@ -40 +40 @@
     list_port_map.clear();
     vhdl.set_body_component_port_map (list_port_map,"in_CLOCK","in_CLOCK");
+    vhdl.set_body_component_port_map (list_port_map,"in_NRESET","in_NRESET");
+
     for (uint32_t i=0; i<_param._nb_prediction; i++)
       {
-        vhdl.set_body_component_port_map (list_port_map," in_READ_ENABLE_"+toString(i)+"  "," in_PREDICT_VAL_"+toString(i));
+        vhdl.set_body_component_port_map (list_port_map," in_READ_VAL_"+toString(i)+"     "," in_PREDICT_VAL_"+toString(i));
+        vhdl.set_body_component_port_map (list_port_map,"out_READ_ACK_"+toString(i)+"     ","out_PREDICT_ACK_"+toString(i));
         vhdl.set_body_component_port_map (list_port_map," in_READ_ADDRESS_"+toString(i)+" "," in_PREDICT_ADDRESS_"+toString(i));
         vhdl.set_body_component_port_map (list_port_map,"out_READ_DATA_"+toString(i)+"    ","out_PREDICT_HISTORY_"+toString(i));    
@@ -49 +52 @@
     for (uint32_t i=0; i<_param._nb_branch_complete; i++)
       {
-        vhdl.set_body_component_port_map (list_port_map," in_WRITE_ENABLE_"+toString(i)+" ","    in_BRANCH_COMPLETE_VAL_"+toString(i)+"");
+        vhdl.set_body_component_port_map (list_port_map," in_WRITE_VAL_"+toString(i)+"    ","    in_BRANCH_COMPLETE_VAL_"+toString(i)+"");
+        vhdl.set_body_component_port_map (list_port_map,"out_WRITE_ACK_"+toString(i)+"    ","   out_BRANCH_COMPLETE_ACK_"+toString(i)+"");
         vhdl.set_body_component_port_map (list_port_map," in_WRITE_ADDRESS_"+toString(i)+"","    in_BRANCH_COMPLETE_ADDRESS_"+toString(i));
         vhdl.set_body_component_port_map (list_port_map," in_WRITE_DATA_"+toString(i)+"   ","signal_BRANCH_COMPLETE_HISTORY_"+toString(i));