Ignore:
Timestamp:
Mar 6, 2007, 3:34:04 PM (17 years ago)
Author:
kane
Message:

1) Ajout d'un "printer" XML pour la configuration de paramètres

2) Fin du composant "Two_Level_Branch_Predictor"

validation * systemc

  • vhdl
File:
1 edited

Legend:

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  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Branch_History_Table/SelfTest/src/test.cpp

    r2 r3  
    4646   *********************************************************************/
    4747  sc_clock                                 CLOCK ("clock", 1.0, 0.5);
    48   sc_signal<Tcontrol_t>                    PREDICT_VAL             [param._nb_prediction];
    49   sc_signal<Tcontrol_t>                    PREDICT_ACK             [param._nb_prediction];
    50   sc_signal<Taddress_t>                    PREDICT_ADDRESS         [param._nb_prediction];
    51   sc_signal<Thistory_t>                    PREDICT_HISTORY         [param._nb_prediction];
    52                                            
    53   sc_signal<Tcontrol_t>                    BRANCH_COMPLETE_VAL     [param._nb_branch_complete];
    54   sc_signal<Tcontrol_t>                    BRANCH_COMPLETE_ACK     [param._nb_branch_complete];
    55   sc_signal<Taddress_t>                    BRANCH_COMPLETE_ADDRESS [param._nb_branch_complete];
    56   sc_signal<Thistory_t>                    BRANCH_COMPLETE_HISTORY [param._nb_branch_complete];
    57   sc_signal<Tcontrol_t>                    BRANCH_COMPLETE_HIT    [param._nb_branch_complete];
     48  sc_signal<Tcontrol_t>                    PREDICT_VAL               [param._nb_prediction];
     49  sc_signal<Tcontrol_t>                    PREDICT_ACK               [param._nb_prediction];
     50  sc_signal<Taddress_t>                    PREDICT_ADDRESS           [param._nb_prediction];
     51  sc_signal<Thistory_t>                    PREDICT_HISTORY           [param._nb_prediction];
     52                                                                    
     53  sc_signal<Tcontrol_t>                    BRANCH_COMPLETE_VAL       [param._nb_branch_complete];
     54  sc_signal<Tcontrol_t>                    BRANCH_COMPLETE_ACK       [param._nb_branch_complete];
     55  sc_signal<Taddress_t>                    BRANCH_COMPLETE_ADDRESS   [param._nb_branch_complete];
     56  sc_signal<Thistory_t>                    BRANCH_COMPLETE_HISTORY   [param._nb_branch_complete];
     57  sc_signal<Tcontrol_t>                    BRANCH_COMPLETE_DIRECTION [param._nb_branch_complete];
    5858 
    5959  /********************************************************
    … …  
    7575  for (uint32_t i=0; i<param._nb_branch_complete; i++)
    7676    {
    77       (*(_Branch_History_Table-> in_BRANCH_COMPLETE_VAL     [i]))        (BRANCH_COMPLETE_VAL     [i]);
    78       (*(_Branch_History_Table->out_BRANCH_COMPLETE_ACK     [i]))        (BRANCH_COMPLETE_ACK     [i]);
    79       (*(_Branch_History_Table-> in_BRANCH_COMPLETE_ADDRESS [i]))        (BRANCH_COMPLETE_ADDRESS [i]);
    80       (*(_Branch_History_Table-> in_BRANCH_COMPLETE_HISTORY [i]))        (BRANCH_COMPLETE_HISTORY [i]);
    81       (*(_Branch_History_Table-> in_BRANCH_COMPLETE_HIT     [i]))        (BRANCH_COMPLETE_HIT    [i]);
     77      (*(_Branch_History_Table-> in_BRANCH_COMPLETE_VAL       [i]))        (BRANCH_COMPLETE_VAL       [i]);
     78      (*(_Branch_History_Table->out_BRANCH_COMPLETE_ACK       [i]))        (BRANCH_COMPLETE_ACK       [i]);
     79      (*(_Branch_History_Table-> in_BRANCH_COMPLETE_ADDRESS   [i]))        (BRANCH_COMPLETE_ADDRESS  [i]);
     80      (*(_Branch_History_Table-> in_BRANCH_COMPLETE_HISTORY   [i]))        (BRANCH_COMPLETE_HISTORY  [i]);
     81      (*(_Branch_History_Table-> in_BRANCH_COMPLETE_DIRECTION [i]))        (BRANCH_COMPLETE_DIRECTION [i]);
    8282    }
    8383
    … …  
    108108  Thistory_t history                  = 0;
    109109  Thistory_t mask                     = gen_mask <Thistory_t> (param._size_shifter);
    110   Tcontrol_t hit                      = 0;
     110  Tcontrol_t direction                = 0;
    111111
    112112  while (address<param._nb_shifter)
    113113    {
    114       BRANCH_COMPLETE_VAL     [0].write(1);
    115       BRANCH_COMPLETE_ADDRESS [0].write(address);
    116       BRANCH_COMPLETE_HISTORY [0].write(0);
    117       BRANCH_COMPLETE_HIT    [0].write(0);
     114      BRANCH_COMPLETE_VAL       [0].write(1);
     115      BRANCH_COMPLETE_ADDRESS   [0].write(address);
     116      BRANCH_COMPLETE_HISTORY   [0].write(0);
     117      BRANCH_COMPLETE_DIRECTION [0].write(0);
    118118
    119119      sc_start(1);
    … …  
    136136      address                  = rand() % param._nb_shifter        ;
    137137      history                  = rand() % (1<<param._size_shifter) ;
    138       hit                      = rand() % 2;
     138      direction                = rand() % 2;
    139139
    140140      cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} ["+toString(num_port_branch_complete)+"]" << endl
    141141           << hex
    142            << " - address     : " << address << endl
    143            << " - history old : " << history << endl
    144            << " - hit         : " << hit     << endl;
     142           << " - address     : " << address  << endl
     143           << " - history old : " << history  << endl
     144           << " - direction   : " << direction<< endl;
    145145
    146       BRANCH_COMPLETE_VAL     [num_port_branch_complete].write(1);
    147       BRANCH_COMPLETE_ADDRESS [num_port_branch_complete].write(address);
    148       BRANCH_COMPLETE_HISTORY [num_port_branch_complete].write(history);
    149       BRANCH_COMPLETE_HIT     [num_port_branch_complete].write(hit);
     146      BRANCH_COMPLETE_VAL       [num_port_branch_complete].write(1);
     147      BRANCH_COMPLETE_ADDRESS   [num_port_branch_complete].write(address);
     148      BRANCH_COMPLETE_HISTORY   [num_port_branch_complete].write(history);
     149      BRANCH_COMPLETE_DIRECTION [num_port_branch_complete].write(direction);
    150150
    151151      // Wait Ack
    … …  
    160160      PREDICT_ADDRESS         [num_port_predict        ].write(address);
    161161     
    162       history                  = ((history<<1)&mask)|hit;
     162      history                  = ((history<<1)&mask)|direction;
    163163     
    164164      // Wait Ack
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