Ignore:
Timestamp:
Jun 7, 2007, 9:13:47 PM (17 years ago)
Author:
rosiere
Message:

Vhdl_Testbench : Modification du testbench. Maintenant complétement encapsuler dans la classe "Interfaces".
Suppression de la class Vhdl_Testbench dans un avenir proche :D
Suppression du répertoire Configuration.old

Location:
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic
Files:
2 deleted
18 edited

Legend:

Unmodified
Added
Removed

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/RegisterFile_Monolithic.h

    r15 r41  
    2323#include "Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/Statistics.h"
    2424#endif
     25#ifdef POSITION
     26#include "Behavioural/include/Position.h"
     27#else
     28#include "Behavioural/include/Interfaces.h"
     29#endif
    2530#ifdef VHDL
    2631#include "Behavioural/include/Vhdl.h"
    27 #endif
    28 #ifdef VHDL_TESTBENCH
    29 #include "Behavioural/include/Vhdl_Testbench.h"
    3032#endif
    3133
    … …  
    5557#endif
    5658
    57 #ifdef VHDL_TESTBENCH
    58   private   : Vhdl_Testbench                 * _vhdl_testbench;
     59#ifdef POSITION
     60  private   : Position                       * _position;
    5961#endif
     62
     63  private   : Interfaces                     * _interfaces;
    6064
    6165#ifdef SYSTEMC
    … …  
    6367    // Interface
    6468  public    : SC_CLOCK                      *  in_CLOCK        ;
    65   public    : SC_CLOCK                      *  in_NRESET       ;
     69  public    : SC_IN       (Tcontrol_t)      *  in_NRESET       ;
    6670
    6771    // ----- Interface Read
    … …  
    117121#if VHDL                                       
    118122  private : void     vhdl                      (void);
    119   private : void     vhdl_port                 (Vhdl & vhdl);
    120   private : void     vhdl_type                 (Vhdl & vhdl);
    121   private : void     vhdl_signal               (Vhdl & vhdl);
    122   private : void     vhdl_body                 (Vhdl & vhdl);
     123  private : void     vhdl_port                 (Vhdl * & vhdl);
     124  private : void     vhdl_type                 (Vhdl * & vhdl);
     125  private : void     vhdl_signal               (Vhdl * & vhdl);
     126  private : void     vhdl_body                 (Vhdl * & vhdl);
    123127#endif                                         
    124128                                               
    125129#ifdef VHDL_TESTBENCH                         
    126   private : void     vhdl_testbench            (Vhdl_Testbench & vhdl_testbench);
    127   private : void     vhdl_testbench_port       (Vhdl_Testbench & vhdl_testbench);
    128   private : void     vhdl_testbench_transition (Vhdl_Testbench & vhdl_testbench);
     130  private : void     vhdl_testbench_transition (void);
    129131#endif
    130132

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic.cpp

    r15 r41  
    2727    _param (param)
    2828  {
     29    log_printf(FUNC,RegisterFile_Monolithic,"RegisterFile_Monolithic","Begin");
     30
     31#ifdef SYSTEMC
     32    log_printf(INFO,RegisterFile_Monolithic,"RegisterFile_Monolithic","Allocation");
     33
     34    allocation ();
     35#endif
     36
    2937#ifdef STATISTICS
    3038    _stat = new Statistics (static_cast<string>(_name),
    3139                            param_statistics          ,
    3240                            param);
    33 #endif
    34 
    35 #ifdef VHDL_TESTBENCH
    36     _vhdl_testbench = new Vhdl_Testbench (_name);
    37     vhdl_testbench_port           (*_vhdl_testbench);
    38     _vhdl_testbench->set_clock    ("in_CLOCK",true);
    3941#endif
    4042
    … …  
    4547
    4648#ifdef SYSTEMC
    47     allocation ();
    48 
    4949    SC_METHOD (transition);
    5050    dont_initialize ();
    … …  
    7272      PORT_WRITE(out_WRITE_ACK [i], 1);
    7373#endif
     74
     75    log_printf(FUNC,RegisterFile_Monolithic,"RegisterFile_Monolithic","End");
    7476  };
    7577 
    7678  RegisterFile_Monolithic::~RegisterFile_Monolithic (void)
    7779  {
    78 #ifdef SYSTEMC
    79     deallocation ();
    80 #endif
    81 
    82 #ifdef VHDL_TESTBENCH
    83     // generate the test bench
    84     _vhdl_testbench->generate_file();
    85     delete _vhdl_testbench;
    86 #endif
    87 
    8880#ifdef STATISTICS
    8981    _stat->generate_file(statistics(0));
    9082    delete _stat;
     83#endif
     84
     85#ifdef SYSTEMC
     86    deallocation ();
    9187#endif
    9288  };

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_allocation.cpp

    r15 r41  
    1717  void RegisterFile_Monolithic::allocation (void)
    1818  {
    19     in_CLOCK  = new SC_CLOCK           ("in_CLOCK");
    20     in_NRESET = new SC_IN (Tcontrol_t) ("in_NRESET");
     19#ifdef POSITION
     20    _position   = new Position ();
    2121
    22     // ----- Interface Read
     22    Entity * entity = _position->set_entity (_name                    ,
     23                                             "RegisterFile_Monolithic",
     24                                             REGISTER                 );
     25   
     26    _interfaces = entity->set_interfaces();
     27#else
     28    _interfaces = new Interfaces();
     29#endif
     30
     31    // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     32    Interface * interface_ = _interfaces->set_interface("", IN  ,SOUTH, "Generalist interface");
     33
     34     in_CLOCK              = interface_->set_signal_clk              ("clock" ,1);
     35     in_NRESET             = interface_->set_signal_in  <Tcontrol_t> ("nreset",1);
     36
     37    // ~~~~~[ Interface : "read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     38
    2339     in_READ_VAL         = new SC_IN (Tcontrol_t) * [_param._nb_port_read];
    2440    out_READ_ACK         = new SC_OUT(Tcontrol_t) * [_param._nb_port_read];
    … …  
    2743
    2844    for (uint32_t i=0; i<_param._nb_port_read; i++)
    29       {
    30         string rename;
     45      { 
     46        Interface_fifo * interface_read = _interfaces->set_interface("read_"+toString(i), IN  ,WEST, "Interface Read");
    3147
    32         rename = "in_READ_VAL["     + toString(i) + "]";
    33         in_READ_VAL     [i]  = new SC_IN (Tcontrol_t) (rename.c_str());
    34 
    35         rename = "out_READ_ACK["     + toString(i) + "]";
    36         out_READ_ACK    [i]  = new SC_OUT(Tcontrol_t) (rename.c_str());
    37 
    38         rename = "in_READ_ADDRESS[" + toString(i) + "]";
    39         in_READ_ADDRESS [i]  = new SC_IN (Taddress_t) (rename.c_str());
    40 
    41         rename = "out_READ_DATA["    + toString(i) + "]";
    42         out_READ_DATA   [i]  = new SC_OUT(Tdata_t)    (rename.c_str());
     48         in_READ_VAL     [i]  = interface_read->set_signal_valack_in        ("val"    , VAL);
     49        out_READ_ACK     [i]  = interface_read->set_signal_valack_out       ("ack"    , ACK);
     50         in_READ_ADDRESS [i]  = interface_read->set_signal_in  <Taddress_t> ("address", static_cast<uint32_t>(log2(_param._nb_word)));
     51        out_READ_DATA    [i]  = interface_read->set_signal_out <Tdata_t   > ("data"   , _param._size_word);
    4352      }
    4453
    45     // ----- Interface Write
     54    // ~~~~~[ Interface : "write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     55
    4656     in_WRITE_VAL        = new SC_IN (Tcontrol_t) * [_param._nb_port_write];
    4757    out_WRITE_ACK        = new SC_OUT(Tcontrol_t) * [_param._nb_port_write];
    … …  
    5161    for (uint32_t i=0; i<_param._nb_port_write; i++)
    5262      {
    53         string rename;
     63        Interface_fifo * interface_write = _interfaces->set_interface("write_"+toString(i), IN  ,EAST, "Interface Write");
    5464
    55         rename = "in_WRITE_VAL["  + toString(i) + "]";
    56         in_WRITE_VAL     [i]  = new SC_IN (Tcontrol_t) (rename.c_str());
    57 
    58         rename = "out_WRITE_VAL["  + toString(i) + "]";
    59         out_WRITE_ACK    [i]  = new SC_OUT(Tcontrol_t) (rename.c_str());
    60 
    61         rename = "in_WRITE_ADDRESS[" + toString(i) + "]";
    62         in_WRITE_ADDRESS [i]  = new SC_IN (Taddress_t) (rename.c_str());
    63 
    64         rename = "in_WRITE_DATA["    + toString(i) + "]";
    65         in_WRITE_DATA    [i]  = new SC_IN (Tdata_t)    (rename.c_str());
     65         in_WRITE_VAL     [i]  = interface_write->set_signal_valack_in        ("val"    , VAL);
     66        out_WRITE_ACK     [i]  = interface_write->set_signal_valack_out       ("ack"    , ACK);
     67         in_WRITE_ADDRESS [i]  = interface_write->set_signal_in  <Taddress_t> ("address", static_cast<uint32_t>(log2(_param._nb_word)));
     68         in_WRITE_DATA    [i]  = interface_write->set_signal_in  <Tdata_t   > ("data"   , _param._size_word);
    6669      }
    6770
    … …  
    7376        string rename = "reg_DATA["  + toString(i) + "]";
    7477        reg_DATA [i]  = new SC_REGISTER (Tdata_t) (rename.c_str());
    75       }   
     78      }
     79
     80#ifdef POSITION
     81    _position->generate_file();
     82#endif
    7683  };
    7784

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_deallocation.cpp

    r15 r41  
    1717  void RegisterFile_Monolithic::deallocation (void)
    1818  {
    19     delete in_CLOCK;
    20     delete in_NRESET;
     19    delete    in_CLOCK;
     20    delete    in_NRESET;
    2121    // ----- Interface Read
    22     for (uint32_t i=0; i<_param._nb_port_read; i++)
    23       {
    24         delete  in_READ_VAL     [i];
    25         delete out_READ_ACK     [i];
    26         delete  in_READ_ADDRESS [i];
    27         delete out_READ_DATA    [i];
    28       }
    29 
    30     delete  in_READ_VAL    ;
    31     delete out_READ_ACK    ;
    32     delete  in_READ_ADDRESS;
    33     delete out_READ_DATA   ;
     22    delete []  in_READ_VAL    ;
     23    delete [] out_READ_ACK    ;
     24    delete []  in_READ_ADDRESS;
     25    delete [] out_READ_DATA   ;
    3426
    3527    // ----- Interface Write
    36     for (uint32_t i=0; i<_param._nb_port_write; i++)
    37       {
    38         delete  in_WRITE_VAL     [i];
    39         delete out_WRITE_ACK     [i];
    40         delete  in_WRITE_ADDRESS [i];
    41         delete  in_WRITE_DATA    [i];
    42       }
    43 
    44     delete  in_WRITE_VAL    ;
    45     delete out_WRITE_ACK    ;
    46     delete  in_WRITE_ADDRESS;
    47     delete  in_WRITE_DATA   ;
     28    delete []  in_WRITE_VAL    ;
     29    delete [] out_WRITE_ACK    ;
     30    delete []  in_WRITE_ADDRESS;
     31    delete []  in_WRITE_DATA   ;
    4832
    4933    // ----- Register
    50     for (uint32_t i=0; i<_param._nb_word; i++)
    51       {
    52         delete reg_DATA [i];
    53       }   
     34    delete [] reg_DATA;
    5435
    55     delete reg_DATA;
     36#ifdef POSITION
     37    delete _position;
     38#else
     39    delete _interfaces;
     40#endif
    5641  };
    5742

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_transition.cpp

    r15 r41  
    4545
    4646#ifdef VHDL_TESTBENCH
    47     vhdl_testbench_transition (*_vhdl_testbench);
     47    vhdl_testbench_transition ();
    4848#endif
    4949    log_printf(FUNC,Register_File,"transition","End");

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_vhdl.cpp

    r15 r41  
    1818  void RegisterFile_Monolithic::vhdl (void)
    1919  {
    20     Vhdl vhdl (_name);
     20    Vhdl * vhdl = new Vhdl (_name);
    2121
    22     vhdl.set_library_work (_name + "_Pack");
     22    vhdl->set_library_work (_name + "_Pack");
    2323
    2424    vhdl_port   (vhdl);
    … …  
    2727    vhdl_body   (vhdl);
    2828
    29     vhdl.generate_file();
     29    vhdl->generate_file();
     30
     31    delete vhdl;
    3032  };
    3133

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_vhdl_body.cpp

    r15 r41  
    1515namespace registerfile_monolithic    {
    1616
    17   void RegisterFile_Monolithic::vhdl_body (Vhdl & vhdl)
     17  void RegisterFile_Monolithic::vhdl_body (Vhdl * & vhdl)
    1818  {
    19     vhdl.set_body ("");
    20     vhdl.set_body ("-----------------------------------------------------------------------------");
    21     vhdl.set_body ("-- Read RegisterFile");
    22     vhdl.set_body ("-----------------------------------------------------------------------------");
    23     vhdl.set_body ("");
     19    vhdl->set_body ("");
     20    vhdl->set_body ("-----------------------------------------------------------------------------");
     21    vhdl->set_body ("-- Read RegisterFile");
     22    vhdl->set_body ("-----------------------------------------------------------------------------");
     23    vhdl->set_body ("");
    2424   
    2525    for (uint32_t i = 0; i < _param._nb_port_read; i++)
    2626      {
    27         vhdl.set_body ("out_READ_ACK_"+toString(i)+"  <= '1';");
    28         vhdl.set_body ("out_READ_DATA_"+toString(i)+" <= reg_DATA (conv_integer(in_READ_ADDRESS_"+toString(i)+")) when in_READ_VAL_"+toString(i)+" = '1' else "+std_logic_others(_param._size_word,0)+";");
     27        vhdl->set_body ("out_READ_"+toString(i)+"_ACK  <= '1';");
     28        vhdl->set_body ("out_READ_"+toString(i)+"_DATA <= reg_DATA (conv_integer(in_READ_"+toString(i)+"_ADDRESS)) when in_READ_"+toString(i)+"_VAL = '1' else "+std_logic_others(_param._size_word,0)+";");
    2929      }
    30     vhdl.set_body ("");
    31     vhdl.set_body ("-----------------------------------------------------------------------------");
    32     vhdl.set_body ("-- Write RegisterFile");
    33     vhdl.set_body ("-----------------------------------------------------------------------------");
    34     vhdl.set_body ("");
    3530
    36     vhdl.set_body ("RegisterFile_write: process (in_CLOCK)");
    37     vhdl.set_body ("begin  -- process RegisterFile_write");
    38     vhdl.set_body ("\tif in_CLOCK'event and in_CLOCK = '1' then");
     31    vhdl->set_body ("");
     32    vhdl->set_body ("-----------------------------------------------------------------------------");
     33    vhdl->set_body ("-- Write RegisterFile");
     34    vhdl->set_body ("-----------------------------------------------------------------------------");
     35    vhdl->set_body ("");
     36
     37    vhdl->set_body ("RegisterFile_write: process (in_CLOCK)");
     38    vhdl->set_body ("begin  -- process RegisterFile_write");
     39    vhdl->set_body ("\tif in_CLOCK'event and in_CLOCK = '1' then");
    3940   
    4041    for (uint32_t i = 0; i < _param._nb_port_write; i++)
    4142      {
    42       vhdl.set_body ("\t\tif (in_WRITE_VAL_"+toString(i)+" = '1') then");
    43       vhdl.set_body ("\t\t\treg_DATA(conv_integer(in_WRITE_ADDRESS_"+toString(i)+")) <= in_WRITE_DATA_"+toString(i)+";");
    44       vhdl.set_body ("\t\tend if;");
     43      vhdl->set_body ("\t\tif (in_WRITE_"+toString(i)+"_VAL = '1') then");
     44      vhdl->set_body ("\t\t\treg_DATA(conv_integer(in_WRITE_"+toString(i)+"_ADDRESS)) <= in_WRITE_"+toString(i)+"_DATA;");
     45      vhdl->set_body ("\t\tend if;");
    4546      }
    4647
    47     vhdl.set_body ("\tend if;");
    48     vhdl.set_body ("end process RegisterFile_write;");
     48    vhdl->set_body ("\tend if;");
     49    vhdl->set_body ("end process RegisterFile_write;");
    4950
    5051    for (uint32_t i = 0; i < _param._nb_port_write; i++)
    51       vhdl.set_body ("out_WRITE_ACK_"+toString(i)+"<= '1';");
     52      vhdl->set_body ("out_WRITE_"+toString(i)+"_ACK <= '1';");
    5253  };
    5354

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_vhdl_port.cpp

    r15 r41  
    1515namespace registerfile_monolithic    {
    1616
    17   void RegisterFile_Monolithic::vhdl_port (Vhdl & vhdl)
     17  void RegisterFile_Monolithic::vhdl_port (Vhdl * & vhdl)
    1818  {
    19     vhdl.set_port ("in_CLOCK" , IN, 1);
    20     vhdl.set_port ("in_NRESET", IN, 1);
    21 
    22     for (uint32_t i = 0; i < _param._nb_port_read; i ++)
    23       {
    24         vhdl.set_port (" in_READ_VAL_"+toString(i)+"    ",IN ,std_logic(1)                    );
    25         vhdl.set_port ("out_READ_ACK_"+toString(i)+"    ",OUT,std_logic(1)                    );
    26         vhdl.set_port (" in_READ_ADDRESS_"+toString(i)+"",IN ,std_logic(static_cast<uint32_t>(log2(_param._nb_word))));
    27         vhdl.set_port ("out_READ_DATA_"+toString(i)+"   ",OUT,std_logic(_param._size_word    ));
    28       }
    29 
    30     for (uint32_t i = 0; i < _param._nb_port_write; i ++)
    31       {
    32         vhdl.set_port (" in_WRITE_VAL_"+toString(i)+"    ",IN ,std_logic(1)                    );
    33         vhdl.set_port ("out_WRITE_ACK_"+toString(i)+"    ",OUT,std_logic(1)                    );
    34         vhdl.set_port (" in_WRITE_ADDRESS_"+toString(i)+"",IN ,std_logic(static_cast<uint32_t>(log2(_param._nb_word))));
    35         vhdl.set_port (" in_WRITE_DATA_"+toString(i)+"   ",IN ,std_logic(_param._size_word    ));
    36       }
     19    _interfaces->set_port(vhdl);
    3720  };
    3821

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_vhdl_signal.cpp

    r15 r41  
    1515namespace registerfile_monolithic    {
    1616
    17   void RegisterFile_Monolithic::vhdl_signal (Vhdl & vhdl)
     17  void RegisterFile_Monolithic::vhdl_signal (Vhdl * & vhdl)
    1818  {
    19     vhdl.set_signal ("reg_DATA", "Tregfile");
     19    vhdl->set_signal ("reg_DATA", "Tregfile");
    2020  };
    2121

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_vhdl_testbench_transition.cpp

    r15 r41  
    1515namespace registerfile_monolithic    {
    1616
    17   void RegisterFile_Monolithic::vhdl_testbench_transition (Vhdl_Testbench & vhdl_testbench)
     17  void RegisterFile_Monolithic::vhdl_testbench_transition (void)
    1818  {
    19 #ifndef SYSTEMCASS_SPECIFIC
    20     sc_cycle(0);
    21 #endif
    22     vhdl_testbench.add_input (PORT_READ( in_NRESET));
     19    // Evaluation before read the ouput signal
     20    sc_start(0);
    2321
    24     for (uint32_t i = 0; i < _param._nb_port_read ; i ++)
    25       {
    26         vhdl_testbench.add_input (PORT_READ( in_READ_VAL     [i]));
    27         vhdl_testbench.add_output(PORT_READ(out_READ_ACK     [i]));
    28         vhdl_testbench.add_input (PORT_READ( in_READ_ADDRESS [i]));
    29         vhdl_testbench.add_output(PORT_READ(out_READ_DATA    [i]));
    30       }
    31     for (uint32_t i = 0; i < _param._nb_port_write; i ++)
    32       {
    33         vhdl_testbench.add_input (PORT_READ( in_WRITE_VAL    [i]));
    34         vhdl_testbench.add_output(PORT_READ(out_WRITE_ACK    [i]));
    35         vhdl_testbench.add_input (PORT_READ( in_WRITE_ADDRESS[i]));
    36         vhdl_testbench.add_input (PORT_READ( in_WRITE_DATA   [i]));
    37       }
    38 
    39     vhdl_testbench.add_test(true);
    40 
    41     vhdl_testbench.new_cycle (); // always at the end
     22    _interfaces->testbench();
    4223  };
    4324

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_vhdl_type.cpp

    r15 r41  
    1515namespace registerfile_monolithic    {
    1616
    17   void RegisterFile_Monolithic::vhdl_type (Vhdl & vhdl)
     17  void RegisterFile_Monolithic::vhdl_type (Vhdl * & vhdl)
    1818  {
    19     vhdl.set_type ("Tregfile", "array (" + toString(_param._nb_word-1) + " downto 0) of " + std_logic(_param._size_word));
     19    vhdl->set_type ("Tregfile", "array (" + toString(_param._nb_word-1) + " downto 0) of " + std_logic(_param._size_word));
    2020  };
    2121

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/SelfTest/src/test.cpp

    r40 r41  
    9090 
    9191  sc_start(0);
    92 //_Select_Priority_Fixed->vhdl_testbench_label("Initialisation");
    9392//cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} Initialisation" << endl;
    9493
    95   _Select_Priority_Fixed->vhdl_testbench_label("Loop of Test");
    9694  cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} Loop of Test" << endl;
    9795
    9896  for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
    9997    {
    100       _Select_Priority_Fixed->vhdl_testbench_label("Iteration "+toString(iteration));
    101 
    10298      entity    = 0;
    10399      bool find = false;

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/include/Select_Priority_Fixed.h

    r40 r41  
    3030#include "Behavioural/include/Vhdl.h"
    3131#endif
    32 #ifdef VHDL_TESTBENCH
    33 #include "Behavioural/include/Vhdl_Testbench.h"
    34 #endif
    3532
    3633using namespace std;
    … …  
    5956#ifdef STATISTICS
    6057  private   : Statistics                     * _stat;
    61 #endif
    62 
    63 #ifdef VHDL_TESTBENCH
    64   private   : Vhdl_Testbench                 * _vhdl_testbench;
    6558#endif
    6659
    … …  
    132125  private : void     vhdl_testbench_transition (void);
    133126#endif
    134   public  : void     vhdl_testbench_label      (string label);
    135127  };
    136128

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/src/Select_Priority_Fixed.cpp

    r40 r41  
    4545                            param_statistics          ,
    4646                            param);
    47 #endif
    48 
    49 #ifdef VHDL_TESTBENCH
    50     log_printf(INFO,Select_Priority_Fixed,"Select_Priority_Fixed","Creation of a testbench");
    51 
    52     _vhdl_testbench = new Vhdl_Testbench (_name);
    5347#endif
    5448
    … …  
    10094    log_printf(FUNC,Select_Priority_Fixed,"~Select_Priority_Fixed","Begin");
    10195
    102 #ifdef VHDL_TESTBENCH
    103     log_printf(INFO,Select_Priority_Fixed,"~Select_Priority_Fixed","Generate Testbench  file");
    104 
    105     // generate the test bench
    106     _vhdl_testbench->generate_file();
    107     delete _vhdl_testbench;
    108 #endif
    109 
    11096#ifdef STATISTICS
    11197    log_printf(INFO,Select_Priority_Fixed,"~Select_Priority_Fixed","Generate Statistics file");

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/src/Select_Priority_Fixed_allocation.cpp

    r40 r41  
    1717  void Select_Priority_Fixed::allocation (void)
    1818  {
    19     string rename;
    20 
    2119    log_printf(FUNC,Select_Priority_Fixed,"allocation","Begin");
    2220
    … …  
    2725                                             "Select_Priority_Fixed",
    2826                                             COMBINATORY            );
    29 
     27   
    3028    _interfaces = entity->set_interfaces();
    3129#else
    … …  
    3735    Interface_fifo * interface_ = _interfaces->set_interface("", IN  ,WEST, "Generalist interface");
    3836
    39      in_CLOCK        = interface_->set_signal_clk              ("clock" ,1, PORT_VHDL_YES_TESTBENCH_NO);
     37     in_CLOCK        = interface_->set_signal_clk              ("clock" ,1, CLOCK_VHDL_NO);
    4038     in_NRESET       = interface_->set_signal_in  <Tcontrol_t> ("nreset",1);
    4139     in_VAL          = new SC_IN (Tcontrol_t)           * [_param._nb_entity];

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/src/Select_Priority_Fixed_deallocation.cpp

    r40 r41  
    3434    // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~   
    3535
    36     cout << *_interfaces << endl;
    37 
    3836#ifdef POSITION
    3937    delete _position;

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/src/Select_Priority_Fixed_vhdl_port.cpp

    r40 r41  
    2121    _interfaces->set_port(vhdl);
    2222
    23 #ifdef VHDL_TESTBENCH
    24     _interfaces->set_port(_vhdl_testbench);                     
    25    _vhdl_testbench->set_clock    ("in_CLOCK",true);
    26 #endif   
    27 
    2823   log_printf(FUNC,Select_Priority_Fixed,"vhdl_port","End");
    2924  };

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Select/Select_Priority_Fixed/src/Select_Priority_Fixed_vhdl_testbench_transition.cpp

    r40 r41  
    2323    sc_start(0);
    2424
    25     _interfaces->testbench(_vhdl_testbench);
    26 
    27     // add_test :
    28     //  - True  : the cycle must be compare with the output of systemC
    29     //  - False : no test
    30     _vhdl_testbench->add_test(true);
    31 
    32     _vhdl_testbench->new_cycle (); // always at the end
     25    _interfaces->testbench();
    3326
    3427    log_printf(FUNC,Select_Priority_Fixed,"vhdl_testbench_transition","End");
Note: See TracChangeset for help on using the changeset viewer.