- Timestamp:
- Jul 5, 2007, 5:50:19 PM (17 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter
- Files:
-
- 2 deleted
- 11 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/SelfTest/src/test.cpp
r2 r42 43 43 *********************************************************************/ 44 44 sc_clock CLOCK ("clock", 1.0, 0.5); 45 sc_signal<Tcontrol_t> RESET; 45 46 sc_signal<Tdata_t> DATA_IN [param._nb_port]; 46 47 sc_signal<Tcontrol_t> ADDSUB [param._nb_port]; … … 53 54 cout << "<" << name << "> Instanciation of _Counter" << endl; 54 55 55 #if defined(STATISTICS) or defined(VHDL_TESTBENCH)56 56 (*(_Counter->in_CLOCK)) (CLOCK); 57 #endif 57 (*(_Counter->in_NRESET)) (RESET); 58 58 59 59 for (uint32_t i=0; i<param._nb_port; i++) … … 79 79 80 80 sc_start(0); 81 _Counter->vhdl_testbench_label("Initialisation"); 81 82 RESET.write(1); 83 82 84 cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} Initialisation" << endl; 83 85 84 _Counter->vhdl_testbench_label("Loop of Test");85 86 cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} Loop of Test" << endl; 86 87 87 88 for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++) 88 89 { 89 _Counter->vhdl_testbench_label("Iteration "+toString(iteration));90 90 cout << "{" << static_cast<uint32_t>(sc_simulation_time()) << "} Itération " << iteration << endl; 91 91 for (uint32_t i=0; i<param._nb_port; i++) -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/include/Counter.h
r2 r42 25 25 #include "Behavioural/include/Vhdl.h" 26 26 #endif 27 #ifdef VHDL_TESTBENCH 28 #include "Behavioural/include/Vhdl_Testbench.h" 29 #endif 27 #include "Behavioural/include/Component.h" 30 28 31 29 using namespace std; 32 30 33 namespace morpheo 31 namespace morpheo { 34 32 namespace behavioural { 35 33 namespace generic { 36 34 namespace counter { 37 38 35 39 36 class Counter … … 55 52 #endif 56 53 57 #ifdef VHDL_TESTBENCH 58 private : Vhdl_Testbench * _vhdl_testbench; 59 #endif 54 public : Component * _component; 55 private : Interfaces * _interfaces; 60 56 61 57 #ifdef SYSTEMC … … 63 59 // Interface 64 60 public : SC_CLOCK * in_CLOCK ; 65 61 public : SC_IN (Tcontrol_t) * in_NRESET ; 66 62 public : SC_IN (Tdata_t) ** in_COUNTER_DATA ; 67 63 public : SC_IN (Tcontrol_t) ** in_COUNTER_ADDSUB ; … … 107 103 #if VHDL 108 104 public : void vhdl (void); 109 private : void vhdl_port (Vhdl & vhdl);110 private : void vhdl_declaration (Vhdl & vhdl);111 private : void vhdl_body (Vhdl & vhdl);105 private : void vhdl_port (Vhdl * & vhdl); 106 private : void vhdl_declaration (Vhdl * & vhdl); 107 private : void vhdl_body (Vhdl * & vhdl); 112 108 #endif 113 109 114 110 #ifdef VHDL_TESTBENCH 115 private : void vhdl_testbench_port (void);116 111 private : void vhdl_testbench_transition (void); 117 112 #endif 118 public : void vhdl_testbench_label (string label);119 113 }; 120 114 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter.cpp
r2 r42 31 31 log_printf(FUNC,Counter,"Counter","Begin"); 32 32 33 #ifdef SYSTEMC 34 allocation (); 35 #endif 36 33 37 #ifdef STATISTICS 34 38 // Allocation of statistics … … 36 40 param_statistics , 37 41 param); 38 #endif39 40 #ifdef VHDL_TESTBENCH41 // Creation of a testbench42 // -> port43 // -> clock's signals44 _vhdl_testbench = new Vhdl_Testbench (_name);45 vhdl_testbench_port ();46 _vhdl_testbench->set_clock ("in_CLOCK",false);47 42 #endif 48 43 … … 53 48 54 49 #ifdef SYSTEMC 55 allocation ();56 57 50 SC_METHOD (transition); 58 51 dont_initialize (); … … 85 78 #endif 86 79 87 #ifdef VHDL_TESTBENCH88 // generate the test bench89 _vhdl_testbench->generate_file();90 delete _vhdl_testbench;91 #endif92 93 80 #ifdef STATISTICS 94 81 _stat->generate_file(statistics(0)); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_allocation.cpp
r2 r42 21 21 log_printf(FUNC,Counter,"allocation","Begin"); 22 22 23 #if defined(STATISTICS) or defined(VHDL_TESTBENCH) 24 in_CLOCK = new SC_CLOCK ("in_CLOCK"); 23 _component = new Component (); 24 25 Entity * entity = _component->set_entity (_name 26 ,"Counter" 27 #ifdef POSITION 28 ,COMBINATORY 25 29 #endif 30 ); 31 32 _interfaces = entity->set_interfaces(); 26 33 27 in_COUNTER_DATA = new SC_IN (Tdata_t) * [_param._nb_port]; 28 in_COUNTER_ADDSUB= new SC_IN (Tcontrol_t) * [_param._nb_port]; 29 out_COUNTER_DATA = new SC_OUT(Tdata_t) * [_param._nb_port]; 30 31 for (uint32_t i=0; i<_param._nb_port; i++) 32 { 33 rename = " in_COUNTER_DATA_" +toString(i); 34 in_COUNTER_DATA [i] = new SC_IN (Tdata_t) (rename.c_str()); 34 // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 35 { 36 Interface * interface = _interfaces->set_interface("" 37 #ifdef POSITION 38 , IN 39 , SOUTH 40 , "Generalist interface" 41 #endif 42 ); 43 44 in_CLOCK = interface->set_signal_clk ("clock" ,1,CLOCK_VHDL_NO); 45 in_NRESET = interface->set_signal_in <Tcontrol_t> ("nreset",1,RESET_VHDL_NO); 46 } 35 47 36 rename = " in_COUNTER_ADDSUB_"+toString(i); 37 in_COUNTER_ADDSUB[i] = new SC_IN (Tcontrol_t) (rename.c_str()); 38 39 rename = "out_COUNTER_DATA_" +toString(i); 40 out_COUNTER_DATA [i] = new SC_OUT(Tdata_t) (rename.c_str()); 41 } 48 // ~~~~~[ Interface : "counter" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 49 { 50 in_COUNTER_DATA = new SC_IN (Tdata_t) * [_param._nb_port]; 51 in_COUNTER_ADDSUB= new SC_IN (Tcontrol_t) * [_param._nb_port]; 52 out_COUNTER_DATA = new SC_OUT(Tdata_t) * [_param._nb_port]; 53 54 for (uint32_t i=0; i<_param._nb_port; i++) 55 { 56 Interface_fifo * interface = _interfaces->set_interface("counter_"+toString(i) 57 #ifdef POSITION 58 , IN 59 , SOUTH 60 , "Counter interface" 61 #endif 62 ); 63 64 in_COUNTER_DATA [i] = interface->set_signal_in <Tdata_t > ("data" , _param._size_data); 65 in_COUNTER_ADDSUB [i] = interface->set_signal_in <Tcontrol_t> ("addsub", 1 ); 66 out_COUNTER_DATA [i] = interface->set_signal_out <Tdata_t > ("data" , _param._size_data); 67 } 68 } 69 #ifdef POSITION 70 _component->generate_file(); 71 #endif 42 72 43 73 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_deallocation.cpp
r2 r42 19 19 log_printf(FUNC,Counter,"deallocation","Begin"); 20 20 21 #if defined(STATISTICS) or defined(VHDL_TESTBENCH) 22 delete in_CLOCK; 23 #endif 21 delete in_CLOCK; 22 delete in_NRESET; 24 23 25 for (uint32_t i=0; i<_param._nb_port; i++) 26 { 27 delete in_COUNTER_DATA [i]; 28 delete in_COUNTER_ADDSUB[i]; 29 delete out_COUNTER_DATA [i]; 30 } 31 delete in_COUNTER_DATA ; 32 delete in_COUNTER_ADDSUB; 33 delete out_COUNTER_DATA ; 24 delete [] in_COUNTER_DATA ; 25 delete [] in_COUNTER_ADDSUB; 26 delete [] out_COUNTER_DATA ; 34 27 35 28 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 29 30 delete _component; 36 31 37 32 log_printf(FUNC,Counter,"deallocation","End"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_genMealy.cpp
r3 r42 1 1 #ifdef SYSTEMC 2 #if defined(STATISTICS) or defined(VHDL_TESTBENCH)3 2 /* 4 3 * $Id$ … … 51 50 }; // end namespace morpheo 52 51 #endif 53 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_vhdl.cpp
r2 r42 19 19 { 20 20 log_printf(FUNC,Counter,"vhdl","Begin"); 21 Vhdl vhdl (_name);21 Vhdl * vhdl = new Vhdl (_name); 22 22 23 vhdl .set_library_work (_name + "_Pack");23 vhdl->set_library_work (_name + "_Pack"); 24 24 25 25 vhdl_port (vhdl); … … 27 27 vhdl_body (vhdl); 28 28 29 vhdl.generate_file(); 29 vhdl->generate_file(); 30 31 delete vhdl; 30 32 log_printf(FUNC,Counter,"vhdl","End"); 31 33 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_vhdl_body.cpp
r2 r42 14 14 namespace counter { 15 15 16 17 void Counter::vhdl_body (Vhdl & vhdl) 16 void Counter::vhdl_body (Vhdl * & vhdl) 18 17 { 19 18 log_printf(FUNC,Counter,"vhdl_body","Begin"); 20 vhdl .set_body ("");19 vhdl->set_body (""); 21 20 22 21 for (uint32_t i=0; i<_param._nb_port; i++) … … 26 25 if (_param._size_data > 1) 27 26 { 28 counter_inc = "in_COUNTER_ DATA_"+toString(i)+"+1";29 counter_dec = "in_COUNTER_ DATA_"+toString(i)+"-1";27 counter_inc = "in_COUNTER_"+toString(i)+"_DATA+1"; 28 counter_dec = "in_COUNTER_"+toString(i)+"_DATA-1"; 30 29 } 31 30 else 32 31 { 33 counter_inc = "in_COUNTER_ DATA_"+toString(i)+"+1";34 counter_dec = "in_COUNTER_ DATA_"+toString(i)+"-1";32 counter_inc = "in_COUNTER_"+toString(i)+"_DATA+1"; 33 counter_dec = "in_COUNTER_"+toString(i)+"_DATA-1"; 35 34 } 36 35 37 vhdl .set_body ("out_COUNTER_DATA_"+toString(i)+"<=");36 vhdl->set_body ("out_COUNTER_"+toString(i)+"_DATA <="); 38 37 if (_param._size_data > 1) 39 38 { 40 vhdl .set_body ("\tin_COUNTER_DATA_"+toString(i)+"+1 when in_COUNTER_ADDSUB_"+toString(i)+" = '1' and in_COUNTER_DATA_"+toString(i)+"< cst_max else");41 vhdl .set_body ("\tin_COUNTER_DATA_"+toString(i)+"-1 when in_COUNTER_ADDSUB_"+toString(i)+" = '0' and in_COUNTER_DATA_"+toString(i)+"> cst_min else");42 vhdl .set_body ("\tin_COUNTER_DATA_"+toString(i)+";");39 vhdl->set_body ("\tin_COUNTER_"+toString(i)+"_DATA+1 when in_COUNTER_"+toString(i)+"_ADDSUB = '1' and in_COUNTER_"+toString(i)+"_DATA < cst_max else"); 40 vhdl->set_body ("\tin_COUNTER_"+toString(i)+"_DATA-1 when in_COUNTER_"+toString(i)+"_ADDSUB = '0' and in_COUNTER_"+toString(i)+"_DATA > cst_min else"); 41 vhdl->set_body ("\tin_COUNTER_"+toString(i)+"_DATA;"); 43 42 } 44 43 else 45 44 { 46 vhdl .set_body ("\tin_COUNTER_ADDSUB_"+toString(i)+";");45 vhdl->set_body ("\tin_COUNTER_"+toString(i)+"_ADDSUB;"); 47 46 } 48 47 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_vhdl_declaration.cpp
r2 r42 15 15 16 16 17 void Counter::vhdl_declaration (Vhdl & vhdl)17 void Counter::vhdl_declaration (Vhdl * & vhdl) 18 18 { 19 19 log_printf(FUNC,Counter,"vhdl_declaration","Begin"); … … 21 21 if (_param._size_data > 1) 22 22 { 23 vhdl .set_constant ("cst_min",_param._size_data,std_logic_others(_param._size_data,0));24 vhdl .set_constant ("cst_max",_param._size_data,std_logic_others(_param._size_data,1));23 vhdl->set_constant ("cst_min",_param._size_data,std_logic_others(_param._size_data,0)); 24 vhdl->set_constant ("cst_max",_param._size_data,std_logic_others(_param._size_data,1)); 25 25 } 26 26 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_vhdl_port.cpp
r2 r42 15 15 16 16 17 void Counter::vhdl_port (Vhdl & vhdl)17 void Counter::vhdl_port (Vhdl * & vhdl) 18 18 { 19 19 log_printf(FUNC,Counter,"vhdl_port","Begin"); 20 20 21 for (uint32_t i=0; i<_param._nb_port; i++) 22 { 23 vhdl.set_port (" in_COUNTER_DATA_" +toString(i), IN, _param._size_data); 24 vhdl.set_port (" in_COUNTER_ADDSUB_"+toString(i), IN, 1 ); 25 vhdl.set_port ("out_COUNTER_DATA_" +toString(i),OUT, _param._size_data); 26 } 27 21 _interfaces->set_port(vhdl); 22 28 23 log_printf(FUNC,Counter,"vhdl_port","End"); 29 24 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_vhdl_testbench_transition.cpp
r2 r42 21 21 sc_start(0); 22 22 23 // In order with file Counter_vhdl_testbench_port.cpp 24 // Warning : if a output depend of a subcomponent, take directly the port of subcomponent 25 // (because we have no control on the ordonnancer's policy) 26 27 for (uint32_t i=0; i<_param._nb_port; i++) 28 { 29 _vhdl_testbench->add_input (PORT_READ( in_COUNTER_DATA [i])); 30 _vhdl_testbench->add_input (PORT_READ( in_COUNTER_ADDSUB[i])); 31 _vhdl_testbench->add_output(PORT_READ(out_COUNTER_DATA [i])); 32 } 33 34 // add_test : 35 // - True : the cycle must be compare with the output of systemC 36 // - False : no test 37 _vhdl_testbench->add_test(true); 38 39 _vhdl_testbench->new_cycle (); // always at the end 23 _interfaces->testbench(); 40 24 41 25 log_printf(FUNC,Counter,"vhdl_testbench_transition","End");
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