Ignore:
Timestamp:
Jul 5, 2007, 5:50:19 PM (17 years ago)
Author:
rosiere
Message:

Modification des classes d'encapsulation des interfaces :

  • gère les signaux à écrire dans le vhdl
  • les traces pour le testbench
  • la génération des vhdl structurelles

-> test sur la Pattern History Table

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Counter/src/Counter_vhdl_testbench_transition.cpp

    r2 r42  
    2121    sc_start(0);
    2222
    23     // In order with file Counter_vhdl_testbench_port.cpp
    24     // Warning : if a output depend of a subcomponent, take directly the port of subcomponent
    25     // (because we have no control on the ordonnancer's policy)
    26 
    27     for (uint32_t i=0; i<_param._nb_port; i++)
    28       {
    29         _vhdl_testbench->add_input (PORT_READ( in_COUNTER_DATA  [i]));
    30         _vhdl_testbench->add_input (PORT_READ( in_COUNTER_ADDSUB[i]));
    31         _vhdl_testbench->add_output(PORT_READ(out_COUNTER_DATA  [i]));
    32       }
    33    
    34     // add_test :
    35     //  - True  : the cycle must be compare with the output of systemC
    36     //  - False : no test
    37     _vhdl_testbench->add_test(true);
    38 
    39     _vhdl_testbench->new_cycle (); // always at the end
     23    _interfaces->testbench();
    4024
    4125    log_printf(FUNC,Counter,"vhdl_testbench_transition","End");
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