Changeset 42 for trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_allocation.cpp

Timestamp:

Jul 5, 2007, 5:50:19 PM (17 years ago)

Author:

rosiere

Message:

Modification des classes d'encapsulation des interfaces :

• gère les signaux à écrire dans le vhdl
• les traces pour le testbench
• la génération des vhdl structurelles

-> test sur la Pattern History Table

File:

• trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_allocation.cpp (modified) (2 diffs)

trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/src/New_Component_allocation.cpp

@@ -19 +19 @@
     log_printf(FUNC,@COMPONENT,"allocation","Begin");
 
+    _component   = new Component ();
+
+    Entity * entity = _component->set_entity (_name       
 #ifdef POSITION
-    _position   = new Position ();
-
-    Entity * entity = _position->set_entity (_name       ,
-                                             "@COMPONENT",
-                                             COMBINATORY );
+                                              ,"@COMPONENT"
+                                              ,COMBINATORY 
+#endif
+                                              );
 
     _interfaces = entity->set_interfaces();
-#else
-    _interfaces = new Interfaces();
-#endif
 
     // ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
-    Interface * interface_ = _interfaces->set_interface("", IN  ,WEST, "Generalist interface");
+      Interface * interface = _interfaces->set_interface(""
+#ifdef POSITION
+                                                         ,IN
+                                                         ,SOUTH,
+                                                         "Generalist interface"
+#endif
+                                                         );
 
-     in_CLOCK        = interface_->set_signal_clk              ("clock" ,1, PORT_VHDL_YES_TESTBENCH_NO);
-     in_NRESET       = interface_->set_signal_in  <Tcontrol_t> ("nreset",1);
+     in_CLOCK        = interface->set_signal_clk              ("clock" ,1, PORT_VHDL_YES_TESTBENCH_NO);
+     in_NRESET       = interface->set_signal_in  <Tcontrol_t> ("nreset",1);
 
 
@@ -42 +47 @@
 
 #ifdef POSITION
-    _position->generate_file();
+    _component->generate_file();
 #endif
 
-    log_printf(FUNC,@COMPONENT,"allocation","End");
+    Log_printf(FUNC,@COMPONENT,"allocation","End");
   };