- Timestamp:
- Sep 24, 2007, 2:00:35 PM (17 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural
- Files:
-
- 52 added
- 49 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/processor/Morpheo/Behavioural/Constant/Constant_OpenRISC.h
r53 r55 1 1 #ifndef morpheo_behavioural_constant_Constant_h 2 3 2 /* 4 3 * $Id$ … … 113 112 }; // end namespace behavioural 114 113 }; // end namespace morpheo 115 116 114 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest/config0.cfg
r54 r55 1 1 Read_queue 2 2 8 *2 # size_ read_queue2 2 8 *2 # size_queue 3 3 4 4 *2 # nb_context 4 4 32 32 *2 # nb_packet -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest/config1.cfg
r54 r55 1 1 Read_queue 2 4 4 *2 # size_ read_queue2 4 4 *2 # size_queue 3 3 4 4 *2 # nb_context 4 4 32 32 *2 # nb_packet -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest/src/main.cpp
r54 r55 14 14 cerr << "<Usage> " << argv[0] << " name_instance list_params" << endl 15 15 << "list_params is :" << endl 16 << " - size_ read_queue(unsigned int)" << endl16 << " - size_queue (unsigned int)" << endl 17 17 << " - nb_context (unsigned int)" << endl 18 18 << " - nb_packet (unsigned int)" << endl … … 44 44 45 45 const string name = argv[1]; 46 const uint32_t size_ read_queue= atoi(argv[ 2]);46 const uint32_t size_queue = atoi(argv[ 2]); 47 47 const uint32_t nb_context = atoi(argv[ 3]); 48 48 const uint32_t nb_packet = atoi(argv[ 4]); … … 59 59 { 60 60 morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::read_queue::Parameters * param = new morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::read_queue::Parameters 61 ( size_ read_queue61 ( size_queue 62 62 ,nb_context 63 63 ,nb_packet -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest/src/test.cpp
r54 r55 11 11 #include "Common/include/Test.h" 12 12 13 #define NB_ITERATION 51214 #define CYCLE_MAX (1 28*NB_ITERATION)13 #define NB_ITERATION 64 14 #define CYCLE_MAX (1024*NB_ITERATION) 15 15 16 16 #define LABEL(str) \ … … 71 71 sc_signal<Tcontext_t > * READ_QUEUE_IN_CONTEXT_ID = new sc_signal<Tcontext_t > ("READ_QUEUE_IN_CONTEXT_ID "); 72 72 sc_signal<Tpacket_t > * READ_QUEUE_IN_PACKET_ID = new sc_signal<Tpacket_t > ("READ_QUEUE_IN_PACKET_ID "); 73 sc_signal< uint32_t > * READ_QUEUE_IN_OPERATION = new sc_signal<uint32_t> ("READ_QUEUE_IN_OPERATION ");73 sc_signal<Toperation_t > * READ_QUEUE_IN_OPERATION = new sc_signal<Toperation_t > ("READ_QUEUE_IN_OPERATION "); 74 74 sc_signal<Ttype_t > * READ_QUEUE_IN_TYPE = new sc_signal<Ttype_t > ("READ_QUEUE_IN_TYPE "); 75 75 sc_signal<Tcontrol_t > * READ_QUEUE_IN_HAS_IMMEDIAT = new sc_signal<Tcontrol_t > ("READ_QUEUE_IN_HAS_IMMEDIAT"); … … 92 92 sc_signal<Tcontext_t > * READ_QUEUE_OUT_CONTEXT_ID = new sc_signal<Tcontext_t > ("READ_QUEUE_OUT_CONTEXT_ID "); 93 93 sc_signal<Tpacket_t > * READ_QUEUE_OUT_PACKET_ID = new sc_signal<Tpacket_t > ("READ_QUEUE_OUT_PACKET_ID "); 94 sc_signal< uint32_t > * READ_QUEUE_OUT_OPERATION = new sc_signal<uint32_t> ("READ_QUEUE_OUT_OPERATION ");94 sc_signal<Toperation_t > * READ_QUEUE_OUT_OPERATION = new sc_signal<Toperation_t > ("READ_QUEUE_OUT_OPERATION "); 95 95 sc_signal<Ttype_t > * READ_QUEUE_OUT_TYPE = new sc_signal<Ttype_t > ("READ_QUEUE_OUT_TYPE "); 96 96 sc_signal<Tcontrol_t > * READ_QUEUE_OUT_HAS_IMMEDIAT= new sc_signal<Tcontrol_t > ("READ_QUEUE_OUT_HAS_IMMEDIAT"); … … 163 163 } 164 164 165 // ~~~~~[ Interface " bypass_gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~166 167 sc_signal<Tcontrol_t > ** BYPASS_GPR_WRITE_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_write];168 sc_signal<Tcontext_t > ** BYPASS_GPR_WRITE_CONTEXT_ID = new sc_signal<Tcontext_t > * [_param->_nb_gpr_write];169 sc_signal<Tgeneral_address_t > ** BYPASS_GPR_WRITE_NUM_REG = new sc_signal<Tgeneral_address_t > * [_param->_nb_gpr_write];170 sc_signal<Tgeneral_data_t > ** BYPASS_GPR_WRITE_DATA = new sc_signal<Tgeneral_data_t > * [_param->_nb_gpr_write];165 // ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 166 167 sc_signal<Tcontrol_t > ** GPR_WRITE_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_write]; 168 sc_signal<Tcontext_t > ** GPR_WRITE_CONTEXT_ID = new sc_signal<Tcontext_t > * [_param->_nb_gpr_write]; 169 sc_signal<Tgeneral_address_t > ** GPR_WRITE_NUM_REG = new sc_signal<Tgeneral_address_t > * [_param->_nb_gpr_write]; 170 sc_signal<Tgeneral_data_t > ** GPR_WRITE_DATA = new sc_signal<Tgeneral_data_t > * [_param->_nb_gpr_write]; 171 171 172 172 for (uint32_t i=0; i<_param->_nb_gpr_write; i++) 173 173 { 174 rename = " BYPASS_GPR_WRITE_"+toString(i)+"_VAL" ;175 BYPASS_GPR_WRITE_VAL [i] = new sc_signal<Tcontrol_t > (rename.c_str());176 rename = " BYPASS_GPR_WRITE_"+toString(i)+"_CONTEXT_ID";177 BYPASS_GPR_WRITE_CONTEXT_ID [i] = new sc_signal<Tcontext_t > (rename.c_str());178 rename = " BYPASS_GPR_WRITE_"+toString(i)+"_NUM_REG" ;179 BYPASS_GPR_WRITE_NUM_REG [i] = new sc_signal<Tgeneral_address_t > (rename.c_str());180 rename = " BYPASS_GPR_WRITE_"+toString(i)+"_DATA" ;181 BYPASS_GPR_WRITE_DATA [i] = new sc_signal<Tgeneral_data_t > (rename.c_str());182 } 183 184 // ~~~~~[ Interface " bypass_spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~185 186 sc_signal<Tcontrol_t > ** BYPASS_SPR_WRITE_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_spr_write];187 sc_signal<Tcontext_t > ** BYPASS_SPR_WRITE_CONTEXT_ID = new sc_signal<Tcontext_t > * [_param->_nb_spr_write];188 sc_signal<Tspecial_address_t > ** BYPASS_SPR_WRITE_NUM_REG = new sc_signal<Tspecial_address_t > * [_param->_nb_spr_write];189 sc_signal<Tspecial_data_t > ** BYPASS_SPR_WRITE_DATA = new sc_signal<Tspecial_data_t > * [_param->_nb_spr_write];174 rename = "GPR_WRITE_"+toString(i)+"_VAL" ; 175 GPR_WRITE_VAL [i] = new sc_signal<Tcontrol_t > (rename.c_str()); 176 rename = "GPR_WRITE_"+toString(i)+"_CONTEXT_ID"; 177 GPR_WRITE_CONTEXT_ID [i] = new sc_signal<Tcontext_t > (rename.c_str()); 178 rename = "GPR_WRITE_"+toString(i)+"_NUM_REG" ; 179 GPR_WRITE_NUM_REG [i] = new sc_signal<Tgeneral_address_t > (rename.c_str()); 180 rename = "GPR_WRITE_"+toString(i)+"_DATA" ; 181 GPR_WRITE_DATA [i] = new sc_signal<Tgeneral_data_t > (rename.c_str()); 182 } 183 184 // ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 185 186 sc_signal<Tcontrol_t > ** SPR_WRITE_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_spr_write]; 187 sc_signal<Tcontext_t > ** SPR_WRITE_CONTEXT_ID = new sc_signal<Tcontext_t > * [_param->_nb_spr_write]; 188 sc_signal<Tspecial_address_t > ** SPR_WRITE_NUM_REG = new sc_signal<Tspecial_address_t > * [_param->_nb_spr_write]; 189 sc_signal<Tspecial_data_t > ** SPR_WRITE_DATA = new sc_signal<Tspecial_data_t > * [_param->_nb_spr_write]; 190 190 191 191 for (uint32_t i=0; i<_param->_nb_spr_write; i++) 192 192 { 193 rename = " BYPASS_SPR_WRITE_"+toString(i)+"_VAL" ;194 BYPASS_SPR_WRITE_VAL [i] = new sc_signal<Tcontrol_t > (rename.c_str());195 rename = " BYPASS_SPR_WRITE_"+toString(i)+"_CONTEXT_ID";196 BYPASS_SPR_WRITE_CONTEXT_ID [i] = new sc_signal<Tcontext_t > (rename.c_str());197 rename = " BYPASS_SPR_WRITE_"+toString(i)+"_NUM_REG" ;198 BYPASS_SPR_WRITE_NUM_REG [i] = new sc_signal<Tspecial_address_t > (rename.c_str());199 rename = " BYPASS_SPR_WRITE_"+toString(i)+"_DATA" ;200 BYPASS_SPR_WRITE_DATA [i] = new sc_signal<Tspecial_data_t > (rename.c_str());193 rename = "SPR_WRITE_"+toString(i)+"_VAL" ; 194 SPR_WRITE_VAL [i] = new sc_signal<Tcontrol_t > (rename.c_str()); 195 rename = "SPR_WRITE_"+toString(i)+"_CONTEXT_ID"; 196 SPR_WRITE_CONTEXT_ID [i] = new sc_signal<Tcontext_t > (rename.c_str()); 197 rename = "SPR_WRITE_"+toString(i)+"_NUM_REG" ; 198 SPR_WRITE_NUM_REG [i] = new sc_signal<Tspecial_address_t > (rename.c_str()); 199 rename = "SPR_WRITE_"+toString(i)+"_DATA" ; 200 SPR_WRITE_DATA [i] = new sc_signal<Tspecial_data_t > (rename.c_str()); 201 201 } 202 202 … … 277 277 for (uint32_t i=0; i<_param->_nb_gpr_write; i++) 278 278 { 279 (*(_Read_queue-> in_ BYPASS_GPR_WRITE_VAL [i])) (*(BYPASS_GPR_WRITE_VAL [i]));280 (*(_Read_queue-> in_ BYPASS_GPR_WRITE_CONTEXT_ID [i])) (*(BYPASS_GPR_WRITE_CONTEXT_ID [i]));281 (*(_Read_queue-> in_ BYPASS_GPR_WRITE_NUM_REG [i])) (*(BYPASS_GPR_WRITE_NUM_REG [i]));282 (*(_Read_queue-> in_ BYPASS_GPR_WRITE_DATA [i])) (*(BYPASS_GPR_WRITE_DATA [i]));279 (*(_Read_queue-> in_GPR_WRITE_VAL [i])) (*(GPR_WRITE_VAL [i])); 280 (*(_Read_queue-> in_GPR_WRITE_CONTEXT_ID [i])) (*(GPR_WRITE_CONTEXT_ID [i])); 281 (*(_Read_queue-> in_GPR_WRITE_NUM_REG [i])) (*(GPR_WRITE_NUM_REG [i])); 282 (*(_Read_queue-> in_GPR_WRITE_DATA [i])) (*(GPR_WRITE_DATA [i])); 283 283 } 284 284 285 285 for (uint32_t i=0; i<_param->_nb_spr_write; i++) 286 286 { 287 (*(_Read_queue-> in_ BYPASS_SPR_WRITE_VAL [i])) (*(BYPASS_SPR_WRITE_VAL [i]));288 (*(_Read_queue-> in_ BYPASS_SPR_WRITE_CONTEXT_ID [i])) (*(BYPASS_SPR_WRITE_CONTEXT_ID [i]));289 (*(_Read_queue-> in_ BYPASS_SPR_WRITE_NUM_REG [i])) (*(BYPASS_SPR_WRITE_NUM_REG [i]));290 (*(_Read_queue-> in_ BYPASS_SPR_WRITE_DATA [i])) (*(BYPASS_SPR_WRITE_DATA [i]));287 (*(_Read_queue-> in_SPR_WRITE_VAL [i])) (*(SPR_WRITE_VAL [i])); 288 (*(_Read_queue-> in_SPR_WRITE_CONTEXT_ID [i])) (*(SPR_WRITE_CONTEXT_ID [i])); 289 (*(_Read_queue-> in_SPR_WRITE_NUM_REG [i])) (*(SPR_WRITE_NUM_REG [i])); 290 (*(_Read_queue-> in_SPR_WRITE_DATA [i])) (*(SPR_WRITE_DATA [i])); 291 291 } 292 292 … … 321 321 322 322 // for (uint32_t i=0; i<_param->_nb_gpr_write; i++) 323 // BYPASS_GPR_WRITE_VAL [i]->write (0);323 // GPR_WRITE_VAL [i]->write (0); 324 324 // for (uint32_t i=0; i<_param->_nb_spr_write; i++) 325 // BYPASS_SPR_WRITE_VAL [i]->write (0);325 // SPR_WRITE_VAL [i]->write (0); 326 326 327 327 NRESET->write(0); … … 337 337 int32_t percent_transaction_queue_out = (rand()%50)+25; 338 338 int32_t percent_registerfile_valid = (rand()%50)+25; 339 int32_t percent_transaction_registerfile = (rand()% 50)+25;339 int32_t percent_transaction_registerfile = (rand()%74)+25; 340 340 int32_t percent_transaction_bypass = (rand()%50)+25; 341 341 … … 368 368 } 369 369 // End initialisation ....... 370 370 371 371 uint32_t request_in = 0; 372 372 uint32_t request_out = 0; … … 437 437 Tgeneral_data_t data = rand()%(1<<_param->_size_general_data); 438 438 439 BYPASS_GPR_WRITE_VAL [i]->write(val);440 BYPASS_GPR_WRITE_CONTEXT_ID [i]->write(context);441 BYPASS_GPR_WRITE_NUM_REG [i]->write(num_reg);442 BYPASS_GPR_WRITE_DATA [i]->write(data);439 GPR_WRITE_VAL [i]->write(val); 440 GPR_WRITE_CONTEXT_ID [i]->write(context); 441 GPR_WRITE_NUM_REG [i]->write(num_reg); 442 GPR_WRITE_DATA [i]->write(data); 443 443 444 444 if (val) … … 455 455 Tspecial_data_t data = rand()%(1<<_param->_size_special_data); 456 456 457 BYPASS_SPR_WRITE_VAL [i]->write(val);458 BYPASS_SPR_WRITE_CONTEXT_ID [i]->write(context);459 BYPASS_SPR_WRITE_NUM_REG [i]->write(num_reg);460 BYPASS_SPR_WRITE_DATA [i]->write(data);457 SPR_WRITE_VAL [i]->write(val); 458 SPR_WRITE_CONTEXT_ID [i]->write(context); 459 SPR_WRITE_NUM_REG [i]->write(num_reg); 460 SPR_WRITE_DATA [i]->write(data); 461 461 462 462 if (val) … … 483 483 484 484 LABEL("Accepted READ_QUEUE_OUT ["+toString(packet_id)+"]"); 485 485 486 486 TEST(uint32_t , packet_id ,request_out); 487 487 … … 579 579 delete [] SPR_READ_DATA_VAL; 580 580 581 delete [] BYPASS_GPR_WRITE_VAL ;582 delete [] BYPASS_GPR_WRITE_CONTEXT_ID ;583 delete [] BYPASS_GPR_WRITE_NUM_REG ;584 delete [] BYPASS_GPR_WRITE_DATA ;585 586 delete [] BYPASS_SPR_WRITE_VAL ;587 delete [] BYPASS_SPR_WRITE_CONTEXT_ID ;588 delete [] BYPASS_SPR_WRITE_NUM_REG ;589 delete [] BYPASS_SPR_WRITE_DATA ;581 delete [] GPR_WRITE_VAL ; 582 delete [] GPR_WRITE_CONTEXT_ID ; 583 delete [] GPR_WRITE_NUM_REG ; 584 delete [] GPR_WRITE_DATA ; 585 586 delete [] SPR_WRITE_VAL ; 587 delete [] SPR_WRITE_CONTEXT_ID ; 588 delete [] SPR_WRITE_NUM_REG ; 589 delete [] SPR_WRITE_DATA ; 590 590 #endif 591 591 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/include/Parameters.h
r54 r55 26 26 { 27 27 //-----[ fields ]------------------------------------------------------------ 28 public : const uint32_t _size_ read_queue;28 public : const uint32_t _size_queue ; 29 29 public : const uint32_t _nb_context ; 30 30 public : const uint32_t _nb_packet ; … … 48 48 49 49 //-----[ methods ]----------------------------------------------------------- 50 public : Parameters ( uint32_t size_read_queue,51 52 53 54 55 56 57 58 59 60 50 public : Parameters (uint32_t size_queue , 51 uint32_t nb_context , 52 uint32_t nb_packet , 53 uint32_t size_general_data , 54 uint32_t size_special_data , 55 uint32_t nb_general_register, 56 uint32_t nb_special_register, 57 uint32_t nb_operation , 58 uint32_t nb_type , 59 uint32_t nb_gpr_write , 60 uint32_t nb_spr_write ); 61 61 public : Parameters (Parameters & param) ; 62 62 public : ~Parameters () ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/include/Read_queue.h
r54 r55 270 270 public : SC_IN (Tcontrol_t ) ** in_SPR_READ_DATA_VAL ; 271 271 272 // ~~~~~[ Interface " bypass_gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~273 274 public : SC_IN (Tcontrol_t ) ** in_ BYPASS_GPR_WRITE_VAL ;275 public : SC_IN (Tcontext_t ) ** in_ BYPASS_GPR_WRITE_CONTEXT_ID;276 public : SC_IN (Tgeneral_address_t) ** in_ BYPASS_GPR_WRITE_NUM_REG ;277 public : SC_IN (Tgeneral_data_t ) ** in_ BYPASS_GPR_WRITE_DATA ;278 279 // ~~~~~[ Interface " bypass_spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~280 281 public : SC_IN (Tcontrol_t ) ** in_ BYPASS_SPR_WRITE_VAL ;282 public : SC_IN (Tcontext_t ) ** in_ BYPASS_SPR_WRITE_CONTEXT_ID;283 public : SC_IN (Tspecial_address_t) ** in_ BYPASS_SPR_WRITE_NUM_REG ;284 public : SC_IN (Tspecial_data_t ) ** in_ BYPASS_SPR_WRITE_DATA ;272 // ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 273 274 public : SC_IN (Tcontrol_t ) ** in_GPR_WRITE_VAL ; 275 public : SC_IN (Tcontext_t ) ** in_GPR_WRITE_CONTEXT_ID; 276 public : SC_IN (Tgeneral_address_t) ** in_GPR_WRITE_NUM_REG ; 277 public : SC_IN (Tgeneral_data_t ) ** in_GPR_WRITE_DATA ; 278 279 // ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 280 281 public : SC_IN (Tcontrol_t ) ** in_SPR_WRITE_VAL ; 282 public : SC_IN (Tcontext_t ) ** in_SPR_WRITE_CONTEXT_ID; 283 public : SC_IN (Tspecial_address_t) ** in_SPR_WRITE_NUM_REG ; 284 public : SC_IN (Tspecial_data_t ) ** in_SPR_WRITE_DATA ; 285 285 286 286 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/include/Types.h
r54 r55 26 26 typedef uint32_t Tcontext_t ; 27 27 typedef uint32_t Tpacket_t ; 28 typedef uint32_t Toperation_t ; 28 //typedef uint32_t Toperation_t ; // cf Constant_OpenRISC.h 29 29 typedef uint32_t Ttype_t ; 30 30 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Parameters.cpp
r54 r55 18 18 19 19 20 Parameters::Parameters (uint32_t size_ read_queue,20 Parameters::Parameters (uint32_t size_queue , 21 21 uint32_t nb_context , 22 22 uint32_t nb_packet , … … 29 29 uint32_t nb_gpr_write , 30 30 uint32_t nb_spr_write ): 31 _size_ read_queue (size_read_queue),31 _size_queue (size_queue ), 32 32 _nb_context (nb_context ), 33 33 _nb_packet (nb_packet ), … … 56 56 57 57 Parameters::Parameters (Parameters & param): 58 _size_ read_queue (param._size_read_queue),58 _size_queue (param._size_queue ), 59 59 _nb_context (param._nb_context ), 60 60 _nb_packet (param._nb_packet ), -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Parameters_msg_error.cpp
r54 r55 27 27 string msg = ""; 28 28 29 if (_size_ read_queue < 2)29 if (_size_queue < 2) 30 30 { 31 31 msg += " - The read_queue must be have less a depth of 2"; 32 msg += " * size_ read_queue : " + toString(_size_read_queue) + "\n";32 msg += " * size_queue : " + toString(_size_queue) + "\n"; 33 33 } 34 34 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Parameters_print.cpp
r54 r55 27 27 28 28 xml.balise_open("read_queue"); 29 xml.singleton_begin("size_ read_queue "); xml.attribut("value",toString(_size_read_queue)); xml.singleton_end();29 xml.singleton_begin("size_queue "); xml.attribut("value",toString(_size_queue )); xml.singleton_end(); 30 30 xml.singleton_begin("nb_context "); xml.attribut("value",toString(_nb_context )); xml.singleton_end(); 31 31 xml.singleton_begin("nb_packet "); xml.attribut("value",toString(_nb_packet )); xml.singleton_end(); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue.cpp
r54 r55 77 77 sensitive << *(in_SPR_READ_ACK [i]); 78 78 for (uint32_t i=0; i<_param->_nb_gpr_write; i++) 79 sensitive << *(in_ BYPASS_GPR_WRITE_VAL [i])80 << *(in_ BYPASS_GPR_WRITE_CONTEXT_ID [i])81 << *(in_ BYPASS_GPR_WRITE_NUM_REG [i]);79 sensitive << *(in_GPR_WRITE_VAL [i]) 80 << *(in_GPR_WRITE_CONTEXT_ID [i]) 81 << *(in_GPR_WRITE_NUM_REG [i]); 82 82 for (uint32_t i=0; i<_param->_nb_spr_write; i++) 83 sensitive << *(in_ BYPASS_SPR_WRITE_VAL [i])84 << *(in_ BYPASS_SPR_WRITE_CONTEXT_ID [i])85 << *(in_ BYPASS_SPR_WRITE_NUM_REG [i]);83 sensitive << *(in_SPR_WRITE_VAL [i]) 84 << *(in_SPR_WRITE_CONTEXT_ID [i]) 85 << *(in_SPR_WRITE_NUM_REG [i]); 86 86 87 87 #ifdef SYSTEMCASS_SPECIFIC … … 93 93 for (uint32_t i=0; i<_param->_nb_gpr_write ; i++) 94 94 { 95 (*(out_READ_QUEUE_OUT_VAL)) (*(in_ BYPASS_GPR_WRITE_VAL [i]));96 (*(out_READ_QUEUE_OUT_VAL)) (*(in_ BYPASS_GPR_WRITE_CONTEXT_ID [i]));97 (*(out_READ_QUEUE_OUT_VAL)) (*(in_ BYPASS_GPR_WRITE_NUM_REG [i]));95 (*(out_READ_QUEUE_OUT_VAL)) (*(in_GPR_WRITE_VAL [i])); 96 (*(out_READ_QUEUE_OUT_VAL)) (*(in_GPR_WRITE_CONTEXT_ID [i])); 97 (*(out_READ_QUEUE_OUT_VAL)) (*(in_GPR_WRITE_NUM_REG [i])); 98 98 } 99 99 for (uint32_t i=0; i<_param->_nb_spr_write ; i++) 100 100 { 101 (*(out_READ_QUEUE_OUT_VAL)) (*(in_ BYPASS_SPR_WRITE_VAL [i]));102 (*(out_READ_QUEUE_OUT_VAL)) (*(in_ BYPASS_SPR_WRITE_CONTEXT_ID [i]));103 (*(out_READ_QUEUE_OUT_VAL)) (*(in_ BYPASS_SPR_WRITE_NUM_REG [i]));101 (*(out_READ_QUEUE_OUT_VAL)) (*(in_SPR_WRITE_VAL [i])); 102 (*(out_READ_QUEUE_OUT_VAL)) (*(in_SPR_WRITE_CONTEXT_ID [i])); 103 (*(out_READ_QUEUE_OUT_VAL)) (*(in_SPR_WRITE_NUM_REG [i])); 104 104 } 105 105 #endif … … 115 115 << *(in_GPR_READ_DATA_VAL [i]); 116 116 for (uint32_t i=0; i<_param->_nb_gpr_write; i++) 117 sensitive << *(in_ BYPASS_GPR_WRITE_VAL [i])118 << *(in_ BYPASS_GPR_WRITE_CONTEXT_ID [i])119 << *(in_ BYPASS_GPR_WRITE_NUM_REG [i])120 << *(in_ BYPASS_GPR_WRITE_DATA [i]);117 sensitive << *(in_GPR_WRITE_VAL [i]) 118 << *(in_GPR_WRITE_CONTEXT_ID [i]) 119 << *(in_GPR_WRITE_NUM_REG [i]) 120 << *(in_GPR_WRITE_DATA [i]); 121 121 122 122 #ifdef SYSTEMCASS_SPECIFIC … … 133 133 for (uint32_t i=0; i<_param->_nb_gpr_write ; i++) 134 134 { 135 (*(out_READ_QUEUE_OUT_DATA_RA_VAL)) (*(in_ BYPASS_GPR_WRITE_VAL [i]));136 (*(out_READ_QUEUE_OUT_DATA_RA_VAL)) (*(in_ BYPASS_GPR_WRITE_CONTEXT_ID [i]));137 (*(out_READ_QUEUE_OUT_DATA_RA_VAL)) (*(in_ BYPASS_GPR_WRITE_NUM_REG [i]));138 (*(out_READ_QUEUE_OUT_DATA_RB_VAL)) (*(in_ BYPASS_GPR_WRITE_VAL [i]));139 (*(out_READ_QUEUE_OUT_DATA_RB_VAL)) (*(in_ BYPASS_GPR_WRITE_CONTEXT_ID [i]));140 (*(out_READ_QUEUE_OUT_DATA_RB_VAL)) (*(in_ BYPASS_GPR_WRITE_NUM_REG [i]));141 142 (*(out_READ_QUEUE_OUT_DATA_RA )) (*(in_ BYPASS_GPR_WRITE_VAL [i]));143 (*(out_READ_QUEUE_OUT_DATA_RA )) (*(in_ BYPASS_GPR_WRITE_CONTEXT_ID [i]));144 (*(out_READ_QUEUE_OUT_DATA_RA )) (*(in_ BYPASS_GPR_WRITE_NUM_REG [i]));145 (*(out_READ_QUEUE_OUT_DATA_RA )) (*(in_ BYPASS_GPR_WRITE_DATA [i]));146 (*(out_READ_QUEUE_OUT_DATA_RB )) (*(in_ BYPASS_GPR_WRITE_VAL [i]));147 (*(out_READ_QUEUE_OUT_DATA_RB )) (*(in_ BYPASS_GPR_WRITE_CONTEXT_ID [i]));148 (*(out_READ_QUEUE_OUT_DATA_RB )) (*(in_ BYPASS_GPR_WRITE_NUM_REG [i]));149 (*(out_READ_QUEUE_OUT_DATA_RB )) (*(in_ BYPASS_GPR_WRITE_DATA [i]));135 (*(out_READ_QUEUE_OUT_DATA_RA_VAL)) (*(in_GPR_WRITE_VAL [i])); 136 (*(out_READ_QUEUE_OUT_DATA_RA_VAL)) (*(in_GPR_WRITE_CONTEXT_ID [i])); 137 (*(out_READ_QUEUE_OUT_DATA_RA_VAL)) (*(in_GPR_WRITE_NUM_REG [i])); 138 (*(out_READ_QUEUE_OUT_DATA_RB_VAL)) (*(in_GPR_WRITE_VAL [i])); 139 (*(out_READ_QUEUE_OUT_DATA_RB_VAL)) (*(in_GPR_WRITE_CONTEXT_ID [i])); 140 (*(out_READ_QUEUE_OUT_DATA_RB_VAL)) (*(in_GPR_WRITE_NUM_REG [i])); 141 142 (*(out_READ_QUEUE_OUT_DATA_RA )) (*(in_GPR_WRITE_VAL [i])); 143 (*(out_READ_QUEUE_OUT_DATA_RA )) (*(in_GPR_WRITE_CONTEXT_ID [i])); 144 (*(out_READ_QUEUE_OUT_DATA_RA )) (*(in_GPR_WRITE_NUM_REG [i])); 145 (*(out_READ_QUEUE_OUT_DATA_RA )) (*(in_GPR_WRITE_DATA [i])); 146 (*(out_READ_QUEUE_OUT_DATA_RB )) (*(in_GPR_WRITE_VAL [i])); 147 (*(out_READ_QUEUE_OUT_DATA_RB )) (*(in_GPR_WRITE_CONTEXT_ID [i])); 148 (*(out_READ_QUEUE_OUT_DATA_RB )) (*(in_GPR_WRITE_NUM_REG [i])); 149 (*(out_READ_QUEUE_OUT_DATA_RB )) (*(in_GPR_WRITE_DATA [i])); 150 150 } 151 151 #endif … … 161 161 << *(in_SPR_READ_DATA_VAL [i]); 162 162 for (uint32_t i=0; i<_param->_nb_spr_write; i++) 163 sensitive << *(in_ BYPASS_SPR_WRITE_VAL [i])164 << *(in_ BYPASS_SPR_WRITE_CONTEXT_ID [i])165 << *(in_ BYPASS_SPR_WRITE_NUM_REG [i])166 << *(in_ BYPASS_SPR_WRITE_DATA [i]);163 sensitive << *(in_SPR_WRITE_VAL [i]) 164 << *(in_SPR_WRITE_CONTEXT_ID [i]) 165 << *(in_SPR_WRITE_NUM_REG [i]) 166 << *(in_SPR_WRITE_DATA [i]); 167 167 168 168 #ifdef SYSTEMCASS_SPECIFIC … … 176 176 for (uint32_t i=0; i<_param->_nb_spr_write ; i++) 177 177 { 178 (*(out_READ_QUEUE_OUT_DATA_RC_VAL)) (*(in_ BYPASS_SPR_WRITE_VAL [i]));179 (*(out_READ_QUEUE_OUT_DATA_RC_VAL)) (*(in_ BYPASS_SPR_WRITE_CONTEXT_ID [i]));180 (*(out_READ_QUEUE_OUT_DATA_RC_VAL)) (*(in_ BYPASS_SPR_WRITE_NUM_REG [i]));181 182 (*(out_READ_QUEUE_OUT_DATA_RC )) (*(in_ BYPASS_SPR_WRITE_VAL [i]));183 (*(out_READ_QUEUE_OUT_DATA_RC )) (*(in_ BYPASS_SPR_WRITE_CONTEXT_ID [i]));184 (*(out_READ_QUEUE_OUT_DATA_RC )) (*(in_ BYPASS_SPR_WRITE_NUM_REG [i]));185 (*(out_READ_QUEUE_OUT_DATA_RC )) (*(in_ BYPASS_SPR_WRITE_DATA [i]));178 (*(out_READ_QUEUE_OUT_DATA_RC_VAL)) (*(in_SPR_WRITE_VAL [i])); 179 (*(out_READ_QUEUE_OUT_DATA_RC_VAL)) (*(in_SPR_WRITE_CONTEXT_ID [i])); 180 (*(out_READ_QUEUE_OUT_DATA_RC_VAL)) (*(in_SPR_WRITE_NUM_REG [i])); 181 182 (*(out_READ_QUEUE_OUT_DATA_RC )) (*(in_SPR_WRITE_VAL [i])); 183 (*(out_READ_QUEUE_OUT_DATA_RC )) (*(in_SPR_WRITE_CONTEXT_ID [i])); 184 (*(out_READ_QUEUE_OUT_DATA_RC )) (*(in_SPR_WRITE_NUM_REG [i])); 185 (*(out_READ_QUEUE_OUT_DATA_RC )) (*(in_SPR_WRITE_DATA [i])); 186 186 } 187 187 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_allocation.cpp
r54 r55 170 170 } 171 171 172 // ~~~~~[ Interface : " bypass_gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~173 174 in_ BYPASS_GPR_WRITE_VAL = new SC_IN (Tcontrol_t ) * [_param->_nb_gpr_write];175 in_ BYPASS_GPR_WRITE_CONTEXT_ID= new SC_IN (Tcontext_t ) * [_param->_nb_gpr_write];176 in_ BYPASS_GPR_WRITE_NUM_REG = new SC_IN (Tgeneral_address_t) * [_param->_nb_gpr_write];177 in_ BYPASS_GPR_WRITE_DATA = new SC_IN (Tgeneral_data_t ) * [_param->_nb_gpr_write];172 // ~~~~~[ Interface : "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 173 174 in_GPR_WRITE_VAL = new SC_IN (Tcontrol_t ) * [_param->_nb_gpr_write]; 175 in_GPR_WRITE_CONTEXT_ID= new SC_IN (Tcontext_t ) * [_param->_nb_gpr_write]; 176 in_GPR_WRITE_NUM_REG = new SC_IN (Tgeneral_address_t) * [_param->_nb_gpr_write]; 177 in_GPR_WRITE_DATA = new SC_IN (Tgeneral_data_t ) * [_param->_nb_gpr_write]; 178 178 179 179 for (uint32_t i=0; i<_param->_nb_gpr_write; i++) 180 180 { 181 Interface_fifo * interface = _interfaces->set_interface(" bypass_gpr_write_"+toString(i)181 Interface_fifo * interface = _interfaces->set_interface("gpr_write_"+toString(i) 182 182 #ifdef POSITION 183 183 , IN … … 187 187 ); 188 188 189 in_ BYPASS_GPR_WRITE_VAL [i] = interface->set_signal_valack_in ("val" , VAL);190 in_ BYPASS_GPR_WRITE_CONTEXT_ID [i] = interface->set_signal_in <Tcontext_t > ("context_id",_param->_size_context_id);191 in_ BYPASS_GPR_WRITE_NUM_REG [i] = interface->set_signal_in <Tgeneral_address_t> ("num_reg" ,_param->_size_general_register);192 in_ BYPASS_GPR_WRITE_DATA [i] = interface->set_signal_in <Tgeneral_data_t > ("data" ,_param->_size_general_data);193 } 194 195 // ~~~~~[ Interface : " bypass_spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~196 197 in_ BYPASS_SPR_WRITE_VAL = new SC_IN (Tcontrol_t ) * [_param->_nb_spr_write];198 in_ BYPASS_SPR_WRITE_CONTEXT_ID= new SC_IN (Tcontext_t ) * [_param->_nb_spr_write];199 in_ BYPASS_SPR_WRITE_NUM_REG = new SC_IN (Tspecial_address_t) * [_param->_nb_spr_write];200 in_ BYPASS_SPR_WRITE_DATA = new SC_IN (Tspecial_data_t ) * [_param->_nb_spr_write];189 in_GPR_WRITE_VAL [i] = interface->set_signal_valack_in ("val" , VAL); 190 in_GPR_WRITE_CONTEXT_ID [i] = interface->set_signal_in <Tcontext_t > ("context_id",_param->_size_context_id); 191 in_GPR_WRITE_NUM_REG [i] = interface->set_signal_in <Tgeneral_address_t> ("num_reg" ,_param->_size_general_register); 192 in_GPR_WRITE_DATA [i] = interface->set_signal_in <Tgeneral_data_t > ("data" ,_param->_size_general_data); 193 } 194 195 // ~~~~~[ Interface : "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 196 197 in_SPR_WRITE_VAL = new SC_IN (Tcontrol_t ) * [_param->_nb_spr_write]; 198 in_SPR_WRITE_CONTEXT_ID= new SC_IN (Tcontext_t ) * [_param->_nb_spr_write]; 199 in_SPR_WRITE_NUM_REG = new SC_IN (Tspecial_address_t) * [_param->_nb_spr_write]; 200 in_SPR_WRITE_DATA = new SC_IN (Tspecial_data_t ) * [_param->_nb_spr_write]; 201 201 202 202 for (uint32_t i=0; i<_param->_nb_spr_write; i++) 203 203 { 204 Interface_fifo * interface = _interfaces->set_interface(" bypass_spr_write_"+toString(i)204 Interface_fifo * interface = _interfaces->set_interface("spr_write_"+toString(i) 205 205 #ifdef POSITION 206 206 , IN … … 210 210 ); 211 211 212 in_ BYPASS_SPR_WRITE_VAL [i] = interface->set_signal_valack_in ("val" , VAL);213 in_ BYPASS_SPR_WRITE_CONTEXT_ID [i] = interface->set_signal_in <Tcontext_t > ("context_id",_param->_size_context_id);214 in_ BYPASS_SPR_WRITE_NUM_REG [i] = interface->set_signal_in <Tspecial_address_t> ("num_reg" ,_param->_size_special_register);215 in_ BYPASS_SPR_WRITE_DATA [i] = interface->set_signal_in <Tspecial_data_t > ("data" ,_param->_size_special_data);212 in_SPR_WRITE_VAL [i] = interface->set_signal_valack_in ("val" , VAL); 213 in_SPR_WRITE_CONTEXT_ID [i] = interface->set_signal_in <Tcontext_t > ("context_id",_param->_size_context_id); 214 in_SPR_WRITE_NUM_REG [i] = interface->set_signal_in <Tspecial_address_t> ("num_reg" ,_param->_size_special_register); 215 in_SPR_WRITE_DATA [i] = interface->set_signal_in <Tspecial_data_t > ("data" ,_param->_size_special_data); 216 216 } 217 217 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_deallocation.cpp
r54 r55 91 91 delete [] in_SPR_READ_DATA_VAL ; 92 92 93 // ~~~~~[ Interface : " bypass_gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~93 // ~~~~~[ Interface : "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 94 94 95 delete [] in_ BYPASS_GPR_WRITE_VAL ;96 delete [] in_ BYPASS_GPR_WRITE_CONTEXT_ID;97 delete [] in_ BYPASS_GPR_WRITE_NUM_REG ;98 delete [] in_ BYPASS_GPR_WRITE_DATA ;95 delete [] in_GPR_WRITE_VAL ; 96 delete [] in_GPR_WRITE_CONTEXT_ID; 97 delete [] in_GPR_WRITE_NUM_REG ; 98 delete [] in_GPR_WRITE_DATA ; 99 99 100 // ~~~~~[ Interface : " bypass_spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~100 // ~~~~~[ Interface : "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 101 101 102 delete [] in_ BYPASS_SPR_WRITE_VAL ;103 delete [] in_ BYPASS_SPR_WRITE_CONTEXT_ID;104 delete [] in_ BYPASS_SPR_WRITE_NUM_REG ;105 delete [] in_ BYPASS_SPR_WRITE_DATA ;102 delete [] in_SPR_WRITE_VAL ; 103 delete [] in_SPR_WRITE_CONTEXT_ID; 104 delete [] in_SPR_WRITE_NUM_REG ; 105 delete [] in_SPR_WRITE_DATA ; 106 106 107 107 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_genMealy_read_queue_out_gpr.cpp
r54 r55 66 66 { 67 67 // Test if this bypass is valid 68 if ( (PORT_READ (in_ BYPASS_GPR_WRITE_VAL [i]) == 1) and69 (PORT_READ (in_ BYPASS_GPR_WRITE_CONTEXT_ID [i]) == _queue_head->_context_id)68 if ( (PORT_READ (in_GPR_WRITE_VAL [i]) == 1) and 69 (PORT_READ (in_GPR_WRITE_CONTEXT_ID [i]) == _queue_head->_context_id) 70 70 ) 71 71 { 72 Tgeneral_address_t bypass_gpr_write_num_reg = PORT_READ(in_BYPASS_GPR_WRITE_NUM_REG [i]);73 Tgeneral_data_t bypass_gpr_write_data = PORT_READ(in_BYPASS_GPR_WRITE_DATA [i]);72 Tgeneral_address_t gpr_write_num_reg = PORT_READ(in_GPR_WRITE_NUM_REG [i]); 73 Tgeneral_data_t gpr_write_data = PORT_READ(in_GPR_WRITE_DATA [i]); 74 74 75 if (_queue_head->_num_reg_ra == bypass_gpr_write_num_reg)75 if (_queue_head->_num_reg_ra == gpr_write_num_reg) 76 76 { 77 77 log_printf(TRACE,Read_queue,FUNCTION," * internal_READ_QUEUE_OUT_DATA_RA_VAL - bypass hit (%d)",i); 78 78 79 79 internal_READ_QUEUE_OUT_DATA_RA_VAL = 1; 80 internal_READ_QUEUE_OUT_DATA_RA = bypass_gpr_write_data;80 internal_READ_QUEUE_OUT_DATA_RA = gpr_write_data; 81 81 } 82 if (_queue_head->_num_reg_rb == bypass_gpr_write_num_reg)82 if (_queue_head->_num_reg_rb == gpr_write_num_reg) 83 83 { 84 84 log_printf(TRACE,Read_queue,FUNCTION," * internal_READ_QUEUE_OUT_DATA_RB_VAL - bypass hit (%d)",i); 85 85 internal_READ_QUEUE_OUT_DATA_RB_VAL = 1; 86 internal_READ_QUEUE_OUT_DATA_RB = bypass_gpr_write_data;86 internal_READ_QUEUE_OUT_DATA_RB = gpr_write_data; 87 87 } 88 88 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_genMealy_read_queue_out_spr.cpp
r54 r55 51 51 { 52 52 // Test if this bypass is valid 53 if ( (PORT_READ (in_ BYPASS_SPR_WRITE_VAL [i]) == 1) and54 (PORT_READ (in_ BYPASS_SPR_WRITE_CONTEXT_ID [i]) == _queue_head->_context_id)53 if ( (PORT_READ (in_SPR_WRITE_VAL [i]) == 1) and 54 (PORT_READ (in_SPR_WRITE_CONTEXT_ID [i]) == _queue_head->_context_id) 55 55 ) 56 56 { 57 if (_queue_head->_num_reg_rc == PORT_READ(in_ BYPASS_SPR_WRITE_NUM_REG [i]))57 if (_queue_head->_num_reg_rc == PORT_READ(in_SPR_WRITE_NUM_REG [i])) 58 58 { 59 59 log_printf(TRACE,Read_queue,FUNCTION," * internal_READ_QUEUE_OUT_DATA_RC_VAL - bypass hit (%d)",i); 60 60 internal_READ_QUEUE_OUT_DATA_RC_VAL = 1; 61 internal_READ_QUEUE_OUT_DATA_RC = PORT_READ(in_ BYPASS_SPR_WRITE_DATA [i]);61 internal_READ_QUEUE_OUT_DATA_RC = PORT_READ(in_SPR_WRITE_DATA [i]); 62 62 } 63 63 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_genMealy_read_queue_out_val.cpp
r54 r55 42 42 { 43 43 // Test if this bypass is valid 44 if ( (PORT_READ (in_ BYPASS_GPR_WRITE_VAL [i]) == 1) and45 (PORT_READ (in_ BYPASS_GPR_WRITE_CONTEXT_ID [i]) == _queue_head->_context_id)44 if ( (PORT_READ (in_GPR_WRITE_VAL [i]) == 1) and 45 (PORT_READ (in_GPR_WRITE_CONTEXT_ID [i]) == _queue_head->_context_id) 46 46 ) 47 47 { 48 Tgeneral_address_t bypass_gpr_write_num_reg = PORT_READ(in_BYPASS_GPR_WRITE_NUM_REG [i]);48 Tgeneral_address_t gpr_write_num_reg = PORT_READ(in_GPR_WRITE_NUM_REG [i]); 49 49 50 if (_queue_head->_num_reg_ra == bypass_gpr_write_num_reg)50 if (_queue_head->_num_reg_ra == gpr_write_num_reg) 51 51 internal_READ_QUEUE_OUT_READ_RA_VAL = 0; 52 52 53 if (_queue_head->_num_reg_rb == bypass_gpr_write_num_reg)53 if (_queue_head->_num_reg_rb == gpr_write_num_reg) 54 54 internal_READ_QUEUE_OUT_READ_RB_VAL = 0; 55 55 } … … 59 59 { 60 60 // Test if this bypass is valid 61 if ( (PORT_READ (in_ BYPASS_SPR_WRITE_VAL [i]) == 1) and62 (PORT_READ (in_ BYPASS_SPR_WRITE_CONTEXT_ID [i]) == _queue_head->_context_id)61 if ( (PORT_READ (in_SPR_WRITE_VAL [i]) == 1) and 62 (PORT_READ (in_SPR_WRITE_CONTEXT_ID [i]) == _queue_head->_context_id) 63 63 ) 64 64 { 65 Tspecial_address_t bypass_spr_write_num_reg = PORT_READ(in_BYPASS_SPR_WRITE_NUM_REG [i]);65 Tspecial_address_t spr_write_num_reg = PORT_READ(in_SPR_WRITE_NUM_REG [i]); 66 66 67 if (_queue_head->_num_reg_rc == bypass_spr_write_num_reg)67 if (_queue_head->_num_reg_rc == spr_write_num_reg) 68 68 internal_READ_QUEUE_OUT_READ_RC_VAL = 0; 69 69 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_genMoore.cpp
r54 r55 24 24 log_printf(FUNC,Read_queue,FUNCTION,"Begin"); 25 25 26 bool not_full = not (_queue->size() == _param->_size_ read_queue);26 bool not_full = not (_queue->size() == _param->_size_queue); 27 27 bool not_empty = not _queue->empty(); 28 28 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/src/Read_queue_transition.cpp
r54 r55 47 47 // Write to read_queue 48 48 49 bool not_full = not (_queue->size() == _param->_size_ read_queue);49 bool not_full = not (_queue->size() == _param->_size_queue); 50 50 bool empty = _queue->empty(); 51 51 bool nead_new_head = false; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Group/include/Statistics.h
r2 r55 24 24 { 25 25 // -----[ fields ]---------------------------------------------------- 26 private : const Parameters 26 private : const Parameters * _parameters; 27 27 private : Counters ** _counters; 28 28 29 29 30 30 // -----[ methods ]--------------------------------------------------- 31 public : Statistics (string name ,32 morpheo::behavioural::Parameters_Statistics parameters_statistics ,33 Parameters parameters31 public : Statistics (string name , 32 morpheo::behavioural::Parameters_Statistics * parameters_statistics , 33 Parameters * parameters 34 34 ); 35 35 //public : Statistics (Statistics & stat); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Group/src/Statistics.cpp
r2 r55 14 14 namespace group { 15 15 16 Statistics::Statistics (string name ,17 morpheo::behavioural::Parameters_Statistics parameters_statistics ,18 Parameters parameters16 Statistics::Statistics (string name , 17 morpheo::behavioural::Parameters_Statistics * parameters_statistics , 18 Parameters * parameters 19 19 ) : 20 20 morpheo::behavioural::Statistics(name , -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Group/src/Statistics_add.cpp
r2 r55 32 32 void Statistics::add (uint32_t nb_use) 33 33 { 34 test_if_save<Counters,Parameters>(_counters, _parameters);34 test_if_save<Counters,Parameters>(_counters,*_parameters); 35 35 36 36 if (_nb_statistics>0) … … 42 42 _counters[i]->_nb_cycle_none_use ++; 43 43 else 44 if (nb_use == _parameters ._nb_elt)44 if (nb_use == _parameters->_nb_elt) 45 45 _counters[i]->_nb_cycle_full_use ++; 46 46 else -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/Group/src/Statistics_print_body.cpp
r2 r55 44 44 << _counters[i]->_nb_use << "\" /> <!-- average : " 45 45 << average(_counters[i]->_nb_use, nb_cycle) << " - " 46 << percent(_counters[i]->_nb_use,_parameters ._nb_elt*nb_cycle) << "% -->" << endl46 << percent(_counters[i]->_nb_use,_parameters->_nb_elt*nb_cycle) << "% -->" << endl 47 47 << tab << "\t</cycle>" << endl; 48 48 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/configuration.cfg
r23 r55 1 1 RegisterFile_Monolithic 2 2 8 *2 # nb_port_read 3 1 4 *2 # nb_port_write 4 32 256 *2 # nb_word 2 0 0 *2 # nb_port_read 3 0 0 *2 # nb_port_write 4 1 8 *2 # nb_port_read_write 5 32 32 *2 # nb_word 5 6 32 32 *2 # size_word -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/include/test.h
r50 r55 24 24 25 25 void test (string name, 26 morpheo::behavioural::generic::registerfile::registerfile_monolithic::Parameters param);26 morpheo::behavioural::generic::registerfile::registerfile_monolithic::Parameters * param); 27 27 28 28 class Time -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/mkf.info
r23 r55 5 5 target_dep RegisterFile_Monolithic_0.prj RegisterFile_Monolithic_0_Pack.vhdl RegisterFile_Monolithic_0.vhdl 6 6 7 # RegisterFile_Monolithic_108 target_dep all RegisterFile_Monolithic_10.ngc9 target_dep RegisterFile_Monolithic_10.ngc RegisterFile_Monolithic_10.prj10 target_dep RegisterFile_Monolithic_10.prj RegisterFile_Monolithic_10_Pack.vhdl RegisterFile_Monolithic_10.vhdl11 12 # RegisterFile_Monolithic_1113 target_dep all RegisterFile_Monolithic_11.ngc14 target_dep RegisterFile_Monolithic_11.ngc RegisterFile_Monolithic_11.prj15 target_dep RegisterFile_Monolithic_11.prj RegisterFile_Monolithic_11_Pack.vhdl RegisterFile_Monolithic_11.vhdl16 17 # RegisterFile_Monolithic_1218 target_dep all RegisterFile_Monolithic_12.ngc19 target_dep RegisterFile_Monolithic_12.ngc RegisterFile_Monolithic_12.prj20 target_dep RegisterFile_Monolithic_12.prj RegisterFile_Monolithic_12_Pack.vhdl RegisterFile_Monolithic_12.vhdl21 22 # RegisterFile_Monolithic_1323 target_dep all RegisterFile_Monolithic_13.ngc24 target_dep RegisterFile_Monolithic_13.ngc RegisterFile_Monolithic_13.prj25 target_dep RegisterFile_Monolithic_13.prj RegisterFile_Monolithic_13_Pack.vhdl RegisterFile_Monolithic_13.vhdl26 27 # RegisterFile_Monolithic_1428 target_dep all RegisterFile_Monolithic_14.ngc29 target_dep RegisterFile_Monolithic_14.ngc RegisterFile_Monolithic_14.prj30 target_dep RegisterFile_Monolithic_14.prj RegisterFile_Monolithic_14_Pack.vhdl RegisterFile_Monolithic_14.vhdl31 32 # RegisterFile_Monolithic_1533 target_dep all RegisterFile_Monolithic_15.ngc34 target_dep RegisterFile_Monolithic_15.ngc RegisterFile_Monolithic_15.prj35 target_dep RegisterFile_Monolithic_15.prj RegisterFile_Monolithic_15_Pack.vhdl RegisterFile_Monolithic_15.vhdl36 37 # RegisterFile_Monolithic_1638 target_dep all RegisterFile_Monolithic_16.ngc39 target_dep RegisterFile_Monolithic_16.ngc RegisterFile_Monolithic_16.prj40 target_dep RegisterFile_Monolithic_16.prj RegisterFile_Monolithic_16_Pack.vhdl RegisterFile_Monolithic_16.vhdl41 42 # RegisterFile_Monolithic_1743 target_dep all RegisterFile_Monolithic_17.ngc44 target_dep RegisterFile_Monolithic_17.ngc RegisterFile_Monolithic_17.prj45 target_dep RegisterFile_Monolithic_17.prj RegisterFile_Monolithic_17_Pack.vhdl RegisterFile_Monolithic_17.vhdl46 47 # RegisterFile_Monolithic_1848 target_dep all RegisterFile_Monolithic_18.ngc49 target_dep RegisterFile_Monolithic_18.ngc RegisterFile_Monolithic_18.prj50 target_dep RegisterFile_Monolithic_18.prj RegisterFile_Monolithic_18_Pack.vhdl RegisterFile_Monolithic_18.vhdl51 52 # RegisterFile_Monolithic_1953 target_dep all RegisterFile_Monolithic_19.ngc54 target_dep RegisterFile_Monolithic_19.ngc RegisterFile_Monolithic_19.prj55 target_dep RegisterFile_Monolithic_19.prj RegisterFile_Monolithic_19_Pack.vhdl RegisterFile_Monolithic_19.vhdl56 57 7 # RegisterFile_Monolithic_1 58 8 target_dep all RegisterFile_Monolithic_1.ngc 59 9 target_dep RegisterFile_Monolithic_1.ngc RegisterFile_Monolithic_1.prj 60 target_dep RegisterFile_Monolithic_1.prj RegisterFile_Monolithic_10_Pack.vhdl RegisterFile_Monolithic_10.vhdl RegisterFile_Monolithic_11_Pack.vhdl RegisterFile_Monolithic_11.vhdl RegisterFile_Monolithic_12_Pack.vhdl RegisterFile_Monolithic_12.vhdl RegisterFile_Monolithic_13_Pack.vhdl RegisterFile_Monolithic_13.vhdl RegisterFile_Monolithic_14_Pack.vhdl RegisterFile_Monolithic_14.vhdl RegisterFile_Monolithic_15_Pack.vhdl RegisterFile_Monolithic_15.vhdl RegisterFile_Monolithic_16_Pack.vhdl RegisterFile_Monolithic_16.vhdl RegisterFile_Monolithic_17_Pack.vhdl RegisterFile_Monolithic_17.vhdl RegisterFile_Monolithic_18_Pack.vhdl RegisterFile_Monolithic_18.vhdl RegisterFile_Monolithic_19_Pack.vhdl RegisterFile_Monolithic_19.vhdl RegisterFile_Monolithic_1_Pack.vhdl RegisterFile_Monolithic_1.vhdl 61 62 # RegisterFile_Monolithic_20 63 target_dep all RegisterFile_Monolithic_20.ngc 64 target_dep RegisterFile_Monolithic_20.ngc RegisterFile_Monolithic_20.prj 65 target_dep RegisterFile_Monolithic_20.prj RegisterFile_Monolithic_20_Pack.vhdl RegisterFile_Monolithic_20.vhdl 66 67 # RegisterFile_Monolithic_21 68 target_dep all RegisterFile_Monolithic_21.ngc 69 target_dep RegisterFile_Monolithic_21.ngc RegisterFile_Monolithic_21.prj 70 target_dep RegisterFile_Monolithic_21.prj RegisterFile_Monolithic_21_Pack.vhdl RegisterFile_Monolithic_21.vhdl 71 72 # RegisterFile_Monolithic_22 73 target_dep all RegisterFile_Monolithic_22.ngc 74 target_dep RegisterFile_Monolithic_22.ngc RegisterFile_Monolithic_22.prj 75 target_dep RegisterFile_Monolithic_22.prj RegisterFile_Monolithic_22_Pack.vhdl RegisterFile_Monolithic_22.vhdl 76 77 # RegisterFile_Monolithic_23 78 target_dep all RegisterFile_Monolithic_23.ngc 79 target_dep RegisterFile_Monolithic_23.ngc RegisterFile_Monolithic_23.prj 80 target_dep RegisterFile_Monolithic_23.prj RegisterFile_Monolithic_23_Pack.vhdl RegisterFile_Monolithic_23.vhdl 81 82 # RegisterFile_Monolithic_24 83 target_dep all RegisterFile_Monolithic_24.ngc 84 target_dep RegisterFile_Monolithic_24.ngc RegisterFile_Monolithic_24.prj 85 target_dep RegisterFile_Monolithic_24.prj RegisterFile_Monolithic_24_Pack.vhdl RegisterFile_Monolithic_24.vhdl 86 87 # RegisterFile_Monolithic_25 88 target_dep all RegisterFile_Monolithic_25.ngc 89 target_dep RegisterFile_Monolithic_25.ngc RegisterFile_Monolithic_25.prj 90 target_dep RegisterFile_Monolithic_25.prj RegisterFile_Monolithic_25_Pack.vhdl RegisterFile_Monolithic_25.vhdl 91 92 # RegisterFile_Monolithic_26 93 target_dep all RegisterFile_Monolithic_26.ngc 94 target_dep RegisterFile_Monolithic_26.ngc RegisterFile_Monolithic_26.prj 95 target_dep RegisterFile_Monolithic_26.prj RegisterFile_Monolithic_26_Pack.vhdl RegisterFile_Monolithic_26.vhdl 96 97 # RegisterFile_Monolithic_27 98 target_dep all RegisterFile_Monolithic_27.ngc 99 target_dep RegisterFile_Monolithic_27.ngc RegisterFile_Monolithic_27.prj 100 target_dep RegisterFile_Monolithic_27.prj RegisterFile_Monolithic_27_Pack.vhdl RegisterFile_Monolithic_27.vhdl 101 102 # RegisterFile_Monolithic_28 103 target_dep all RegisterFile_Monolithic_28.ngc 104 target_dep RegisterFile_Monolithic_28.ngc RegisterFile_Monolithic_28.prj 105 target_dep RegisterFile_Monolithic_28.prj RegisterFile_Monolithic_28_Pack.vhdl RegisterFile_Monolithic_28.vhdl 106 107 # RegisterFile_Monolithic_29 108 target_dep all RegisterFile_Monolithic_29.ngc 109 target_dep RegisterFile_Monolithic_29.ngc RegisterFile_Monolithic_29.prj 110 target_dep RegisterFile_Monolithic_29.prj RegisterFile_Monolithic_29_Pack.vhdl RegisterFile_Monolithic_29.vhdl 10 target_dep RegisterFile_Monolithic_1.prj RegisterFile_Monolithic_1_Pack.vhdl RegisterFile_Monolithic_1.vhdl 111 11 112 12 # RegisterFile_Monolithic_2 113 13 target_dep all RegisterFile_Monolithic_2.ngc 114 14 target_dep RegisterFile_Monolithic_2.ngc RegisterFile_Monolithic_2.prj 115 target_dep RegisterFile_Monolithic_2.prj RegisterFile_Monolithic_20_Pack.vhdl RegisterFile_Monolithic_20.vhdl RegisterFile_Monolithic_21_Pack.vhdl RegisterFile_Monolithic_21.vhdl RegisterFile_Monolithic_22_Pack.vhdl RegisterFile_Monolithic_22.vhdl RegisterFile_Monolithic_23_Pack.vhdl RegisterFile_Monolithic_23.vhdl RegisterFile_Monolithic_24_Pack.vhdl RegisterFile_Monolithic_24.vhdl RegisterFile_Monolithic_25_Pack.vhdl RegisterFile_Monolithic_25.vhdl RegisterFile_Monolithic_26_Pack.vhdl RegisterFile_Monolithic_26.vhdl RegisterFile_Monolithic_27_Pack.vhdl RegisterFile_Monolithic_27.vhdl RegisterFile_Monolithic_28_Pack.vhdl RegisterFile_Monolithic_28.vhdl RegisterFile_Monolithic_29_Pack.vhdl RegisterFile_Monolithic_29.vhdl RegisterFile_Monolithic_2_Pack.vhdl RegisterFile_Monolithic_2.vhdl 116 117 # RegisterFile_Monolithic_30 118 target_dep all RegisterFile_Monolithic_30.ngc 119 target_dep RegisterFile_Monolithic_30.ngc RegisterFile_Monolithic_30.prj 120 target_dep RegisterFile_Monolithic_30.prj RegisterFile_Monolithic_30_Pack.vhdl RegisterFile_Monolithic_30.vhdl 121 122 # RegisterFile_Monolithic_31 123 target_dep all RegisterFile_Monolithic_31.ngc 124 target_dep RegisterFile_Monolithic_31.ngc RegisterFile_Monolithic_31.prj 125 target_dep RegisterFile_Monolithic_31.prj RegisterFile_Monolithic_31_Pack.vhdl RegisterFile_Monolithic_31.vhdl 126 127 # RegisterFile_Monolithic_32 128 target_dep all RegisterFile_Monolithic_32.ngc 129 target_dep RegisterFile_Monolithic_32.ngc RegisterFile_Monolithic_32.prj 130 target_dep RegisterFile_Monolithic_32.prj RegisterFile_Monolithic_32_Pack.vhdl RegisterFile_Monolithic_32.vhdl 131 132 # RegisterFile_Monolithic_33 133 target_dep all RegisterFile_Monolithic_33.ngc 134 target_dep RegisterFile_Monolithic_33.ngc RegisterFile_Monolithic_33.prj 135 target_dep RegisterFile_Monolithic_33.prj RegisterFile_Monolithic_33_Pack.vhdl RegisterFile_Monolithic_33.vhdl 136 137 # RegisterFile_Monolithic_34 138 target_dep all RegisterFile_Monolithic_34.ngc 139 target_dep RegisterFile_Monolithic_34.ngc RegisterFile_Monolithic_34.prj 140 target_dep RegisterFile_Monolithic_34.prj RegisterFile_Monolithic_34_Pack.vhdl RegisterFile_Monolithic_34.vhdl 141 142 # RegisterFile_Monolithic_35 143 target_dep all RegisterFile_Monolithic_35.ngc 144 target_dep RegisterFile_Monolithic_35.ngc RegisterFile_Monolithic_35.prj 145 target_dep RegisterFile_Monolithic_35.prj RegisterFile_Monolithic_35_Pack.vhdl RegisterFile_Monolithic_35.vhdl 15 target_dep RegisterFile_Monolithic_2.prj RegisterFile_Monolithic_2_Pack.vhdl RegisterFile_Monolithic_2.vhdl 146 16 147 17 # RegisterFile_Monolithic_3 148 18 target_dep all RegisterFile_Monolithic_3.ngc 149 19 target_dep RegisterFile_Monolithic_3.ngc RegisterFile_Monolithic_3.prj 150 target_dep RegisterFile_Monolithic_3.prj RegisterFile_Monolithic_3 0_Pack.vhdl RegisterFile_Monolithic_30.vhdl RegisterFile_Monolithic_31_Pack.vhdl RegisterFile_Monolithic_31.vhdl RegisterFile_Monolithic_32_Pack.vhdl RegisterFile_Monolithic_32.vhdl RegisterFile_Monolithic_33_Pack.vhdl RegisterFile_Monolithic_33.vhdl RegisterFile_Monolithic_34_Pack.vhdl RegisterFile_Monolithic_34.vhdl RegisterFile_Monolithic_35_Pack.vhdl RegisterFile_Monolithic_35.vhdl RegisterFile_Monolithic_3_Pack.vhdl RegisterFile_Monolithic_3.vhdl20 target_dep RegisterFile_Monolithic_3.prj RegisterFile_Monolithic_3_Pack.vhdl RegisterFile_Monolithic_3.vhdl 151 21 152 # RegisterFile_Monolithic_4153 target_dep all RegisterFile_Monolithic_4.ngc154 target_dep RegisterFile_Monolithic_4.ngc RegisterFile_Monolithic_4.prj155 target_dep RegisterFile_Monolithic_4.prj RegisterFile_Monolithic_4_Pack.vhdl RegisterFile_Monolithic_4.vhdl156 157 # RegisterFile_Monolithic_5158 target_dep all RegisterFile_Monolithic_5.ngc159 target_dep RegisterFile_Monolithic_5.ngc RegisterFile_Monolithic_5.prj160 target_dep RegisterFile_Monolithic_5.prj RegisterFile_Monolithic_5_Pack.vhdl RegisterFile_Monolithic_5.vhdl161 162 # RegisterFile_Monolithic_6163 target_dep all RegisterFile_Monolithic_6.ngc164 target_dep RegisterFile_Monolithic_6.ngc RegisterFile_Monolithic_6.prj165 target_dep RegisterFile_Monolithic_6.prj RegisterFile_Monolithic_6_Pack.vhdl RegisterFile_Monolithic_6.vhdl166 167 # RegisterFile_Monolithic_7168 target_dep all RegisterFile_Monolithic_7.ngc169 target_dep RegisterFile_Monolithic_7.ngc RegisterFile_Monolithic_7.prj170 target_dep RegisterFile_Monolithic_7.prj RegisterFile_Monolithic_7_Pack.vhdl RegisterFile_Monolithic_7.vhdl171 172 # RegisterFile_Monolithic_8173 target_dep all RegisterFile_Monolithic_8.ngc174 target_dep RegisterFile_Monolithic_8.ngc RegisterFile_Monolithic_8.prj175 target_dep RegisterFile_Monolithic_8.prj RegisterFile_Monolithic_8_Pack.vhdl RegisterFile_Monolithic_8.vhdl176 177 # RegisterFile_Monolithic_9178 target_dep all RegisterFile_Monolithic_9.ngc179 target_dep RegisterFile_Monolithic_9.ngc RegisterFile_Monolithic_9.prj180 target_dep RegisterFile_Monolithic_9.prj RegisterFile_Monolithic_9_Pack.vhdl RegisterFile_Monolithic_9.vhdl181 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/src/main.cpp
r15 r55 8 8 #include "Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/include/test.h" 9 9 10 #define NB_PARAMS 410 #define NB_PARAMS 5 11 11 12 12 void usage (string exec) … … 14 14 cerr << "<Usage> " << exec << " name_instance list_params" << endl 15 15 << "list_params is :" << endl 16 << " - nb_port_read (unsigned int)" << endl 17 << " - nb_port_write (unsigned int)" << endl 18 << " - nb_word (unsigned int)" << endl 19 << " - size_word (unsigned int)" << endl; 16 << " - nb_port_read (unsigned int)" << endl 17 << " - nb_port_write (unsigned int)" << endl 18 << " - nb_port_read_write (unsigned int)" << endl 19 << " - nb_word (unsigned int)" << endl 20 << " - size_word (unsigned int)" << endl; 20 21 exit (1); 21 22 } … … 30 31 usage (argv[0]); 31 32 32 const string name = argv[1]; 33 const uint32_t nb_port_read = atoi(argv[2]); 34 const uint32_t nb_port_write = atoi(argv[3]); 35 const uint32_t nb_word = atoi(argv[4]); 36 const uint32_t size_word = atoi(argv[5]); 33 const string name = argv[1]; 34 const uint32_t nb_port_read = atoi(argv[2]); 35 const uint32_t nb_port_write = atoi(argv[3]); 36 const uint32_t nb_port_read_write = atoi(argv[4]); 37 const uint32_t nb_word = atoi(argv[5]); 38 const uint32_t size_word = atoi(argv[6]); 37 39 38 morpheo::behavioural::generic::registerfile::registerfile_monolithic::Parameters param (nb_port_read , 39 nb_port_write, 40 nb_word , 41 size_word ); 42 40 morpheo::behavioural::generic::registerfile::registerfile_monolithic::Parameters * param = new morpheo::behavioural::generic::registerfile::registerfile_monolithic::Parameters 41 (nb_port_read , 42 nb_port_write, 43 nb_port_read_write, 44 nb_word , 45 size_word ); 46 43 47 test (name,param); 44 48 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/src/test.cpp
r50 r55 7 7 */ 8 8 9 #define NB_ITERATION 329 #define NB_ITERATION 2 10 10 11 11 #include "Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/SelfTest/include/test.h" … … 13 13 14 14 void test (string name, 15 morpheo::behavioural::generic::registerfile::registerfile_monolithic::Parameters param)15 morpheo::behavioural::generic::registerfile::registerfile_monolithic::Parameters * _param) 16 16 { 17 17 cout << "<" << name << "> : Simulation SystemC" << endl; … … 19 19 try 20 20 { 21 cout << param.print(1);22 param.test();21 cout << _param->print(1); 22 _param->test(); 23 23 } 24 24 catch (morpheo::ErrorMorpheo & error) … … 33 33 } 34 34 35 #ifdef STATISTICS 36 morpheo::behavioural::Parameters_Statistics * _param_stat = new morpheo::behavioural::Parameters_Statistics (5,1000); 37 #endif 35 38 RegisterFile_Monolithic * registerfile = new RegisterFile_Monolithic (name.c_str() 36 39 #ifdef STATISTICS 37 , morpheo::behavioural::Parameters_Statistics(5,1000)40 ,_param_stat 38 41 #endif 39 , param);42 ,_param); 40 43 41 44 #ifdef SYSTEMC … … 46 49 sc_signal<Tcontrol_t> NRESET; 47 50 48 sc_signal<Tcontrol_t> READ_VAL [param._nb_port_read]; 49 sc_signal<Tcontrol_t> READ_ACK [param._nb_port_read]; 50 sc_signal<Taddress_t> READ_ADDRESS [param._nb_port_read]; 51 sc_signal<Tdata_t> READ_DATA [param._nb_port_read]; 52 53 sc_signal<Tcontrol_t> WRITE_VAL [param._nb_port_write]; 54 sc_signal<Tcontrol_t> WRITE_ACK [param._nb_port_write]; 55 sc_signal<Taddress_t> WRITE_ADDRESS [param._nb_port_write]; 56 sc_signal<Tdata_t> WRITE_DATA [param._nb_port_write]; 51 sc_signal<Tcontrol_t> READ_VAL [_param->_nb_port_read]; 52 sc_signal<Tcontrol_t> READ_ACK [_param->_nb_port_read]; 53 sc_signal<Taddress_t> READ_ADDRESS [_param->_nb_port_read]; 54 sc_signal<Tdata_t> READ_DATA [_param->_nb_port_read]; 55 56 sc_signal<Tcontrol_t> WRITE_VAL [_param->_nb_port_write]; 57 sc_signal<Tcontrol_t> WRITE_ACK [_param->_nb_port_write]; 58 sc_signal<Taddress_t> WRITE_ADDRESS [_param->_nb_port_write]; 59 sc_signal<Tdata_t> WRITE_DATA [_param->_nb_port_write]; 60 61 sc_signal<Tcontrol_t> READ_WRITE_VAL [_param->_nb_port_read_write]; 62 sc_signal<Tcontrol_t> READ_WRITE_ACK [_param->_nb_port_read_write]; 63 sc_signal<Tcontrol_t> READ_WRITE_RW [_param->_nb_port_read_write]; 64 sc_signal<Taddress_t> READ_WRITE_ADDRESS [_param->_nb_port_read_write]; 65 sc_signal<Tdata_t> READ_WRITE_RDATA [_param->_nb_port_read_write]; 66 sc_signal<Tdata_t> READ_WRITE_WDATA [_param->_nb_port_read_write]; 57 67 58 68 /******************************************************** … … 65 75 (*(registerfile->in_NRESET)) (NRESET); 66 76 67 for (uint32_t i=0; i< param._nb_port_read; i++)77 for (uint32_t i=0; i<_param->_nb_port_read; i++) 68 78 { 69 79 (*(registerfile-> in_READ_VAL [i])) (READ_VAL [i]); … … 72 82 (*(registerfile->out_READ_DATA [i])) (READ_DATA [i]); 73 83 } 74 75 for (uint32_t i=0; i<param._nb_port_write; i++) 84 for (uint32_t i=0; i<_param->_nb_port_write; i++) 76 85 { 77 86 (*(registerfile-> in_WRITE_VAL [i])) (WRITE_VAL [i]); … … 80 89 (*(registerfile-> in_WRITE_DATA [i])) (WRITE_DATA [i]); 81 90 } 91 for (uint32_t i=0; i<_param->_nb_port_read_write; i++) 92 { 93 (*(registerfile-> in_READ_WRITE_VAL [i])) (READ_WRITE_VAL [i]); 94 (*(registerfile->out_READ_WRITE_ACK [i])) (READ_WRITE_ACK [i]); 95 (*(registerfile-> in_READ_WRITE_RW [i])) (READ_WRITE_RW [i]); 96 (*(registerfile-> in_READ_WRITE_ADDRESS [i])) (READ_WRITE_ADDRESS [i]); 97 (*(registerfile-> in_READ_WRITE_WDATA [i])) (READ_WRITE_WDATA [i]); 98 (*(registerfile->out_READ_WRITE_RDATA [i])) (READ_WRITE_RDATA [i]); 99 } 82 100 83 101 cout << "<" << name << "> Start Simulation ............" << endl; … … 92 110 sc_start(0); 93 111 94 for (uint32_t i=0; i< param._nb_port_write; i++)112 for (uint32_t i=0; i<_param->_nb_port_write; i++) 95 113 WRITE_VAL [i] .write (0); 96 97 for (uint32_t i=0; i<param._nb_port_read; i++) 114 for (uint32_t i=0; i<_param->_nb_port_read; i++) 98 115 READ_VAL [i] .write (0); 116 for (uint32_t i=0; i<_param->_nb_port_read_write; i++) 117 READ_WRITE_VAL [i] .write (0); 99 118 100 119 NRESET.write(0); … … 115 134 srand(grain); 116 135 117 Tdata_t tab [ param._nb_word];118 119 for (uint32_t i=0; i< param._nb_word; i++)120 tab[i]= rand()%(1<<( param._size_word-1));136 Tdata_t tab [_param->_nb_word]; 137 138 for (uint32_t i=0; i<_param->_nb_word; i++) 139 tab[i]= rand()%(1<<(_param->_size_word-1)); 121 140 122 141 Taddress_t address_next = 0; 123 142 Taddress_t nb_ack = 0; 124 143 125 while (nb_ack < param._nb_word)144 while (nb_ack < _param->_nb_word) 126 145 { 127 146 cout << "cycle : " << static_cast<uint32_t> (sc_simulation_time()) << endl; 128 147 129 for (uint32_t num_port=0; num_port < param._nb_port_write; num_port ++)130 { 131 if ((address_next < param._nb_word) and148 for (uint32_t num_port=0; num_port < _param->_nb_port_write; num_port ++) 149 { 150 if ((address_next < _param->_nb_word) and 132 151 (WRITE_VAL [num_port].read() == 0)) 133 152 { … … 139 158 140 159 // Address can be not a multiple of nb_port_write 141 if (address_next >= param._nb_word) 160 if (address_next >= _param->_nb_word) 161 break; 162 } 163 } 164 165 for (uint32_t num_port=0; num_port < _param->_nb_port_read_write; num_port ++) 166 { 167 if ((address_next < _param->_nb_word) and 168 (READ_WRITE_VAL [num_port].read() == 0)) 169 { 170 cout << "(" << num_port << ") [" << address_next << "] <= " << tab[address_next] << endl; 171 172 READ_WRITE_VAL [num_port] .write(1); 173 READ_WRITE_RW [num_port] .write(RW_WRITE); 174 READ_WRITE_WDATA [num_port] .write(tab[address_next]); 175 READ_WRITE_ADDRESS [num_port] .write(address_next++); 176 177 // Address can be not a multiple of nb_port_write 178 if (address_next >= _param->_nb_word) 142 179 break; 143 180 } … … 147 184 148 185 // reset write_val port 149 for (uint32_t num_port=0; num_port < param._nb_port_write; num_port ++)186 for (uint32_t num_port=0; num_port < _param->_nb_port_write; num_port ++) 150 187 { 151 188 if ((WRITE_ACK [num_port].read() == 1) and … … 156 193 } 157 194 } 195 // reset write_val port 196 for (uint32_t num_port=0; num_port < _param->_nb_port_read_write; num_port ++) 197 { 198 if ((READ_WRITE_ACK [num_port].read() == 1) and 199 (READ_WRITE_VAL [num_port].read() == 1)) 200 { 201 READ_WRITE_VAL [num_port] .write(0); 202 nb_ack ++; 203 } 204 } 158 205 159 206 sc_start(0); … … 165 212 cout << "<" << name << "> 2) Read the RegisterFile (no write)" << endl; 166 213 167 Tdata_t read_address [param._nb_port_read]; 168 169 while (nb_ack < param._nb_word) 214 Tdata_t read_address [_param->_nb_port_read]; 215 Tdata_t read_write_address [_param->_nb_port_read_write]; 216 217 while (nb_ack < _param->_nb_word) 170 218 { 171 219 cout << "cycle : " << static_cast<uint32_t> (sc_simulation_time()) << endl; 172 220 173 for (uint32_t num_port=0; num_port < param._nb_port_read; num_port ++)174 { 175 if ((address_next < param._nb_word) and221 for (uint32_t num_port=0; num_port < _param->_nb_port_read; num_port ++) 222 { 223 if ((address_next < _param->_nb_word) and 176 224 (READ_VAL [num_port].read() == 0)) 177 225 { … … 181 229 READ_ADDRESS [num_port].write(read_address [num_port]); 182 230 183 if (address_next >= param._nb_word) 184 break; 185 } 186 } 231 if (address_next >= _param->_nb_word) 232 break; 233 } 234 } 235 236 for (uint32_t num_port=0; num_port < _param->_nb_port_read_write; num_port ++) 237 { 238 if ((address_next < _param->_nb_word) and 239 (READ_WRITE_VAL [num_port].read() == 0)) 240 { 241 read_write_address [num_port] = address_next++; 242 243 READ_WRITE_VAL [num_port].write(1); 244 READ_WRITE_RW [num_port].write(RW_READ); 245 READ_WRITE_ADDRESS [num_port].write(read_write_address [num_port]); 246 247 if (address_next >= _param->_nb_word) 248 break; 249 } 250 } 251 187 252 188 253 sc_start(1); 189 254 190 255 // reset write_val port 191 for (uint32_t num_port=0; num_port < param._nb_port_read; num_port ++)256 for (uint32_t num_port=0; num_port < _param->_nb_port_read; num_port ++) 192 257 { 193 258 if ((READ_ACK [num_port].read() == 1) and … … 199 264 200 265 TEST(Tdata_t,READ_DATA [num_port].read(), tab[read_address [num_port]]); 266 nb_ack ++; 267 } 268 } 269 270 for (uint32_t num_port=0; num_port < _param->_nb_port_read_write; num_port ++) 271 { 272 if ((READ_WRITE_ACK [num_port].read() == 1) and 273 (READ_WRITE_VAL [num_port].read() == 1)) 274 { 275 READ_WRITE_VAL [num_port] .write(0); 276 277 cout << "(" << num_port << ") [" << read_write_address [num_port] << "] => " << READ_WRITE_RDATA [num_port].read() << endl; 278 279 TEST(Tdata_t,READ_WRITE_RDATA [num_port].read(), tab[read_write_address [num_port]]); 201 280 nb_ack ++; 202 281 } -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/Parameters.h
r53 r55 23 23 public : const uint32_t _nb_port_read ; 24 24 public : const uint32_t _nb_port_write; 25 public : const uint32_t _nb_port_read_write; 25 26 public : const uint32_t _nb_word ; 26 27 public : const uint32_t _size_word ; … … 29 30 public : Parameters (uint32_t nb_port_read , 30 31 uint32_t nb_port_write, 32 uint32_t nb_port_read_write, 31 33 uint32_t nb_word , 32 34 uint32_t size_word ); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/RegisterFile_Monolithic.h
r44 r55 36 36 namespace registerfile_monolithic { 37 37 38 typedef enum {RW_READ, RW_WRITE} rw_t; 39 38 40 class RegisterFile_Monolithic 39 41 #if SYSTEMC … … 43 45 // -----[ fields ]---------------------------------------------------- 44 46 // Parameters 45 protected : const string _name;47 protected : const string _name; 46 48 47 protected : const Parameters _param;49 protected : const Parameters * _param; 48 50 #ifdef STATISTICS 49 51 private : Statistics * _stat; … … 74 76 public : SC_IN (Tdata_t) ** in_WRITE_DATA ; 75 77 78 // ----- Interface Read_Write 79 public : SC_IN (Tcontrol_t) ** in_READ_WRITE_VAL ; 80 public : SC_OUT (Tcontrol_t) ** out_READ_WRITE_ACK ; 81 public : SC_IN (Tcontrol_t) ** in_READ_WRITE_RW ; 82 public : SC_IN (Taddress_t) ** in_READ_WRITE_ADDRESS; 83 public : SC_OUT (Tdata_t) ** out_READ_WRITE_RDATA ; 84 public : SC_IN (Tdata_t) ** in_READ_WRITE_WDATA ; 85 76 86 // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 77 87 private : SC_REGISTER (Tdata_t) ** reg_DATA ; … … 93 103 #endif 94 104 #ifdef STATISTICS 95 morpheo::behavioural::Parameters_Statistics param_statistics,105 morpheo::behavioural::Parameters_Statistics * param_statistics, 96 106 #endif 97 Parameters param ); 98 99 public : RegisterFile_Monolithic (Parameters param ); 107 Parameters * param ); 100 108 public : ~RegisterFile_Monolithic (void); 101 109 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/include/Statistics.h
r44 r55 27 27 { 28 28 // -----[ fields ]---------------------------------------------------- 29 private : const Parameters _parameters; 29 private : const Parameters * _parameters; 30 private : morpheo::behavioural::generic::group::Parameters * _param_port_read; 31 private : morpheo::behavioural::generic::group::Parameters * _param_port_write; 30 32 private : morpheo::behavioural::generic::group::Statistics * _stat_port_read; 31 33 private : morpheo::behavioural::generic::group::Statistics * _stat_port_write; … … 33 35 // -----[ methods ]--------------------------------------------------- 34 36 public : Statistics (string name , 35 morpheo::behavioural::Parameters_Statistics parameters_statistics,36 Parameters parameters37 morpheo::behavioural::Parameters_Statistics * parameters_statistics , 38 Parameters * parameters 37 39 ); 38 40 //public : Statistics (Statistics & stat); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/Parameters.cpp
r53 r55 16 16 Parameters::Parameters (uint32_t nb_port_read , 17 17 uint32_t nb_port_write, 18 uint32_t nb_port_read_write , 18 19 uint32_t nb_word , 19 20 uint32_t size_word … … 21 22 _nb_port_read (nb_port_read ), 22 23 _nb_port_write (nb_port_write), 24 _nb_port_read_write(nb_port_read_write), 23 25 _nb_word (nb_word ), 24 26 _size_word (size_word ), … … 31 33 _nb_port_read (param._nb_port_read ), 32 34 _nb_port_write (param._nb_port_write), 35 _nb_port_read_write(param._nb_port_read_write), 33 36 _nb_word (param._nb_word ), 34 37 _size_word (param._size_word ), -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/Parameters_msg_error.cpp
r15 r55 25 25 { 26 26 msg += " - type \"Tdata_t\" is too little to the size defined by size_word\n"; 27 msg += 28 msg += 27 msg += " * size_word : " + toString(_size_word) + "\n"; 28 msg += " * Tdata_t (bits): " + toString(8*(sizeof(Tdata_t))) + "\n"; 29 29 } 30 30 … … 32 32 { 33 33 msg += " - type \"Taddress_t\" is too little to the size defined by nb_word\n"; 34 msg += 35 msg += 36 msg += 34 msg += " * nb_word : " + toString(_nb_word) + "\n"; 35 msg += " > size (bits) : " + toString(log2(_nb_word)) + "\n"; 36 msg += " * Taddress_t (bits) : " + toString(8*(sizeof(Taddress_t))) + "\n"; 37 37 } 38 38 39 if ((_nb_port_read + _nb_port_read_write) < 1) 40 { 41 msg += " - you need a read port\n"; 42 msg += " * nb_port_read : " + toString(_nb_port_read) + "\n"; 43 msg += " * nb_port_read_write : " + toString(_nb_port_read_write) + "\n"; 44 } 45 46 if ((_nb_port_write + _nb_port_read_write) < 1) 47 { 48 msg += " - you need a write port\n"; 49 msg += " * nb_port_write : " + toString(_nb_port_write) + "\n"; 50 msg += " * nb_port_read_write : " + toString(_nb_port_read_write) + "\n"; 51 } 39 52 if (_nb_word < 2) 40 53 { -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/Parameters_print.cpp
r15 r55 22 22 ostringstream msg; 23 23 msg << tab << "<registerfile_monolithic>" << endl 24 << tab << "\t<nb_port_read value=\"" << _nb_port_read << "\" />" << endl 25 << tab << "\t<nb_port_write value=\"" << _nb_port_write << "\" />" << endl 26 << tab << "\t<nb_word value=\"" << _nb_word << "\" />" << endl 27 << tab << "\t<size_word value=\"" << _size_word << "\" />" << endl 24 << tab << "\t<nb_port_read value=\"" << _nb_port_read << "\" />" << endl 25 << tab << "\t<nb_port_write value=\"" << _nb_port_write << "\" />" << endl 26 << tab << "\t<nb_port_read_write value=\"" << _nb_port_read_write << "\" />" << endl 27 << tab << "\t<nb_word value=\"" << _nb_word << "\" />" << endl 28 << tab << "\t<size_word value=\"" << _size_word << "\" />" << endl 28 29 << tab << "</registerfile_monolithic>" << endl; 29 30 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic.cpp
r41 r55 21 21 #endif 22 22 #ifdef STATISTICS 23 morpheo::behavioural::Parameters_Statistics param_statistics,23 morpheo::behavioural::Parameters_Statistics * param_statistics, 24 24 #endif 25 morpheo::behavioural::generic::registerfile::registerfile_monolithic::Parameters param ):25 morpheo::behavioural::generic::registerfile::registerfile_monolithic::Parameters * param ): 26 26 _name (name), 27 27 _param (param) … … 54 54 dont_initialize (); 55 55 sensitive_neg << *(in_CLOCK); 56 for (uint32_t i=0; i<_param ._nb_port_read; i++)56 for (uint32_t i=0; i<_param->_nb_port_read; i++) 57 57 sensitive << *(in_READ_VAL [i]) 58 58 << *(in_READ_ADDRESS [i]); 59 for (uint32_t i=0; i<_param->_nb_port_read_write; i++) 60 sensitive << *(in_READ_WRITE_VAL [i]) 61 << *(in_READ_WRITE_RW [i]) 62 << *(in_READ_WRITE_ADDRESS [i]); 59 63 60 64 #ifdef SYSTEMCASS_SPECIFIC 61 65 // List dependency information 62 for (uint32_t i=0; i<_param ._nb_port_read; i++)66 for (uint32_t i=0; i<_param->_nb_port_read; i++) 63 67 { 64 (*(out_READ_DATA [i])) (*( in_READ_VAL [i])); 65 (*(out_READ_DATA [i])) (*( in_READ_ADDRESS [i])); 68 (*(out_READ_DATA [i])) (*( in_READ_VAL [i])); 69 (*(out_READ_DATA [i])) (*( in_READ_ADDRESS [i])); 70 } 71 for (uint32_t i=0; i<_param->_nb_port_read_write; i++) 72 { 73 (*(out_READ_WRITE_RDATA [i])) (*( in_READ_WRITE_VAL [i])); 74 (*(out_READ_WRITE_RDATA [i])) (*( in_READ_WRITE_RW [i])); 75 (*(out_READ_WRITE_RDATA [i])) (*( in_READ_WRITE_ADDRESS [i])); 66 76 } 67 77 #endif 68 78 69 for (uint32_t i=0; i<_param._nb_port_read ; i++) 70 PORT_WRITE(out_READ_ACK [i], 1); 71 for (uint32_t i=0; i<_param._nb_port_write; i++) 72 PORT_WRITE(out_WRITE_ACK [i], 1); 79 for (uint32_t i=0; i<_param->_nb_port_read ; i++) 80 PORT_WRITE(out_READ_ACK [i], 1); 81 for (uint32_t i=0; i<_param->_nb_port_write ; i++) 82 PORT_WRITE(out_WRITE_ACK [i], 1); 83 for (uint32_t i=0; i<_param->_nb_port_read_write ; i++) 84 PORT_WRITE(out_READ_WRITE_ACK [i], 1); 73 85 #endif 74 86 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_allocation.cpp
r53 r55 43 43 // ~~~~~[ Interface : "read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 44 44 45 in_READ_VAL = new SC_IN (Tcontrol_t) * [_param ._nb_port_read];46 out_READ_ACK = new SC_OUT(Tcontrol_t) * [_param ._nb_port_read];47 in_READ_ADDRESS = new SC_IN (Taddress_t) * [_param ._nb_port_read];48 out_READ_DATA = new SC_OUT(Tdata_t ) * [_param ._nb_port_read];45 in_READ_VAL = new SC_IN (Tcontrol_t) * [_param->_nb_port_read]; 46 out_READ_ACK = new SC_OUT(Tcontrol_t) * [_param->_nb_port_read]; 47 in_READ_ADDRESS = new SC_IN (Taddress_t) * [_param->_nb_port_read]; 48 out_READ_DATA = new SC_OUT(Tdata_t ) * [_param->_nb_port_read]; 49 49 50 for (uint32_t i=0; i<_param ._nb_port_read; i++)50 for (uint32_t i=0; i<_param->_nb_port_read; i++) 51 51 { 52 52 Interface_fifo * interface = _interfaces->set_interface("read_"+toString(i) … … 60 60 in_READ_VAL [i] = interface->set_signal_valack_in ("val" , VAL); 61 61 out_READ_ACK [i] = interface->set_signal_valack_out ("ack" , ACK); 62 in_READ_ADDRESS [i] = interface->set_signal_in <Taddress_t> ("address", _param ._size_address);63 out_READ_DATA [i] = interface->set_signal_out <Tdata_t > ("data" , _param ._size_word);62 in_READ_ADDRESS [i] = interface->set_signal_in <Taddress_t> ("address", _param->_size_address); 63 out_READ_DATA [i] = interface->set_signal_out <Tdata_t > ("data" , _param->_size_word); 64 64 } 65 65 66 66 // ~~~~~[ Interface : "write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 67 67 68 in_WRITE_VAL = new SC_IN (Tcontrol_t) * [_param ._nb_port_write];69 out_WRITE_ACK = new SC_OUT(Tcontrol_t) * [_param ._nb_port_write];70 in_WRITE_ADDRESS = new SC_IN (Taddress_t) * [_param ._nb_port_write];71 in_WRITE_DATA = new SC_IN (Tdata_t ) * [_param ._nb_port_write];68 in_WRITE_VAL = new SC_IN (Tcontrol_t) * [_param->_nb_port_write]; 69 out_WRITE_ACK = new SC_OUT(Tcontrol_t) * [_param->_nb_port_write]; 70 in_WRITE_ADDRESS = new SC_IN (Taddress_t) * [_param->_nb_port_write]; 71 in_WRITE_DATA = new SC_IN (Tdata_t ) * [_param->_nb_port_write]; 72 72 73 for (uint32_t i=0; i<_param ._nb_port_write; i++)73 for (uint32_t i=0; i<_param->_nb_port_write; i++) 74 74 { 75 75 Interface_fifo * interface = _interfaces->set_interface("write_"+toString(i) … … 83 83 in_WRITE_VAL [i] = interface->set_signal_valack_in ("val" , VAL); 84 84 out_WRITE_ACK [i] = interface->set_signal_valack_out ("ack" , ACK); 85 in_WRITE_ADDRESS [i] = interface->set_signal_in <Taddress_t> ("address", _param._size_address); 86 in_WRITE_DATA [i] = interface->set_signal_in <Tdata_t > ("data" , _param._size_word); 85 in_WRITE_ADDRESS [i] = interface->set_signal_in <Taddress_t> ("address", _param->_size_address); 86 in_WRITE_DATA [i] = interface->set_signal_in <Tdata_t > ("data" , _param->_size_word); 87 } 88 89 // ~~~~~[ Interface : "read_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 90 91 in_READ_WRITE_VAL = new SC_IN (Tcontrol_t) * [_param->_nb_port_read_write]; 92 out_READ_WRITE_ACK = new SC_OUT(Tcontrol_t) * [_param->_nb_port_read_write]; 93 in_READ_WRITE_RW = new SC_IN (Tcontrol_t) * [_param->_nb_port_read_write]; 94 in_READ_WRITE_ADDRESS = new SC_IN (Taddress_t) * [_param->_nb_port_read_write]; 95 in_READ_WRITE_WDATA = new SC_IN (Tdata_t ) * [_param->_nb_port_read_write]; 96 out_READ_WRITE_RDATA = new SC_OUT(Tdata_t ) * [_param->_nb_port_read_write]; 97 98 for (uint32_t i=0; i<_param->_nb_port_read_write; i++) 99 { 100 Interface_fifo * interface = _interfaces->set_interface("read_write_"+toString(i) 101 #ifdef POSITION 102 , IN 103 ,WEST 104 , "Interface Read_Write" 105 #endif 106 ); 107 108 in_READ_WRITE_VAL [i] = interface->set_signal_valack_in ("val" , VAL); 109 out_READ_WRITE_ACK [i] = interface->set_signal_valack_out ("ack" , ACK); 110 in_READ_WRITE_RW [i] = interface->set_signal_valack_in ("rw" , VAL); 111 in_READ_WRITE_ADDRESS [i] = interface->set_signal_in <Taddress_t> ("address", _param->_size_address); 112 in_READ_WRITE_WDATA [i] = interface->set_signal_in <Tdata_t > ("wdata" , _param->_size_word); 113 out_READ_WRITE_RDATA [i] = interface->set_signal_out <Tdata_t > ("rdata" , _param->_size_word); 87 114 } 88 115 89 116 // ----- Register 90 reg_DATA = new SC_REGISTER (Tdata_t) * [_param ._nb_word];117 reg_DATA = new SC_REGISTER (Tdata_t) * [_param->_nb_word]; 91 118 92 for (uint32_t i=0; i<_param ._nb_word; i++)119 for (uint32_t i=0; i<_param->_nb_word; i++) 93 120 { 94 121 string rename = "reg_DATA[" + toString(i) + "]"; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_deallocation.cpp
r42 r55 33 33 delete [] in_WRITE_DATA ; 34 34 35 // ----- Interface Read_Write 36 delete [] in_READ_WRITE_VAL ; 37 delete [] out_READ_WRITE_ACK ; 38 delete [] in_READ_WRITE_RW ; 39 delete [] in_READ_WRITE_ADDRESS; 40 delete [] in_READ_WRITE_WDATA ; 41 delete [] out_READ_WRITE_RDATA ; 42 35 43 // ----- Register 36 44 delete [] reg_DATA; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_genMealy_read.cpp
r53 r55 23 23 #endif 24 24 25 for (uint32_t i=0; i<_param ._nb_port_read; i++)25 for (uint32_t i=0; i<_param->_nb_port_read; i++) 26 26 { 27 27 // Have a write? … … 45 45 } 46 46 } 47 48 for (uint32_t i=0; i<_param->_nb_port_read_write; i++) 49 { 50 Tdata_t data; 51 52 // Have a write? 53 if ( (PORT_READ(in_READ_WRITE_VAL [i]) == 1) and 54 (PORT_READ(in_READ_WRITE_RW [i]) == RW_READ) 55 ) 56 { 57 Taddress_t address = PORT_READ(in_READ_WRITE_ADDRESS[i]); 58 59 data = REGISTER_READ(reg_DATA[address]); 60 61 log_printf(TRACE,RegisterFile,"genMealy_read","[%d] -> %.8x",static_cast<uint32_t>(address),static_cast<uint32_t>(data)); 62 63 #ifdef STATISTICS 64 _stat_nb_read ++; 65 #endif 66 // Write in registerFile 67 68 } 69 else 70 { 71 //log_printf(TRACE,RegisterFile,"genMealy_read","Read [%d] : No transaction",i); 72 data = 0; 73 } 74 75 PORT_WRITE(out_READ_WRITE_RDATA[i],data); 76 } 77 47 78 log_printf(FUNC,RegisterFile,"genMealy_read","End"); 48 79 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_transition.cpp
r53 r55 21 21 #endif 22 22 23 for (uint32_t i=0; i<_param ._nb_port_write; i++)23 for (uint32_t i=0; i<_param->_nb_port_write; i++) 24 24 { 25 25 // Have a write? … … 32 32 Taddress_t address = PORT_READ(in_WRITE_ADDRESS[i]); 33 33 Tdata_t data = PORT_READ(in_WRITE_DATA [i]); 34 35 log_printf(TRACE,RegisterFile,"transition","[%d] <- %.8x",static_cast<uint32_t>(address),static_cast<uint32_t>(data)); 36 37 // Write in registerFile 38 REGISTER_WRITE(reg_DATA[address],data); 39 } 40 } 41 for (uint32_t i=0; i<_param->_nb_port_read_write; i++) 42 { 43 // Have a read_write? 44 if ( (PORT_READ(in_READ_WRITE_VAL[i]) == true) and 45 (PORT_READ(in_READ_WRITE_RW [i]) == RW_WRITE)) 46 { 47 #ifdef STATISTICS 48 _stat_nb_write ++; 49 #endif 50 51 Taddress_t address = PORT_READ(in_READ_WRITE_ADDRESS[i]); 52 Tdata_t data = PORT_READ(in_READ_WRITE_WDATA [i]); 34 53 35 54 log_printf(TRACE,RegisterFile,"transition","[%d] <- %.8x",static_cast<uint32_t>(address),static_cast<uint32_t>(data)); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_vhdl_body.cpp
r41 r55 19 19 vhdl->set_body (""); 20 20 vhdl->set_body ("-----------------------------------------------------------------------------"); 21 vhdl->set_body ("-- Ackitement"); 22 vhdl->set_body ("-----------------------------------------------------------------------------"); 23 vhdl->set_body (""); 24 25 for (uint32_t i = 0; i < _param->_nb_port_read; i++) 26 vhdl->set_body ("out_READ_"+toString(i)+"_ACK <= '1';"); 27 for (uint32_t i = 0; i < _param->_nb_port_write; i++) 28 vhdl->set_body ("out_WRITE_"+toString(i)+"_ACK <= '1';"); 29 for (uint32_t i = 0; i < _param->_nb_port_read_write; i++) 30 vhdl->set_body ("out_READ_WRITE_"+toString(i)+"_ACK <= '1';"); 31 32 vhdl->set_body (""); 33 vhdl->set_body ("-----------------------------------------------------------------------------"); 21 34 vhdl->set_body ("-- Read RegisterFile"); 22 35 vhdl->set_body ("-----------------------------------------------------------------------------"); 23 36 vhdl->set_body (""); 24 37 25 for (uint32_t i = 0; i < _param ._nb_port_read; i++)26 { 27 vhdl->set_body ("out_READ_"+toString(i)+"_ACK <= '1';"); 28 vhdl->set_body ("out_READ_"+toString(i)+"_DATA <= reg_DATA (conv_integer(in_READ_"+toString(i)+"_ADDRESS)) when in_READ_"+toString(i)+"_VAL = '1' else "+std_logic_others(_param._size_word,0)+";"); 29 }38 for (uint32_t i = 0; i < _param->_nb_port_read; i++) 39 vhdl->set_body ("out_READ_"+toString(i)+"_DATA <= reg_DATA (conv_integer(in_READ_"+toString(i)+"_ADDRESS)) when in_READ_"+toString(i)+"_VAL = '1' else "+std_logic_others(_param->_size_word,0)+";"); 40 41 for (uint32_t i = 0; i < _param->_nb_port_read_write; i++) 42 vhdl->set_body ("out_READ_WRITE_"+toString(i)+"_RDATA <= reg_DATA (conv_integer(in_READ_WRITE_"+toString(i)+"_ADDRESS)) when in_READ_WRITE_"+toString(i)+"_VAL = '1' and in_READ_WRITE_"+toString(i)+"_RW = '"+toString(RW_READ)+"' else "+std_logic_others(_param->_size_word,0)+";"); 30 43 31 44 vhdl->set_body (""); … … 39 52 vhdl->set_body ("\tif in_CLOCK'event and in_CLOCK = '1' then"); 40 53 41 for (uint32_t i = 0; i < _param ._nb_port_write; i++)54 for (uint32_t i = 0; i < _param->_nb_port_write; i++) 42 55 { 43 56 vhdl->set_body ("\t\tif (in_WRITE_"+toString(i)+"_VAL = '1') then"); … … 45 58 vhdl->set_body ("\t\tend if;"); 46 59 } 60 for (uint32_t i = 0; i < _param->_nb_port_read_write; i++) 61 { 62 vhdl->set_body ("\t\tif (in_READ_WRITE_"+toString(i)+"_VAL = '1' and in_READ_WRITE_"+toString(i)+"_RW = '"+toString(RW_WRITE)+"') then"); 63 vhdl->set_body ("\t\t\treg_DATA(conv_integer(in_READ_WRITE_"+toString(i)+"_ADDRESS)) <= in_READ_WRITE_"+toString(i)+"_WDATA;"); 64 vhdl->set_body ("\t\tend if;"); 65 } 47 66 48 67 vhdl->set_body ("\tend if;"); 49 68 vhdl->set_body ("end process RegisterFile_write;"); 50 51 for (uint32_t i = 0; i < _param._nb_port_write; i++)52 vhdl->set_body ("out_WRITE_"+toString(i)+"_ACK <= '1';");53 69 }; 54 70 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_vhdl_declaration.cpp
r44 r55 18 18 void RegisterFile_Monolithic::vhdl_declaration (Vhdl * & vhdl) 19 19 { 20 vhdl->set_type ("Tregfile", "array (" + toString(_param ._nb_word-1) + " downto 0) of " + std_logic(_param._size_word));20 vhdl->set_type ("Tregfile", "array (" + toString(_param->_nb_word-1) + " downto 0) of " + std_logic(_param->_size_word)); 21 21 22 22 vhdl->set_signal ("reg_DATA", "Tregfile"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/Statistics.cpp
r15 r55 15 15 namespace registerfile_monolithic { 16 16 17 Statistics::Statistics (string name ,18 morpheo::behavioural::Parameters_Statistics parameters_statistics ,19 Parameters parameters17 Statistics::Statistics (string name , 18 morpheo::behavioural::Parameters_Statistics * parameters_statistics , 19 Parameters * parameters 20 20 ) : 21 21 morpheo::behavioural::Statistics(name , … … 23 23 _parameters(parameters) 24 24 { 25 _param_port_read = new morpheo::behavioural::generic::group::Parameters(_parameters->_nb_port_read); 25 26 _stat_port_read = new morpheo::behavioural::generic::group::Statistics (name + "_port_read" , 26 27 parameters_statistics , 27 morpheo::behavioural::generic::group::Parameters(_parameters._nb_port_read)); 28 _stat_port_write = new morpheo::behavioural::generic::group::Statistics (name + "_port_write" , 28 _param_port_read); 29 30 _param_port_write = new morpheo::behavioural::generic::group::Parameters(_parameters->_nb_port_write); 31 _stat_port_write = new morpheo::behavioural::generic::group::Statistics (name + "_port_write" , 29 32 parameters_statistics , 30 morpheo::behavioural::generic::group::Parameters(_parameters._nb_port_write));33 _param_port_write); 31 34 }; 32 35 … … 40 43 Statistics::~Statistics () 41 44 { 45 delete _param_port_read; 46 delete _param_port_write; 42 47 delete _stat_port_read ; 43 48 delete _stat_port_write; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Common
r53 r55 39 39 # -Werror \ 40 40 41 CFLAGS = $( FLAGS) $(FLAGS_COMMON) $(INCDIR)42 LFLAGS = $( FLAGS) $(FLAGS_COMMON) $(LIBDIR)41 CFLAGS = $(MORPHEO_FLAGS) $(FLAGS_COMMON) $(INCDIR) 42 LFLAGS = $(MORPHEO_FLAGS) $(FLAGS_COMMON) $(LIBDIR) 43 43 44 44 #-----[ Variable ]----------------------------------------- -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.flags
r53 r55 14 14 15 15 #-----[ Flags ]-------------------------------------------- 16 FLAGS = -DSYSTEMC \ 16 MORPHEO_FLAGS = -DSYSTEMC \ 17 -DVHDL \ 18 -DVHDL_TESTBENCH \ 19 -DSTATISTICS \ 17 20 -DDEBUG=DEBUG_TRACE 18 # -DVHDL \19 # -DVHDL_TESTBENCH \20 21 # -DVHDL_TESTBENCH_ASSERT \ 21 # -DSTATISTICS \22 22 # -DCONFIGURATION \ 23 23 # -DPOSITION \ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.mkf
r42 r55 3 3 # 4 4 5 all: _Generic/RegisterFile/RegisterFile_Monolithic/SelfTest Generic/Select/Priority_Fixed/SelfTest _Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest5 all: _Generic/RegisterFile/RegisterFile_Monolithic/SelfTest Generic/Select/Priority_Fixed/SelfTest Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest 6 6 7 7 _Generic/RegisterFile/RegisterFile_Monolithic/SelfTest: … … 10 10 Generic/Select/Priority_Fixed/SelfTest: 11 11 12 _Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest: 13 gmake all -C Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest 12 Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest: 14 13 15 14 clean: 16 15 gmake clean -C Generic/RegisterFile/RegisterFile_Monolithic/SelfTest 17 gmake clean -C Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest18 16 19 17 re: clean all … … 21 19 install: 22 20 gmake install -C Generic/RegisterFile/RegisterFile_Monolithic/SelfTest 23 gmake install -C Stage_1_Ifetch/Predictor/Meta_Predictor/Two_Level_Branch_Predictor/Pattern_History_Table/SelfTest24 21 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/SelfTest/src/main.cpp
r50 r55 31 31 #endif 32 32 { 33 if (argc <2+NB_PARAMS)33 if (argc != 2+NB_PARAMS) 34 34 usage (argc, argv); 35 35 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/New_Component/SelfTest/src/test.cpp
r53 r55 18 18 } while(0) 19 19 20 #define SC_START(cycle) \ 21 do \ 22 { \ 23 if (static_cast<uint32_t>(sc_simulation_time()) > CYCLE_MAX) \ 24 { \ 25 TEST_KO("Maximal cycles Reached"); \ 26 } \ 27 sc_start(cycle); \ 20 static uint32_t cycle = 0; 21 22 #define SC_START(cycle_offset) \ 23 do \ 24 { \ 25 /*cout << "SC_START (begin)" << endl;*/ \ 26 \ 27 uint32_t cycle_current = static_cast<uint32_t>(sc_simulation_time()); \ 28 if (cycle_current != cycle) \ 29 { \ 30 cycle = cycle_current; \ 31 cout << "##########[ cycle "<< cycle << " ]" << endl; \ 32 } \ 33 \ 34 if (cycle_current > CYCLE_MAX) \ 35 { \ 36 TEST_KO("Maximal cycles Reached"); \ 37 } \ 38 sc_start(cycle_offset); \ 39 /*cout << "SC_START (end )" << endl;*/ \ 28 40 } while(0) 29 41 … … 99 111 cout << "<" << name << "> ............ Stop Simulation" << endl; 100 112 101 delete CLOCK;102 delete NRESET;113 delete in_CLOCK; 114 delete in_NRESET; 103 115 #endif 104 116 105 117 delete _@COMPONENT; 106 #ifdef S YSTEMC118 #ifdef STATISTICS 107 119 delete _parameters_statistics; 108 120 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Debug_component.h
r53 r55 20 20 #define DEBUG_Read_unit false 21 21 #define DEBUG_Read_queue false 22 #define DEBUG_Reservation_station true 22 23 #define DEBUG_Multi_Front_end false 23 24 #define DEBUG_Front_end false -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interface_fifo.h
r42 r55 15 15 16 16 typedef enum {VAL, ACK} val_ack_t; 17 }; // end namespace behavioural 18 19 template<> inline std::string toString<morpheo::behavioural::val_ack_t>(const morpheo::behavioural::val_ack_t& x) 20 { 21 switch (x) 22 { 23 case morpheo::behavioural::VAL : return "val"; break; 24 case morpheo::behavioural::ACK : return "ack"; break; 25 default : return "" ; break; 26 } 27 } 28 29 namespace behavioural { 17 30 18 31 class Interface_fifo : public Interface … … 46 59 47 60 #ifdef SYSTEMC 61 public : sc_in <bool> * set_signal_valack_in (val_ack_t val_ack , 62 presence_port_t presence_port=PORT_VHDL_YES_TESTBENCH_YES) 63 { 64 return set_signal_valack_in (toString(val_ack) ,val_ack, presence_port); 65 } 66 48 67 public : sc_in <bool> * set_signal_valack_in (string name , 49 68 val_ack_t val_ack , … … 59 78 return port; 60 79 }; 80 81 public : sc_out<bool> * set_signal_valack_out(val_ack_t val_ack , 82 presence_port_t presence_port=PORT_VHDL_YES_TESTBENCH_YES) 83 { 84 return set_signal_valack_out(toString(val_ack) ,val_ack, presence_port); 85 } 61 86 62 87 public : sc_out<bool> * set_signal_valack_out(string name ,
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