Changeset 55 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_vhdl_body.cpp
- Timestamp:
- Sep 24, 2007, 2:00:35 PM (17 years ago)
- File:
-
- 1 edited
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- Unmodified
- Added
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Generic/RegisterFile/RegisterFile_Monolithic/src/RegisterFile_Monolithic_vhdl_body.cpp
r41 r55 19 19 vhdl->set_body (""); 20 20 vhdl->set_body ("-----------------------------------------------------------------------------"); 21 vhdl->set_body ("-- Ackitement"); 22 vhdl->set_body ("-----------------------------------------------------------------------------"); 23 vhdl->set_body (""); 24 25 for (uint32_t i = 0; i < _param->_nb_port_read; i++) 26 vhdl->set_body ("out_READ_"+toString(i)+"_ACK <= '1';"); 27 for (uint32_t i = 0; i < _param->_nb_port_write; i++) 28 vhdl->set_body ("out_WRITE_"+toString(i)+"_ACK <= '1';"); 29 for (uint32_t i = 0; i < _param->_nb_port_read_write; i++) 30 vhdl->set_body ("out_READ_WRITE_"+toString(i)+"_ACK <= '1';"); 31 32 vhdl->set_body (""); 33 vhdl->set_body ("-----------------------------------------------------------------------------"); 21 34 vhdl->set_body ("-- Read RegisterFile"); 22 35 vhdl->set_body ("-----------------------------------------------------------------------------"); 23 36 vhdl->set_body (""); 24 37 25 for (uint32_t i = 0; i < _param ._nb_port_read; i++)26 { 27 vhdl->set_body ("out_READ_"+toString(i)+"_ACK <= '1';"); 28 vhdl->set_body ("out_READ_"+toString(i)+"_DATA <= reg_DATA (conv_integer(in_READ_"+toString(i)+"_ADDRESS)) when in_READ_"+toString(i)+"_VAL = '1' else "+std_logic_others(_param._size_word,0)+";"); 29 }38 for (uint32_t i = 0; i < _param->_nb_port_read; i++) 39 vhdl->set_body ("out_READ_"+toString(i)+"_DATA <= reg_DATA (conv_integer(in_READ_"+toString(i)+"_ADDRESS)) when in_READ_"+toString(i)+"_VAL = '1' else "+std_logic_others(_param->_size_word,0)+";"); 40 41 for (uint32_t i = 0; i < _param->_nb_port_read_write; i++) 42 vhdl->set_body ("out_READ_WRITE_"+toString(i)+"_RDATA <= reg_DATA (conv_integer(in_READ_WRITE_"+toString(i)+"_ADDRESS)) when in_READ_WRITE_"+toString(i)+"_VAL = '1' and in_READ_WRITE_"+toString(i)+"_RW = '"+toString(RW_READ)+"' else "+std_logic_others(_param->_size_word,0)+";"); 30 43 31 44 vhdl->set_body (""); … … 39 52 vhdl->set_body ("\tif in_CLOCK'event and in_CLOCK = '1' then"); 40 53 41 for (uint32_t i = 0; i < _param ._nb_port_write; i++)54 for (uint32_t i = 0; i < _param->_nb_port_write; i++) 42 55 { 43 56 vhdl->set_body ("\t\tif (in_WRITE_"+toString(i)+"_VAL = '1') then"); … … 45 58 vhdl->set_body ("\t\tend if;"); 46 59 } 60 for (uint32_t i = 0; i < _param->_nb_port_read_write; i++) 61 { 62 vhdl->set_body ("\t\tif (in_READ_WRITE_"+toString(i)+"_VAL = '1' and in_READ_WRITE_"+toString(i)+"_RW = '"+toString(RW_WRITE)+"') then"); 63 vhdl->set_body ("\t\t\treg_DATA(conv_integer(in_READ_WRITE_"+toString(i)+"_ADDRESS)) <= in_READ_WRITE_"+toString(i)+"_WDATA;"); 64 vhdl->set_body ("\t\tend if;"); 65 } 47 66 48 67 vhdl->set_body ("\tend if;"); 49 68 vhdl->set_body ("end process RegisterFile_write;"); 50 51 for (uint32_t i = 0; i < _param._nb_port_write; i++)52 vhdl->set_body ("out_WRITE_"+toString(i)+"_ACK <= '1';");53 69 }; 54 70
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