Changeset 62 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h

Timestamp:

Dec 4, 2007, 2:31:54 PM (17 years ago)

Author:

rosiere

Message:

Modification en profondeur de Component-port_map.
Compilation ok pour Register_unit ... a tester (systemC et vhdl)

File:

• trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h (modified) (5 diffs)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/include/Load_store_unit.h

@@ -7 +7 @@
  * [ Description ]
  * 
+ * Ce composant peut être amélioré en placant deux ptr de lecture au lieu d'un : un pour l'accès au cache et un pour le commit
  */
 
@@ -12 +13 @@
 #include "systemc.h"
 #endif
-
-#define HAVE_MEMORY_OUT_OPERATION
-#define HAVE_MEMORY_OUT_TYPE
 
 #include <iostream>
@@ -79 +77 @@
   public    : SC_IN (Tpacket_t         )    *  in_MEMORY_IN_PACKET_ID   ;
   public    : SC_IN (Toperation_t      )    *  in_MEMORY_IN_OPERATION   ;
-#ifdef HAVE_MEMORY_OUT_TYPE
-  public    : SC_IN (Ttype_t           )    *  in_MEMORY_IN_TYPE        ;
-#endif
   public    : SC_IN (Tlsq_ptr_t        )    *  in_MEMORY_IN_STORE_QUEUE_PTR_WRITE;
   public    : SC_IN (Tlsq_ptr_t        )    *  in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE;
@@ -99 +94 @@
   public    : SC_OUT(Tcontext_t        )    * out_MEMORY_OUT_CONTEXT_ID;
   public    : SC_OUT(Tpacket_t         )    * out_MEMORY_OUT_PACKET_ID ;
-#ifdef HAVE_MEMORY_OUT_OPERATION
-  public    : SC_OUT(Toperation_t      )    * out_MEMORY_OUT_OPERATION ;
-#endif
-#ifdef HAVE_MEMORY_OUT_TYPE
-  public    : SC_OUT(Ttype_t           )    * out_MEMORY_OUT_TYPE      ;
-#endif
   public    : SC_OUT(Tcontrol_t        )    * out_MEMORY_OUT_WRITE_RD  ; // = (operation==load)
   public    : SC_OUT(Tgeneral_address_t)    * out_MEMORY_OUT_NUM_REG_RD; // destination (load)
@@ -154 +143 @@
     // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
 
+    // Registers
   public    : Tlsq_ptr_t                      internal_MEMORY_STORE_QUEUE_PTR_READ;
-  public    : Tlsq_ptr_t                      internal_MEMORY_LOAD_QUEUE_PTR_READ;
-
+  public    : Tlsq_ptr_t                      internal_MEMORY_LOAD_QUEUE_PTR_READ ;
+
+    // signal
   private   : Tcontrol_t                      internal_MEMORY_IN_ACK;
   private   : Tcontrol_t                      internal_MEMORY_OUT_VAL;
   private   : Tselect_queue_t                 internal_MEMORY_OUT_SELECT_QUEUE;
+
+  private   : Tcontrol_t                      internal_DCACHE_REQ_VAL;
+  private   : Tselect_queue_t                 internal_DCACHE_REQ_SELECT_QUEUE;
 #endif