Ignore:
Timestamp:
Dec 5, 2007, 1:40:16 PM (17 years ago)
Author:
rosiere
Message:

register_unit : systemc et VHDL ok

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Component_port_map.cpp

    r62 r65  
    8888          }
    8989
    90         signal_dest  = signal_internal (entity_productor, signal_productor);
     90        signal_dest= signal_internal (entity_productor, signal_productor);
     91        signal_dest->set_size_max(signal_src->get_size());
     92
    9193        dest_is_port = false;
    9294      }
     
    131133    if (signal_src->get_direction() != OUT)
    132134      throw (ErrorMorpheo ("<Component::port_map> the direction of the signal '"+signal_src->get_name()+"' must be OUT."));
     135
     136    Signal * signal_dest;
     137
     138    signal_dest= signal_internal (entity_src, signal_src);
     139    signal_dest->set_size_max(signal_src->get_size());
    133140   
    134141    try
    135142      {
    136         signal_src->link(signal_internal (entity_src, signal_src),
     143        signal_src->link(signal_dest,
    137144                         false);
    138145      }
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