Ignore:
Timestamp:
Dec 5, 2007, 1:40:16 PM (17 years ago)
Author:
rosiere
Message:

register_unit : systemc et VHDL ok

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/IPs/systemC/processor/Morpheo/Behavioural/src/Signal_link.cpp

    r62 r65  
    2929      throw (ErrorMorpheo ("<Signal::mapping> Can't mapping signal \""+_name+"\" with \""+signal_dest->get_name()+"\", because the first signal is already mapped."));
    3030
    31     //     log_printf(TRACE,Behavioural,FUNCTION, " * sc_signal (before) %.8x - %.8x", (uint32_t)(_sc_signal_map), (uint32_t)(signal_dest->_sc_signal_map));
    32 
    3331    // List of all case
    3432    //
     
    5553    signal_dest->_is_map_as_dest      = true;
    5654
     55    // an internal signal and port can't be a source.
     56    // also, to fill the connect_to_signal's field
     57    if ((signal_src->_direction == OUT) and
     58        (signal_dest->_direction == INTERNAL))
     59      {
     60        signal_dest->_connect_to_signal = signal_src;
     61      }
     62
    5763    // vhdl_testbench : to read an output producte by a internal component
    5864    // TODO : à vérifier !!!!!!!!!!!!
     
    6369    connect (signal_dest);
    6470
    65     //  log_printf(TRACE,Behavioural,FUNCTION, " * sc_signal (after ) %.8x - %.8x", (uint32_t)(_sc_signal_map), (uint32_t)(signal_dest->_sc_signal_map));
    66    
    6771    log_printf(FUNC,Behavioural,FUNCTION,"End");
    6872  };
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