Changeset 69 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_vhdl_body.cpp
- Timestamp:
- Dec 12, 2007, 5:02:47 PM (17 years ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_vhdl_body.cpp
r55 r69 18 18 namespace reservation_station { 19 19 20 21 20 #undef FUNCTION 22 21 #define FUNCTION "Reservation_station::vhdl_body" 23 22 void Reservation_station::vhdl_body (Vhdl * & vhdl) 24 23 { 24 string range_retire, range_insert; 25 26 if (_param->_size_queue == 1) 27 range_insert = "(0)"; 28 else 29 range_insert = "(conv_integer(internal_INSERT_SLOT"+std_logic_range(log2(_param->_size_queue))+"))"; 30 25 31 log_printf(FUNC,Reservation_station,FUNCTION,"Begin"); 26 vhdl->set_body (""); 32 33 vhdl->set_body ("-----------------------------------"); 34 vhdl->set_body ("-- interface 'INSERT'"); 35 vhdl->set_body ("-----------------------------------"); 36 vhdl->set_body (""); 37 vhdl->set_body (" out_INSERT_ACK <= not internal_FULL;"); 38 vhdl->set_body ("internal_INSERT_TRANSACTION <= not internal_FULL and in_INSERT_VAL;"); 39 40 vhdl->set_body ("internal_INSERT_SLOT <="); 41 for (uint32_t i=0; i<_param->_size_queue; i++) 42 { 43 vhdl->set_body ("\t"+std_logic_conv(log2(_param->_size_queue+1),i)+" when reg_VAL("+toString(i)+")='0' else"); 44 } 45 vhdl->set_body ("\t"+std_logic_conv(log2(_param->_size_queue+1),_param->_size_queue)+";"); 46 47 vhdl->set_body (""); 48 vhdl->set_body ("-----------------------------------"); 49 vhdl->set_body ("-- interface 'RETIRE'"); 50 vhdl->set_body ("-----------------------------------"); 51 vhdl->set_body (""); 52 for (uint32_t i=0; i<_param->_nb_inst_retire; i++) 53 vhdl->set_body ("internal_RETIRE_TRANSACTION_"+toString(i)+"<= not internal_RETIRE_SLOT_"+toString(i)+std_logic_range(log2(_param->_size_queue)+1,log2(_param->_size_queue),log2(_param->_size_queue))+" and in_RETIRE_"+toString(i)+"_ACK;"); 54 vhdl->set_body (""); 55 56 uint32_t nb_slot_scan = _param->_size_queue-_param->_nb_inst_retire+1; 57 for (uint32_t i=0; i<_param->_nb_inst_retire; i++) 58 { 59 vhdl->set_body ("internal_RETIRE_SLOT_"+toString(i)+" <= "); 60 for (uint32_t j=i; j<nb_slot_scan+i; j++) 61 { 62 vhdl->set_body ("\t"+std_logic_conv(log2(_param->_size_queue+1),j)+" when"); 63 for (uint32_t k=0; k<i; k++) 64 { 65 vhdl->set_body ("\t\tnot (internal_RETIRE_SLOT_"+toString(k)+" = "+std_logic_conv(log2(_param->_size_queue),j)+std_logic_range(log2(_param->_size_queue))+") and"); 66 } 67 vhdl->set_body ("\t\t(reg_VAL ("+toString(j)+")='1') and"); 68 vhdl->set_body ("\t\t(reg_DATA_RA_VAL("+toString(j)+")='1') and"); 69 vhdl->set_body ("\t\t(reg_DATA_RB_VAL("+toString(j)+")='1') and"); 70 vhdl->set_body ("\t\t(reg_DATA_RC_VAL("+toString(j)+")='1') else"); 71 } 72 vhdl->set_body ("\t"+std_logic_conv(log2(_param->_size_queue+1),_param->_size_queue)+";"); 73 vhdl->set_body (""); 74 } 75 76 for (uint32_t i=0; i<_param->_nb_inst_retire; i++) 77 { 78 if (_param->_size_queue == 1) 79 range_retire = "(0)"; 80 else 81 range_retire = "(conv_integer(internal_RETIRE_SLOT_"+toString(i)+std_logic_range(log2(_param->_size_queue)+1,log2(_param->_size_queue)-1,0)+"))"; 82 83 vhdl->set_body ("out_RETIRE_"+toString(i)+"_VAL <= not internal_RETIRE_SLOT_"+toString(i)+std_logic_range(log2(_param->_size_queue)+1,log2(_param->_size_queue),log2(_param->_size_queue))+";"); 84 if (_param->_have_port_context_id) 85 vhdl->set_body ("out_RETIRE_"+toString(i)+"_CONTEXT_ID <= reg_CONTEXT_ID "+range_retire+";"); 86 if (_param->_have_port_front_end_id) 87 vhdl->set_body ("out_RETIRE_"+toString(i)+"_FRONT_END_ID <= reg_FRONT_END_ID "+range_retire+";"); 88 if (_param->_have_port_ooo_engine_id) 89 vhdl->set_body ("out_RETIRE_"+toString(i)+"_OOO_ENGINE_ID <= reg_OOO_ENGINE_ID"+range_retire+";"); 90 if (_param->_have_port_rob_id) 91 vhdl->set_body ("out_RETIRE_"+toString(i)+"_ROB_ID <= reg_ROB_ID "+range_retire+";"); 92 vhdl->set_body ("out_RETIRE_"+toString(i)+"_OPERATION <= reg_OPERATION "+range_retire+";"); 93 vhdl->set_body ("out_RETIRE_"+toString(i)+"_TYPE <= reg_TYPE "+range_retire+";"); 94 vhdl->set_body ("out_RETIRE_"+toString(i)+"_HAS_IMMEDIAT <= reg_HAS_IMMEDIAT "+range_retire+";"); 95 vhdl->set_body ("out_RETIRE_"+toString(i)+"_IMMEDIAT <= reg_IMMEDIAT "+range_retire+";"); 96 vhdl->set_body ("out_RETIRE_"+toString(i)+"_DATA_RA <= reg_DATA_RA "+range_retire+";"); 97 vhdl->set_body ("out_RETIRE_"+toString(i)+"_DATA_RB <= reg_DATA_RB "+range_retire+";"); 98 vhdl->set_body ("out_RETIRE_"+toString(i)+"_DATA_RC <= reg_DATA_RC "+range_retire+";"); 99 vhdl->set_body ("out_RETIRE_"+toString(i)+"_WRITE_RD <= reg_WRITE_RD "+range_retire+";"); 100 vhdl->set_body ("out_RETIRE_"+toString(i)+"_NUM_REG_RD <= reg_NUM_REG_RD "+range_retire+";"); 101 vhdl->set_body ("out_RETIRE_"+toString(i)+"_WRITE_RE <= reg_WRITE_RE "+range_retire+";"); 102 vhdl->set_body ("out_RETIRE_"+toString(i)+"_NUM_REG_RE <= reg_NUM_REG_RE "+range_retire+";"); 103 vhdl->set_body (""); 104 } 105 106 // vhdl->set_body ("-----------------------------------"); 107 // vhdl->set_body ("-- flags"); 108 // vhdl->set_body ("-----------------------------------"); 109 // vhdl->set_body (""); 110 // vhdl->set_body ("internal_EMPTY <="); 111 // for (uint32_t i=_param->_size_queue-1; i>0; i--) 112 // vhdl->set_body ("\tnot reg_VAL ("+toString(i)+") and"); 113 // vhdl->set_body ("\tnot reg_VAL (0);"); 114 // vhdl->set_body ("internal_FULL <="); 115 // for (uint32_t i=_param->_size_queue-1; i>0; i--) 116 // vhdl->set_body ("\t reg_VAL ("+toString(i)+") and"); 117 // vhdl->set_body ("\t reg_VAL (0);"); 118 119 vhdl->set_body (""); 120 vhdl->set_body ("-----------------------------------"); 121 vhdl->set_body ("-- transition"); 122 vhdl->set_body ("-----------------------------------"); 123 vhdl->set_body (""); 124 vhdl->set_body ("transition: process (in_CLOCK)"); 125 vhdl->set_body ("begin -- process transition"); 126 vhdl->set_body ("\tif in_CLOCK'event and in_CLOCK = '1' then"); 127 vhdl->set_body (""); 128 vhdl->set_body ("\t\tif (in_NRESET = '0') then"); 129 for (uint32_t i=0; i<_param->_size_queue; i++) 130 { 131 vhdl->set_body ("\t\t\treg_VAL ("+toString(i)+")<= '0';"); 132 } 133 vhdl->set_body ("\t\telse"); 134 135 136 vhdl->set_body (""); 137 vhdl->set_body ("\t\t\t-----------------------------------"); 138 vhdl->set_body ("\t\t\t-- bypass"); 139 vhdl->set_body ("\t\t\t-----------------------------------"); 140 vhdl->set_body (""); 141 vhdl->set_body ("\t\t\t-- interface : 'GPR_WRITE'"); 142 for (uint32_t i=0; i<_param->_nb_gpr_write; i++) 143 { 144 vhdl->set_body ("\t\t\tif (in_GPR_WRITE_"+toString(i)+"_VAL = '1') then"); 145 vhdl->set_body ("\t\t\t\t-- scan all entry (don't test if entry is valid)"); 146 for (uint32_t j=0; j<_param->_size_queue; j++) 147 { 148 if (_param->_have_port_ooo_engine_id) 149 vhdl->set_body ("\t\t\t\tif (in_GPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID = reg_OOO_ENGINE_ID ("+toString(j)+")) then"); 150 vhdl->set_body ("\t\t\t\t\tif (in_GPR_WRITE_"+toString(i)+"_NUM_REG = reg_NUM_REG_RA ("+toString(j)+")) then"); 151 vhdl->set_body ("\t\t\t\t\t\treg_DATA_RA_VAL ("+toString(j)+") <= '1';"); 152 vhdl->set_body ("\t\t\t\t\t\treg_DATA_RA ("+toString(j)+") <= in_GPR_WRITE_"+toString(i)+"_DATA;"); 153 vhdl->set_body ("\t\t\t\t\tend if;"); 154 155 vhdl->set_body ("\t\t\t\t\tif (in_GPR_WRITE_"+toString(i)+"_NUM_REG = reg_NUM_REG_RB ("+toString(j)+")) then"); 156 vhdl->set_body ("\t\t\t\t\t\treg_DATA_RB_VAL ("+toString(j)+") <= '1';"); 157 vhdl->set_body ("\t\t\t\t\t\treg_DATA_RB ("+toString(j)+") <= in_GPR_WRITE_"+toString(i)+"_DATA;"); 158 vhdl->set_body ("\t\t\t\t\tend if;"); 159 160 if (_param->_have_port_ooo_engine_id) 161 vhdl->set_body ("\t\t\t\tend if;"); 162 } 163 vhdl->set_body ("\t\t\tend if;"); 164 } 165 166 vhdl->set_body ("\t\t\t-- interface : 'SPR_WRITE'"); 167 for (uint32_t i=0; i<_param->_nb_spr_write; i++) 168 { 169 vhdl->set_body ("\t\t\tif (in_SPR_WRITE_"+toString(i)+"_VAL = '1') then"); 170 vhdl->set_body ("\t\t\t\t-- scan all entry (don't test if entry is valid)"); 171 for (uint32_t j=0; j<_param->_size_queue; j++) 172 { 173 if (_param->_have_port_ooo_engine_id) 174 vhdl->set_body ("\t\t\t\tif (in_SPR_WRITE_"+toString(i)+"_OOO_ENGINE_ID = reg_OOO_ENGINE_ID ("+toString(j)+")) then"); 175 vhdl->set_body ("\t\t\t\t\tif (in_SPR_WRITE_"+toString(i)+"_NUM_REG = reg_NUM_REG_RC ("+toString(j)+")) then"); 176 vhdl->set_body ("\t\t\t\t\t\treg_DATA_RC_VAL ("+toString(j)+") <= '1';"); 177 vhdl->set_body ("\t\t\t\t\t\treg_DATA_RC ("+toString(j)+") <= in_SPR_WRITE_"+toString(i)+"_DATA;"); 178 vhdl->set_body ("\t\t\t\t\tend if;"); 179 180 if (_param->_have_port_ooo_engine_id) 181 vhdl->set_body ("\t\t\t\tend if;"); 182 } 183 vhdl->set_body ("\t\t\tend if;"); 184 } 185 186 vhdl->set_body ("\t\t\t-- interface : 'BYPASS_WRITE_GPR'"); 187 for (uint32_t i=0; i<_param->_nb_bypass_write; i++) 188 { 189 vhdl->set_body ("\t\t\tif (in_BYPASS_WRITE_"+toString(i)+"_GPR_VAL = '1') then"); 190 vhdl->set_body ("\t\t\t\t-- scan all entry (don't test if entry is valid)"); 191 for (uint32_t j=0; j<_param->_size_queue; j++) 192 { 193 if (_param->_have_port_ooo_engine_id) 194 vhdl->set_body ("\t\t\t\tif (in_BYPASS_WRITE_"+toString(i)+"_OOO_ENGINE_ID = reg_OOO_ENGINE_ID ("+toString(j)+")) then"); 195 vhdl->set_body ("\t\t\t\t\tif (in_BYPASS_WRITE_"+toString(i)+"_GPR_NUM_REG = reg_NUM_REG_RA ("+toString(j)+")) then"); 196 vhdl->set_body ("\t\t\t\t\t\treg_DATA_RA_VAL ("+toString(j)+") <= '1';"); 197 vhdl->set_body ("\t\t\t\t\t\treg_DATA_RA ("+toString(j)+") <= in_BYPASS_WRITE_"+toString(i)+"_GPR_DATA;"); 198 vhdl->set_body ("\t\t\t\t\tend if;"); 199 200 vhdl->set_body ("\t\t\t\t\tif (in_BYPASS_WRITE_"+toString(i)+"_GPR_NUM_REG = reg_NUM_REG_RB ("+toString(j)+")) then"); 201 vhdl->set_body ("\t\t\t\t\t\treg_DATA_RB_VAL ("+toString(j)+") <= '1';"); 202 vhdl->set_body ("\t\t\t\t\t\treg_DATA_RB ("+toString(j)+") <= in_BYPASS_WRITE_"+toString(i)+"_GPR_DATA;"); 203 vhdl->set_body ("\t\t\t\t\tend if;"); 204 205 if (_param->_have_port_ooo_engine_id) 206 vhdl->set_body ("\t\t\t\tend if;"); 207 } 208 vhdl->set_body ("\t\t\tend if;"); 209 } 210 211 vhdl->set_body ("\t\t\t-- interface : 'BYPASS_WRITE_SPR'"); 212 for (uint32_t i=0; i<_param->_nb_bypass_write; i++) 213 { 214 vhdl->set_body ("\t\t\tif (in_BYPASS_WRITE_"+toString(i)+"_SPR_VAL = '1') then"); 215 vhdl->set_body ("\t\t\t\t-- scan all entry (don't test if entry is valid)"); 216 for (uint32_t j=0; j<_param->_size_queue; j++) 217 { 218 if (_param->_have_port_ooo_engine_id) 219 vhdl->set_body ("\t\t\t\tif (in_BYPASS_WRITE_"+toString(i)+"_OOO_ENGINE_ID = reg_OOO_ENGINE_ID ("+toString(j)+")) then"); 220 vhdl->set_body ("\t\t\t\t\tif (in_BYPASS_WRITE_"+toString(i)+"_SPR_NUM_REG = reg_NUM_REG_RC ("+toString(j)+")) then"); 221 vhdl->set_body ("\t\t\t\t\t\treg_DATA_RC_VAL ("+toString(j)+") <= '1';"); 222 vhdl->set_body ("\t\t\t\t\t\treg_DATA_RC ("+toString(j)+") <= in_BYPASS_WRITE_"+toString(i)+"_SPR_DATA;"); 223 vhdl->set_body ("\t\t\t\t\tend if;"); 224 225 if (_param->_have_port_ooo_engine_id) 226 vhdl->set_body ("\t\t\t\tend if;"); 227 } 228 vhdl->set_body ("\t\t\tend if;"); 229 } 230 231 vhdl->set_body ("\t\t\t-- interface : 'BYPASS_MEMORY_GPR'"); 232 for (uint32_t i=0; i<_param->_nb_bypass_memory; i++) 233 { 234 vhdl->set_body ("\t\t\tif (in_BYPASS_MEMORY_"+toString(i)+"_VAL = '1') then"); 235 vhdl->set_body ("\t\t\t\t-- scan all entry (don't test if entry is valid)"); 236 for (uint32_t j=0; j<_param->_size_queue; j++) 237 { 238 if (_param->_have_port_ooo_engine_id) 239 vhdl->set_body ("\t\t\t\tif (in_BYPASS_MEMORY_"+toString(i)+"_OOO_ENGINE_ID = reg_OOO_ENGINE_ID ("+toString(j)+")) then"); 240 vhdl->set_body ("\t\t\t\t\tif (in_BYPASS_MEMORY_"+toString(i)+"_NUM_REG = reg_NUM_REG_RA ("+toString(j)+")) then"); 241 vhdl->set_body ("\t\t\t\t\t\treg_DATA_RA_VAL ("+toString(j)+") <= '1';"); 242 vhdl->set_body ("\t\t\t\t\t\treg_DATA_RA ("+toString(j)+") <= in_BYPASS_MEMORY_"+toString(i)+"_DATA;"); 243 vhdl->set_body ("\t\t\t\t\tend if;"); 244 245 vhdl->set_body ("\t\t\t\t\tif (in_BYPASS_MEMORY_"+toString(i)+"_NUM_REG = reg_NUM_REG_RB ("+toString(j)+")) then"); 246 vhdl->set_body ("\t\t\t\t\t\treg_DATA_RB_VAL ("+toString(j)+") <= '1';"); 247 vhdl->set_body ("\t\t\t\t\t\treg_DATA_RB ("+toString(j)+") <= in_BYPASS_MEMORY_"+toString(i)+"_DATA;"); 248 vhdl->set_body ("\t\t\t\t\tend if;"); 249 250 if (_param->_have_port_ooo_engine_id) 251 vhdl->set_body ("\t\t\t\tend if;"); 252 } 253 vhdl->set_body ("\t\t\tend if;"); 254 } 255 256 vhdl->set_body (""); 257 vhdl->set_body ("\t\t\t-- interface : 'INSERT'"); 258 vhdl->set_body ("\t\t\tif (internal_INSERT_TRANSACTION = '1') then"); 259 260 261 262 vhdl->set_body ("\t\t\t\treg_VAL "+range_insert+" <= '1';"); 263 264 if (_param->_have_port_context_id) 265 vhdl->set_body ("\t\t\t\treg_CONTEXT_ID "+range_insert+" <= in_INSERT_CONTEXT_ID ;"); 266 if (_param->_have_port_front_end_id) 267 vhdl->set_body ("\t\t\t\treg_FRONT_END_ID "+range_insert+" <= in_INSERT_FRONT_END_ID ;"); 268 if (_param->_have_port_ooo_engine_id) 269 vhdl->set_body ("\t\t\t\treg_OOO_ENGINE_ID "+range_insert+" <= in_INSERT_OOO_ENGINE_ID;"); 270 if (_param->_have_port_rob_id) 271 vhdl->set_body ("\t\t\t\treg_ROB_ID "+range_insert+" <= in_INSERT_ROB_ID ;"); 272 vhdl->set_body ("\t\t\t\treg_OPERATION "+range_insert+" <= in_INSERT_OPERATION ;"); 273 vhdl->set_body ("\t\t\t\treg_TYPE "+range_insert+" <= in_INSERT_TYPE ;"); 274 vhdl->set_body ("\t\t\t\treg_HAS_IMMEDIAT "+range_insert+" <= in_INSERT_HAS_IMMEDIAT ;"); 275 vhdl->set_body ("\t\t\t\treg_IMMEDIAT "+range_insert+" <= in_INSERT_IMMEDIAT ;"); 276 vhdl->set_body ("\t\t\t\treg_NUM_REG_RA "+range_insert+" <= in_INSERT_NUM_REG_RA ;"); 277 vhdl->set_body ("\t\t\t\treg_DATA_RA_VAL "+range_insert+" <= in_INSERT_DATA_RA_VAL ;"); 278 vhdl->set_body ("\t\t\t\treg_DATA_RA "+range_insert+" <= in_INSERT_DATA_RA ;"); 279 vhdl->set_body ("\t\t\t\treg_NUM_REG_RB "+range_insert+" <= in_INSERT_NUM_REG_RB ;"); 280 vhdl->set_body ("\t\t\t\treg_DATA_RB_VAL "+range_insert+" <= in_INSERT_DATA_RB_VAL ;"); 281 vhdl->set_body ("\t\t\t\treg_DATA_RB "+range_insert+" <= in_INSERT_DATA_RB ;"); 282 vhdl->set_body ("\t\t\t\treg_NUM_REG_RC "+range_insert+" <= in_INSERT_NUM_REG_RC ;"); 283 vhdl->set_body ("\t\t\t\treg_DATA_RC_VAL "+range_insert+" <= in_INSERT_DATA_RC_VAL ;"); 284 vhdl->set_body ("\t\t\t\treg_DATA_RC "+range_insert+" <= in_INSERT_DATA_RC ;"); 285 vhdl->set_body ("\t\t\t\treg_WRITE_RD "+range_insert+" <= in_INSERT_WRITE_RD ;"); 286 vhdl->set_body ("\t\t\t\treg_NUM_REG_RD "+range_insert+" <= in_INSERT_NUM_REG_RD ;"); 287 vhdl->set_body ("\t\t\t\treg_WRITE_RE "+range_insert+" <= in_INSERT_WRITE_RE ;"); 288 vhdl->set_body ("\t\t\t\treg_NUM_REG_RE "+range_insert+" <= in_INSERT_NUM_REG_RE ;"); 289 vhdl->set_body ("\t\t\tend if;"); 290 291 vhdl->set_body (""); 292 vhdl->set_body ("\t\t\t-- interface : 'RETIRE'"); 293 for (uint32_t i=0; i<_param->_nb_inst_retire; i++) 294 { 295 if (_param->_size_queue == 1) 296 range_retire = "(0)"; 297 else 298 range_retire = "(conv_integer(internal_RETIRE_SLOT_"+toString(i)+std_logic_range(log2(_param->_size_queue)+1,log2(_param->_size_queue)-1,0)+"))"; 299 300 vhdl->set_body ("\t\t\tif (internal_RETIRE_TRANSACTION_"+toString(i)+" = '1') then"); 301 302 vhdl->set_body ("\t\t\t\treg_VAL "+range_retire+" <= '0';"); 303 vhdl->set_body ("\t\t\tend if;"); 304 } 305 306 vhdl->set_body (""); 307 vhdl->set_body ("\t\tend if;"); 308 vhdl->set_body (""); 309 vhdl->set_body ("\tend if;"); 310 vhdl->set_body ("end process transition;"); 311 27 312 log_printf(FUNC,Reservation_station,FUNCTION,"End"); 28 313 };
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