Ignore:
Timestamp:
Jan 19, 2008, 12:09:01 PM (16 years ago)
Author:
rosiere
Message:

Modification of Statisctics
Add a new systemC component : Load_Store_Queue (tested with one benchmark and one configuration). Store don't supported the Data Buss Error (Load is supported)

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_allocation.cpp

    r62 r71  
    6464   in_MEMORY_IN_VAL                   = interface->set_signal_valack_in        (VAL);
    6565  out_MEMORY_IN_ACK                   = interface->set_signal_valack_out       (ACK);
    66    in_MEMORY_IN_CONTEXT_ID            = interface->set_signal_in  <Tcontext_t        > ("context_id"  ,_param->_size_context_id       );
    67    in_MEMORY_IN_PACKET_ID             = interface->set_signal_in  <Tpacket_t         > ("packet_id"   ,_param->_size_packet_id       );
     66
     67  if (_param->_have_port_context_id)
     68   in_MEMORY_IN_CONTEXT_ID            = interface->set_signal_in  <Tcontext_t        > ("context_id"   ,_param->_size_context_id       );
     69  if (_param->_have_port_front_end_id)
     70   in_MEMORY_IN_FRONT_END_ID          = interface->set_signal_in  <Tcontext_t        > ("front_end_id" ,_param->_size_front_end_id     );
     71  if (_param->_have_port_ooo_engine_id)
     72   in_MEMORY_IN_OOO_ENGINE_ID         = interface->set_signal_in  <Tcontext_t        > ("ooo_engine_id",_param->_size_ooo_engine_id    );
     73  if (_param->_have_port_packet_id)
     74   in_MEMORY_IN_PACKET_ID             = interface->set_signal_in  <Tpacket_t         > ("packet_id"    ,_param->_size_packet_id       );
    6875   in_MEMORY_IN_OPERATION             = interface->set_signal_in  <Toperation_t      > ("operation"   ,_param->_size_operation        );
    69    in_MEMORY_IN_STORE_QUEUE_PTR_WRITE = interface->set_signal_in  <Tlsq_ptr_t        > ("store_queue_ptr_write" ,_param->_size_address_store_queue);
     76   in_MEMORY_IN_STORE_QUEUE_PTR_WRITE = interface->set_signal_in  <Tlsq_ptr_t        > ("store_queue_ptr_write" ,_param->_size_address_store_queue+1); // +1 cf load_queue usage
    7077   in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE  = interface->set_signal_in  <Tlsq_ptr_t        > ("load_queue_ptr_write"  ,_param->_size_address_load_queue );
    7178// in_MEMORY_IN_HAS_IMMEDIAT          = interface->set_signal_in  <Tcontrol_t        > ("has_immediat",1                              );
    … …  
    7481   in_MEMORY_IN_DATA_RB               = interface->set_signal_in  <Tgeneral_data_t   > ("data_rb"     ,_param->_size_general_data     );
    7582// in_MEMORY_IN_DATA_RC               = interface->set_signal_in  <Tspecial_data_t   > ("data_rc"     ,_param->_size_special_data     );
    76    in_MEMORY_IN_WRITE_RD              = interface->set_signal_in  <Tcontrol_t        > ("write_rd"    ,1                              );
     83//    in_MEMORY_IN_WRITE_RD              = interface->set_signal_in  <Tcontrol_t        > ("write_rd"    ,1                              );
    7784   in_MEMORY_IN_NUM_REG_RD            = interface->set_signal_in  <Tgeneral_address_t> ("num_reg_rd"  ,1                              );
    7885// in_MEMORY_IN_WRITE_RE              = interface->set_signal_in  <Tcontrol_t        > ("write_re"    ,1                              );
    … …  
    9097                                                              );
    9198
    92       out_MEMORY_OUT_VAL         = interface->set_signal_valack_out(VAL);
    93        in_MEMORY_OUT_ACK         = interface->set_signal_valack_in (ACK);
    94       out_MEMORY_OUT_CONTEXT_ID  = interface->set_signal_out <Tcontext_t        > ("context_id"  ,_param->_size_context_id       );
    95       out_MEMORY_OUT_PACKET_ID   = interface->set_signal_out <Tpacket_t         > ("packet_id"   ,_param->_size_packet_id        );
    96       out_MEMORY_OUT_WRITE_RD    = interface->set_signal_out <Tcontrol_t        > ("write_rd"    ,1                              );
    97       out_MEMORY_OUT_NUM_REG_RD  = interface->set_signal_out <Tgeneral_address_t> ("num_reg_rd"  ,_param->_size_general_register );
    98       out_MEMORY_OUT_DATA_RD     = interface->set_signal_out <Tgeneral_data_t   > ("data_rd"     ,_param->_size_general_data     );
    99 //    out_MEMORY_OUT_WRITE_RE    = interface->set_signal_out <Tcontrol_t        > ("write_rd"    ,1                              );
    100 //    out_MEMORY_OUT_NUM_REG_RE  = interface->set_signal_out <Tspecial_address_t> ("num_reg_re"  ,_param->_size_general_register );
    101 //    out_MEMORY_OUT_DATA_RE     = interface->set_signal_out <Tspecial_data_t   > ("data_re"     ,_param->_size_general_data     );
    102       out_MEMORY_OUT_EXCEPTION   = interface->set_signal_out <Texception_t      > ("exception"   ,_param->_size_exception        );
     99      out_MEMORY_OUT_VAL           = interface->set_signal_valack_out(VAL);
     100       in_MEMORY_OUT_ACK           = interface->set_signal_valack_in (ACK);
     101      if (_param->_have_port_context_id)       
     102      out_MEMORY_OUT_CONTEXT_ID    = interface->set_signal_out <Tcontext_t        > ("context_id"    ,_param->_size_context_id       );
     103      if (_param->_have_port_front_end_id)     
     104      out_MEMORY_OUT_FRONT_END_ID  = interface->set_signal_out <Tcontext_t        > ("front_end_id"  ,_param->_size_front_end_id     );
     105      if (_param->_have_port_ooo_engine_id)   
     106      out_MEMORY_OUT_OOO_ENGINE_ID = interface->set_signal_out <Tcontext_t        > ("ooo_engine_id" ,_param->_size_ooo_engine_id    );
     107      if (_param->_have_port_packet_id)       
     108      out_MEMORY_OUT_PACKET_ID     = interface->set_signal_out <Tpacket_t         > ("packet_id"     ,_param->_size_packet_id        );
     109      out_MEMORY_OUT_WRITE_RD      = interface->set_signal_out <Tcontrol_t        > ("write_rd"      ,1                              );
     110      out_MEMORY_OUT_NUM_REG_RD    = interface->set_signal_out <Tgeneral_address_t> ("num_reg_rd"    ,_param->_size_general_register );
     111      out_MEMORY_OUT_DATA_RD       = interface->set_signal_out <Tgeneral_data_t   > ("data_rd"       ,_param->_size_general_data     );
     112//    out_MEMORY_OUT_WRITE_RE      = interface->set_signal_out <Tcontrol_t        > ("write_rd"      ,1                              );
     113//    out_MEMORY_OUT_NUM_REG_RE    = interface->set_signal_out <Tspecial_address_t> ("num_reg_re"    ,_param->_size_general_register );
     114//    out_MEMORY_OUT_DATA_RE       = interface->set_signal_out <Tspecial_data_t   > ("data_re"       ,_param->_size_general_data     );
     115      out_MEMORY_OUT_EXCEPTION     = interface->set_signal_out <Texception_t      > ("exception"     ,_param->_size_exception        );
    103116
    104117    }
    … …  
    116129      out_DCACHE_REQ_VAL        = interface->set_signal_valack_out(VAL);
    117130       in_DCACHE_REQ_ACK        = interface->set_signal_valack_in (ACK);
    118       out_DCACHE_REQ_CONTEXT_ID = interface->set_signal_out <Tcontext_t        > ("context_id",_param->_size_context_id  );
    119       out_DCACHE_REQ_PACKET_ID  = interface->set_signal_out <Tpacket_t         > ("packet_id" ,_param->_size_packet_id   );
     131       if (_param->_have_port_dcache_context_id)
     132      out_DCACHE_REQ_CONTEXT_ID = interface->set_signal_out <Tcontext_t        > ("context_id",_param->_size_dcache_context_id  );
     133      out_DCACHE_REQ_PACKET_ID  = interface->set_signal_out <Tpacket_t         > ("packet_id" ,_param->_size_dcache_packet_id   );
    120134      out_DCACHE_REQ_ADDRESS    = interface->set_signal_out <Tdcache_address_t > ("address"   ,_param->_size_dcache_address);
    121135      out_DCACHE_REQ_TYPE       = interface->set_signal_out <Tdcache_type_t    > ("type"      ,_param->_size_dcache_type );
    122       out_DCACHE_REQ_UNCACHED   = interface->set_signal_out <Tcontrol_t        > ("uncached"  ,1);
    123136      out_DCACHE_REQ_WDATA      = interface->set_signal_out <Tdcache_data_t    > ("wdata"     ,_param->_size_general_data);
    124137    }
    … …  
    135148       in_DCACHE_RSP_VAL        = interface->set_signal_valack_in (VAL);
    136149      out_DCACHE_RSP_ACK        = interface->set_signal_valack_out(ACK);
    137        in_DCACHE_RSP_CONTEXT_ID = interface->set_signal_in  <Tcontext_t     > ("context_id",_param->_size_context_id  );
    138        in_DCACHE_RSP_PACKET_ID  = interface->set_signal_in  <Tpacket_t      > ("packet_id" ,_param->_size_packet_id   );
     150       if (_param->_have_port_dcache_context_id)
     151       in_DCACHE_RSP_CONTEXT_ID = interface->set_signal_in  <Tcontext_t     > ("context_id",_param->_size_dcache_context_id  );
     152       in_DCACHE_RSP_PACKET_ID  = interface->set_signal_in  <Tpacket_t      > ("packet_id" ,_param->_size_dcache_packet_id   );
    139153       in_DCACHE_RSP_RDATA      = interface->set_signal_in  <Tdcache_data_t > ("rdata"     ,_param->_size_general_data);
    140154       in_DCACHE_RSP_ERROR      = interface->set_signal_in  <Tdcache_error_t> ("error"     ,_param->_size_dcache_error);
    … …  
    144158    if (_param->_speculative_load == SPECULATIVE_LOAD_BYPASS)
    145159      {
    146         out_BYPASS_MEMORY_VAL        = new SC_OUT(Tcontrol_t        ) * [_param->_size_load_queue];
    147         out_BYPASS_MEMORY_CONTEXT_ID = new SC_OUT(Tcontext_t        ) * [_param->_size_load_queue];
    148         out_BYPASS_MEMORY_NUM_REG    = new SC_OUT(Tgeneral_address_t) * [_param->_size_load_queue];
    149         out_BYPASS_MEMORY_DATA       = new SC_OUT(Tgeneral_data_t   ) * [_param->_size_load_queue];
     160        out_BYPASS_MEMORY_VAL          = new SC_OUT(Tcontrol_t        ) * [_param->_size_load_queue];
     161        if (_param->_have_port_ooo_engine_id)   
     162        out_BYPASS_MEMORY_OOO_ENGINE_ID= new SC_OUT(Tcontext_t        ) * [_param->_size_load_queue];
     163        out_BYPASS_MEMORY_NUM_REG      = new SC_OUT(Tgeneral_address_t) * [_param->_size_load_queue];
     164        out_BYPASS_MEMORY_DATA         = new SC_OUT(Tgeneral_data_t   ) * [_param->_size_load_queue];
    150165       
    151166        for (uint32_t i=0; i<_param->_size_load_queue; i++)
    … …  
    159174                                                                    );
    160175           
    161             out_BYPASS_MEMORY_VAL        [i] = interface->set_signal_valack_out(VAL);
    162             out_BYPASS_MEMORY_CONTEXT_ID [i] = interface->set_signal_out <Tcontext_t        > ("context_id", _param->_size_context_id);
    163             out_BYPASS_MEMORY_NUM_REG    [i] = interface->set_signal_out <Tgeneral_address_t> ("num_reg"   , _param->_size_general_register);
    164             out_BYPASS_MEMORY_DATA       [i] = interface->set_signal_out <Tgeneral_data_t   > ("data"      , _param->_size_general_data);
     176            out_BYPASS_MEMORY_VAL           [i] = interface->set_signal_valack_out(VAL);
     177            if (_param->_have_port_ooo_engine_id)
     178            out_BYPASS_MEMORY_OOO_ENGINE_ID [i] = interface->set_signal_out <Tcontext_t        > ("ooo_engine_id", _param->_size_ooo_engine_id);
     179            out_BYPASS_MEMORY_NUM_REG       [i] = interface->set_signal_out <Tgeneral_address_t> ("num_reg"      , _param->_size_general_register);
     180            out_BYPASS_MEMORY_DATA          [i] = interface->set_signal_out <Tgeneral_data_t   > ("data"         , _param->_size_general_data);
    165181          }
    166182      }
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