Changeset 76 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station
- Timestamp:
- Feb 2, 2008, 12:39:01 PM (16 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station
- Files:
-
- 15 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/configuration_multi_port_bypass_memory.cfg
r75 r76 16 16 0 0 *2 # nb_bypass_write 17 17 1 4 *2 # nb_bypass_memory 18 4 4 *2 # size_store_queue 19 4 4 *2 # size_load_queue -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/configuration_multi_port_bypass_write.cfg
r75 r76 16 16 1 4 *2 # nb_bypass_write 17 17 0 0 *2 # nb_bypass_memory 18 4 4 *2 # size_store_queue 19 4 4 *2 # size_load_queue -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/configuration_multi_port_retire2.cfg
r75 r76 16 16 0 0 *2 # nb_bypass_write 17 17 0 0 *2 # nb_bypass_memory 18 4 4 *2 # size_store_queue 19 4 4 *2 # size_load_queue -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/configuration_multi_port_retire4.cfg
r75 r76 16 16 0 0 *2 # nb_bypass_write 17 17 0 0 *2 # nb_bypass_memory 18 4 4 *2 # size_store_queue 19 4 4 *2 # size_load_queue -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/configuration_multi_port_write.cfg
r75 r76 16 16 0 0 *2 # nb_bypass_write 17 17 0 0 *2 # nb_bypass_memory 18 4 4 *2 # size_store_queue 19 4 4 *2 # size_load_queue -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/src/main.cpp
r69 r76 8 8 #include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/include/test.h" 9 9 10 #define NB_PARAMS 1 610 #define NB_PARAMS 18 11 11 12 12 void usage (int argc, char * argv[]) … … 30 30 << " - nb_bypass_write (unsigned int)" << endl 31 31 << " - nb_bypass_memory (unsigned int)" << endl 32 << " - size_store_queue (unsigned int)" << endl 33 << " - size_load_queue (unsigned int)" << endl 32 34 << "" << endl; 33 35 … … 66 68 const uint32_t nb_bypass_write = atoi(argv[x++]); 67 69 const uint32_t nb_bypass_memory = atoi(argv[x++]); 70 const uint32_t size_store_queue = atoi(argv[x++]); 71 const uint32_t size_load_queue = atoi(argv[x++]); 68 72 69 73 try … … 86 90 ,nb_bypass_write 87 91 ,nb_bypass_memory 92 ,size_store_queue 93 ,size_load_queue 88 94 ); 89 95 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest/src/test.cpp
r75 r76 73 73 sc_signal<Toperation_t > * in_INSERT_OPERATION = new sc_signal<Toperation_t >; 74 74 sc_signal<Ttype_t > * in_INSERT_TYPE = new sc_signal<Ttype_t >; 75 sc_signal<Tlsq_ptr_t > * in_INSERT_STORE_QUEUE_PTR_WRITE = new sc_signal<Tlsq_ptr_t>; 76 sc_signal<Tlsq_ptr_t > * in_INSERT_LOAD_QUEUE_PTR_WRITE = new sc_signal<Tlsq_ptr_t>; 75 77 sc_signal<Tcontrol_t > * in_INSERT_HAS_IMMEDIAT = new sc_signal<Tcontrol_t >; 76 78 sc_signal<Tgeneral_data_t > * in_INSERT_IMMEDIAT = new sc_signal<Tgeneral_data_t >; … … 100 102 sc_signal<Toperation_t > ** out_RETIRE_OPERATION = new sc_signal<Toperation_t > * [_param->_nb_inst_retire]; 101 103 sc_signal<Ttype_t > ** out_RETIRE_TYPE = new sc_signal<Ttype_t > * [_param->_nb_inst_retire]; 104 sc_signal<Tlsq_ptr_t > ** out_RETIRE_STORE_QUEUE_PTR_WRITE = new sc_signal<Tlsq_ptr_t> * [_param->_nb_inst_retire]; 105 sc_signal<Tlsq_ptr_t > ** out_RETIRE_LOAD_QUEUE_PTR_WRITE = new sc_signal<Tlsq_ptr_t> * [_param->_nb_inst_retire]; 102 106 sc_signal<Tcontrol_t > ** out_RETIRE_HAS_IMMEDIAT = new sc_signal<Tcontrol_t > * [_param->_nb_inst_retire]; 103 107 sc_signal<Tgeneral_data_t > ** out_RETIRE_IMMEDIAT = new sc_signal<Tgeneral_data_t > * [_param->_nb_inst_retire]; … … 120 124 out_RETIRE_OPERATION [i] = new sc_signal<Toperation_t > (rename.c_str()); 121 125 out_RETIRE_TYPE [i] = new sc_signal<Ttype_t > (rename.c_str()); 126 out_RETIRE_STORE_QUEUE_PTR_WRITE [i] = new sc_signal<Tlsq_ptr_t> (rename.c_str()); 127 out_RETIRE_LOAD_QUEUE_PTR_WRITE [i] = new sc_signal<Tlsq_ptr_t> (rename.c_str()); 122 128 out_RETIRE_HAS_IMMEDIAT [i] = new sc_signal<Tcontrol_t > (rename.c_str()); 123 129 out_RETIRE_IMMEDIAT [i] = new sc_signal<Tgeneral_data_t > (rename.c_str()); … … 209 215 (*(_Reservation_station-> in_INSERT_OPERATION )) (*( in_INSERT_OPERATION )); 210 216 (*(_Reservation_station-> in_INSERT_TYPE )) (*( in_INSERT_TYPE )); 217 (*(_Reservation_station-> in_INSERT_STORE_QUEUE_PTR_WRITE)) (*( in_INSERT_STORE_QUEUE_PTR_WRITE)); 218 (*(_Reservation_station-> in_INSERT_LOAD_QUEUE_PTR_WRITE )) (*( in_INSERT_LOAD_QUEUE_PTR_WRITE )); 211 219 (*(_Reservation_station-> in_INSERT_HAS_IMMEDIAT )) (*( in_INSERT_HAS_IMMEDIAT )); 212 220 (*(_Reservation_station-> in_INSERT_IMMEDIAT )) (*( in_INSERT_IMMEDIAT )); … … 242 250 (*(_Reservation_station->out_RETIRE_OPERATION [i])) (*(out_RETIRE_OPERATION [i])); 243 251 (*(_Reservation_station->out_RETIRE_TYPE [i])) (*(out_RETIRE_TYPE [i])); 252 (*(_Reservation_station->out_RETIRE_STORE_QUEUE_PTR_WRITE [i])) (*(out_RETIRE_STORE_QUEUE_PTR_WRITE [i])); 253 (*(_Reservation_station->out_RETIRE_LOAD_QUEUE_PTR_WRITE [i])) (*(out_RETIRE_LOAD_QUEUE_PTR_WRITE [i])); 244 254 (*(_Reservation_station->out_RETIRE_HAS_IMMEDIAT [i])) (*(out_RETIRE_HAS_IMMEDIAT [i])); 245 255 (*(_Reservation_station->out_RETIRE_IMMEDIAT [i])) (*(out_RETIRE_IMMEDIAT [i])); … … 435 445 in_INSERT_OPERATION ->write(0); 436 446 in_INSERT_TYPE ->write(0); 447 in_INSERT_STORE_QUEUE_PTR_WRITE->write(0); 448 in_INSERT_LOAD_QUEUE_PTR_WRITE ->write(0); 437 449 in_INSERT_HAS_IMMEDIAT->write(0); 438 450 in_INSERT_IMMEDIAT ->write(0); … … 679 691 delete in_INSERT_OPERATION ; 680 692 delete in_INSERT_TYPE ; 693 delete in_INSERT_STORE_QUEUE_PTR_WRITE; 694 delete in_INSERT_LOAD_QUEUE_PTR_WRITE ; 681 695 delete in_INSERT_HAS_IMMEDIAT; 682 696 delete in_INSERT_IMMEDIAT ; … … 710 724 delete [] out_RETIRE_OPERATION ; 711 725 delete [] out_RETIRE_TYPE ; 726 delete [] out_RETIRE_STORE_QUEUE_PTR_WRITE; 727 delete [] out_RETIRE_LOAD_QUEUE_PTR_WRITE ; 712 728 delete [] out_RETIRE_HAS_IMMEDIAT; 713 729 delete [] out_RETIRE_IMMEDIAT ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Parameters.h
r75 r76 42 42 public : const uint32_t _nb_bypass_write ;//if nb_bypass=0, then bypass is desactivated 43 43 public : const uint32_t _nb_bypass_memory ;//if nb_bypass=0, then bypass is desactivated 44 public : const uint32_t _size_store_queue ; 45 public : const uint32_t _size_load_queue ; 46 44 47 /* 45 48 public : const bool _have_immediat ; … … 80 83 uint32_t nb_spr_write , 81 84 uint32_t nb_bypass_write , 82 uint32_t nb_bypass_memory ); 85 uint32_t nb_bypass_memory , 86 uint32_t size_store_queue , 87 uint32_t size_load_queue ); 83 88 84 89 public : Parameters (Parameters & param) ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/include/Reservation_station.h
r75 r76 5 5 * $Id$ 6 6 * 7 * [ 7 * [ Description ] 8 8 * 9 9 */ … … 47 47 public : Toperation_t _operation ; 48 48 public : Ttype_t _type ; 49 public : Tlsq_ptr_t _store_queue_ptr_write; 50 public : Tlsq_ptr_t _load_queue_ptr_write ; 49 51 public : Tcontrol_t _has_immediat; 50 52 public : Tgeneral_data_t _immediat ; … … 69 71 morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_read_unit::read_unit::reservation_station::Treservation_station_entry_t & x) 70 72 { 71 output_stream << " * _context_id : " << toString(x._context_id ) << std::endl 72 << " * _front_end_id : " << toString(x._front_end_id ) << std::endl 73 << " * _ooo_engine_id : " << toString(x._ooo_engine_id ) << std::endl 74 << " * _rob_id : " << toString(x._rob_id ) << std::endl 75 << " * _operation : " << toString(x._operation ) << std::endl 76 << " * _type : " << toString(x._type ) << std::endl 77 << " * _has_immediat : " << toString(x._has_immediat ) << std::endl 78 << " * _immediat : " << toString(x._immediat ) << std::endl 79 // << " * _read_ra : " << toString(x._read_ra ) << std::endl 80 << " * _num_reg_ra : " << toString(x._num_reg_ra ) << std::endl 81 << " * _data_ra_val : " << toString(x._data_ra_val ) << std::endl 82 << " * _data_ra : " << toString(x._data_ra ) << std::endl 83 // << " * _read_rb : " << toString(x._read_rb ) << std::endl 84 << " * _num_reg_rb : " << toString(x._num_reg_rb ) << std::endl 85 << " * _data_rb_val : " << toString(x._data_rb_val ) << std::endl 86 << " * _data_rb : " << toString(x._data_rb ) << std::endl 87 // << " * _read_rc : " << toString(x._read_rc ) << std::endl 88 << " * _num_reg_rc : " << toString(x._num_reg_rc ) << std::endl 89 << " * _data_rc_val : " << toString(x._data_rc_val ) << std::endl 90 << " * _data_rc : " << toString(x._data_rc ) << std::endl 91 << " * _write_rd : " << toString(x._write_rd ) << std::endl 92 << " * _num_reg_rd : " << toString(x._num_reg_rd ) << std::endl 93 << " * _write_re : " << toString(x._write_re ) << std::endl 94 << " * _num_reg_re : " << toString(x._num_reg_re ) << std::endl; 73 output_stream << " * _context_id : " << toString(x._context_id ) << std::endl 74 << " * _front_end_id : " << toString(x._front_end_id ) << std::endl 75 << " * _ooo_engine_id : " << toString(x._ooo_engine_id ) << std::endl 76 << " * _rob_id : " << toString(x._rob_id ) << std::endl 77 << " * _operation : " << toString(x._operation ) << std::endl 78 << " * _type : " << toString(x._type ) << std::endl 79 << " * _store_queue_ptr_write : " << toString(x._store_queue_ptr_write) << std::endl 80 << " * _load_queue_ptr_write : " << toString(x._load_queue_ptr_write ) << std::endl 81 << " * _has_immediat : " << toString(x._has_immediat ) << std::endl 82 << " * _immediat : " << toString(x._immediat ) << std::endl 83 // << " * _read_ra : " << toString(x._read_ra ) << std::endl 84 << " * _num_reg_ra : " << toString(x._num_reg_ra ) << std::endl 85 << " * _data_ra_val : " << toString(x._data_ra_val ) << std::endl 86 << " * _data_ra : " << toString(x._data_ra ) << std::endl 87 // << " * _read_rb : " << toString(x._read_rb ) << std::endl 88 << " * _num_reg_rb : " << toString(x._num_reg_rb ) << std::endl 89 << " * _data_rb_val : " << toString(x._data_rb_val ) << std::endl 90 << " * _data_rb : " << toString(x._data_rb ) << std::endl 91 // << " * _read_rc : " << toString(x._read_rc ) << std::endl 92 << " * _num_reg_rc : " << toString(x._num_reg_rc ) << std::endl 93 << " * _data_rc_val : " << toString(x._data_rc_val ) << std::endl 94 << " * _data_rc : " << toString(x._data_rc ) << std::endl 95 << " * _write_rd : " << toString(x._write_rd ) << std::endl 96 << " * _num_reg_rd : " << toString(x._num_reg_rd ) << std::endl 97 << " * _write_re : " << toString(x._write_re ) << std::endl 98 << " * _num_reg_re : " << toString(x._num_reg_re ) << std::endl; 95 99 96 100 return output_stream; 97 101 } 98 99 102 }; 100 103 … … 104 107 #endif 105 108 { 106 // -----[ 109 // -----[ fields ]---------------------------------------------------- 107 110 // Parameters 108 111 protected : const std::string _name; … … 118 121 119 122 #ifdef SYSTEMC 120 // ~~~~~[ 123 // ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 121 124 // Interface 122 125 public : SC_CLOCK * in_CLOCK ; 123 126 public : SC_IN (Tcontrol_t) * in_NRESET ; 124 127 125 // ~~~~~[ 128 // ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~ 126 129 public : SC_IN (Tcontrol_t ) * in_INSERT_VAL ; 127 130 public : SC_OUT(Tcontrol_t ) * out_INSERT_ACK ; … … 132 135 public : SC_IN (Toperation_t ) * in_INSERT_OPERATION ; 133 136 public : SC_IN (Ttype_t ) * in_INSERT_TYPE ; 137 public : SC_IN (Tlsq_ptr_t ) * in_INSERT_STORE_QUEUE_PTR_WRITE; 138 public : SC_IN (Tlsq_ptr_t ) * in_INSERT_LOAD_QUEUE_PTR_WRITE ; 134 139 public : SC_IN (Tcontrol_t ) * in_INSERT_HAS_IMMEDIAT ; 135 140 public : SC_IN (Tgeneral_data_t ) * in_INSERT_IMMEDIAT ; … … 151 156 public : SC_IN (Tspecial_address_t) * in_INSERT_NUM_REG_RE ; 152 157 153 // ~~~~~[ 158 // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~ 154 159 public : SC_OUT(Tcontrol_t ) ** out_RETIRE_VAL ; 155 160 public : SC_IN (Tcontrol_t ) ** in_RETIRE_ACK ; … … 160 165 public : SC_OUT(Toperation_t ) ** out_RETIRE_OPERATION ; 161 166 public : SC_OUT(Ttype_t ) ** out_RETIRE_TYPE ; 167 public : SC_OUT(Tlsq_ptr_t ) ** out_RETIRE_STORE_QUEUE_PTR_WRITE; 168 public : SC_OUT(Tlsq_ptr_t ) ** out_RETIRE_LOAD_QUEUE_PTR_WRITE ; 162 169 public : SC_OUT(Tcontrol_t ) ** out_RETIRE_HAS_IMMEDIAT ; 163 170 public : SC_OUT(Tgeneral_data_t ) ** out_RETIRE_IMMEDIAT ; … … 170 177 public : SC_OUT(Tspecial_address_t) ** out_RETIRE_NUM_REG_RE ; 171 178 172 // ~~~~~[ 179 // ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 173 180 174 181 public : SC_IN (Tcontrol_t ) ** in_GPR_WRITE_VAL ; // val and ack … … 177 184 public : SC_IN (Tgeneral_data_t ) ** in_GPR_WRITE_DATA ; 178 185 179 // ~~~~~[ 186 // ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 180 187 181 188 public : SC_IN (Tcontrol_t ) ** in_SPR_WRITE_VAL ; // val and ack … … 184 191 public : SC_IN (Tspecial_data_t ) ** in_SPR_WRITE_DATA ; 185 192 186 // ~~~~~[ 193 // ~~~~~[ Interface "bypass_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 187 194 188 195 public : SC_IN (Tcontext_t ) ** in_BYPASS_WRITE_OOO_ENGINE_ID ; … … 194 201 public : SC_IN (Tspecial_data_t ) ** in_BYPASS_WRITE_SPR_DATA ; 195 202 196 // ~~~~~[ 203 // ~~~~~[ Interface "bypass_memory" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 197 204 198 205 public : SC_IN (Tcontrol_t ) ** in_BYPASS_MEMORY_VAL ; … … 202 209 203 210 204 // ~~~~~[ 205 206 // ~~~~~[ 207 208 // ~~~~~[ 211 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 212 213 // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 214 215 // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 209 216 #ifdef SYSTEMC_VHDL_COMPATIBILITY 210 217 protected : bool * _queue_valid; … … 220 227 #endif 221 228 222 // -----[ 229 // -----[ methods ]--------------------------------------------------- 223 230 224 231 #ifdef SYSTEMC -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Parameters.cpp
r69 r76 35 35 uint32_t nb_spr_write , 36 36 uint32_t nb_bypass_write , 37 uint32_t nb_bypass_memory ): 37 uint32_t nb_bypass_memory , 38 uint32_t size_store_queue , 39 uint32_t size_load_queue ): 38 40 _size_queue (size_queue ), 39 41 _nb_inst_retire (nb_inst_retire ), … … 52 54 _nb_bypass_write (nb_bypass_write ), 53 55 _nb_bypass_memory (nb_bypass_memory ), 56 _size_store_queue (size_store_queue ), 57 _size_load_queue (size_load_queue ), 54 58 55 59 _size_context_id (static_cast<uint32_t>(log2(_nb_context ))), … … 91 95 _nb_bypass_write (param._nb_bypass_write ), 92 96 _nb_bypass_memory (param._nb_bypass_memory ), 97 _size_store_queue (param._size_store_queue ), 98 _size_load_queue (param._size_load_queue ), 93 99 94 100 _size_context_id (param._size_context_id ), -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Parameters_print.cpp
r75 r76 44 44 xml.singleton_begin("nb_bypass_write "); xml.attribut("value",toString(_nb_bypass_write )); xml.singleton_end(); 45 45 xml.singleton_begin("nb_bypass_memory "); xml.attribut("value",toString(_nb_bypass_memory )); xml.singleton_end(); 46 xml.singleton_begin("size_store_queue "); xml.attribut("value",toString(_size_store_queue )); xml.singleton_end(); 47 xml.singleton_begin("size_load_queue "); xml.attribut("value",toString(_size_load_queue )); xml.singleton_end(); 46 48 xml.balise_close(); 47 49 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_allocation.cpp
r75 r76 72 72 in_INSERT_OPERATION = interface->set_signal_in <Toperation_t > ("operation" ,_param->_size_operation ); 73 73 in_INSERT_TYPE = interface->set_signal_in <Ttype_t > ("type" ,_param->_size_type ); 74 in_INSERT_STORE_QUEUE_PTR_WRITE = interface->set_signal_in <Tlsq_ptr_t> ("store_queue_ptr_write" ,log2(_param->_size_store_queue)); 75 in_INSERT_LOAD_QUEUE_PTR_WRITE = interface->set_signal_in <Tlsq_ptr_t> ("load_queue_ptr_write" ,log2(_param->_size_load_queue) ); 74 76 in_INSERT_HAS_IMMEDIAT = interface->set_signal_in <Tcontrol_t > ("has_immediat" ,1 ); 75 77 in_INSERT_IMMEDIAT = interface->set_signal_in <Tgeneral_data_t > ("immediat" ,_param->_size_general_data ); … … 105 107 out_RETIRE_OPERATION = new SC_OUT(Toperation_t ) * [_param->_nb_inst_retire]; 106 108 out_RETIRE_TYPE = new SC_OUT(Ttype_t ) * [_param->_nb_inst_retire]; 109 out_RETIRE_STORE_QUEUE_PTR_WRITE = new SC_OUT(Tlsq_ptr_t ) * [_param->_nb_inst_retire]; 110 out_RETIRE_LOAD_QUEUE_PTR_WRITE = new SC_OUT(Tlsq_ptr_t ) * [_param->_nb_inst_retire]; 107 111 out_RETIRE_HAS_IMMEDIAT = new SC_OUT(Tcontrol_t ) * [_param->_nb_inst_retire]; 108 112 out_RETIRE_IMMEDIAT = new SC_OUT(Tgeneral_data_t ) * [_param->_nb_inst_retire]; … … 136 140 out_RETIRE_OPERATION [i] = interface->set_signal_out<Toperation_t > ("operation" ,_param->_size_operation); 137 141 out_RETIRE_TYPE [i] = interface->set_signal_out<Ttype_t > ("type" ,_param->_size_type); 142 out_RETIRE_STORE_QUEUE_PTR_WRITE [i] = interface->set_signal_out<Tlsq_ptr_t> ("store_queue_ptr_write" ,log2(_param->_size_store_queue)); 143 out_RETIRE_LOAD_QUEUE_PTR_WRITE [i] = interface->set_signal_out<Tlsq_ptr_t> ("load_queue_ptr_write" ,log2(_param->_size_load_queue) ); 144 138 145 out_RETIRE_HAS_IMMEDIAT [i] = interface->set_signal_out<Tcontrol_t > ("has_immediat" ,1); 139 146 out_RETIRE_IMMEDIAT [i] = interface->set_signal_out<Tgeneral_data_t > ("immediat" ,_param->_size_general_data); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_deallocation.cpp
r69 r76 43 43 delete in_INSERT_OPERATION ; 44 44 delete in_INSERT_TYPE ; 45 delete in_INSERT_STORE_QUEUE_PTR_WRITE; 46 delete in_INSERT_LOAD_QUEUE_PTR_WRITE ; 45 47 delete in_INSERT_HAS_IMMEDIAT ; 46 48 delete in_INSERT_IMMEDIAT ; … … 74 76 delete [] out_RETIRE_OPERATION ; 75 77 delete [] out_RETIRE_TYPE ; 78 delete [] out_RETIRE_STORE_QUEUE_PTR_WRITE; 79 delete [] out_RETIRE_LOAD_QUEUE_PTR_WRITE ; 76 80 delete [] out_RETIRE_HAS_IMMEDIAT ; 77 81 delete [] out_RETIRE_IMMEDIAT ; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_genMoore.cpp
r70 r76 101 101 PORT_WRITE(out_RETIRE_OPERATION [i],_queue[index_find]._operation); 102 102 PORT_WRITE(out_RETIRE_TYPE [i],_queue[index_find]._type); 103 PORT_WRITE(out_RETIRE_STORE_QUEUE_PTR_WRITE [i],_queue[index_find]._store_queue_ptr_write); 104 PORT_WRITE(out_RETIRE_LOAD_QUEUE_PTR_WRITE [i],_queue[index_find]._load_queue_ptr_write ); 103 105 PORT_WRITE(out_RETIRE_HAS_IMMEDIAT [i],_queue[index_find]._has_immediat); 104 106 PORT_WRITE(out_RETIRE_IMMEDIAT [i],_queue[index_find]._immediat); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/src/Reservation_station_transition.cpp
r70 r76 258 258 _queue[index]._operation = PORT_READ(in_INSERT_OPERATION ); 259 259 _queue[index]._type = PORT_READ(in_INSERT_TYPE ); 260 _queue[index]._store_queue_ptr_write = PORT_READ(in_INSERT_STORE_QUEUE_PTR_WRITE); 261 _queue[index]._load_queue_ptr_write = PORT_READ(in_INSERT_LOAD_QUEUE_PTR_WRITE ); 260 262 _queue[index]._has_immediat = PORT_READ(in_INSERT_HAS_IMMEDIAT ); 261 263 _queue[index]._immediat = PORT_READ(in_INSERT_IMMEDIAT );
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