Changeset 78 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp

Timestamp:

Mar 27, 2008, 11:04:49 AM (16 years ago)

Author:

rosiere

Message:

Add :

• Execute_loop (must be test systemC)
• Prediction
  • Direction : predifined scheme
  • Branch Target Buffer
• iFetch_unit
  • ifetch_queue
  • pc management
• Decod_unit
  • coming soon : support for custom operation
• Rename_unit
  • RAT
  • Free_list
  • Dependence RAW check
  • Load store unit pointer
• New Environnement (hierarchy_memory will remove in a next version)

Modif :

• Manage Custom Operation
• All component in execute_loop to use the new statistics management

Not Finish :

• Return Address Stack
• Environnement

File:

• trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp (modified) (3 diffs)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_transition.cpp

@@ -265 +265 @@
             //  others in speculation_access_queue
 
+#ifdef DEBUG_TEST
+            if (PORT_READ(in_MEMORY_IN_TYPE) != TYPE_MEMORY)
+              throw ERRORMORPHEO(FUNCTION,"The type is different at 'TYPE_MEMORY'");
+#endif
             Toperation_t    operation            = PORT_READ(in_MEMORY_IN_OPERATION);
             Tgeneral_data_t address              = (PORT_READ(in_MEMORY_IN_IMMEDIAT) +
@@ -376 +380 @@
                     _store_queue [index]._packet_id            = (not _param->_have_port_packet_id    )?0:PORT_READ(in_MEMORY_IN_PACKET_ID   );
                     _store_queue [index]._operation            = operation;
-                    _store_queue [index]._load_queue_ptr_write = PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE);
+                    _store_queue [index]._load_queue_ptr_write = (not _param->_have_port_load_queue_ptr)?0:PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE);
                     _store_queue [index]._address              = address;
 
@@ -415 +419 @@
 
                 _speculative_access_queue [index]._operation            = operation;
-                _speculative_access_queue [index]._load_queue_ptr_write = PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE);
+                _speculative_access_queue [index]._load_queue_ptr_write = (not _param->_have_port_load_queue_ptr)?0:PORT_READ(in_MEMORY_IN_LOAD_QUEUE_PTR_WRITE);
                 _speculative_access_queue [index]._store_queue_ptr_write= PORT_READ(in_MEMORY_IN_STORE_QUEUE_PTR_WRITE);
                 _speculative_access_queue [index]._address              = address;