Changeset 81 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table
- Timestamp:
- Apr 15, 2008, 8:40:01 PM (16 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table
- Files:
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- 5 added
- 35 edited
- 1 moved
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Makefile (modified) (1 prop)
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Makefile.defs (modified) (1 prop)
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Makefile.deps (modified) (1 prop)
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SelfTest/Makefile (modified) (1 prop)
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SelfTest/config_mono_context.cfg (moved) (moved from trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/configuration.cfg) (1 diff, 1 prop)
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SelfTest/config_multi_context.cfg (added)
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SelfTest/include/test.h (modified) (1 prop)
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SelfTest/src/main.cpp (modified) (6 diffs, 1 prop)
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SelfTest/src/test.cpp (modified) (7 diffs, 1 prop)
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doc/Makefile (modified) (1 prop)
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doc/Update_Prediction_Table.tex (modified) (1 prop)
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doc/sty/header.sty (modified) (1 prop)
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doc/tex/01_introduction.tex (modified) (1 prop)
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doc/tex/02_features.tex (modified) (1 prop)
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doc/tex/03_description.tex (modified) (1 prop)
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doc/tex/04_pinout.tex (modified) (1 prop)
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doc/tex/05_parameters.tex (modified) (1 prop)
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doc/tex/06_performance.tex (modified) (1 prop)
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doc/tex/07_details.tex (modified) (1 prop)
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doc/tex/08_history.tex (modified) (1 prop)
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doc/tex/root.tex (modified) (1 prop)
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include/Parameters.h (modified) (1 diff, 1 prop)
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include/Types.h (modified) (2 diffs, 1 prop)
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include/Update_Prediction_Table.h (modified) (3 diffs, 1 prop)
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src/Parameters.cpp (modified) (2 diffs, 1 prop)
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src/Parameters_msg_error.cpp (modified) (1 diff, 1 prop)
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src/Parameters_print.cpp (modified) (1 diff, 1 prop)
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src/Update_Prediction_Table.cpp (modified) (3 diffs, 1 prop)
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src/Update_Prediction_Table_allocation.cpp (modified) (1 diff, 1 prop)
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src/Update_Prediction_Table_deallocation.cpp (modified) (1 diff, 1 prop)
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src/Update_Prediction_Table_end_cycle.cpp (modified) (1 prop)
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src/Update_Prediction_Table_genMealy_branch_complete.cpp (added)
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src/Update_Prediction_Table_genMealy_decod.cpp (added)
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src/Update_Prediction_Table_genMealy_predict.cpp (added)
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src/Update_Prediction_Table_genMoore.cpp (added)
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src/Update_Prediction_Table_statistics_allocation.cpp (modified) (1 prop)
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src/Update_Prediction_Table_statistics_deallocation.cpp (modified) (1 prop)
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src/Update_Prediction_Table_transition.cpp (modified) (1 diff, 1 prop)
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src/Update_Prediction_Table_vhdl.cpp (modified) (1 prop)
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src/Update_Prediction_Table_vhdl_body.cpp (modified) (1 prop)
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src/Update_Prediction_Table_vhdl_declaration.cpp (modified) (1 prop)
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/Makefile
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r78 r81 1 1 Update_Prediction_Table 2 1 1 +1 # nb_context 3 1 4 *4 # size_queue [0] [nb_context] 4 32 32 *2 # size_address 5 4 4 *4 # nb_inst_predict 6 4 4 *4 # nb_inst_decod 7 4 4 *4 # nb_inst_branch_complete 8 4 4 *4 # nb_inst_update 9 0 0 +1 # size_history 10 3 3 *2 # size_ras_index [0] [nb_context] -
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r78 r81 8 8 #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/include/test.h" 9 9 10 #define NB_PARAMS 010 #define NB_PARAMS 7 11 11 12 12 void usage (int argc, char * argv[]) … … 14 14 err (_("<Usage> %s name_instance list_params.\n"),argv[0]); 15 15 err (_("list_params is :\n")); 16 err (_(" * ()\n")); 16 err (_(" * nb_context (uint32_t)\n")); 17 err (_(" * size_queue [nb_context] (uint32_t)\n")); 18 err (_(" * size_address (uint32_t)\n")); 19 err (_(" * nb_inst_predict (uint32_t)\n")); 20 err (_(" * nb_inst_decod (uint32_t)\n")); 21 err (_(" * nb_inst_branch_complete (uint32_t)\n")); 22 err (_(" * nb_inst_update (uint32_t)\n")); 23 err (_(" * size_history (uint32_t)\n")); 24 err (_(" * size_ras_index [nb_context] (uint32_t)\n")); 17 25 18 26 exit (1); … … 25 33 #endif 26 34 { 27 if (argc != static_cast<int>(2+NB_PARAMS))35 if (argc <= static_cast<int>(2+NB_PARAMS)) 28 36 usage (argc, argv); 29 37 … … 31 39 32 40 string name = argv[x++]; 33 //const uint32_t size_data = atoi(argv[x++]); 34 //const uint32_t nb_port = atoi(argv[x++]); 41 42 uint32_t _nb_context = fromString<uint32_t>(argv[x++]); 43 44 if (argc != static_cast<int>(2+NB_PARAMS+2*_nb_context)) 45 usage (argc, argv); 46 47 uint32_t * _size_queue = new uint32_t [_nb_context]; 48 for (uint32_t i=0; i<_nb_context; i++) 49 _size_queue [i] = fromString<uint32_t>(argv[x++]); 50 uint32_t _size_address = fromString<uint32_t>(argv[x++]); 51 uint32_t _nb_inst_predict = fromString<uint32_t>(argv[x++]); 52 uint32_t _nb_inst_decod = fromString<uint32_t>(argv[x++]); 53 uint32_t _nb_inst_branch_complete = fromString<uint32_t>(argv[x++]); 54 uint32_t _nb_inst_update = fromString<uint32_t>(argv[x++]); 55 uint32_t _size_history = fromString<uint32_t>(argv[x++]); 56 uint32_t * _size_ras_index = new uint32_t [_nb_context]; 57 for (uint32_t i=0; i<_nb_context; i++) 58 _size_ras_index [i] = fromString<uint32_t>(argv[x++]); 35 59 36 60 int _return = EXIT_SUCCESS; … … 38 62 { 39 63 morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::Parameters * param = new morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::Parameters 40 (//size_data, 41 //nb_port 42 ); 64 (_nb_context , 65 _size_queue , 66 _size_address , 67 _nb_inst_predict , 68 _nb_inst_decod , 69 _nb_inst_branch_complete, 70 _nb_inst_update , 71 _size_history , 72 _size_ras_index ); 43 73 44 74 msg(_("%s"),param->print(1).c_str()); … … 57 87 } 58 88 89 90 delete [] _size_ras_index; 91 delete [] _size_queue; 92 59 93 return (_return); 60 94 } -
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r78 r81 7 7 */ 8 8 9 #define NB_ITERATION 8 10 #define CYCLE_MAX (128*NB_ITERATION) 11 9 12 #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/SelfTest/include/test.h" 10 13 #include "Common/include/Test.h" 11 14 #include "Behavioural/include/Allocation.h" 12 13 #define NB_ITERATION 114 #define CYCLE_MAX (128*NB_ITERATION)15 16 #define LABEL(str...) \17 { \18 msg (_("{%d} "),static_cast<uint32_t>(sc_simulation_time())); \19 msg (str); \20 msg (_("\n")); \21 } while(0)22 23 #define SC_START(cycle_offset) \24 do \25 { \26 /*cout << "SC_START (begin)" << endl;*/ \27 \28 uint32_t cycle_current = static_cast<uint32_t>(sc_simulation_time()); \29 if (cycle_offset != 0) \30 { \31 cout << "##########[ cycle "<< cycle_current+cycle_offset << " ]" << endl; \32 } \33 \34 if (cycle_current > CYCLE_MAX) \35 { \36 TEST_KO("Maximal cycles Reached"); \37 } \38 \39 sc_start(cycle_offset); \40 \41 /*cout << "SC_START (end )" << endl;*/ \42 } while(0)43 15 44 16 void test (string name, … … 51 23 #endif 52 24 53 Update_Prediction_Table * _Update_Prediction_Table = new Update_Prediction_Table (name.c_str(), 25 Tusage_t _usage = USE_ALL; 26 27 // _usage = usage_unset(_usage,USE_SYSTEMC ); 28 // _usage = usage_unset(_usage,USE_VHDL ); 29 // _usage = usage_unset(_usage,USE_VHDL_TESTBENCH ); 30 // _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT); 31 // _usage = usage_unset(_usage,USE_POSITION ); 32 // _usage = usage_unset(_usage,USE_STATISTICS ); 33 // _usage = usage_unset(_usage,USE_INFORMATION ); 34 35 Update_Prediction_Table * _Update_Prediction_Table = new Update_Prediction_Table 36 (name.c_str(), 54 37 #ifdef STATISTICS 55 38 _parameters_statistics, 56 39 #endif 57 _param); 40 _param, 41 _usage); 58 42 59 43 #ifdef SYSTEMC … … 65 49 sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5); 66 50 sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET"); 51 52 ALLOC1_SC_SIGNAL( in_PREDICT_VAL ," in_PREDICT_VAL ",Tcontrol_t ,_param->_nb_inst_predict); 53 ALLOC1_SC_SIGNAL(out_PREDICT_ACK ,"out_PREDICT_ACK ",Tcontrol_t ,_param->_nb_inst_predict); 54 ALLOC1_SC_SIGNAL( in_PREDICT_CONTEXT_ID ," in_PREDICT_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_predict); 55 ALLOC1_SC_SIGNAL( in_PREDICT_BTB_ADDRESS_SRC ," in_PREDICT_BTB_ADDRESS_SRC ",Taddress_t ,_param->_nb_inst_predict); 56 ALLOC1_SC_SIGNAL( in_PREDICT_BTB_ADDRESS_DEST ," in_PREDICT_BTB_ADDRESS_DEST ",Taddress_t ,_param->_nb_inst_predict); 57 ALLOC1_SC_SIGNAL( in_PREDICT_BTB_CONDITION ," in_PREDICT_BTB_CONDITION ",Tbranch_condition_t,_param->_nb_inst_predict); 58 ALLOC1_SC_SIGNAL( in_PREDICT_BTB_LAST_TAKE ," in_PREDICT_BTB_LAST_TAKE ",Tcontrol_t ,_param->_nb_inst_predict); 59 ALLOC1_SC_SIGNAL( in_PREDICT_BTB_IS_ACCURATE ," in_PREDICT_BTB_IS_ACCURATE ",Tcontrol_t ,_param->_nb_inst_predict); 60 ALLOC1_SC_SIGNAL( in_PREDICT_DIR_HISTORY ," in_PREDICT_DIR_HISTORY ",Thistory_t ,_param->_nb_inst_predict); 61 ALLOC1_SC_SIGNAL( in_PREDICT_RAS_ADDRESS ," in_PREDICT_RAS_ADDRESS ",Taddress_t ,_param->_nb_inst_predict); 62 ALLOC1_SC_SIGNAL( in_PREDICT_RAS_INDEX ," in_PREDICT_RAS_INDEX ",Tptr_t ,_param->_nb_inst_predict); 63 //ALLOC1_SC_SIGNAL(out_PREDICT_UPDATE_PREDICTION_ID ,"out_PREDICT_UPDATE_PREDICTION_ID ",Tprediction_ptr_t ,_param->_nb_inst_predict); 64 ALLOC1_SC_SIGNAL( in_DECOD_VAL ," in_DECOD_VAL ",Tcontrol_t ,_param->_nb_inst_decod); 65 ALLOC1_SC_SIGNAL(out_DECOD_ACK ,"out_DECOD_ACK ",Tcontrol_t ,_param->_nb_inst_decod); 66 ALLOC1_SC_SIGNAL( in_DECOD_CONTEXT_ID ," in_DECOD_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_decod); 67 ALLOC1_SC_SIGNAL( in_DECOD_BTB_ADDRESS_SRC ," in_DECOD_BTB_ADDRESS_SRC ",Taddress_t ,_param->_nb_inst_decod); 68 ALLOC1_SC_SIGNAL( in_DECOD_BTB_ADDRESS_DEST ," in_DECOD_BTB_ADDRESS_DEST ",Taddress_t ,_param->_nb_inst_decod); 69 ALLOC1_SC_SIGNAL( in_DECOD_BTB_CONDITION ," in_DECOD_BTB_CONDITION ",Tbranch_condition_t,_param->_nb_inst_decod); 70 ALLOC1_SC_SIGNAL( in_DECOD_BTB_LAST_TAKE ," in_DECOD_BTB_LAST_TAKE ",Tcontrol_t ,_param->_nb_inst_decod); 71 ALLOC1_SC_SIGNAL( in_DECOD_RAS_ADDRESS ," in_DECOD_RAS_ADDRESS ",Taddress_t ,_param->_nb_inst_decod); 72 ALLOC1_SC_SIGNAL( in_DECOD_RAS_INDEX ," in_DECOD_RAS_INDEX ",Tptr_t ,_param->_nb_inst_decod); 73 ALLOC1_SC_SIGNAL( in_DECOD_MISS_PREDICTION ," in_DECOD_MISS_PREDICTION ",Tcontrol_t ,_param->_nb_inst_decod); 74 ALLOC1_SC_SIGNAL( in_DECOD_UPDATE_PREDICTION_ID ," in_DECOD_UPDATE_PREDICTION_ID ",Tprediction_ptr_t ,_param->_nb_inst_decod); 75 //ALLOC1_SC_SIGNAL(out_DECOD_DEPTH ,"out_DECOD_DEPTH ",Tdepth_t ,_param->_nb_inst_decod); 76 ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_VAL ," in_BRANCH_COMPLETE_VAL ",Tcontrol_t ,_param->_nb_inst_branch_complete); 77 ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_ACK ,"out_BRANCH_COMPLETE_ACK ",Tcontrol_t ,_param->_nb_inst_branch_complete); 78 ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_CONTEXT_ID ," in_BRANCH_COMPLETE_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_branch_complete); 79 ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_DEPTH ," in_BRANCH_COMPLETE_DEPTH ",Tdepth_t ,_param->_nb_inst_branch_complete); 80 ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_ADDRESS ," in_BRANCH_COMPLETE_ADDRESS ",Taddress_t ,_param->_nb_inst_branch_complete); 81 ALLOC1_SC_SIGNAL( in_BRANCH_COMPLETE_FLAG ," in_BRANCH_COMPLETE_FLAG ",Tcontrol_t ,_param->_nb_inst_branch_complete); 82 ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_MISS_PREDICTION,"out_BRANCH_COMPLETE_MISS_PREDICTION",Tcontrol_t ,_param->_nb_inst_branch_complete); 83 ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_TAKE ,"out_BRANCH_COMPLETE_TAKE ",Tcontrol_t ,_param->_nb_inst_branch_complete); 84 ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_ADDRESS_SRC ,"out_BRANCH_COMPLETE_ADDRESS_SRC ",Taddress_t ,_param->_nb_inst_branch_complete); 85 ALLOC1_SC_SIGNAL(out_BRANCH_COMPLETE_ADDRESS_DEST ,"out_BRANCH_COMPLETE_ADDRESS_DEST ",Taddress_t ,_param->_nb_inst_branch_complete); 86 ALLOC1_SC_SIGNAL(out_UPDATE_VAL ,"out_UPDATE_VAL ",Tcontrol_t ,_param->_nb_inst_update); 87 ALLOC1_SC_SIGNAL( in_UPDATE_ACK ," in_UPDATE_ACK ",Tcontrol_t ,_param->_nb_inst_update); 88 ALLOC1_SC_SIGNAL(out_UPDATE_CONTEXT_ID ,"out_UPDATE_CONTEXT_ID ",Tcontext_t ,_param->_nb_inst_update); 89 ALLOC1_SC_SIGNAL(out_UPDATE_MISS_PREDICTION ,"out_UPDATE_MISS_PREDICTION ",Tcontrol_t ,_param->_nb_inst_update); 90 ALLOC1_SC_SIGNAL(out_UPDATE_DIRECTION_GOOD ,"out_UPDATE_DIRECTION_GOOD ",Tcontrol_t ,_param->_nb_inst_update); 91 ALLOC1_SC_SIGNAL(out_UPDATE_BTB_VAL ,"out_UPDATE_BTB_VAL ",Tcontrol_t ,_param->_nb_inst_update); 92 ALLOC1_SC_SIGNAL(out_UPDATE_BTB_ADDRESS_SRC ,"out_UPDATE_BTB_ADDRESS_SRC ",Taddress_t ,_param->_nb_inst_update); 93 ALLOC1_SC_SIGNAL(out_UPDATE_BTB_ADDRESS_DEST ,"out_UPDATE_BTB_ADDRESS_DEST ",Taddress_t ,_param->_nb_inst_update); 94 ALLOC1_SC_SIGNAL(out_UPDATE_BTB_CONDITION ,"out_UPDATE_BTB_CONDITION ",Tbranch_condition_t,_param->_nb_inst_update); 95 ALLOC1_SC_SIGNAL(out_UPDATE_DIR_VAL ,"out_UPDATE_DIR_VAL ",Tcontrol_t ,_param->_nb_inst_update); 96 ALLOC1_SC_SIGNAL(out_UPDATE_DIR_HISTORY ,"out_UPDATE_DIR_HISTORY ",Thistory_t ,_param->_nb_inst_update); 97 ALLOC1_SC_SIGNAL(out_UPDATE_RAS_VAL ,"out_UPDATE_RAS_VAL ",Tcontrol_t ,_param->_nb_inst_update); 98 ALLOC1_SC_SIGNAL(out_UPDATE_RAS_ADDRESS ,"out_UPDATE_RAS_ADDRESS ",Taddress_t ,_param->_nb_inst_update); 99 ALLOC1_SC_SIGNAL(out_UPDATE_RAS_INDEX ,"out_UPDATE_RAS_INDEX ",Tptr_t ,_param->_nb_inst_update); 100 ALLOC1_SC_SIGNAL(out_UPDATE_RAS_PREDICTION_IFETCH ,"out_UPDATE_RAS_PREDICTION_IFETCH ",Tcontrol_t ,_param->_nb_inst_update); 101 ALLOC1_SC_SIGNAL(out_DEPTH_NB_BRANCH ,"out_DEPTH_NB_BRANCH ",Tdepth_t ,_param->_nb_context); 102 ALLOC1_SC_SIGNAL(out_DEPTH_TAIL ,"out_DEPTH_TAIL ",Tdepth_t ,_param->_nb_context); 67 103 68 104 /******************************************************** … … 75 111 (*(_Update_Prediction_Table->in_NRESET)) (*(in_NRESET)); 76 112 113 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_PREDICT_VAL ,_param->_nb_inst_predict); 114 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_PREDICT_ACK ,_param->_nb_inst_predict); 115 if (_param->_have_port_context_id) 116 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_PREDICT_CONTEXT_ID ,_param->_nb_inst_predict); 117 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_PREDICT_BTB_ADDRESS_SRC ,_param->_nb_inst_predict); 118 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_PREDICT_BTB_ADDRESS_DEST ,_param->_nb_inst_predict); 119 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_PREDICT_BTB_CONDITION ,_param->_nb_inst_predict); 120 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_PREDICT_BTB_LAST_TAKE ,_param->_nb_inst_predict); 121 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_PREDICT_BTB_IS_ACCURATE ,_param->_nb_inst_predict); 122 if (_param->_have_port_history) 123 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_PREDICT_DIR_HISTORY ,_param->_nb_inst_predict); 124 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_PREDICT_RAS_ADDRESS ,_param->_nb_inst_predict); 125 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_PREDICT_RAS_INDEX ,_param->_nb_inst_predict); 126 //if (_param->_have_port_depth) 127 //INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_PREDICT_UPDATE_PREDICTION_ID ,_param->_nb_inst_predict); 128 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_DECOD_VAL ,_param->_nb_inst_decod); 129 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_DECOD_ACK ,_param->_nb_inst_decod); 130 if (_param->_have_port_context_id) 131 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_DECOD_CONTEXT_ID ,_param->_nb_inst_decod); 132 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_DECOD_BTB_ADDRESS_SRC ,_param->_nb_inst_decod); 133 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_DECOD_BTB_ADDRESS_DEST ,_param->_nb_inst_decod); 134 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_DECOD_BTB_CONDITION ,_param->_nb_inst_decod); 135 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_DECOD_BTB_LAST_TAKE ,_param->_nb_inst_decod); 136 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_DECOD_RAS_ADDRESS ,_param->_nb_inst_decod); 137 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_DECOD_RAS_INDEX ,_param->_nb_inst_decod); 138 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_DECOD_MISS_PREDICTION ,_param->_nb_inst_decod); 139 if (_param->_have_port_depth) 140 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_DECOD_UPDATE_PREDICTION_ID ,_param->_nb_inst_decod); 141 //if (_param->_have_port_depth) 142 //INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_DECOD_DEPTH ,_param->_nb_inst_decod); 143 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_BRANCH_COMPLETE_VAL ,_param->_nb_inst_branch_complete); 144 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_BRANCH_COMPLETE_ACK ,_param->_nb_inst_branch_complete); 145 if (_param->_have_port_context_id) 146 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_BRANCH_COMPLETE_CONTEXT_ID ,_param->_nb_inst_branch_complete); 147 if (_param->_have_port_depth) 148 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_BRANCH_COMPLETE_DEPTH ,_param->_nb_inst_branch_complete); 149 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_BRANCH_COMPLETE_ADDRESS ,_param->_nb_inst_branch_complete); 150 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_BRANCH_COMPLETE_FLAG ,_param->_nb_inst_branch_complete); 151 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_BRANCH_COMPLETE_MISS_PREDICTION,_param->_nb_inst_branch_complete); 152 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_BRANCH_COMPLETE_TAKE ,_param->_nb_inst_branch_complete); 153 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_BRANCH_COMPLETE_ADDRESS_SRC ,_param->_nb_inst_branch_complete); 154 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_BRANCH_COMPLETE_ADDRESS_DEST ,_param->_nb_inst_branch_complete); 155 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_VAL ,_param->_nb_inst_update); 156 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table, in_UPDATE_ACK ,_param->_nb_inst_update); 157 if (_param->_have_port_context_id) 158 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_CONTEXT_ID ,_param->_nb_inst_update); 159 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_MISS_PREDICTION ,_param->_nb_inst_update); 160 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_DIRECTION_GOOD ,_param->_nb_inst_update); 161 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_BTB_VAL ,_param->_nb_inst_update); 162 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_BTB_ADDRESS_SRC ,_param->_nb_inst_update); 163 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_BTB_ADDRESS_DEST ,_param->_nb_inst_update); 164 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_BTB_CONDITION ,_param->_nb_inst_update); 165 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_DIR_VAL ,_param->_nb_inst_update); 166 if (_param->_have_port_history) 167 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_DIR_HISTORY ,_param->_nb_inst_update); 168 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_RAS_VAL ,_param->_nb_inst_update); 169 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_RAS_ADDRESS ,_param->_nb_inst_update); 170 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_RAS_INDEX ,_param->_nb_inst_update); 171 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_UPDATE_RAS_PREDICTION_IFETCH ,_param->_nb_inst_update); 172 if (_param->_have_port_depth) 173 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_DEPTH_NB_BRANCH ,_param->_nb_context); 174 if (_param->_have_port_depth) 175 INSTANCE1_SC_SIGNAL(_Update_Prediction_Table,out_DEPTH_TAIL ,_param->_nb_context); 77 176 78 177 msg(_("<%s> : Start Simulation ............\n"),name.c_str()); … … 90 189 91 190 srand(seed); 191 192 const int32_t percent_transaction_predict = 75; 193 const int32_t percent_transaction_decod = 75; 194 const int32_t percent_transaction_branch_complete = 75; 195 const int32_t percent_transaction_update = 75; 92 196 93 197 SC_START(0); … … 104 208 { 105 209 LABEL("Iteration %d",iteration); 106 210 211 { 212 uint32_t context = rand() % _param->_nb_context; 213 214 // LABEL("KANE : %d",context); 215 216 LABEL("PREDICT - fill the queue"); 217 218 { 219 uint32_t port = rand() % _param->_nb_inst_predict; 220 221 for (uint32_t i=0; i<_param->_size_queue[context]; i++) 222 { 223 224 bool find = false; 225 do 226 { 227 in_PREDICT_VAL [port]->write((rand()%100)<percent_transaction_predict); 228 in_PREDICT_CONTEXT_ID [port]->write(context); 229 in_PREDICT_BTB_ADDRESS_SRC [port]->write(0xdeadbeef+i); 230 in_PREDICT_BTB_ADDRESS_DEST [port]->write(0x21071981+i); 231 in_PREDICT_BTB_CONDITION [port]->write(BRANCH_CONDITION_FLAG_SET); 232 in_PREDICT_BTB_LAST_TAKE [port]->write(1); 233 in_PREDICT_BTB_IS_ACCURATE [port]->write((rand()%100)<percent_transaction_predict); 234 in_PREDICT_DIR_HISTORY [port]->write(i); 235 in_PREDICT_RAS_ADDRESS [port]->write(0xdeaddead+i); 236 in_PREDICT_RAS_INDEX [port]->write((0x12345678+i)%_param->_size_ras_index[context]); 237 238 if (_param->_have_port_depth) 239 { 240 TEST(Tdepth_t,out_DEPTH_TAIL [context]->read(), 0); 241 TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), i); 242 } 243 SC_START(0); 244 245 LABEL("PREDICT [%d] %d - %d (accurate : %d).",port,in_PREDICT_VAL [port]->read(),out_PREDICT_ACK [port]->read(), in_PREDICT_BTB_IS_ACCURATE [port]->read()); 246 247 if (in_PREDICT_VAL [port]->read() and out_PREDICT_ACK [port]->read()) 248 { 249 LABEL("PREDICT [%d] - Transaction accepted",port); 250 find = true; 251 } 252 253 SC_START(1); 254 255 } while (not find); 256 in_PREDICT_VAL [port]->write(0); 257 258 if (_param->_have_port_depth) 259 { 260 TEST(Tdepth_t,out_DEPTH_TAIL [context]->read(), 0); 261 TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), i+1); 262 } 263 } 264 } 265 266 LABEL("DECOD - hit ifetch"); 267 268 { 269 uint32_t port = rand() % _param->_nb_inst_decod; 270 271 for (uint32_t i=0; i<_param->_size_queue[context]; i++) 272 { 273 274 bool find = false; 275 do 276 { 277 in_DECOD_VAL [port]->write((rand()%100)<percent_transaction_decod); 278 in_DECOD_CONTEXT_ID [port]->write(context); 279 in_DECOD_BTB_ADDRESS_SRC [port]->write(0xdeadbeef+i); 280 in_DECOD_BTB_ADDRESS_DEST [port]->write(0x21071981+i); 281 in_DECOD_BTB_CONDITION [port]->write(BRANCH_CONDITION_FLAG_SET); 282 in_DECOD_BTB_LAST_TAKE [port]->write(1); 283 in_DECOD_RAS_ADDRESS [port]->write(0xdeaddead+i); 284 in_DECOD_RAS_INDEX [port]->write((0x12345678+i)%_param->_size_ras_index[context]); 285 in_DECOD_MISS_PREDICTION [port]->write(false); 286 in_DECOD_UPDATE_PREDICTION_ID [port]->write(i); 287 288 if (_param->_have_port_depth) 289 { 290 TEST(Tdepth_t,out_DEPTH_TAIL [context]->read(), 0); 291 TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), _param->_size_queue[context]); 292 } 293 294 SC_START(0); 295 296 LABEL("DECOD [%d] %d - %d.",port,in_DECOD_VAL [port]->read(),out_DECOD_ACK [port]->read()); 297 298 if (in_DECOD_VAL [port]->read() and out_DECOD_ACK [port]->read()) 299 { 300 LABEL("DECOD [%d] - Transaction accepted",port); 301 find = true; 302 } 303 304 SC_START(1); 305 306 } while (not find); 307 in_DECOD_VAL [port]->write(0); 308 309 if (_param->_have_port_depth) 310 { 311 TEST(Tdepth_t,out_DEPTH_TAIL [context]->read(), 0); 312 TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), _param->_size_queue[context]); 313 } 314 } 315 } 316 317 LABEL("BRANCH_COMPLETE - hit ifetch"); 318 319 { 320 uint32_t port = rand() % _param->_nb_inst_branch_complete; 321 322 for (uint32_t i=0; i<_param->_size_queue[context]; i++) 323 { 324 bool find = false; 325 do 326 { 327 in_BRANCH_COMPLETE_VAL [port]->write((rand()%100)<percent_transaction_branch_complete); 328 in_BRANCH_COMPLETE_CONTEXT_ID [port]->write(context); 329 in_BRANCH_COMPLETE_DEPTH [port]->write(i); 330 in_BRANCH_COMPLETE_ADDRESS [port]->write(0xcacacaca+i); 331 in_BRANCH_COMPLETE_FLAG [port]->write(1); 332 333 if (_param->_have_port_depth) 334 { 335 TEST(Tdepth_t,out_DEPTH_TAIL [context]->read(), 0); 336 TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), _param->_size_queue[context]); 337 } 338 339 SC_START(0); 340 341 LABEL("BRANCH_COMPLETE [%d] %d - %d.",port,in_BRANCH_COMPLETE_VAL [port]->read(),out_BRANCH_COMPLETE_ACK [port]->read()); 342 343 if (in_BRANCH_COMPLETE_VAL [port]->read() and out_BRANCH_COMPLETE_ACK [port]->read()) 344 { 345 LABEL("BRANCH_COMPLETE [%d] - Transaction accepted",port); 346 find = true; 347 348 TEST(Tcontrol_t,out_BRANCH_COMPLETE_MISS_PREDICTION[port]->read(),0); 349 TEST(Tcontrol_t,out_BRANCH_COMPLETE_TAKE [port]->read(),1); 350 TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_SRC [port]->read(),0xdeadbeef+i); 351 TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_DEST [port]->read(),0x21071981+i); 352 } 353 354 SC_START(1); 355 356 } while (not find); 357 in_BRANCH_COMPLETE_VAL [port]->write(0); 358 359 if (_param->_have_port_depth) 360 { 361 TEST(Tdepth_t,out_DEPTH_TAIL [context]->read(), 0); 362 TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), _param->_size_queue[context]); 363 } 364 } 365 } 366 367 LABEL("UPDATE - hit ifetch"); 368 369 { 370 uint32_t port = 0; //rand() % _param->_nb_inst_update; 371 372 for (uint32_t i=0; i<_param->_size_queue[context]; i++) 373 { 374 bool find = false; 375 do 376 { 377 in_UPDATE_ACK [port]->write((rand()%100)<percent_transaction_update); 378 379 SC_START(0); 380 381 if (out_UPDATE_VAL [port]->read() and in_UPDATE_ACK [port]->read()) 382 { 383 LABEL("UPDATE [%d] - Transaction accepted",port); 384 385 find = true; 386 387 TEST(Tcontext_t ,out_UPDATE_CONTEXT_ID [port]->read(), context); 388 TEST(Tcontrol_t ,out_UPDATE_MISS_PREDICTION [port]->read(), 0); 389 TEST(Tcontrol_t ,out_UPDATE_DIRECTION_GOOD [port]->read(), 1); 390 TEST(Tcontrol_t ,out_UPDATE_BTB_VAL [port]->read(), 1); 391 TEST(Taddress_t ,out_UPDATE_BTB_ADDRESS_SRC [port]->read(), 0xdeadbeef+i); 392 TEST(Taddress_t ,out_UPDATE_BTB_ADDRESS_DEST [port]->read(), 0x21071981+i); 393 TEST(Tbranch_condition_t,out_UPDATE_BTB_CONDITION [port]->read(), BRANCH_CONDITION_FLAG_SET); 394 TEST(Tcontrol_t ,out_UPDATE_DIR_VAL [port]->read(), 1); 395 if (_param->_have_port_history) 396 TEST(Thistory_t ,out_UPDATE_DIR_HISTORY [port]->read(), i); 397 TEST(Tcontrol_t ,out_UPDATE_RAS_VAL [port]->read(), 0); 398 TEST(Taddress_t ,out_UPDATE_RAS_ADDRESS [port]->read(), 0xdeaddead+i); 399 TEST(Tptr_t ,out_UPDATE_RAS_INDEX [port]->read(), (0x12345678+i)%_param->_size_ras_index[context]); 400 TEST(Tcontrol_t ,out_UPDATE_RAS_PREDICTION_IFETCH [port]->read(), 1); 401 } 402 403 SC_START(1); 404 405 } while (not find); 406 in_UPDATE_ACK [port]->write(0); 407 } 408 409 LABEL("Wait a moment"); 410 SC_START(2*_param->_size_queue[context]); 411 412 // wait the garbage collector 413 if (_param->_have_port_depth) 414 while ((out_DEPTH_TAIL [context]->read() != 0) and 415 (out_DEPTH_NB_BRANCH[context]->read() != 0)) 416 { 417 LABEL("DEPTH [%d] nb_branch : %d - tail : %d",context,out_DEPTH_NB_BRANCH[context]->read(), out_DEPTH_TAIL [context]->read()); 418 SC_START(1); 419 } 420 } 421 } 422 423 { 424 uint32_t context = rand() % _param->_nb_context; 425 426 // LABEL("KANE : %d",context); 427 428 LABEL("PREDICT - fill the queue"); 429 430 { 431 uint32_t port = rand() % _param->_nb_inst_predict; 432 433 for (uint32_t i=0; i<_param->_size_queue[context]; i++) 434 { 435 436 bool find = false; 437 do 438 { 439 in_PREDICT_VAL [port]->write((rand()%100)<percent_transaction_predict); 440 in_PREDICT_CONTEXT_ID [port]->write(context); 441 in_PREDICT_BTB_ADDRESS_SRC [port]->write(0xdeadbeef+i); 442 in_PREDICT_BTB_ADDRESS_DEST [port]->write(0x21071981+i); 443 in_PREDICT_BTB_CONDITION [port]->write(BRANCH_CONDITION_FLAG_SET); 444 in_PREDICT_BTB_LAST_TAKE [port]->write(1); 445 in_PREDICT_BTB_IS_ACCURATE [port]->write((rand()%100)<percent_transaction_predict); 446 in_PREDICT_DIR_HISTORY [port]->write(i); 447 in_PREDICT_RAS_ADDRESS [port]->write(0xdeaddead+i); 448 in_PREDICT_RAS_INDEX [port]->write((0x12345678+i)%_param->_size_ras_index[context]); 449 450 if (_param->_have_port_depth) 451 { 452 TEST(Tdepth_t,out_DEPTH_TAIL [context]->read(), 0); 453 TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), i); 454 } 455 SC_START(0); 456 457 LABEL("PREDICT [%d] %d - %d (accurate : %d).",port,in_PREDICT_VAL [port]->read(),out_PREDICT_ACK [port]->read(), in_PREDICT_BTB_IS_ACCURATE [port]->read()); 458 459 if (in_PREDICT_VAL [port]->read() and out_PREDICT_ACK [port]->read()) 460 { 461 LABEL("PREDICT [%d] - Transaction accepted",port); 462 find = true; 463 } 464 465 SC_START(1); 466 467 } while (not find); 468 in_PREDICT_VAL [port]->write(0); 469 470 if (_param->_have_port_depth) 471 { 472 TEST(Tdepth_t,out_DEPTH_TAIL [context]->read(), 0); 473 TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), i+1); 474 } 475 } 476 } 477 478 LABEL("DECOD - hit ifetch"); 479 480 { 481 uint32_t port = rand() % _param->_nb_inst_decod; 482 483 for (uint32_t i=0; i<_param->_size_queue[context]; i++) 484 { 485 486 bool find = false; 487 do 488 { 489 in_DECOD_VAL [port]->write((rand()%100)<percent_transaction_decod); 490 in_DECOD_CONTEXT_ID [port]->write(context); 491 in_DECOD_BTB_ADDRESS_SRC [port]->write(0xdeadbeef+i); 492 in_DECOD_BTB_ADDRESS_DEST [port]->write(0x21071981+i); 493 in_DECOD_BTB_CONDITION [port]->write(BRANCH_CONDITION_FLAG_SET); 494 in_DECOD_BTB_LAST_TAKE [port]->write(1); 495 in_DECOD_RAS_ADDRESS [port]->write(0xdeaddead+i); 496 in_DECOD_RAS_INDEX [port]->write((0x12345678+i)%_param->_size_ras_index[context]); 497 in_DECOD_MISS_PREDICTION [port]->write(false); 498 in_DECOD_UPDATE_PREDICTION_ID [port]->write(i); 499 500 if (_param->_have_port_depth) 501 { 502 TEST(Tdepth_t,out_DEPTH_TAIL [context]->read(), 0); 503 TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), _param->_size_queue[context]); 504 } 505 506 SC_START(0); 507 508 LABEL("DECOD [%d] %d - %d.",port,in_DECOD_VAL [port]->read(),out_DECOD_ACK [port]->read()); 509 510 if (in_DECOD_VAL [port]->read() and out_DECOD_ACK [port]->read()) 511 { 512 LABEL("DECOD [%d] - Transaction accepted",port); 513 find = true; 514 } 515 516 SC_START(1); 517 518 } while (not find); 519 in_DECOD_VAL [port]->write(0); 520 521 if (_param->_have_port_depth) 522 { 523 TEST(Tdepth_t,out_DEPTH_TAIL [context]->read(), 0); 524 TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), _param->_size_queue[context]); 525 } 526 } 527 } 528 529 LABEL("BRANCH_COMPLETE - hit ifetch"); 530 531 { 532 uint32_t port = rand() % _param->_nb_inst_branch_complete; 533 534 { 535 uint32_t i=0; 536 bool find = false; 537 do 538 { 539 in_BRANCH_COMPLETE_VAL [port]->write((rand()%100)<percent_transaction_branch_complete); 540 in_BRANCH_COMPLETE_CONTEXT_ID [port]->write(context); 541 in_BRANCH_COMPLETE_DEPTH [port]->write(i); 542 in_BRANCH_COMPLETE_ADDRESS [port]->write(0xcacacaca+i); 543 in_BRANCH_COMPLETE_FLAG [port]->write(0); 544 545 if (_param->_have_port_depth) 546 { 547 TEST(Tdepth_t,out_DEPTH_TAIL [context]->read(), 0); 548 TEST(Tdepth_t,out_DEPTH_NB_BRANCH[context]->read(), _param->_size_queue[context]); 549 } 550 551 SC_START(0); 552 553 LABEL("BRANCH_COMPLETE [%d] %d - %d.",port,in_BRANCH_COMPLETE_VAL [port]->read(),out_BRANCH_COMPLETE_ACK [port]->read()); 554 555 if (in_BRANCH_COMPLETE_VAL [port]->read() and out_BRANCH_COMPLETE_ACK [port]->read()) 556 { 557 LABEL("BRANCH_COMPLETE [%d] - Transaction accepted",port); 558 find = true; 559 560 TEST(Tcontrol_t,out_BRANCH_COMPLETE_MISS_PREDICTION[port]->read(),1); 561 TEST(Tcontrol_t,out_BRANCH_COMPLETE_TAKE [port]->read(),0); 562 TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_SRC [port]->read(),0xdeadbeef+i); 563 TEST(Taddress_t,out_BRANCH_COMPLETE_ADDRESS_DEST [port]->read(),0x21071981+i); 564 } 565 566 SC_START(1); 567 568 } while (not find); 569 in_BRANCH_COMPLETE_VAL [port]->write(0); 570 } 571 } 572 573 LABEL("UPDATE - miss ifetch"); 574 575 { 576 uint32_t port = 0; //rand() % _param->_nb_inst_update; 577 578 // for (uint32_t i=0; i<_param->_size_queue[context]; i++) 579 { 580 uint32_t i=0; 581 582 bool find = false; 583 do 584 { 585 in_UPDATE_ACK [port]->write((rand()%100)<percent_transaction_update); 586 587 SC_START(0); 588 589 if (out_UPDATE_VAL [port]->read() and in_UPDATE_ACK [port]->read()) 590 { 591 LABEL("UPDATE [%d] - Transaction accepted",port); 592 593 find = true; 594 595 TEST(Tcontext_t ,out_UPDATE_CONTEXT_ID [port]->read(), context); 596 TEST(Tcontrol_t ,out_UPDATE_MISS_PREDICTION [port]->read(), 1); 597 TEST(Tcontrol_t ,out_UPDATE_DIRECTION_GOOD [port]->read(), 0); 598 TEST(Tcontrol_t ,out_UPDATE_BTB_VAL [port]->read(), 1); 599 TEST(Taddress_t ,out_UPDATE_BTB_ADDRESS_SRC [port]->read(), 0xdeadbeef+i); 600 TEST(Taddress_t ,out_UPDATE_BTB_ADDRESS_DEST [port]->read(), 0x21071981+i); 601 TEST(Tbranch_condition_t,out_UPDATE_BTB_CONDITION [port]->read(), BRANCH_CONDITION_FLAG_SET); 602 TEST(Tcontrol_t ,out_UPDATE_DIR_VAL [port]->read(), 1); 603 if (_param->_have_port_history) 604 TEST(Thistory_t ,out_UPDATE_DIR_HISTORY [port]->read(), i); 605 TEST(Tcontrol_t ,out_UPDATE_RAS_VAL [port]->read(), 0); 606 TEST(Taddress_t ,out_UPDATE_RAS_ADDRESS [port]->read(), 0xdeaddead+i); 607 TEST(Tptr_t ,out_UPDATE_RAS_INDEX [port]->read(), (0x12345678+i)%_param->_size_ras_index[context]); 608 TEST(Tcontrol_t ,out_UPDATE_RAS_PREDICTION_IFETCH [port]->read(), 1); 609 } 610 611 SC_START(1); 612 613 } while (not find); 614 in_UPDATE_ACK [port]->write(0); 615 } 616 617 LABEL("Wait a moment"); 618 SC_START(_param->_size_queue[context]); 619 620 // wait the garbage collector 621 if (_param->_have_port_depth) 622 while ((out_DEPTH_TAIL [context]->read() != 0) and 623 (out_DEPTH_NB_BRANCH[context]->read() != 0)) 624 { 625 LABEL("DEPTH [%d] nb_branch : %d - tail : %d",context,out_DEPTH_NB_BRANCH[context]->read(), out_DEPTH_TAIL [context]->read()); 626 SC_START(1); 627 } 628 } 629 } 630 631 LABEL ("Yo1"); 107 632 SC_START(1); 633 LABEL ("Yo2"); 634 108 635 } 109 636 … … 119 646 delete in_CLOCK; 120 647 delete in_NRESET; 648 649 // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 650 delete [] in_PREDICT_VAL ; 651 delete [] out_PREDICT_ACK ; 652 delete [] in_PREDICT_CONTEXT_ID ; 653 delete [] in_PREDICT_BTB_ADDRESS_SRC ; 654 delete [] in_PREDICT_BTB_ADDRESS_DEST ; 655 delete [] in_PREDICT_BTB_CONDITION ; 656 delete [] in_PREDICT_BTB_LAST_TAKE ; 657 delete [] in_PREDICT_BTB_IS_ACCURATE ; 658 delete [] in_PREDICT_DIR_HISTORY ; 659 delete [] in_PREDICT_RAS_ADDRESS ; 660 delete [] in_PREDICT_RAS_INDEX ; 661 //delete [] out_PREDICT_UPDATE_PREDICTION_ID; 662 663 // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 664 delete [] in_DECOD_VAL ; 665 delete [] out_DECOD_ACK ; 666 delete [] in_DECOD_CONTEXT_ID ; 667 delete [] in_DECOD_BTB_ADDRESS_SRC ; 668 delete [] in_DECOD_BTB_ADDRESS_DEST ; 669 delete [] in_DECOD_BTB_CONDITION ; 670 delete [] in_DECOD_BTB_LAST_TAKE ; 671 delete [] in_DECOD_RAS_ADDRESS ; 672 delete [] in_DECOD_RAS_INDEX ; 673 delete [] in_DECOD_MISS_PREDICTION ; 674 delete [] in_DECOD_UPDATE_PREDICTION_ID ; 675 //delete [] out_DECOD_DEPTH ; 676 677 // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 678 delete [] in_BRANCH_COMPLETE_VAL ; 679 delete [] out_BRANCH_COMPLETE_ACK ; 680 delete [] in_BRANCH_COMPLETE_CONTEXT_ID ; 681 delete [] in_BRANCH_COMPLETE_DEPTH ; 682 delete [] in_BRANCH_COMPLETE_ADDRESS ; 683 delete [] in_BRANCH_COMPLETE_FLAG ; 684 delete [] out_BRANCH_COMPLETE_MISS_PREDICTION; 685 delete [] out_BRANCH_COMPLETE_TAKE ; 686 delete [] out_BRANCH_COMPLETE_ADDRESS_SRC ; 687 delete [] out_BRANCH_COMPLETE_ADDRESS_DEST ; 688 689 // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 690 delete [] out_UPDATE_VAL ; 691 delete [] in_UPDATE_ACK ; 692 delete [] out_UPDATE_CONTEXT_ID ; 693 delete [] out_UPDATE_MISS_PREDICTION ; 694 delete [] out_UPDATE_DIRECTION_GOOD ; 695 delete [] out_UPDATE_BTB_VAL ; 696 delete [] out_UPDATE_BTB_ADDRESS_SRC ; 697 delete [] out_UPDATE_BTB_ADDRESS_DEST ; 698 delete [] out_UPDATE_BTB_CONDITION ; 699 delete [] out_UPDATE_DIR_VAL ; 700 delete [] out_UPDATE_DIR_HISTORY ; 701 delete [] out_UPDATE_RAS_VAL ; 702 delete [] out_UPDATE_RAS_ADDRESS ; 703 delete [] out_UPDATE_RAS_INDEX ; 704 delete [] out_UPDATE_RAS_PREDICTION_IFETCH; 705 706 // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 707 delete [] out_DEPTH_NB_BRANCH; 708 delete [] out_DEPTH_TAIL; 709 121 710 #endif 122 711 -
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/doc/tex/root.tex
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Parameters.h
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r78 r81 24 24 { 25 25 //-----[ fields ]------------------------------------------------------------ 26 public : uint32_t _nb_context ; 27 public : uint32_t * _size_queue ; // [nb_context] 28 public : uint32_t _size_address ; 29 public : uint32_t _nb_inst_predict ; 30 public : uint32_t _nb_inst_decod ; 31 public : uint32_t _nb_inst_branch_complete; 32 public : uint32_t _nb_inst_update ; 33 public : uint32_t _size_history ; 34 public : uint32_t * _size_ras_index ; // [nb_context] 26 35 36 public : uint32_t _size_context_id ; 37 public : uint32_t _size_depth ; 38 public : uint32_t _max_size_ras_index ; 39 40 public : bool _have_port_context_id ; 41 public : bool _have_port_depth ; 42 public : bool _have_port_history ; 43 27 44 //-----[ methods ]----------------------------------------------------------- 28 public : Parameters (); 29 // public : Parameters (Parameters & param) ; 45 public : Parameters (uint32_t nb_context , 46 uint32_t * size_queue , 47 uint32_t size_address , 48 uint32_t nb_inst_predict , 49 uint32_t nb_inst_decod , 50 uint32_t nb_inst_branch_complete, 51 uint32_t nb_inst_update , 52 uint32_t size_history , 53 uint32_t * size_ras_index ); 54 //public : Parameters (Parameters & param) ; 30 55 public : ~Parameters () ; 31 56 -
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Types.h
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r78 r81 19 19 namespace update_prediction_table { 20 20 21 typedef enum 22 { 23 UPDATE_PREDICTION_STATE_EMPTY , // Slot is empty 24 UPDATE_PREDICTION_STATE_WAIT_DECOD , // Fetch have access at the predictor 25 UPDATE_PREDICTION_STATE_WAITEND , // Have make a prediction, wait branch_complete 26 UPDATE_PREDICTION_STATE_OK , // branch is complete and can update predictor 27 UPDATE_PREDICTION_STATE_KO , // have a event - must update predictor unit 28 UPDATE_PREDICTION_STATE_END // branch is updated 29 } state_t; 30 31 class entry_t 32 { 33 public : state_t _state; 34 public : Tcontrol_t _ifetch_prediction; 35 public : Tbranch_condition_t _condition; 36 public : Taddress_t _address_src; 37 public : Taddress_t _address_dest; 38 public : Tcontrol_t _last_take; 39 public : Tcontrol_t _good_take; 40 public : Thistory_t _history; 41 public : Taddress_t _address_ras; 42 public : Tptr_t _index_ras; 43 }; 21 44 22 45 }; // end namespace update_prediction_table … … 25 48 }; // end namespace multi_front_end 26 49 }; // end namespace core 50 }; // end namespace behavioural 51 27 52 28 }; // end namespace behavioural 53 template<> inline std::string toString<morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::state_t>(const morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::state_t& x) 54 { 55 switch (x) 56 { 57 case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::UPDATE_PREDICTION_STATE_EMPTY : return "empty" ; break; 58 case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::UPDATE_PREDICTION_STATE_WAIT_DECOD : return "wait_decod"; break; 59 case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::UPDATE_PREDICTION_STATE_WAITEND : return "waitend" ; break; 60 case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::UPDATE_PREDICTION_STATE_OK : return "ok" ; break; 61 case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::UPDATE_PREDICTION_STATE_KO : return "ko" ; break; 62 case morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::update_prediction_table::UPDATE_PREDICTION_STATE_END : return "end" ; break; 63 default : return "" ; break; 64 } 65 }; 66 67 29 68 }; // end namespace morpheo 30 69 -
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Update_Prediction_Table.h
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r78 r81 62 62 public : SC_IN (Tcontrol_t) * in_NRESET ; 63 63 64 // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 65 public : SC_IN (Tcontrol_t ) ** in_PREDICT_VAL ; //[nb_inst_predict] 66 public : SC_OUT(Tcontrol_t ) ** out_PREDICT_ACK ; //[nb_inst_predict] 67 public : SC_IN (Tcontext_t ) ** in_PREDICT_CONTEXT_ID ; //[nb_inst_predict] 68 public : SC_IN (Taddress_t ) ** in_PREDICT_BTB_ADDRESS_SRC ; //[nb_inst_predict] 69 public : SC_IN (Taddress_t ) ** in_PREDICT_BTB_ADDRESS_DEST ; //[nb_inst_predict] 70 public : SC_IN (Tbranch_condition_t) ** in_PREDICT_BTB_CONDITION ; //[nb_inst_predict] 71 public : SC_IN (Tcontrol_t ) ** in_PREDICT_BTB_LAST_TAKE ; //[nb_inst_predict] 72 public : SC_IN (Tcontrol_t ) ** in_PREDICT_BTB_IS_ACCURATE ; //[nb_inst_predict] 73 public : SC_IN (Thistory_t ) ** in_PREDICT_DIR_HISTORY ; //[nb_inst_predict] 74 public : SC_IN (Taddress_t ) ** in_PREDICT_RAS_ADDRESS ; //[nb_inst_predict] 75 public : SC_IN (Tptr_t ) ** in_PREDICT_RAS_INDEX ; //[nb_inst_predict] 76 //public : SC_OUT(Tprediction_ptr_t ) ** out_PREDICT_UPDATE_PREDICTION_ID; //[nb_inst_predict] 77 78 // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 79 public : SC_IN (Tcontrol_t ) ** in_DECOD_VAL ; //[nb_inst_decod] 80 public : SC_OUT(Tcontrol_t ) ** out_DECOD_ACK ; //[nb_inst_decod] 81 public : SC_IN (Tcontext_t ) ** in_DECOD_CONTEXT_ID ; //[nb_inst_decod] 82 public : SC_IN (Taddress_t ) ** in_DECOD_BTB_ADDRESS_SRC ; //[nb_inst_decod] 83 public : SC_IN (Taddress_t ) ** in_DECOD_BTB_ADDRESS_DEST ; //[nb_inst_decod] 84 public : SC_IN (Tbranch_condition_t) ** in_DECOD_BTB_CONDITION ; //[nb_inst_decod] 85 public : SC_IN (Tcontrol_t ) ** in_DECOD_BTB_LAST_TAKE ; //[nb_inst_decod] 86 //public : SC_IN (Tcontrol_t ) ** in_DECOD_BTB_IS_ACCURATE ; //[nb_inst_decod] 87 //public : SC_IN (Thistory_t ) ** in_DECOD_DIR_HISTORY ; //[nb_inst_decod] // if ifetch prediction is miss -> miss btb -> make a static state 88 public : SC_IN (Taddress_t ) ** in_DECOD_RAS_ADDRESS ; //[nb_inst_decod] 89 public : SC_IN (Tptr_t ) ** in_DECOD_RAS_INDEX ; //[nb_inst_decod] 90 public : SC_IN (Tcontrol_t ) ** in_DECOD_MISS_PREDICTION ; //[nb_inst_decod] // ifetch is a miss pred 91 public : SC_IN (Tprediction_ptr_t ) ** in_DECOD_UPDATE_PREDICTION_ID ; //[nb_inst_decod] 92 //public : SC_OUT(Tdepth_t ) ** out_DECOD_DEPTH ; //[nb_inst_decod] 93 94 // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 95 public : SC_IN (Tcontrol_t ) ** in_BRANCH_COMPLETE_VAL ; //[nb_inst_branch_complete] 96 public : SC_OUT(Tcontrol_t ) ** out_BRANCH_COMPLETE_ACK ; //[nb_inst_branch_complete] 97 public : SC_IN (Tcontext_t ) ** in_BRANCH_COMPLETE_CONTEXT_ID ; //[nb_inst_branch_complete] 98 public : SC_IN (Tdepth_t ) ** in_BRANCH_COMPLETE_DEPTH ; //[nb_inst_branch_complete] 99 public : SC_IN (Taddress_t ) ** in_BRANCH_COMPLETE_ADDRESS ; //[nb_inst_branch_complete] 100 public : SC_IN (Tcontrol_t ) ** in_BRANCH_COMPLETE_FLAG ; //[nb_inst_branch_complete] 101 public : SC_OUT(Tcontrol_t ) ** out_BRANCH_COMPLETE_MISS_PREDICTION; //[nb_inst_branch_complete] 102 public : SC_OUT(Tcontrol_t ) ** out_BRANCH_COMPLETE_TAKE ; //[nb_inst_branch_complete] 103 public : SC_OUT(Taddress_t ) ** out_BRANCH_COMPLETE_ADDRESS_SRC ; //[nb_inst_branch_complete] 104 public : SC_OUT(Taddress_t ) ** out_BRANCH_COMPLETE_ADDRESS_DEST ; //[nb_inst_branch_complete] 105 106 // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 107 public : SC_OUT(Tcontrol_t ) ** out_UPDATE_VAL ; //[nb_inst_update] 108 public : SC_IN (Tcontrol_t ) ** in_UPDATE_ACK ; //[nb_inst_update] 109 public : SC_OUT(Tcontext_t ) ** out_UPDATE_CONTEXT_ID ; //[nb_inst_update] 110 public : SC_OUT(Tcontrol_t ) ** out_UPDATE_MISS_PREDICTION ; //[nb_inst_update] 111 public : SC_OUT(Tcontrol_t ) ** out_UPDATE_DIRECTION_GOOD ; //[nb_inst_update] 112 public : SC_OUT(Tcontrol_t ) ** out_UPDATE_BTB_VAL ; //[nb_inst_update] 113 public : SC_OUT(Taddress_t ) ** out_UPDATE_BTB_ADDRESS_SRC ; //[nb_inst_update] 114 public : SC_OUT(Taddress_t ) ** out_UPDATE_BTB_ADDRESS_DEST ; //[nb_inst_update] 115 public : SC_OUT(Tbranch_condition_t) ** out_UPDATE_BTB_CONDITION ; //[nb_inst_update] 116 public : SC_OUT(Tcontrol_t ) ** out_UPDATE_DIR_VAL ; //[nb_inst_update] 117 public : SC_OUT(Thistory_t ) ** out_UPDATE_DIR_HISTORY ; //[nb_inst_update] 118 public : SC_OUT(Tcontrol_t ) ** out_UPDATE_RAS_VAL ; //[nb_inst_update] 119 public : SC_OUT(Taddress_t ) ** out_UPDATE_RAS_ADDRESS ; //[nb_inst_update] 120 public : SC_OUT(Tptr_t ) ** out_UPDATE_RAS_INDEX ; //[nb_inst_update] 121 public : SC_OUT(Tcontrol_t ) ** out_UPDATE_RAS_PREDICTION_IFETCH; //[nb_inst_update] 122 123 // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 124 public : SC_OUT(Tdepth_t ) ** out_DEPTH_NB_BRANCH; //[nb_context] 125 public : SC_OUT(Tdepth_t ) ** out_DEPTH_TAIL; //[nb_context] 126 64 127 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 65 128 66 129 // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 130 private : uint32_t * reg_TOP ; //[nb_context] 131 private : uint32_t * reg_BOTTOM ; //[nb_context] 132 private : uint32_t * reg_NB_ELT ; //[nb_context] 133 private : uint32_t * reg_NB_ELT_NEED_UPDATE ; //[nb_context] 134 private : entry_t ** reg_UPDATE_PREDICTION_TABLE; //[nb_context][size_queue] 135 private : uint32_t reg_UPDATE_PRIORITY ; 67 136 68 137 // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 138 private : Tcontrol_t * internal_PREDICT_ACK ; //[nb_inst_predict] 139 private : Tcontrol_t * internal_DECOD_ACK ; //[nb_inst_decod] 140 private : Tcontrol_t * internal_BRANCH_COMPLETE_ACK ; //[nb_inst_branch_complete] 141 private : Tcontrol_t * internal_BRANCH_COMPLETE_MISS_PREDICTION; //[nb_inst_branch_complete] 142 private : Tcontrol_t * internal_BRANCH_COMPLETE_TAKE ; //[nb_inst_branch_complete] 143 private : Taddress_t * internal_BRANCH_COMPLETE_ADDRESS_DEST ; //[nb_inst_branch_complete] 144 private : Tcontrol_t * internal_UPDATE_VAL ; //[nb_inst_update] 145 private : Tcontext_t * internal_UPDATE_CONTEXT_ID ; //[nb_inst_update] 146 private : Tdepth_t * internal_UPDATE_DEPTH ; //[nb_inst_update] 69 147 #endif 70 148 … … 85 163 #endif 86 164 Parameters * param, 87 morpheo::behavioural::Tusage_t usage =USE_ALL165 morpheo::behavioural::Tusage_t usage 88 166 ); 89 167 public : ~Update_Prediction_Table (void); … … 100 178 #ifdef SYSTEMC 101 179 public : void transition (void); 102 //public : void genMoore (void); 180 public : void genMoore (void); 181 public : void genMealy_predict (void); 182 public : void genMealy_decod (void); 183 public : void genMealy_branch_complete (void); 184 //public : void genMealy_update (void); 103 185 #endif 104 186 -
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters.cpp
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r78 r81 7 7 8 8 #include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/include/Parameters.h" 9 #include "Common/include/Max.h" 9 10 10 11 namespace morpheo { … … 19 20 #undef FUNCTION 20 21 #define FUNCTION "Update_Prediction_Table::Parameters" 21 Parameters::Parameters () 22 Parameters::Parameters (uint32_t nb_context , 23 uint32_t * size_queue , 24 uint32_t size_address , 25 uint32_t nb_inst_predict , 26 uint32_t nb_inst_decod , 27 uint32_t nb_inst_branch_complete, 28 uint32_t nb_inst_update , 29 uint32_t size_history , 30 uint32_t * size_ras_index ) 22 31 { 23 32 log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); 33 34 _nb_context = nb_context ; 35 _size_queue = size_queue ; 36 _size_address = size_address ; 37 _nb_inst_predict = nb_inst_predict ; 38 _nb_inst_decod = nb_inst_decod ; 39 _nb_inst_branch_complete = nb_inst_branch_complete; 40 _nb_inst_update = nb_inst_update ; 41 _size_history = size_history ; 42 _size_ras_index = size_ras_index ; 43 44 _size_context_id = log2(nb_context); 45 _size_depth = log2(max<uint32_t>(size_queue,nb_context)); 46 _max_size_ras_index = max<uint32_t>(_size_ras_index,nb_context); 47 48 _have_port_context_id = _size_context_id> 0; 49 _have_port_depth = _size_depth > 0; 50 _have_port_history = _size_history > 0; 51 24 52 test(); 25 53 log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End"); -
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters_msg_error.cpp
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r78 r81 27 27 Parameters_test test ("Update_Prediction_Table"); 28 28 29 if (morpheo::behavioural::test<Tdepth_t>(_size_depth) == false) 30 test.error("type \"Tdepth_t\" is too small."); 31 29 32 log_printf(FUNC,Update_Prediction_Table,FUNCTION,"End"); 30 33 -
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Parameters_print.cpp
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r78 r81 27 27 28 28 xml.balise_open("update_prediction_table"); 29 // xml.singleton_begin(""); xml.attribut("value",toString(_)); xml.singleton_end(); 29 xml.singleton_begin("nb_context "); xml.attribut("value",toString(_nb_context )); xml.singleton_end(); 30 xml.singleton_begin("size_address "); xml.attribut("value",toString(_size_address )); xml.singleton_end(); 31 xml.singleton_begin("nb_inst_predict "); xml.attribut("value",toString(_nb_inst_predict )); xml.singleton_end(); 32 xml.singleton_begin("nb_inst_decod "); xml.attribut("value",toString(_nb_inst_decod )); xml.singleton_end(); 33 xml.singleton_begin("nb_inst_branch_complete"); xml.attribut("value",toString(_nb_inst_branch_complete)); xml.singleton_end(); 34 xml.singleton_begin("nb_inst_update "); xml.attribut("value",toString(_nb_inst_update )); xml.singleton_end(); 35 xml.singleton_begin("size_history "); xml.attribut("value",toString(_size_history )); xml.singleton_end(); 36 for (uint32_t i=0;i<_nb_context; i++) 37 { 38 xml. balise_open_begin("component"); 39 xml. attribut("type","context"); 40 xml. attribut("id" ,toString(i)); 41 xml. balise_open_end(); 42 xml. singleton_begin("size_queue "); xml.attribut("value",toString(_size_queue [i])); xml.singleton_end(); 43 xml. singleton_begin("size_ras_index "); xml.attribut("value",toString(_size_ras_index [i])); xml.singleton_end(); 44 xml. balise_close(); 45 } 30 46 xml.balise_close(); 31 47 -
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table.cpp
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r78 r81 38 38 log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); 39 39 40 usage_environment(_usage); 41 40 42 log_printf(INFO,Update_Prediction_Table,FUNCTION,"Allocation"); 41 43 … … 68 70 if (_usage & USE_SYSTEMC) 69 71 { 72 73 for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++) 74 { 75 internal_BRANCH_COMPLETE_ACK [i] = 1; 76 PORT_WRITE(out_BRANCH_COMPLETE_ACK [i], internal_BRANCH_COMPLETE_ACK [i]); 77 } 78 70 79 log_printf(INFO,Update_Prediction_Table,FUNCTION,"Method - transition"); 71 80 … … 76 85 # ifdef SYSTEMCASS_SPECIFIC 77 86 // List dependency information 87 # endif 88 89 log_printf(INFO,Update_Prediction_Table,FUNCTION,"Method - genMoore"); 90 91 SC_METHOD (genMoore); 92 dont_initialize (); 93 sensitive << (*(in_CLOCK)).neg(); 94 95 # ifdef SYSTEMCASS_SPECIFIC 96 // List dependency information 97 # endif 98 99 log_printf(INFO,Update_Prediction_Table,FUNCTION,"Method - genMealy_predict"); 100 101 SC_METHOD (genMealy_predict); 102 dont_initialize (); 103 sensitive << (*(in_CLOCK)).neg(); // use internal register 104 for (uint32_t i=0; i<_param->_nb_inst_predict; i++) 105 { 106 if (_param->_have_port_context_id) 107 sensitive << (*(in_PREDICT_CONTEXT_ID [i])); 108 sensitive << (*(in_PREDICT_BTB_IS_ACCURATE [i])); 109 } 110 111 # ifdef SYSTEMCASS_SPECIFIC 112 // List dependency information 113 for (uint32_t i=0; i<_param->_nb_inst_predict; i++) 114 { 115 (*(out_PREDICT_ACK [i])) (*(in_PREDICT_BTB_IS_ACCURATE [i])); 116 if (_param->_have_port_context_id) 117 (*(out_PREDICT_ACK [i])) (*(in_PREDICT_CONTEXT_ID [i])); 118 } 119 # endif 120 121 log_printf(INFO,Update_Prediction_Table,FUNCTION,"Method - genMealy_decod"); 122 123 SC_METHOD (genMealy_decod); 124 dont_initialize (); 125 sensitive << (*(in_CLOCK)).neg(); // use internal register 126 for (uint32_t i=0; i<_param->_nb_inst_decod; i++) 127 { 128 if (_param->_have_port_context_id) 129 sensitive << (*(in_DECOD_CONTEXT_ID [i])); 130 sensitive << (*(in_DECOD_MISS_PREDICTION [i])); 131 } 132 133 # ifdef SYSTEMCASS_SPECIFIC 134 // List dependency information 135 for (uint32_t i=0; i<_param->_nb_inst_decod; i++) 136 { 137 (*(out_DECOD_ACK [i])) (*(in_DECOD_MISS_PREDICTION [i])); 138 if (_param->_have_port_context_id) 139 (*(out_DECOD_ACK [i])) (*(in_DECOD_CONTEXT_ID [i])); 140 } 141 # endif 142 143 log_printf(INFO,Update_Prediction_Table,FUNCTION,"Method - genMealy_branch_complete"); 144 145 SC_METHOD (genMealy_branch_complete); 146 dont_initialize (); 147 sensitive << (*(in_CLOCK)).neg(); // use internal register 148 for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++) 149 { 150 if (_param->_have_port_context_id) 151 sensitive << (*(in_BRANCH_COMPLETE_CONTEXT_ID [i])); 152 if (_param->_have_port_depth) 153 sensitive << (*(in_BRANCH_COMPLETE_DEPTH [i])); 154 sensitive << (*(in_BRANCH_COMPLETE_FLAG [i])) 155 << (*(in_BRANCH_COMPLETE_ADDRESS [i])); 156 } 157 158 # ifdef SYSTEMCASS_SPECIFIC 159 // List dependency information 160 for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++) 161 { 162 if (_param->_have_port_context_id) 163 (*(out_BRANCH_COMPLETE_MISS_PREDICTION [i])) (*(in_BRANCH_COMPLETE_CONTEXT_ID [i])); 164 if (_param->_have_port_depth) 165 (*(out_BRANCH_COMPLETE_MISS_PREDICTION [i])) (*(in_BRANCH_COMPLETE_DEPTH [i])); 166 (*(out_BRANCH_COMPLETE_MISS_PREDICTION [i])) (*(in_BRANCH_COMPLETE_FLAG [i])); 167 (*(out_BRANCH_COMPLETE_MISS_PREDICTION [i])) (*(in_BRANCH_COMPLETE_ADDRESS [i])); 168 169 if (_param->_have_port_context_id) 170 (*(out_BRANCH_COMPLETE_TAKE [i])) (*(in_BRANCH_COMPLETE_CONTEXT_ID [i])); 171 if (_param->_have_port_depth) 172 (*(out_BRANCH_COMPLETE_TAKE [i])) (*(in_BRANCH_COMPLETE_DEPTH [i])); 173 (*(out_BRANCH_COMPLETE_TAKE [i])) (*(in_BRANCH_COMPLETE_FLAG [i])); 174 175 if (_param->_have_port_context_id) 176 (*(out_BRANCH_COMPLETE_ADDRESS_SRC [i])) (*(in_BRANCH_COMPLETE_CONTEXT_ID [i])); 177 if (_param->_have_port_depth) 178 (*(out_BRANCH_COMPLETE_ADDRESS_SRC [i])) (*(in_BRANCH_COMPLETE_DEPTH [i])); 179 180 if (_param->_have_port_context_id) 181 (*(out_BRANCH_COMPLETE_ADDRESS_DEST [i])) (*(in_BRANCH_COMPLETE_CONTEXT_ID [i])); 182 if (_param->_have_port_depth) 183 (*(out_BRANCH_COMPLETE_ADDRESS_DEST [i])) (*(in_BRANCH_COMPLETE_DEPTH [i])); 184 (*(out_BRANCH_COMPLETE_ADDRESS_DEST [i])) (*(in_BRANCH_COMPLETE_ADDRESS [i])); 185 } 78 186 # endif 79 187 -
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_allocation.cpp
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r78 r81 55 55 in_NRESET = interface->set_signal_in <Tcontrol_t> ("nreset",1, RESET_VHDL_YES); 56 56 } 57 58 // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 59 { 60 ALLOC1_INTERFACE("predict", IN,SOUTH, "predict", _param->_nb_inst_predict); 61 62 ALLOC1_VALACK_IN ( in_PREDICT_VAL ,VAL); 63 ALLOC1_VALACK_OUT(out_PREDICT_ACK ,ACK); 64 ALLOC1_SIGNAL_IN ( in_PREDICT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id); 65 ALLOC1_SIGNAL_IN ( in_PREDICT_BTB_ADDRESS_SRC ,"btb_address_src" ,Taddress_t ,_param->_size_address); 66 ALLOC1_SIGNAL_IN ( in_PREDICT_BTB_ADDRESS_DEST ,"btb_address_dest" ,Taddress_t ,_param->_size_address); 67 ALLOC1_SIGNAL_IN ( in_PREDICT_BTB_CONDITION ,"btb_condition" ,Tbranch_condition_t,_param->_size_branch_condition); 68 ALLOC1_SIGNAL_IN ( in_PREDICT_BTB_LAST_TAKE ,"btb_last_take" ,Tcontrol_t ,1); 69 ALLOC1_SIGNAL_IN ( in_PREDICT_BTB_IS_ACCURATE ,"btb_is_accurate" ,Tcontrol_t ,1); 70 ALLOC1_SIGNAL_IN ( in_PREDICT_DIR_HISTORY ,"dir_history" ,Thistory_t ,_param->_size_history); 71 ALLOC1_SIGNAL_IN ( in_PREDICT_RAS_ADDRESS ,"ras_address" ,Taddress_t ,_param->_size_address); 72 ALLOC1_SIGNAL_IN ( in_PREDICT_RAS_INDEX ,"ras_index" ,Tptr_t ,_param->_max_size_ras_index); 73 // ALLOC1_SIGNAL_OUT(out_PREDICT_UPDATE_PREDICTION_ID,"update_prediction_id",Tprediction_ptr_t ,_param->_size_depth); 74 } 75 76 // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 77 { 78 ALLOC1_INTERFACE("predict", IN,SOUTH, "predict", _param->_nb_inst_predict); 79 80 ALLOC1_VALACK_IN ( in_DECOD_VAL ,VAL); 81 ALLOC1_VALACK_OUT(out_DECOD_ACK ,ACK); 82 ALLOC1_SIGNAL_IN ( in_DECOD_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id); 83 ALLOC1_SIGNAL_IN ( in_DECOD_BTB_ADDRESS_SRC ,"btb_address_src" ,Taddress_t ,_param->_size_address); 84 ALLOC1_SIGNAL_IN ( in_DECOD_BTB_ADDRESS_DEST ,"btb_address_dest" ,Taddress_t ,_param->_size_address); 85 ALLOC1_SIGNAL_IN ( in_DECOD_BTB_CONDITION ,"btb_condition" ,Tbranch_condition_t,_param->_size_branch_condition); 86 ALLOC1_SIGNAL_IN ( in_DECOD_BTB_LAST_TAKE ,"btb_last_take" ,Tcontrol_t ,1); 87 ALLOC1_SIGNAL_IN ( in_DECOD_RAS_ADDRESS ,"ras_address" ,Taddress_t ,_param->_size_address); 88 ALLOC1_SIGNAL_IN ( in_DECOD_RAS_INDEX ,"ras_index" ,Tptr_t ,_param->_max_size_ras_index); 89 ALLOC1_SIGNAL_IN ( in_DECOD_MISS_PREDICTION ,"miss_prediction" ,Tcontrol_t ,1); 90 ALLOC1_SIGNAL_IN ( in_DECOD_UPDATE_PREDICTION_ID,"update_prediction_id",Tprediction_ptr_t ,_param->_size_depth); 91 // ALLOC1_SIGNAL_OUT(out_DECOD_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth); 92 } 93 94 // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 95 { 96 ALLOC1_INTERFACE("branch_complete", IN,SOUTH, "branch_complete", _param->_nb_inst_branch_complete); 97 98 99 ALLOC1_VALACK_IN ( in_BRANCH_COMPLETE_VAL ,VAL); 100 ALLOC1_VALACK_OUT(out_BRANCH_COMPLETE_ACK ,ACK); 101 ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_CONTEXT_ID ,"context_id" ,Tcontext_t,_param->_size_context_id); 102 ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth); 103 ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_ADDRESS ,"address" ,Taddress_t,_param->_size_address); 104 ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_FLAG ,"flag" ,Tcontrol_t,1); 105 ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_MISS_PREDICTION,"miss_prediction",Tcontrol_t,1); 106 ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_TAKE ,"take" ,Tcontrol_t,1); 107 ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_ADDRESS_SRC ,"address_src" ,Taddress_t,_param->_size_address); 108 ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_ADDRESS_DEST ,"address_dest" ,Taddress_t,_param->_size_address); 109 } 110 111 // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 112 { 113 ALLOC1_INTERFACE("update",OUT,SOUTH, "update", _param->_nb_inst_update); 114 115 ALLOC1_VALACK_OUT(out_UPDATE_VAL ,VAL); 116 ALLOC1_VALACK_IN ( in_UPDATE_ACK ,ACK); 117 ALLOC1_SIGNAL_OUT(out_UPDATE_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id); 118 ALLOC1_SIGNAL_OUT(out_UPDATE_MISS_PREDICTION ,"miss_prediction" ,Tcontrol_t ,1); 119 ALLOC1_SIGNAL_OUT(out_UPDATE_DIRECTION_GOOD ,"direction_good" ,Tcontrol_t ,1); 120 ALLOC1_SIGNAL_OUT(out_UPDATE_BTB_VAL ,"btb_val" ,Tcontrol_t ,1); 121 ALLOC1_SIGNAL_OUT(out_UPDATE_BTB_ADDRESS_SRC ,"btb_address_src" ,Taddress_t ,_param->_size_address); 122 ALLOC1_SIGNAL_OUT(out_UPDATE_BTB_ADDRESS_DEST ,"btb_address_dest" ,Taddress_t ,_param->_size_address); 123 ALLOC1_SIGNAL_OUT(out_UPDATE_BTB_CONDITION ,"btb_condition" ,Tbranch_condition_t,_param->_size_branch_condition); 124 ALLOC1_SIGNAL_OUT(out_UPDATE_DIR_VAL ,"dir_val" ,Tcontrol_t ,1); 125 ALLOC1_SIGNAL_OUT(out_UPDATE_DIR_HISTORY ,"dir_history" ,Thistory_t ,_param->_size_history); 126 ALLOC1_SIGNAL_OUT(out_UPDATE_RAS_VAL ,"ras_val" ,Tcontrol_t ,1); 127 ALLOC1_SIGNAL_OUT(out_UPDATE_RAS_ADDRESS ,"ras_address" ,Taddress_t ,_param->_size_address); 128 ALLOC1_SIGNAL_OUT(out_UPDATE_RAS_INDEX ,"ras_index" ,Tptr_t ,_param->_max_size_ras_index); 129 ALLOC1_SIGNAL_OUT(out_UPDATE_RAS_PREDICTION_IFETCH,"ras_prediction_ifetch",Tcontrol_t ,1); 130 } 131 132 // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 133 { 134 ALLOC1_INTERFACE("depth",OUT,SOUTH, "depth", _param->_nb_context); 135 136 ALLOC1_SIGNAL_OUT(out_DEPTH_NB_BRANCH,"NB_BRANCH",Tdepth_t,_param->_size_depth); 137 ALLOC1_SIGNAL_OUT(out_DEPTH_TAIL,"TAIL",Tdepth_t,_param->_size_depth); 138 } 139 140 // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 141 internal_PREDICT_ACK = new Tcontrol_t [_param->_nb_inst_predict]; 142 internal_DECOD_ACK = new Tcontrol_t [_param->_nb_inst_decod]; 143 internal_BRANCH_COMPLETE_ACK = new Tcontrol_t [_param->_nb_inst_branch_complete]; 144 internal_BRANCH_COMPLETE_MISS_PREDICTION = new Tcontrol_t [_param->_nb_inst_branch_complete]; 145 internal_BRANCH_COMPLETE_TAKE = new Tcontrol_t [_param->_nb_inst_branch_complete]; 146 internal_BRANCH_COMPLETE_ADDRESS_DEST = new Taddress_t [_param->_nb_inst_branch_complete]; 147 internal_UPDATE_VAL = new Tcontrol_t [_param->_nb_inst_update]; 148 internal_UPDATE_CONTEXT_ID = new Tcontext_t [_param->_nb_inst_update]; 149 internal_UPDATE_DEPTH = new Tdepth_t [_param->_nb_inst_update]; 150 151 // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 152 reg_TOP = new uint32_t [_param->_nb_context]; 153 reg_BOTTOM = new uint32_t [_param->_nb_context]; 154 reg_NB_ELT = new uint32_t [_param->_nb_context]; 155 reg_NB_ELT_NEED_UPDATE = new uint32_t [_param->_nb_context]; 156 reg_UPDATE_PREDICTION_TABLE = new entry_t * [_param->_nb_context]; 157 for (uint32_t i=0; i<_param->_nb_context; i++) 158 { 159 #ifndef NO_INIT 160 reg_TOP [i] = 0; 161 #endif 162 reg_UPDATE_PREDICTION_TABLE [i] = new entry_t [_param->_size_queue[i]]; 163 } 57 164 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 58 165 -
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_deallocation.cpp
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r78 r81 27 27 delete in_CLOCK ; 28 28 delete in_NRESET; 29 30 // ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 31 delete [] in_PREDICT_VAL ; 32 delete [] out_PREDICT_ACK ; 33 if (_param->_have_port_context_id) 34 delete [] in_PREDICT_CONTEXT_ID ; 35 delete [] in_PREDICT_BTB_ADDRESS_SRC ; 36 delete [] in_PREDICT_BTB_ADDRESS_DEST ; 37 delete [] in_PREDICT_BTB_CONDITION ; 38 delete [] in_PREDICT_BTB_LAST_TAKE ; 39 delete [] in_PREDICT_BTB_IS_ACCURATE ; 40 if (_param->_have_port_history) 41 delete [] in_PREDICT_DIR_HISTORY ; 42 delete [] in_PREDICT_RAS_ADDRESS ; 43 delete [] in_PREDICT_RAS_INDEX ; 44 // if (_param->_have_port_depth) 45 // delete [] out_PREDICT_UPDATE_PREDICTION_ID; 46 47 // ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 48 delete [] in_DECOD_VAL ; 49 delete [] out_DECOD_ACK ; 50 if (_param->_have_port_context_id) 51 delete [] in_DECOD_CONTEXT_ID ; 52 delete [] in_DECOD_BTB_ADDRESS_SRC ; 53 delete [] in_DECOD_BTB_ADDRESS_DEST ; 54 delete [] in_DECOD_BTB_CONDITION ; 55 delete [] in_DECOD_BTB_LAST_TAKE ; 56 delete [] in_DECOD_RAS_ADDRESS ; 57 delete [] in_DECOD_RAS_INDEX ; 58 delete [] in_DECOD_MISS_PREDICTION ; 59 if (_param->_have_port_depth) 60 delete [] in_DECOD_UPDATE_PREDICTION_ID ; 61 // if (_param->_have_port_depth) 62 // delete [] out_DECOD_DEPTH ; 63 64 // ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 65 delete [] in_BRANCH_COMPLETE_VAL ; 66 delete [] out_BRANCH_COMPLETE_ACK ; 67 if (_param->_have_port_context_id) 68 delete [] in_BRANCH_COMPLETE_CONTEXT_ID ; 69 if (_param->_have_port_depth) 70 delete [] in_BRANCH_COMPLETE_DEPTH ; 71 delete [] in_BRANCH_COMPLETE_ADDRESS ; 72 delete [] in_BRANCH_COMPLETE_FLAG ; 73 delete [] out_BRANCH_COMPLETE_MISS_PREDICTION; 74 delete [] out_BRANCH_COMPLETE_TAKE ; 75 delete [] out_BRANCH_COMPLETE_ADDRESS_SRC ; 76 delete [] out_BRANCH_COMPLETE_ADDRESS_DEST ; 77 78 // ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 79 delete [] out_UPDATE_VAL ; 80 delete [] in_UPDATE_ACK ; 81 if (_param->_have_port_context_id) 82 delete [] out_UPDATE_CONTEXT_ID ; 83 delete [] out_UPDATE_MISS_PREDICTION ; 84 delete [] out_UPDATE_DIRECTION_GOOD ; 85 delete [] out_UPDATE_BTB_VAL ; 86 delete [] out_UPDATE_BTB_ADDRESS_SRC ; 87 delete [] out_UPDATE_BTB_ADDRESS_DEST ; 88 delete [] out_UPDATE_BTB_CONDITION ; 89 delete [] out_UPDATE_DIR_VAL ; 90 if (_param->_have_port_history) 91 delete [] out_UPDATE_DIR_HISTORY ; 92 delete [] out_UPDATE_RAS_VAL ; 93 delete [] out_UPDATE_RAS_ADDRESS ; 94 delete [] out_UPDATE_RAS_INDEX ; 95 delete [] out_UPDATE_RAS_PREDICTION_IFETCH; 96 97 // ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 98 if (_param->_have_port_depth) 99 { 100 delete [] out_DEPTH_NB_BRANCH; 101 delete [] out_DEPTH_TAIL; 102 } 29 103 } 104 105 // ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 106 delete [] internal_PREDICT_ACK ; 107 delete [] internal_DECOD_ACK ; 108 delete [] internal_BRANCH_COMPLETE_ACK ; 109 delete [] internal_BRANCH_COMPLETE_MISS_PREDICTION ; 110 delete [] internal_BRANCH_COMPLETE_TAKE ; 111 delete [] internal_BRANCH_COMPLETE_ADDRESS_DEST ; 112 delete [] internal_UPDATE_VAL ; 113 delete [] internal_UPDATE_CONTEXT_ID ; 114 delete [] internal_UPDATE_DEPTH ; 115 116 // ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 117 delete [] reg_TOP; 118 delete [] reg_BOTTOM; 119 delete [] reg_NB_ELT; 120 delete [] reg_NB_ELT_NEED_UPDATE; 121 for (uint32_t i=0; i<_param->_nb_context; i++) 122 delete [] reg_UPDATE_PREDICTION_TABLE [i]; 123 delete [] reg_UPDATE_PREDICTION_TABLE; 124 30 125 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 31 126 -
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_end_cycle.cpp
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_statistics_allocation.cpp
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_statistics_deallocation.cpp
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_transition.cpp
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r78 r81 24 24 log_printf(FUNC,Update_Prediction_Table,FUNCTION,"Begin"); 25 25 26 if (PORT_READ(in_NRESET) == 0) 27 { 28 for (uint32_t i=0; i<_param->_nb_context; i++) 29 { 30 reg_TOP [i] = 0; 31 reg_BOTTOM [i] = 0; 32 reg_NB_ELT [i] = 0; 33 reg_NB_ELT_NEED_UPDATE [i] = 0; 34 for (uint32_t j=0; j<_param->_size_queue[i]; j++) 35 reg_UPDATE_PREDICTION_TABLE [i][j]._state = UPDATE_PREDICTION_STATE_EMPTY; 36 } 37 reg_UPDATE_PRIORITY = 0; 38 } 39 else 40 { 41 // =================================================================== 42 // =====[ PREDICT ]=================================================== 43 // =================================================================== 44 for (uint32_t i=0; i<_param->_nb_inst_predict; i++) 45 if (PORT_READ(in_PREDICT_VAL[i]) and internal_PREDICT_ACK [i]) 46 { 47 Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_PREDICT_CONTEXT_ID [i]):0; 48 uint32_t top = reg_TOP [context]; 49 50 log_printf(TRACE,Update_Prediction_Table,FUNCTION,"PREDICT[%d] - Accepted",i); 51 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); 52 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * top : %d",top); 53 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * nb_elt : %d",reg_NB_ELT[context]); 54 55 reg_UPDATE_PREDICTION_TABLE [context][top]._state = UPDATE_PREDICTION_STATE_WAIT_DECOD; 56 reg_UPDATE_PREDICTION_TABLE [context][top]._ifetch_prediction = true; 57 reg_UPDATE_PREDICTION_TABLE [context][top]._condition = PORT_READ(in_PREDICT_BTB_CONDITION [i]); 58 reg_UPDATE_PREDICTION_TABLE [context][top]._address_src = PORT_READ(in_PREDICT_BTB_ADDRESS_SRC [i]); 59 reg_UPDATE_PREDICTION_TABLE [context][top]._address_dest = PORT_READ(in_PREDICT_BTB_ADDRESS_DEST [i]); 60 reg_UPDATE_PREDICTION_TABLE [context][top]._last_take = PORT_READ(in_PREDICT_BTB_LAST_TAKE [i]); 61 //reg_UPDATE_PREDICTION_TABLE [context][top]._good_take 62 reg_UPDATE_PREDICTION_TABLE [context][top]._history = (_param->_have_port_history)?PORT_READ(in_PREDICT_DIR_HISTORY [i]):0; 63 reg_UPDATE_PREDICTION_TABLE [context][top]._address_ras = PORT_READ(in_PREDICT_RAS_ADDRESS [i]); 64 reg_UPDATE_PREDICTION_TABLE [context][top]._index_ras = PORT_READ(in_PREDICT_RAS_INDEX [i]); 65 66 reg_TOP [context] = (top+1)%_param->_size_queue [context]; 67 reg_NB_ELT [context] ++; 68 } 69 70 // =================================================================== 71 // =====[ DECOD ]===================================================== 72 // =================================================================== 73 for (uint32_t i=0; i<_param->_nb_inst_decod; i++) 74 if (PORT_READ(in_DECOD_VAL[i]) and internal_DECOD_ACK [i]) 75 { 76 Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_DECOD_CONTEXT_ID [i]):0; 77 Tcontrol_t miss = PORT_READ(in_DECOD_MISS_PREDICTION [i]); 78 79 log_printf(TRACE,Update_Prediction_Table,FUNCTION,"DECOD[%d] - Accepted",i); 80 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); 81 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * miss : %d",miss); 82 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * nb_elt : %d",reg_NB_ELT[context]); 83 84 // Test if miss ifetch 85 // miss ifetch = decod a branch and the predict unit have not predict this branch ... gloup :P 86 if (miss) 87 { 88 Tdepth_t depth = (_param->_have_port_depth)?PORT_READ(in_DECOD_UPDATE_PREDICTION_ID [i]):0; 89 Tdepth_t top = reg_TOP [context]; 90 91 reg_UPDATE_PREDICTION_TABLE [context][top]._state = UPDATE_PREDICTION_STATE_WAITEND; 92 reg_UPDATE_PREDICTION_TABLE [context][top]._ifetch_prediction = false; // static prediction 93 reg_UPDATE_PREDICTION_TABLE [context][top]._condition = PORT_READ(in_DECOD_BTB_CONDITION [i]); 94 reg_UPDATE_PREDICTION_TABLE [context][top]._address_src = PORT_READ(in_DECOD_BTB_ADDRESS_SRC [i]); 95 reg_UPDATE_PREDICTION_TABLE [context][top]._address_dest = PORT_READ(in_DECOD_BTB_ADDRESS_DEST [i]); 96 reg_UPDATE_PREDICTION_TABLE [context][top]._last_take = PORT_READ(in_DECOD_BTB_LAST_TAKE [i]); 97 //reg_UPDATE_PREDICTION_TABLE [context][top]._good_take 98 //reg_UPDATE_PREDICTION_TABLE [context][top]._history 99 reg_UPDATE_PREDICTION_TABLE [context][top]._address_ras = PORT_READ(in_DECOD_RAS_ADDRESS [i]); 100 reg_UPDATE_PREDICTION_TABLE [context][top]._index_ras = PORT_READ(in_DECOD_RAS_INDEX [i]); 101 102 // Invalid all previous "ifetch" prediction 103 // (ifetch prediction = prediction make in fetch stage and not again comming in decod stage) 104 uint32_t nb_elt_miss = ((top> depth)?top:(top+_param->_size_queue[context]))-depth; 105 uint32_t nb_elt_need_update = 0; 106 for (uint32_t j=0; j<nb_elt_miss; j++) 107 { 108 uint32_t k=(depth+j)%_param->_size_queue[context]; 109 110 // Ifetch have make a prediction and it's a miss 111 // When ifetch predict : 112 // * btb is not change -> needn't update 113 // * direction is not change -> needn't update 114 // * ras have change -> need update 115 116 Tbranch_condition_t cond = reg_UPDATE_PREDICTION_TABLE [context][k]._condition; 117 if ((cond == BRANCH_CONDITION_NONE_WITH_WRITE_STACK) or 118 (cond == BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK) or 119 (cond == BRANCH_CONDITION_READ_STACK)) 120 { 121 nb_elt_need_update ++; 122 reg_UPDATE_PREDICTION_TABLE [context][k]._state = UPDATE_PREDICTION_STATE_KO; 123 } 124 else 125 { 126 reg_UPDATE_PREDICTION_TABLE [context][k]._state = UPDATE_PREDICTION_STATE_END; 127 } 128 } 129 130 reg_TOP [context] = (depth+1)%_param->_size_queue [context]; 131 reg_NB_ELT_NEED_UPDATE [context] += nb_elt_need_update; 132 reg_NB_ELT [context] ++; 133 } 134 else 135 { 136 // Normal case : branch is previous predicated, change state of branch 137 Tdepth_t depth = (_param->_have_port_depth)?PORT_READ(in_DECOD_UPDATE_PREDICTION_ID [i]):0; 138 139 reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_WAITEND; 140 } 141 } 142 143 // =================================================================== 144 // =====[ BRANCH_COMPLETE ]=========================================== 145 // =================================================================== 146 for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++) 147 if (PORT_READ(in_BRANCH_COMPLETE_VAL[i]) and internal_BRANCH_COMPLETE_ACK [i]) 148 { 149 Tcontext_t context = (_param->_have_port_context_id)?PORT_READ(in_BRANCH_COMPLETE_CONTEXT_ID [i]):0; 150 Tdepth_t depth = (_param->_have_port_depth )?PORT_READ(in_BRANCH_COMPLETE_DEPTH [i]):0; 151 152 log_printf(TRACE,Update_Prediction_Table,FUNCTION,"BRANCH_COMPLETE[%d] - Accepted",i); 153 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); 154 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth : %d",depth); 155 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * nb_elt : %d",reg_NB_ELT[context]); 156 157 if (internal_BRANCH_COMPLETE_MISS_PREDICTION [i]) 158 { 159 // Miss case 160 reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_KO; 161 162 // Another prediction (prediction with depth higer) 163 Tdepth_t top = reg_TOP [context]; 164 uint32_t nb_elt_miss = ((top> depth)?top:(top+_param->_size_queue[context]))-depth; 165 uint32_t nb_elt_need_update = 1; 166 for (uint32_t j=1; j<nb_elt_miss; j++) 167 { 168 uint32_t k=(depth+j)%_param->_size_queue[context]; 169 170 // Ifetch have make a prediction and it's a miss 171 // When ifetch predict : 172 // * btb is not change -> needn't update 173 // * direction is not change -> needn't update 174 // * ras have change -> need update 175 176 Tbranch_condition_t cond = reg_UPDATE_PREDICTION_TABLE [context][k]._condition; 177 if ((cond == BRANCH_CONDITION_NONE_WITH_WRITE_STACK) or 178 (cond == BRANCH_CONDITION_READ_REGISTER_WITH_WRITE_STACK) or 179 (cond == BRANCH_CONDITION_READ_STACK)) 180 { 181 nb_elt_need_update ++; 182 reg_UPDATE_PREDICTION_TABLE [context][k]._state = UPDATE_PREDICTION_STATE_KO; 183 } 184 else 185 { 186 reg_UPDATE_PREDICTION_TABLE [context][k]._state = UPDATE_PREDICTION_STATE_END; 187 } 188 } 189 reg_NB_ELT_NEED_UPDATE [context] += nb_elt_need_update; 190 191 // Update pointer : 192 reg_TOP [context] = depth; 193 reg_NB_ELT [context] -= nb_elt_miss; 194 } 195 else 196 { 197 // Hit case 198 #ifdef DEBUG_TEST 199 if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state != UPDATE_PREDICTION_STATE_WAITEND) 200 ERRORMORPHEO(FUNCTION,"Branche complete : invalid state"); 201 #endif 202 reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_OK; 203 } 204 205 // In all case : update good_take and address_destination 206 reg_UPDATE_PREDICTION_TABLE [context][depth]._good_take = internal_BRANCH_COMPLETE_TAKE [i]; 207 reg_UPDATE_PREDICTION_TABLE [context][depth]._address_dest = internal_BRANCH_COMPLETE_ADDRESS_DEST [i]; 208 } 209 210 // =================================================================== 211 // =====[ UPDATE ]==================================================== 212 // =================================================================== 213 for (uint32_t i=0; i<_param->_nb_inst_update; i++) 214 if (internal_UPDATE_VAL[i] and PORT_READ(in_UPDATE_ACK [i])) 215 { 216 Tcontext_t context = internal_UPDATE_CONTEXT_ID [i]; 217 Tdepth_t depth = internal_UPDATE_DEPTH [i]; 218 219 log_printf(TRACE,Update_Prediction_Table,FUNCTION,"UPDATE[%d] - Accepted",i); 220 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",context); 221 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * depth : %d",depth); 222 223 if (reg_UPDATE_PREDICTION_TABLE [context][depth]._state == UPDATE_PREDICTION_STATE_KO) 224 reg_NB_ELT_NEED_UPDATE [context] --; 225 226 reg_UPDATE_PREDICTION_TABLE [context][depth]._state = UPDATE_PREDICTION_STATE_END; 227 } 228 229 // Round robin 230 reg_UPDATE_PRIORITY = (reg_UPDATE_PRIORITY+1)%_param->_nb_context; 231 232 // =================================================================== 233 // =====[ GARBAGE COLLECTOR ]========================================= 234 // =================================================================== 235 236 for (uint32_t i=0; i<_param->_nb_context; i++) 237 { 238 uint32_t bottom = reg_BOTTOM [i]; 239 240 // Test if the tail of queue is finish (ok or ko and update) 241 if (reg_UPDATE_PREDICTION_TABLE [i][bottom]._state == UPDATE_PREDICTION_STATE_END) 242 { 243 log_printf(TRACE,Update_Prediction_Table,FUNCTION,"GARBAGE_COLLECTOR"); 244 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * context : %d",i); 245 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * bottom : %d",bottom); 246 247 reg_UPDATE_PREDICTION_TABLE [i][bottom]._state = UPDATE_PREDICTION_STATE_EMPTY; 248 reg_BOTTOM [i] = (bottom+1)%_param->_size_queue [i]; 249 if (reg_NB_ELT [i]>0) 250 reg_NB_ELT [i] --; 251 } 252 } 253 } 254 255 // #if (DEBUG >= DEBUG_TRACE) 256 log_printf(TRACE,Update_Prediction_Table,FUNCTION,"Dump Update_Prediction_Table"); 257 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_UPDATE_PRIORITY : %d",reg_UPDATE_PRIORITY); 258 for (uint32_t i=0; i<_param->_nb_context; i++) 259 { 260 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * Update_Prediction_Table [%d]",i); 261 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_TOP : %d",reg_TOP [i]); 262 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_BOTTOM : %d",reg_BOTTOM [i]); 263 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_NB_ELT : %d",reg_NB_ELT [i]); 264 log_printf(TRACE,Update_Prediction_Table,FUNCTION," * reg_NB_ELT_NEED_UPDATE : %d",reg_NB_ELT_NEED_UPDATE [i]); 265 for (uint32_t j=0; j<_param->_size_queue[i]; j++) 266 log_printf(TRACE,Update_Prediction_Table,FUNCTION," [%d] %s %x",j,toString(reg_UPDATE_PREDICTION_TABLE [i][j]._state).c_str(),reg_UPDATE_PREDICTION_TABLE [i][j]._address_src); 267 } 268 // #endif 269 270 26 271 #if defined(STATISTICS) or defined(VHDL_TESTBENCH) 27 272 end_cycle (); -
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Update_Prediction_Table/src/Update_Prediction_Table_vhdl_body.cpp
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