Changeset 82 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_genMealy_predict.cpp

Timestamp:

May 1, 2008, 6:48:45 PM (16 years ago)

Author:

rosiere

Message:

• support locale (now must "just" translate)
• update all component with new test format
• update all component with usage
• New component : decod queue and prediction_unit

File:

• trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_genMealy_predict.cpp (modified) (7 diffs)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Prediction_unit_Glue/src/Prediction_unit_Glue_genMealy_predict.cpp

@@ -26 +26 @@
     Tcontrol_t ack [_param->_nb_context];
     for (uint32_t i=0; i<_param->_nb_context; i++)
-      ack [i] = 0;
-    
-    for (uint32_t i=0; i<_param->_nb_inst_predict; i++)
+      {
+        ack [i] = 0;
+
+        if (_param->_have_port_depth[i])
+          {
+            PORT_WRITE(out_DEPTH_TAIL      [i],PORT_READ(in_DEPTH_UPT_TAIL      [i]));
+          }
+            PORT_WRITE(out_DEPTH_NB_BRANCH [i],PORT_READ(in_DEPTH_UPT_NB_BRANCH [i]));
+      }
+
+    for (uint32_t i=0; i<_param->_nb_inst_branch_predict; i++)
       {
         log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"PREDICT [%d]",i);
@@ -136 +144 @@
                         {
                           branch_state = BRANCH_STATE_SPEC_NTAKE;
-                          pc_next      = address_src+8; // +4 = delay slot
+                          pc_next      = address_src+2; // +1 = delay slot
                         }
                       break;
@@ -191 +199 @@
                     PORT_WRITE(out_PREDICT_RAS_CONTEXT_ID   [i], context);
                     PORT_WRITE(out_PREDICT_RAS_PUSH         [i], push); 
-                    PORT_WRITE(out_PREDICT_RAS_ADDRESS_PUSH [i], address_src+8); 
+                    PORT_WRITE(out_PREDICT_RAS_ADDRESS_PUSH [i], address_src+2); 
 
                     is_accurate &= PORT_READ(in_PREDICT_RAS_HIT [i]); // if miss - prediction is not accurate
@@ -221 +229 @@
 //                               (use_upt and PORT_READ(in_PREDICT_UPT_ACK [i])));
 
-                dir_val = (PORT_READ(in_PREDICT_BTB_ACK [i]) and 
-                           (use_ras and PORT_READ(in_PREDICT_RAS_ACK [i])) and 
-                           (use_upt and PORT_READ(in_PREDICT_UPT_ACK [i])));
-
-                ras_val = (PORT_READ(in_PREDICT_BTB_ACK [i]) and 
-                           (use_dir and PORT_READ(in_PREDICT_DIR_ACK [i])) and 
-                           (use_upt and PORT_READ(in_PREDICT_UPT_ACK [i])));
-
-                upt_val = (PORT_READ(in_PREDICT_BTB_ACK [i]) and 
-                           (use_dir and PORT_READ(in_PREDICT_DIR_ACK [i])) and 
-                           (use_ras and PORT_READ(in_PREDICT_RAS_ACK [i])));
+                dir_val = (use_dir and
+                           PORT_READ(in_PREDICT_BTB_ACK [i]) and 
+                           (not use_ras or (use_ras and PORT_READ(in_PREDICT_RAS_ACK [i]))) and 
+                           (not use_upt or (use_upt and PORT_READ(in_PREDICT_UPT_ACK [i]))));
+
+                ras_val = (use_ras and
+                           PORT_READ(in_PREDICT_BTB_ACK [i]) and 
+                           (not use_dir or (use_dir and PORT_READ(in_PREDICT_DIR_ACK [i]))) and 
+                           (not use_upt or (use_upt and PORT_READ(in_PREDICT_UPT_ACK [i]))));
+
+                upt_val = (use_upt and
+                           PORT_READ(in_PREDICT_BTB_ACK [i]) and 
+                           (not use_dir or (use_dir and PORT_READ(in_PREDICT_DIR_ACK [i]))) and 
+                           (not use_ras or (use_ras and PORT_READ(in_PREDICT_RAS_ACK [i]))));
 
 //              pc_next      - is previously computed
@@ -238 +249 @@
                 Taddress_t address_src_lsb  = address_src%_param->_nb_instruction [context];
 
+                log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"    * address_src     : 0x%x",address_src);
+                log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"    * address_src_lsb : %d",address_src_lsb);
                 if (address_src_lsb == (_param->_nb_instruction [context]-1))
                   {
                     // branch is in the last slot of the packet
+                    log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"    * branch is in the last slot of the packet");
+                
                     address_msb        = _param->_nb_instruction [context]; // == (address_src_lsb+1)
                     pc_next_is_ds_take = 1;
@@ -250 +265 @@
                     pc_next_is_ds_take = 0;
                   }
+                log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"    * address_msb     : %d",address_msb);
 
                 inst_ifetch_ptr             = address_src_lsb;
-                branch_update_prediction_id = (PORT_READ(in_DEPTH_UPT_TAIL[context])+PORT_READ(in_DEPTH_UPT_NB_BRANCH [context]))%_param->_size_depth[context];
+                branch_update_prediction_id = (_param->_have_port_depth[context])?((PORT_READ(in_DEPTH_UPT_TAIL[context])+PORT_READ(in_DEPTH_UPT_NB_BRANCH [context]))%_param->_size_depth[context]):0;
               }
             else
@@ -270 +286 @@
               PORT_WRITE(out_PREDICT_PC_NEXT                     [context]   , pc_next                    );
               PORT_WRITE(out_PREDICT_PC_NEXT_IS_DS_TAKE          [context]   , pc_next_is_ds_take         );
+
+              log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"  * instruction enable :");
+              log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"    * nb_inst : %d",_param->_nb_instruction [context]);
+              log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"    * [0:%d[ = 0",address_lsb);
+              log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"    * [%d:%d[ = 1",address_lsb,((pc_current_is_ds_take)?1:address_msb));
+              log_printf(TRACE,Prediction_unit_Glue,FUNCTION,"    * [%d:%d[ = 0",((pc_current_is_ds_take)?1:address_msb),_param->_nb_instruction [context]);
+
               for (uint32_t j=0; j<address_lsb; j++)
               PORT_WRITE(out_PREDICT_INSTRUCTION_ENABLE          [context][j], 0); // Before the address : not valid