Changeset 85 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_genMealy_icache_req.cpp
- Timestamp:
- May 14, 2008, 3:09:48 PM (16 years ago)
- File:
-
- 1 edited
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Ifetch_unit/Ifetch_unit_Glue/src/Ifetch_unit_Glue_genMealy_icache_req.cpp
r81 r85 31 31 PORT_WRITE(out_ICACHE_REQ_ADDRESS_ACK, ack and queue_ack); // cache can accept a new transaction and queue have a slot empty 32 32 PORT_WRITE(out_ICACHE_REQ_QUEUE_VAL , address_val and ack); // cache can accept a new transaction and the address is valid 33 34 Taddress_t address = PORT_READ(in_ICACHE_REQ_ADDRESS_ADDRESS); 35 PORT_WRITE(out_ICACHE_REQ_ADDRESS ,address); 36 PORT_WRITE(out_ICACHE_REQ_QUEUE_ADDRESS,address); 33 37 34 38 log_printf(FUNC,Ifetch_unit_Glue,FUNCTION,"End");
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