Ignore:
Timestamp:
Dec 10, 2008, 7:31:39 PM (16 years ago)
Author:
rosiere
Message:

Almost complete design
with Test and test platform

File:
1 edited

Legend:

Unmodified
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  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/src/Load_store_unit_function_speculative_load_commit_genMoore.cpp

    r81 r88  
    44 * $Id$
    55 *
    6  * [ Description ]
     6 * [ Description ]
    77 *
    88 */
     
    2626    log_printf(FUNC,Load_store_unit,FUNCTION,"Begin");
    2727
    28     // ~~~~~[ Interface "memory_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     28    // ~~~~~[ Interface "memory_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    2929
    3030    Tcontext_t         memory_out_context_id    = 0;
     
    110110      }
    111111    // write output
    112     PORT_WRITE(out_MEMORY_OUT_VAL          , internal_MEMORY_OUT_VAL);
     112    PORT_WRITE(out_MEMORY_OUT_VAL          [0], internal_MEMORY_OUT_VAL);
    113113
    114114    if (_param->_have_port_context_id)
    115     PORT_WRITE(out_MEMORY_OUT_CONTEXT_ID   , memory_out_context_id   );
     115    PORT_WRITE(out_MEMORY_OUT_CONTEXT_ID   [0], memory_out_context_id   );
    116116    if (_param->_have_port_front_end_id)
    117     PORT_WRITE(out_MEMORY_OUT_FRONT_END_ID , memory_out_front_end_id );
     117    PORT_WRITE(out_MEMORY_OUT_FRONT_END_ID [0], memory_out_front_end_id );
    118118    if (_param->_have_port_ooo_engine_id)
    119     PORT_WRITE(out_MEMORY_OUT_OOO_ENGINE_ID, memory_out_ooo_engine_id);
    120     if (_param->_have_port_packet_id)
    121     PORT_WRITE(out_MEMORY_OUT_PACKET_ID    , memory_out_packet_id    );
    122 //  PORT_WRITE(out_MEMORY_OUT_OPERATION    , memory_out_operation    );
    123     PORT_WRITE(out_MEMORY_OUT_TYPE         , TYPE_MEMORY             );
    124     PORT_WRITE(out_MEMORY_OUT_WRITE_RD     , memory_out_write_rd     );
    125     PORT_WRITE(out_MEMORY_OUT_NUM_REG_RD   , memory_out_num_reg_rd   );
    126     PORT_WRITE(out_MEMORY_OUT_DATA_RD      , memory_out_data_rd      );
    127 //  PORT_WRITE(out_MEMORY_OUT_WRITE_RE     , memory_out_write_re     );
    128 //  PORT_WRITE(out_MEMORY_OUT_NUM_REG_RE   , memory_out_num_reg_re   );
    129 //  PORT_WRITE(out_MEMORY_OUT_DATA_RE      , memory_out_data_re      );
    130     PORT_WRITE(out_MEMORY_OUT_WRITE_RE     , 0);
    131     PORT_WRITE(out_MEMORY_OUT_NUM_REG_RE   , 0);
    132     PORT_WRITE(out_MEMORY_OUT_DATA_RE      , 0);
    133     PORT_WRITE(out_MEMORY_OUT_EXCEPTION    , memory_out_exception    );
    134     PORT_WRITE(out_MEMORY_OUT_NO_SEQUENCE  , 0);
    135     PORT_WRITE(out_MEMORY_OUT_ADDRESS      , 0);
    136     // ~~~~~[ Interface "dache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
     119    PORT_WRITE(out_MEMORY_OUT_OOO_ENGINE_ID[0], memory_out_ooo_engine_id);
     120    if (_param->_have_port_rob_ptr)
     121    PORT_WRITE(out_MEMORY_OUT_PACKET_ID    [0], memory_out_packet_id    );
     122//  PORT_WRITE(out_MEMORY_OUT_OPERATION    [0], memory_out_operation    );
     123    PORT_WRITE(out_MEMORY_OUT_TYPE         [0], TYPE_MEMORY             );
     124    PORT_WRITE(out_MEMORY_OUT_WRITE_RD     [0], memory_out_write_rd     );
     125    PORT_WRITE(out_MEMORY_OUT_NUM_REG_RD   [0], memory_out_num_reg_rd   );
     126    PORT_WRITE(out_MEMORY_OUT_DATA_RD      [0], memory_out_data_rd      );
     127//  PORT_WRITE(out_MEMORY_OUT_WRITE_RE     [0], memory_out_write_re     );
     128//  PORT_WRITE(out_MEMORY_OUT_NUM_REG_RE   [0], memory_out_num_reg_re   );
     129//  PORT_WRITE(out_MEMORY_OUT_DATA_RE      [0], memory_out_data_re      );
     130    PORT_WRITE(out_MEMORY_OUT_WRITE_RE     [0], 0);
     131    PORT_WRITE(out_MEMORY_OUT_NUM_REG_RE   [0], 0);
     132    PORT_WRITE(out_MEMORY_OUT_DATA_RE      [0], 0);
     133    PORT_WRITE(out_MEMORY_OUT_EXCEPTION    [0], memory_out_exception    );
     134    PORT_WRITE(out_MEMORY_OUT_NO_SEQUENCE  [0], 0);
     135    PORT_WRITE(out_MEMORY_OUT_ADDRESS      [0], 0);
     136
     137    // ~~~~~[ Interface "dache_req" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
    137138
    138139    Tcontext_t        dcache_req_context_id;
     
    201202      }
    202203
    203     PORT_WRITE(out_DCACHE_REQ_VAL       , internal_DCACHE_REQ_VAL);
     204    PORT_WRITE(out_DCACHE_REQ_VAL       [0], internal_DCACHE_REQ_VAL);
    204205    if (_param->_have_port_dcache_context_id)
    205     PORT_WRITE(out_DCACHE_REQ_CONTEXT_ID, dcache_req_context_id);
    206     PORT_WRITE(out_DCACHE_REQ_PACKET_ID , dcache_req_packet_id );
    207     PORT_WRITE(out_DCACHE_REQ_ADDRESS   , dcache_req_address   );
    208     PORT_WRITE(out_DCACHE_REQ_TYPE      , dcache_req_type      );
    209     PORT_WRITE(out_DCACHE_REQ_WDATA     , dcache_req_wdata     );
     206    PORT_WRITE(out_DCACHE_REQ_CONTEXT_ID[0], dcache_req_context_id);
     207    PORT_WRITE(out_DCACHE_REQ_PACKET_ID [0], dcache_req_packet_id );
     208    PORT_WRITE(out_DCACHE_REQ_ADDRESS   [0], dcache_req_address   );
     209    PORT_WRITE(out_DCACHE_REQ_TYPE      [0], dcache_req_type      );
     210    PORT_WRITE(out_DCACHE_REQ_WDATA     [0], dcache_req_wdata     );
    210211   
    211212    log_printf(FUNC,Load_store_unit,FUNCTION,"End");
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