Changeset 88 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src
- Timestamp:
- Dec 10, 2008, 7:31:39 PM (16 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src
- Files:
-
- 1 added
- 8 edited
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Parameters.cpp (modified) (2 diffs)
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Parameters_print.cpp (modified) (1 diff)
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Register_translation_unit_Glue.cpp (modified) (8 diffs)
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Register_translation_unit_Glue_allocation.cpp (modified) (2 diffs)
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Register_translation_unit_Glue_deallocation.cpp (modified) (2 diffs)
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Register_translation_unit_Glue_end_cycle.cpp (modified) (2 diffs)
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Register_translation_unit_Glue_genMealy_insert.cpp (modified) (1 diff)
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Register_translation_unit_Glue_genMealy_insert_valack.cpp (added)
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Register_translation_unit_Glue_genMealy_retire.cpp (modified) (2 diffs)
Legend:
- Unmodified
- Added
- Removed
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trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Parameters.cpp
r81 r88 21 21 #define FUNCTION "Register_translation_unit_Glue::Parameters" 22 22 Parameters::Parameters (uint32_t nb_inst_insert, 23 uint32_t nb_inst_retire) 23 uint32_t nb_inst_retire, 24 uint32_t size_general_register, 25 uint32_t size_special_register, 26 bool is_toplevel) 24 27 { 25 28 log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin"); 26 29 27 _nb_inst_insert = nb_inst_insert;28 _nb_inst_retire = nb_inst_retire;30 _nb_inst_insert = nb_inst_insert; 31 _nb_inst_retire = nb_inst_retire; 29 32 30 33 test(); 34 35 if (is_toplevel) 36 { 37 _size_general_register = size_general_register; 38 _size_special_register = size_special_register; 39 40 copy (); 41 } 42 31 43 log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"End"); 32 44 }; … … 43 55 #undef FUNCTION 44 56 #define FUNCTION "Register_translation_unit_Glue::~Parameters" 45 Parameters::~Parameters () 57 Parameters::~Parameters (void) 58 { 59 log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin"); 60 log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"End"); 61 }; 62 63 #undef FUNCTION 64 #define FUNCTION "Register_translation_unit_Glue::copy" 65 void Parameters::copy (void) 46 66 { 47 67 log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Parameters_print.cpp
r81 r88 28 28 29 29 xml.balise_open("register_translation_unit_glue"); 30 xml.singleton_begin("nb_inst_insert"); xml.attribut("value",toString(_nb_inst_insert)); xml.singleton_end(); 31 xml.singleton_begin("nb_inst_retire"); xml.attribut("value",toString(_nb_inst_retire)); xml.singleton_end(); 30 xml.singleton_begin("nb_inst_insert "); xml.attribut("value",toString(_nb_inst_insert )); xml.singleton_end(); 31 xml.singleton_begin("nb_inst_retire "); xml.attribut("value",toString(_nb_inst_retire )); xml.singleton_end(); 32 xml.singleton_begin("size_general_register"); xml.attribut("value",toString(_size_general_register)); xml.singleton_end(); 33 xml.singleton_begin("size_special_register"); xml.attribut("value",toString(_size_special_register)); xml.singleton_end(); 32 34 xml.balise_close(); 33 35 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue.cpp
r81 r88 39 39 log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin"); 40 40 41 #if DEBUG_Register_translation_unit_Glue == true 42 log_printf(INFO,Register_translation_unit_Glue,FUNCTION,_("<%s> Parameters"),_name.c_str()); 43 44 std::cout << *param << std::endl; 45 #endif 46 41 47 log_printf(INFO,Register_translation_unit_Glue,FUNCTION,"Allocation"); 42 48 … … 48 54 49 55 #ifdef STATISTICS 50 if ( _usage & USE_STATISTICS)56 if (usage_is_set(_usage,USE_STATISTICS)) 51 57 { 52 58 log_printf(INFO,Register_translation_unit_Glue,FUNCTION,"Allocation of statistics"); … … 57 63 58 64 #ifdef VHDL 59 if ( _usage & USE_VHDL)65 if (usage_is_set(_usage,USE_VHDL)) 60 66 { 61 67 // generate the vhdl … … 67 73 68 74 #ifdef SYSTEMC 69 if ( _usage & USE_SYSTEMC)75 if (usage_is_set(_usage,USE_SYSTEMC)) 70 76 { 71 77 log_printf(INFO,Register_translation_unit_Glue,FUNCTION,"Method - transition"); … … 83 89 SC_METHOD (genMealy_retire); 84 90 dont_initialize (); 85 // sensitive << (*(in_CLOCK)).neg(); 91 // sensitive << (*(in_CLOCK)).neg(); // don't need internal register 86 92 for (uint32_t i=0; i<_param->_nb_inst_retire; i++) 87 93 sensitive << (*(in_RETIRE_VAL [i])) … … 104 110 # endif 105 111 106 log_printf(INFO,Register_translation_unit_Glue,FUNCTION,"Method - genMealy_insert ");107 108 SC_METHOD (genMealy_insert );109 dont_initialize (); 110 // sensitive << (*(in_CLOCK)).neg(); 112 log_printf(INFO,Register_translation_unit_Glue,FUNCTION,"Method - genMealy_insert_valack"); 113 114 SC_METHOD (genMealy_insert_valack); 115 dont_initialize (); 116 // sensitive << (*(in_CLOCK)).neg(); // don't need internal register 111 117 for (uint32_t i=0; i<_param->_nb_inst_insert; i++) 112 118 sensitive << (*(in_INSERT_RENAME_VAL [i])) … … 152 158 } 153 159 # endif 160 161 log_printf(INFO,Register_translation_unit_Glue,FUNCTION,"Method - genMealy_insert"); 162 163 SC_METHOD (genMealy_insert); 164 dont_initialize (); 165 // sensitive << (*(in_CLOCK)).neg(); // don't need internal register 166 for (uint32_t i=0; i<_param->_nb_inst_insert; i++) 167 sensitive << (*(in_INSERT_DEPENDENCY_CHECKING_READ_RA [i])) 168 << (*(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RA_PHY [i])) 169 << (*(in_INSERT_DEPENDENCY_CHECKING_READ_RB [i])) 170 << (*(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RB_PHY [i])) 171 << (*(in_INSERT_DEPENDENCY_CHECKING_READ_RC [i])) 172 << (*(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RC_PHY [i])) 173 << (*(in_INSERT_DEPENDENCY_CHECKING_WRITE_RD [i])) 174 << (*(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_LOG [i])) 175 << (*(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_OLD [i])) 176 << (*(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_NEW [i])) 177 << (*(in_INSERT_DEPENDENCY_CHECKING_WRITE_RE [i])) 178 << (*(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_LOG [i])) 179 << (*(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_OLD [i])) 180 << (*(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW [i])); 181 182 # ifdef SYSTEMCASS_SPECIFIC 183 // List dependency information 184 # endif 185 186 154 187 155 188 #endif … … 165 198 166 199 #ifdef STATISTICS 167 if ( _usage & USE_STATISTICS)200 if (usage_is_set(_usage,USE_STATISTICS)) 168 201 { 169 202 log_printf(INFO,Register_translation_unit_Glue,FUNCTION,"Generate Statistics file"); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_allocation.cpp
r81 r88 72 72 ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_VAL ,"stat_list_val" ,Tcontrol_t,1); 73 73 ALLOC1_SIGNAL_IN ( in_INSERT_STAT_LIST_ACK ,"stat_list_ack" ,Tcontrol_t,1); 74 75 ALLOC1_SIGNAL_IN ( in_INSERT_DEPENDENCY_CHECKING_READ_RA ,"DEPENDENCY_CHECKING_READ_RA" ,Tcontrol_t ,1); 76 ALLOC1_SIGNAL_IN ( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RA_PHY ,"DEPENDENCY_CHECKING_NUM_REG_RA_PHY" ,Tgeneral_address_t,_param->_size_general_register ); 77 ALLOC1_SIGNAL_IN ( in_INSERT_DEPENDENCY_CHECKING_READ_RB ,"DEPENDENCY_CHECKING_READ_RB" ,Tcontrol_t ,1); 78 ALLOC1_SIGNAL_IN ( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RB_PHY ,"DEPENDENCY_CHECKING_NUM_REG_RB_PHY" ,Tgeneral_address_t,_param->_size_general_register ); 79 ALLOC1_SIGNAL_IN ( in_INSERT_DEPENDENCY_CHECKING_READ_RC ,"DEPENDENCY_CHECKING_READ_RC" ,Tcontrol_t ,1); 80 ALLOC1_SIGNAL_IN ( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RC_PHY ,"DEPENDENCY_CHECKING_NUM_REG_RC_PHY" ,Tspecial_address_t,_param->_size_special_register ); 81 ALLOC1_SIGNAL_IN ( in_INSERT_DEPENDENCY_CHECKING_WRITE_RD ,"DEPENDENCY_CHECKING_WRITE_RD" ,Tcontrol_t ,1); 82 ALLOC1_SIGNAL_IN ( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_LOG ,"DEPENDENCY_CHECKING_NUM_REG_RD_LOG" ,Tgeneral_address_t,_param->_size_general_register_logic); 83 ALLOC1_SIGNAL_IN ( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_OLD,"DEPENDENCY_CHECKING_NUM_REG_RD_PHY_OLD",Tgeneral_address_t,_param->_size_general_register ); 84 ALLOC1_SIGNAL_IN ( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_NEW,"DEPENDENCY_CHECKING_NUM_REG_RD_PHY_NEW",Tgeneral_address_t,_param->_size_general_register ); 85 ALLOC1_SIGNAL_IN ( in_INSERT_DEPENDENCY_CHECKING_WRITE_RE ,"DEPENDENCY_CHECKING_WRITE_RE" ,Tcontrol_t ,1); 86 ALLOC1_SIGNAL_IN ( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_LOG ,"DEPENDENCY_CHECKING_NUM_REG_RE_LOG" ,Tspecial_address_t,_param->_size_special_register_logic); 87 ALLOC1_SIGNAL_IN ( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_OLD,"DEPENDENCY_CHECKING_NUM_REG_RE_PHY_OLD",Tspecial_address_t,_param->_size_special_register ); 88 ALLOC1_SIGNAL_IN ( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW,"DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW",Tspecial_address_t,_param->_size_special_register ); 89 90 ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_READ_RA ,"STAT_LIST_READ_RA" ,Tcontrol_t ,1); 91 ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_NUM_REG_RA_PHY ,"STAT_LIST_NUM_REG_RA_PHY" ,Tgeneral_address_t,_param->_size_general_register ); 92 ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_READ_RB ,"STAT_LIST_READ_RB" ,Tcontrol_t ,1); 93 ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_NUM_REG_RB_PHY ,"STAT_LIST_NUM_REG_RB_PHY" ,Tgeneral_address_t,_param->_size_general_register ); 94 ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_READ_RC ,"STAT_LIST_READ_RC" ,Tcontrol_t ,1); 95 ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_NUM_REG_RC_PHY ,"STAT_LIST_NUM_REG_RC_PHY" ,Tspecial_address_t,_param->_size_special_register ); 96 ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_WRITE_RD ,"STAT_LIST_WRITE_RD" ,Tcontrol_t ,1); 97 ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW ,"STAT_LIST_NUM_REG_RD_PHY_NEW" ,Tgeneral_address_t,_param->_size_general_register ); 98 ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_WRITE_RE ,"STAT_LIST_WRITE_RE" ,Tcontrol_t ,1); 99 ALLOC1_SIGNAL_OUT(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW ,"STAT_LIST_NUM_REG_RE_PHY_NEW" ,Tspecial_address_t,_param->_size_special_register ); 100 101 ALLOC1_SIGNAL_OUT(out_INSERT_RAT_WRITE_RD ,"RAT_WRITE_RD" ,Tcontrol_t ,1); 102 ALLOC1_SIGNAL_OUT(out_INSERT_RAT_NUM_REG_RD_LOG ,"RAT_NUM_REG_RD_LOG" ,Tgeneral_address_t,_param->_size_general_register_logic); 103 ALLOC1_SIGNAL_OUT(out_INSERT_RAT_NUM_REG_RD_PHY_NEW ,"RAT_NUM_REG_RD_PHY_NEW" ,Tgeneral_address_t,_param->_size_general_register ); 104 ALLOC1_SIGNAL_OUT(out_INSERT_RAT_WRITE_RE ,"RAT_WRITE_RE" ,Tcontrol_t ,1); 105 ALLOC1_SIGNAL_OUT(out_INSERT_RAT_NUM_REG_RE_LOG ,"RAT_NUM_REG_RE_LOG" ,Tspecial_address_t,_param->_size_special_register_logic); 106 ALLOC1_SIGNAL_OUT(out_INSERT_RAT_NUM_REG_RE_PHY_NEW ,"RAT_NUM_REG_RE_PHY_NEW" ,Tspecial_address_t,_param->_size_special_register ); 107 108 ALLOC1_SIGNAL_OUT(out_INSERT_READ_RA ,"READ_RA" ,Tcontrol_t ,1); 109 ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RA_PHY ,"NUM_REG_RA_PHY" ,Tgeneral_address_t,_param->_size_general_register ); 110 ALLOC1_SIGNAL_OUT(out_INSERT_READ_RB ,"READ_RB" ,Tcontrol_t ,1); 111 ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RB_PHY ,"NUM_REG_RB_PHY" ,Tgeneral_address_t,_param->_size_general_register ); 112 ALLOC1_SIGNAL_OUT(out_INSERT_READ_RC ,"READ_RC" ,Tcontrol_t ,1); 113 ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RC_PHY ,"NUM_REG_RC_PHY" ,Tspecial_address_t,_param->_size_special_register ); 114 ALLOC1_SIGNAL_OUT(out_INSERT_WRITE_RD ,"WRITE_RD" ,Tcontrol_t ,1); 115 ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RD_LOG ,"NUM_REG_RD_LOG" ,Tgeneral_address_t,_param->_size_general_register_logic); 116 ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RD_PHY_OLD ,"NUM_REG_RD_PHY_OLD" ,Tgeneral_address_t,_param->_size_general_register ); 117 ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RD_PHY_NEW ,"NUM_REG_RD_PHY_NEW" ,Tgeneral_address_t,_param->_size_general_register ); 118 ALLOC1_SIGNAL_OUT(out_INSERT_WRITE_RE ,"WRITE_RE" ,Tcontrol_t ,1); 119 ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RE_LOG ,"NUM_REG_RE_LOG" ,Tspecial_address_t,_param->_size_special_register_logic); 120 ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RE_PHY_OLD ,"NUM_REG_RE_PHY_OLD" ,Tspecial_address_t,_param->_size_special_register ); 121 ALLOC1_SIGNAL_OUT(out_INSERT_NUM_REG_RE_PHY_NEW ,"NUM_REG_RE_PHY_NEW" ,Tspecial_address_t,_param->_size_special_register ); 74 122 } 75 123 … … 89 137 90 138 #ifdef POSITION 91 _component->generate_file(); 139 if (usage_is_set(_usage,USE_POSITION)) 140 _component->generate_file(); 92 141 #endif 93 142 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_deallocation.cpp
r81 r88 7 7 8 8 #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/include/Register_translation_unit_Glue.h" 9 #include "Behavioural/include/Allocation.h" 9 10 10 11 namespace morpheo { … … 24 25 log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin"); 25 26 26 if ( _usage & USE_SYSTEMC)27 if (usage_is_set(_usage,USE_SYSTEMC)) 27 28 { 28 29 delete in_CLOCK ; 29 30 delete in_NRESET; 30 31 31 delete [] in_INSERT_RENAME_VAL ; 32 delete [] out_INSERT_RENAME_ACK ; 33 delete [] out_INSERT_INSERT_VAL ; 34 delete [] in_INSERT_INSERT_ACK ; 35 delete [] out_INSERT_RAT_INSERT_VAL; 36 delete [] in_INSERT_RAT_RENAME_ACK; 37 delete [] in_INSERT_RAT_INSERT_ACK; 38 delete [] out_INSERT_FREE_LIST_VAL ; 39 delete [] in_INSERT_FREE_LIST_ACK ; 40 delete [] out_INSERT_STAT_LIST_VAL ; 41 delete [] in_INSERT_STAT_LIST_ACK ; 32 DELETE1_SIGNAL( in_INSERT_RENAME_VAL ,_param->_nb_inst_insert,1); 33 DELETE1_SIGNAL(out_INSERT_RENAME_ACK ,_param->_nb_inst_insert,1); 34 DELETE1_SIGNAL(out_INSERT_INSERT_VAL ,_param->_nb_inst_insert,1); 35 DELETE1_SIGNAL( in_INSERT_INSERT_ACK ,_param->_nb_inst_insert,1); 36 DELETE1_SIGNAL(out_INSERT_RAT_INSERT_VAL,_param->_nb_inst_insert,1); 37 DELETE1_SIGNAL( in_INSERT_RAT_RENAME_ACK,_param->_nb_inst_insert,1); 38 DELETE1_SIGNAL( in_INSERT_RAT_INSERT_ACK,_param->_nb_inst_insert,1); 39 DELETE1_SIGNAL(out_INSERT_FREE_LIST_VAL ,_param->_nb_inst_insert,1); 40 DELETE1_SIGNAL( in_INSERT_FREE_LIST_ACK ,_param->_nb_inst_insert,1); 41 DELETE1_SIGNAL(out_INSERT_STAT_LIST_VAL ,_param->_nb_inst_insert,1); 42 DELETE1_SIGNAL( in_INSERT_STAT_LIST_ACK ,_param->_nb_inst_insert,1); 43 44 DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_READ_RA ,_param->_nb_inst_insert,1); 45 DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RA_PHY ,_param->_nb_inst_insert,_param->_size_general_register ); 46 DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_READ_RB ,_param->_nb_inst_insert,1); 47 DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RB_PHY ,_param->_nb_inst_insert,_param->_size_general_register ); 48 DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_READ_RC ,_param->_nb_inst_insert,1); 49 DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RC_PHY ,_param->_nb_inst_insert,_param->_size_special_register ); 50 DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_WRITE_RD ,_param->_nb_inst_insert,1); 51 DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_LOG ,_param->_nb_inst_insert,_param->_size_general_register_logic); 52 DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_OLD,_param->_nb_inst_insert,_param->_size_general_register ); 53 DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_NEW,_param->_nb_inst_insert,_param->_size_general_register ); 54 DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_WRITE_RE ,_param->_nb_inst_insert,1); 55 DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_LOG ,_param->_nb_inst_insert,_param->_size_special_register_logic); 56 DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_OLD,_param->_nb_inst_insert,_param->_size_special_register ); 57 DELETE1_SIGNAL( in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert,_param->_size_special_register ); 58 59 DELETE1_SIGNAL(out_INSERT_STAT_LIST_READ_RA ,_param->_nb_inst_insert,1); 60 DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RA_PHY ,_param->_nb_inst_insert,_param->_size_general_register ); 61 DELETE1_SIGNAL(out_INSERT_STAT_LIST_READ_RB ,_param->_nb_inst_insert,1); 62 DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RB_PHY ,_param->_nb_inst_insert,_param->_size_general_register ); 63 DELETE1_SIGNAL(out_INSERT_STAT_LIST_READ_RC ,_param->_nb_inst_insert,1); 64 DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RC_PHY ,_param->_nb_inst_insert,_param->_size_special_register ); 65 DELETE1_SIGNAL(out_INSERT_STAT_LIST_WRITE_RD ,_param->_nb_inst_insert,1); 66 DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW ,_param->_nb_inst_insert,_param->_size_general_register ); 67 DELETE1_SIGNAL(out_INSERT_STAT_LIST_WRITE_RE ,_param->_nb_inst_insert,1); 68 DELETE1_SIGNAL(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW ,_param->_nb_inst_insert,_param->_size_special_register ); 69 70 DELETE1_SIGNAL(out_INSERT_RAT_WRITE_RD ,_param->_nb_inst_insert,1); 71 DELETE1_SIGNAL(out_INSERT_RAT_NUM_REG_RD_LOG ,_param->_nb_inst_insert,_param->_size_general_register_logic); 72 DELETE1_SIGNAL(out_INSERT_RAT_NUM_REG_RD_PHY_NEW ,_param->_nb_inst_insert,_param->_size_general_register ); 73 DELETE1_SIGNAL(out_INSERT_RAT_WRITE_RE ,_param->_nb_inst_insert,1); 74 DELETE1_SIGNAL(out_INSERT_RAT_NUM_REG_RE_LOG ,_param->_nb_inst_insert,_param->_size_special_register_logic); 75 DELETE1_SIGNAL(out_INSERT_RAT_NUM_REG_RE_PHY_NEW ,_param->_nb_inst_insert,_param->_size_special_register ); 76 77 DELETE1_SIGNAL(out_INSERT_READ_RA ,_param->_nb_inst_insert,1); 78 DELETE1_SIGNAL(out_INSERT_NUM_REG_RA_PHY ,_param->_nb_inst_insert,_param->_size_general_register ); 79 DELETE1_SIGNAL(out_INSERT_READ_RB ,_param->_nb_inst_insert,1); 80 DELETE1_SIGNAL(out_INSERT_NUM_REG_RB_PHY ,_param->_nb_inst_insert,_param->_size_general_register ); 81 DELETE1_SIGNAL(out_INSERT_READ_RC ,_param->_nb_inst_insert,1); 82 DELETE1_SIGNAL(out_INSERT_NUM_REG_RC_PHY ,_param->_nb_inst_insert,_param->_size_special_register ); 83 DELETE1_SIGNAL(out_INSERT_WRITE_RD ,_param->_nb_inst_insert,1); 84 DELETE1_SIGNAL(out_INSERT_NUM_REG_RD_LOG ,_param->_nb_inst_insert,_param->_size_general_register_logic); 85 DELETE1_SIGNAL(out_INSERT_NUM_REG_RD_PHY_OLD ,_param->_nb_inst_insert,_param->_size_general_register ); 86 DELETE1_SIGNAL(out_INSERT_NUM_REG_RD_PHY_NEW ,_param->_nb_inst_insert,_param->_size_general_register ); 87 DELETE1_SIGNAL(out_INSERT_WRITE_RE ,_param->_nb_inst_insert,1); 88 DELETE1_SIGNAL(out_INSERT_NUM_REG_RE_LOG ,_param->_nb_inst_insert,_param->_size_special_register_logic); 89 DELETE1_SIGNAL(out_INSERT_NUM_REG_RE_PHY_OLD ,_param->_nb_inst_insert,_param->_size_special_register ); 90 DELETE1_SIGNAL(out_INSERT_NUM_REG_RE_PHY_NEW ,_param->_nb_inst_insert,_param->_size_special_register ); 91 92 DELETE1_SIGNAL( in_RETIRE_VAL ,_param->_nb_inst_retire,1); 93 DELETE1_SIGNAL(out_RETIRE_ACK ,_param->_nb_inst_retire,1); 94 DELETE1_SIGNAL(out_RETIRE_RAT_VAL ,_param->_nb_inst_retire,1); 95 DELETE1_SIGNAL( in_RETIRE_RAT_ACK ,_param->_nb_inst_retire,1); 96 DELETE1_SIGNAL(out_RETIRE_STAT_LIST_VAL,_param->_nb_inst_retire,1); 97 DELETE1_SIGNAL( in_RETIRE_STAT_LIST_ACK,_param->_nb_inst_retire,1); 42 98 43 delete [] in_RETIRE_VAL ;44 delete [] out_RETIRE_ACK ;45 delete [] out_RETIRE_RAT_VAL ;46 delete [] in_RETIRE_RAT_ACK ;47 delete [] out_RETIRE_STAT_LIST_VAL ;48 delete [] in_RETIRE_STAT_LIST_ACK ;49 99 } 50 100 // ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_end_cycle.cpp
r81 r88 26 26 27 27 #ifdef STATISTICS 28 _stat->end_cycle(); 28 if (usage_is_set(_usage,USE_STATISTICS)) 29 _stat->end_cycle(); 29 30 #endif 30 31 … … 32 33 // Evaluation before read the ouput signal 33 34 // sc_start(0); 34 _interfaces->testbench(); 35 if (usage_is_set(_usage,USE_VHDL_TESTBENCH)) 36 _interfaces->testbench(); 35 37 #endif 36 38 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_insert.cpp
r81 r88 23 23 void Register_translation_unit_Glue::genMealy_insert (void) 24 24 { 25 log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin"); 25 log_begin(Register_translation_unit_Glue,FUNCTION); 26 log_function(Register_translation_unit_Glue,FUNCTION,_name.c_str()); 26 27 27 28 for (uint32_t i=0; i<_param->_nb_inst_insert; i++) 28 29 { 29 Tcontrol_t rename_val = PORT_READ(in_INSERT_RENAME_VAL [i]); 30 Tcontrol_t insert_ack = PORT_READ(in_INSERT_INSERT_ACK [i]); 31 Tcontrol_t rat_rename_ack = PORT_READ(in_INSERT_RAT_RENAME_ACK [i]); 32 Tcontrol_t rat_insert_ack = PORT_READ(in_INSERT_RAT_INSERT_ACK [i]); 33 Tcontrol_t free_list_ack = PORT_READ(in_INSERT_FREE_LIST_ACK [i]); 34 Tcontrol_t stat_list_ack = PORT_READ(in_INSERT_STAT_LIST_ACK [i]); 30 Tcontrol_t READ_RA = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_READ_RA [i]); 31 Tgeneral_address_t NUM_REG_RA_PHY = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RA_PHY [i]); 32 Tcontrol_t READ_RB = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_READ_RB [i]); 33 Tgeneral_address_t NUM_REG_RB_PHY = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RB_PHY [i]); 34 Tcontrol_t READ_RC = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_READ_RC [i]); 35 Tspecial_address_t NUM_REG_RC_PHY = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RC_PHY [i]); 36 Tcontrol_t WRITE_RD = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_WRITE_RD [i]); 37 Tgeneral_address_t NUM_REG_RD_LOG = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_LOG [i]); 38 Tgeneral_address_t NUM_REG_RD_PHY_OLD = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_OLD [i]); 39 Tgeneral_address_t NUM_REG_RD_PHY_NEW = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RD_PHY_NEW [i]); 40 Tcontrol_t WRITE_RE = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_WRITE_RE [i]); 41 Tspecial_address_t NUM_REG_RE_LOG = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_LOG [i]); 42 Tspecial_address_t NUM_REG_RE_PHY_OLD = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_OLD [i]); 43 Tspecial_address_t NUM_REG_RE_PHY_NEW = PORT_READ(in_INSERT_DEPENDENCY_CHECKING_NUM_REG_RE_PHY_NEW [i]); 35 44 36 PORT_WRITE(out_INSERT_RENAME_ACK [i], (insert_ack and 37 rat_rename_ack and 38 rat_insert_ack and 39 free_list_ack and 40 stat_list_ack )); 41 PORT_WRITE(out_INSERT_INSERT_VAL [i], (rename_val and 42 rat_rename_ack and 43 rat_insert_ack and 44 free_list_ack and 45 stat_list_ack )); 46 PORT_WRITE(out_INSERT_RAT_INSERT_VAL [i], (rename_val and 47 insert_ack and 48 rat_rename_ack and 49 free_list_ack and 50 stat_list_ack )); 51 PORT_WRITE(out_INSERT_FREE_LIST_VAL [i], (rename_val and 52 insert_ack and 53 rat_rename_ack and 54 rat_insert_ack and 55 stat_list_ack )); 56 PORT_WRITE(out_INSERT_STAT_LIST_VAL [i], (rename_val and 57 insert_ack and 58 rat_rename_ack and 59 rat_insert_ack and 60 free_list_ack )); 45 PORT_WRITE(out_INSERT_STAT_LIST_READ_RA [i], READ_RA ); 46 PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RA_PHY [i], NUM_REG_RA_PHY ); 47 PORT_WRITE(out_INSERT_STAT_LIST_READ_RB [i], READ_RB ); 48 PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RB_PHY [i], NUM_REG_RB_PHY ); 49 PORT_WRITE(out_INSERT_STAT_LIST_READ_RC [i], READ_RC ); 50 PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RC_PHY [i], NUM_REG_RC_PHY ); 51 PORT_WRITE(out_INSERT_STAT_LIST_WRITE_RD [i], WRITE_RD ); 52 PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RD_PHY_NEW [i], NUM_REG_RD_PHY_NEW); 53 PORT_WRITE(out_INSERT_STAT_LIST_WRITE_RE [i], WRITE_RE ); 54 PORT_WRITE(out_INSERT_STAT_LIST_NUM_REG_RE_PHY_NEW [i], NUM_REG_RE_PHY_NEW); 55 56 PORT_WRITE(out_INSERT_RAT_WRITE_RD [i], WRITE_RD ); 57 PORT_WRITE(out_INSERT_RAT_NUM_REG_RD_LOG [i], NUM_REG_RD_LOG ); 58 PORT_WRITE(out_INSERT_RAT_NUM_REG_RD_PHY_NEW [i], NUM_REG_RD_PHY_NEW); 59 PORT_WRITE(out_INSERT_RAT_WRITE_RE [i], WRITE_RE ); 60 PORT_WRITE(out_INSERT_RAT_NUM_REG_RE_LOG [i], NUM_REG_RE_LOG ); 61 PORT_WRITE(out_INSERT_RAT_NUM_REG_RE_PHY_NEW [i], NUM_REG_RE_PHY_NEW); 62 63 PORT_WRITE(out_INSERT_READ_RA [i], READ_RA ); 64 PORT_WRITE(out_INSERT_NUM_REG_RA_PHY [i], NUM_REG_RA_PHY ); 65 PORT_WRITE(out_INSERT_READ_RB [i], READ_RB ); 66 PORT_WRITE(out_INSERT_NUM_REG_RB_PHY [i], NUM_REG_RB_PHY ); 67 PORT_WRITE(out_INSERT_READ_RC [i], READ_RC ); 68 PORT_WRITE(out_INSERT_NUM_REG_RC_PHY [i], NUM_REG_RC_PHY ); 69 PORT_WRITE(out_INSERT_WRITE_RD [i], WRITE_RD ); 70 PORT_WRITE(out_INSERT_NUM_REG_RD_LOG [i], NUM_REG_RD_LOG ); 71 PORT_WRITE(out_INSERT_NUM_REG_RD_PHY_OLD [i], NUM_REG_RD_PHY_OLD); 72 PORT_WRITE(out_INSERT_NUM_REG_RD_PHY_NEW [i], NUM_REG_RD_PHY_NEW); 73 PORT_WRITE(out_INSERT_WRITE_RE [i], WRITE_RE ); 74 PORT_WRITE(out_INSERT_NUM_REG_RE_LOG [i], NUM_REG_RE_LOG ); 75 PORT_WRITE(out_INSERT_NUM_REG_RE_PHY_OLD [i], NUM_REG_RE_PHY_OLD); 76 PORT_WRITE(out_INSERT_NUM_REG_RE_PHY_NEW [i], NUM_REG_RE_PHY_NEW); 61 77 } 62 78 63 log_ printf(FUNC,Register_translation_unit_Glue,FUNCTION,"End");79 log_end(Register_translation_unit_Glue,FUNCTION); 64 80 }; 65 81 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Register_translation_unit_Glue/src/Register_translation_unit_Glue_genMealy_retire.cpp
r81 r88 23 23 void Register_translation_unit_Glue::genMealy_retire (void) 24 24 { 25 log_printf(FUNC,Register_translation_unit_Glue,FUNCTION,"Begin"); 25 log_begin(Register_translation_unit_Glue,FUNCTION); 26 log_function(Register_translation_unit_Glue,FUNCTION,_name.c_str()); 26 27 27 28 for (uint32_t i=0; i<_param->_nb_inst_retire; i++) … … 36 37 } 37 38 38 log_ printf(FUNC,Register_translation_unit_Glue,FUNCTION,"End");39 log_end(Register_translation_unit_Glue,FUNCTION); 39 40 }; 40 41
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