Changeset 88 for trunk/IPs/systemC/processor/Morpheo/Behavioural/include
- Timestamp:
- Dec 10, 2008, 7:31:39 PM (16 years ago)
- Location:
- trunk/IPs/systemC/processor/Morpheo/Behavioural/include
- Files:
-
- 12 added
- 1 deleted
- 18 edited
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AbstractXMLLight.h (added)
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Allocation.h (modified) (5 diffs)
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ClassicReferenceCounter.h (added)
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Configuration_Parameters.h (deleted)
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Constants.h (modified) (13 diffs)
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Debug_component.h (modified) (1 diff)
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Environment.h (modified) (1 diff)
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FileXMLLight.h (added)
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IReferenceCounters.h (added)
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IXMLLight.h (added)
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Interface.h (modified) (8 diffs)
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Interface_fifo.h (modified) (3 diffs)
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Interfaces.h (modified) (1 diff)
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Operation.h (added)
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Parameters.h (modified) (4 diffs)
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Parameters_test.h (added)
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SPR.h (added)
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SPR_access_mode.h (modified) (3 diffs)
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Selftest.h (added)
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Signal.h (modified) (11 diffs)
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Simulation.h (added)
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Stat.h (modified) (1 diff)
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Stat_binary_tree.h (modified) (2 diffs)
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Types.h (modified) (5 diffs)
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Usage.h (modified) (1 diff)
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Version.h (modified) (2 diffs)
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Version.h.sed (modified) (2 diffs)
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Vhdl.h (modified) (2 diffs)
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XML.h (modified) (1 diff)
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XMLLightFunctors.h (added)
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XMLLightVector.h (added)
Legend:
- Unmodified
- Added
- Removed
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trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Allocation.h
r82 r88 11 11 #include "Common/include/Debug.h" 12 12 13 // ====================================================================== 14 // =====[ ALLOCATION / DELETE of ARRAY ]================================= 15 // ====================================================================== 16 17 #define ALLOC1(var,type,s1) \ 18 var = new type [s1] 19 20 #define ALLOC2(var,type,s1,s2) \ 21 var = new type * [s1]; \ 22 for (uint32_t it1=0; it1<s1; ++it1) \ 23 { \ 24 var [it1] = new type [s2]; \ 25 } 26 27 #define ALLOC3(var,type,s1,s2,s3) \ 28 var = new type ** [s1]; \ 29 for (uint32_t it1=0; it1<s1; ++it1) \ 30 { \ 31 var [it1] = new type * [s2]; \ 32 for (uint32_t it2=0; it2<s2; ++it2) \ 33 { \ 34 var [it1][it2] = new type [s3]; \ 35 } \ 36 } 37 38 #define ALLOC4(var,type,s1,s2,s3,s4) \ 39 var = new type *** [s1]; \ 40 for (uint32_t it1=0; it1<s1; ++it1) \ 41 { \ 42 var [it1] = new type ** [s2]; \ 43 for (uint32_t it2=0; it2<s2; ++it2) \ 44 { \ 45 var [it1][it2] = new type * [s3]; \ 46 for (uint32_t it3=0; it3<s3; ++it3) \ 47 { \ 48 var [it1][it2][it3] = new type [s4]; \ 49 } \ 50 } \ 51 } 52 53 #define DELETE1(var,s1) \ 54 delete [] var; 55 56 #define DELETE2(var,s1,s2) \ 57 for (uint32_t it1=0; it1<s1; ++it1) \ 58 { \ 59 delete [] var [it1]; \ 60 } \ 61 delete [] var; 62 63 #define DELETE3(var,s1,s2,s3) \ 64 for (uint32_t it1=0; it1<s1; ++it1) \ 65 { \ 66 for (uint32_t it2=0; it2<s2; ++it2) \ 67 { \ 68 delete [] var [it1][it2]; \ 69 } \ 70 delete [] var [it1]; \ 71 } \ 72 delete [] var; 73 74 #define DELETE4(var,s1,s2,s3,s4) \ 75 for (uint32_t it1=0; it1<s1; ++it1) \ 76 { \ 77 for (uint32_t it2=0; it2<s2; ++it2) \ 78 { \ 79 for (uint32_t it3=0; it3<s3; ++it3) \ 80 { \ 81 delete [] var [it1][it2][it3]; \ 82 } \ 83 delete [] var [it1][it2]; \ 84 } \ 85 delete [] var [it1]; \ 86 } \ 87 delete [] var; 88 89 // ====================================================================== 90 // =====[ ALLOCATION / DELETE of SIGNAL]================================= 91 // ====================================================================== 92 13 93 // Help to allocate interface 14 #define INTERFACE_PRINT(name) log_printf(TRACE,true,"allocation","Interface's creation : %s (%s, %d)",name,__FILE__,__LINE__); 94 #define INTERFACE_PRINT(name) log_printf(TRACE,Allocation,FUNCTION,"<%s> : Interface's creation : %s (%s, %d)",_name.c_str(),name,__FILE__,__LINE__); 95 #define PRINT_SIGNAL_ADDRESS(name,address) log_printf(TRACE,Allocation,FUNCTION,"Signal : %s 0x%.8x(%s, %d)",name,(uint32_t)((uint64_t)(address)),__FILE__,__LINE__); 96 #define PRINT_SIZE_NUL(component,interface,signal) log_printf(TRACE,Allocation,FUNCTION,_("<%s> %s.%s.%s : size is nul."),_name.c_str(),component->get_name().c_str(),interface->get_name().c_str(),signal); 97 #define TEST_SIGNAL(name,address) PRINT_SIGNAL_ADDRESS(name,address); TEST_PTR(address) 15 98 16 99 // ---------------------------------------------------------------------- … … 18 101 // ---------------------------------------------------------------------- 19 102 20 #define __ALLOC_SIGNAL(sig, name, type) 21 { 22 sig = new type (name); 103 #define __ALLOC_SIGNAL(sig, name, type) \ 104 { \ 105 sig = new type (name); \ 23 106 } 24 107 25 108 #ifdef POSITION 26 #define ALLOC_INTERFACE( name, direction, localisation, str) 27 INTERFACE_PRINT(name); 28 Interface_fifo * interface = _interfaces->set_interface( name, direction, localisation, str);109 #define ALLOC_INTERFACE( name, direction, localisation, str) \ 110 INTERFACE_PRINT(name); \ 111 morpheo::behavioural::Interface_fifo * interface = _interfaces->set_interface( name, direction, localisation, str); 29 112 #else 30 #define ALLOC_INTERFACE( name, direction, localisation, str) 31 INTERFACE_PRINT(name); 32 Interface_fifo * interface = _interfaces->set_interface( name);113 #define ALLOC_INTERFACE( name, direction, localisation, str) \ 114 INTERFACE_PRINT(name); \ 115 morpheo::behavioural::Interface_fifo * interface = _interfaces->set_interface( name); 33 116 #endif 34 117 35 #define ALLOC_VAL_ACK_IN( sig, name, type) 36 { 37 sig = interface->set_signal_valack_in (name, type); 38 } 39 #define ALLOC_VAL_ACK_OUT( sig, name, type) 40 { 41 sig = interface->set_signal_valack_out(name, type); 42 } 43 #define ALLOC_VALACK_IN( sig, type) 44 { 45 sig = interface->set_signal_valack_in (type); 46 } 47 #define ALLOC_VALACK_OUT( sig, type) 48 { 49 sig = interface->set_signal_valack_out(type); 50 } 51 #define ALLOC_SIGNAL_IN( sig, name, type, size) 52 if (size > 0) 53 { 54 sig = interface->set_signal_in <type> (name, size); 55 } 56 else 57 { 58 log_printf(INFO,true,FUNCTION,_("%s %s.%s.%s : size is nul."),MSG_INFORMATION,_component->get_name().c_str(),interface->get_name().c_str(),name);\118 #define ALLOC_VAL_ACK_IN( sig, name, type) \ 119 { \ 120 sig = interface->set_signal_valack_in (name, type); \ 121 } 122 #define ALLOC_VAL_ACK_OUT( sig, name, type) \ 123 { \ 124 sig = interface->set_signal_valack_out(name, type); \ 125 } 126 #define ALLOC_VALACK_IN( sig, type) \ 127 { \ 128 sig = interface->set_signal_valack_in (type); \ 129 } 130 #define ALLOC_VALACK_OUT( sig, type) \ 131 { \ 132 sig = interface->set_signal_valack_out(type); \ 133 } 134 #define ALLOC_SIGNAL_IN( sig, name, type, size) \ 135 if (size > 0) \ 136 { \ 137 sig = interface->set_signal_in <type> (name, size); \ 138 } \ 139 else \ 140 { \ 141 PRINT_SIZE_NUL(_component,interface,name); \ 59 142 } 60 143 61 #define ALLOC_SIGNAL_OUT( sig, name, type, size) 62 if (size > 0) 63 { 64 sig = interface->set_signal_out<type> (name, size); 65 } 66 else 67 { 68 log_printf(INFO,true,FUNCTION,_("%s %s.%s.%s : size is nul."),MSG_INFORMATION,_component->get_name().c_str(),interface->get_name().c_str(),name); \144 #define ALLOC_SIGNAL_OUT( sig, name, type, size) \ 145 if (size > 0) \ 146 { \ 147 sig = interface->set_signal_out<type> (name, size); \ 148 } \ 149 else \ 150 { \ 151 PRINT_SIZE_NUL(_component,interface,name); \ 69 152 } 70 153 71 #define DELETE_SIGNAL( sig, size) 72 if (size > 0) 73 { 74 delete sig; 154 #define DELETE_SIGNAL( sig, size) \ 155 if (size > 0) \ 156 { \ 157 delete sig; \ 75 158 } 76 159 77 #define ALLOC_SC_SIGNAL( sig, name, type) \ 78 sc_signal<type> * sig = new sc_signal<type> (name); 79 80 #define INSTANCE_SC_SIGNAL(component, sig) \ 81 { \ 82 TEST_PTR(component->sig); \ 83 TEST_PTR(sig); \ 84 (*(component->sig)) (*(sig)); \ 85 } 86 87 #define DELETE_SC_SIGNAL( sig) \ 88 { \ 89 delete sig; \ 90 } 160 #define ALLOC_SC_SIGNAL( sig, name, type) \ 161 sc_signal<type> * sig = new sc_signal<type> (name); \ 162 PRINT_SIGNAL_ADDRESS(name,sig); 163 164 #define INSTANCE_SC_SIGNAL(component, sig) \ 165 { \ 166 TEST_SIGNAL(component->sig->name(),component->sig); \ 167 TEST_SIGNAL(sig ->name(),sig); \ 168 (*(component->sig)) (*(sig)); \ 169 } 170 171 #define _INSTANCE_SC_SIGNAL(component, sig1,sig2) \ 172 { \ 173 TEST_SIGNAL(component->sig1->name(),component->sig1); \ 174 TEST_SIGNAL(sig2 ->name(),sig2); \ 175 (*(component->sig1)) (*(sig2)); \ 176 } 177 178 #define DELETE_SC_SIGNAL( sig) \ 179 { \ 180 delete sig; \ 181 } 182 183 184 #define __ALLOC0_SIGNAL(sig, name, type) __ALLOC_SIGNAL(sig, name, type) 185 186 #define ALLOC0_INTERFACE( name, direction, localisation, str) ALLOC_INTERFACE( name, direction, localisation, str) 187 188 #define ALLOC0_VAL_ACK_IN( sig, name, type) ALLOC_VAL_ACK_IN( sig, name, type) 189 #define ALLOC0_VAL_ACK_OUT( sig, name, type) ALLOC_VAL_ACK_OUT( sig, name, type) 190 #define ALLOC0_VALACK_IN( sig, type) ALLOC_VALACK_IN( sig, type) 191 #define ALLOC0_VALACK_OUT( sig, type) ALLOC_VALACK_OUT( sig, type) 192 #define ALLOC0_SIGNAL_IN( sig, name, type, size) ALLOC_SIGNAL_IN( sig, name, type, size) 193 #define ALLOC0_SIGNAL_OUT( sig, name, type, size) ALLOC_SIGNAL_OUT( sig, name, type, size) 194 #define DELETE0_SIGNAL( sig, size) DELETE_SIGNAL( sig, size) 195 196 #define ALLOC0_SC_SIGNAL( sig, name, type) ALLOC_SC_SIGNAL( sig, name, type) 197 #define INSTANCE0_SC_SIGNAL(component, sig) INSTANCE_SC_SIGNAL(component, sig) 198 #define _INSTANCE0_SC_SIGNAL(component, sig) _INSTANCE_SC_SIGNAL(component, sig) 199 #define DELETE0_SC_SIGNAL( sig) DELETE_SC_SIGNAL( sig) 91 200 92 201 // ---------------------------------------------------------------------- … … 94 203 // ---------------------------------------------------------------------- 95 204 96 #define __ALLOC1_INTERFACE(name, it1)\97 INTERFACE_PRINT(name); 98 const std::string interface_name = name; 99 const uint32_t iterator_1 = it1;100 101 #define __ALLOC1_SIGNAL_IN( sig, name, type) 102 { 103 sig = new SC_IN(type) * [iterator_1]; 104 std::string separator="_"; 105 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<iterator_1; alloc_signal_it1++)\106 { 107 std::string str = "in_"+interface_name+separator+toString(alloc_signal_it1)+separator+name; \108 sig [alloc_signal_it1] = new SC_IN(type) (str.c_str());\109 } 110 } 111 112 #define __ALLOC1_SIGNAL_OUT( sig, name, type) 113 { 114 sig = new SC_OUT(type) * [iterator_1]; 115 std::string separator="_"; 116 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<iterator_1; alloc_signal_it1++)\117 { 118 std::string str = "out_"+interface_name+separator+toString(alloc_signal_it1)+separator+name; \119 sig [alloc_signal_it1] = new SC_OUT(type) (str.c_str());\120 } 205 #define __ALLOC1_INTERFACE(name, x1) \ 206 INTERFACE_PRINT(name); \ 207 const std::string interface_name = name; \ 208 const uint32_t iterator_1 = x1; 209 210 #define __ALLOC1_SIGNAL_IN( sig, name, type) \ 211 { \ 212 sig = new SC_IN(type) * [iterator_1]; \ 213 std::string separator="_"; \ 214 for (uint32_t it1=0; it1<iterator_1; it1++) \ 215 { \ 216 std::string str = "in_"+interface_name+separator+toString(it1)+separator+name; \ 217 sig [it1] = new SC_IN(type) (str.c_str()); \ 218 } \ 219 } 220 221 #define __ALLOC1_SIGNAL_OUT( sig, name, type) \ 222 { \ 223 sig = new SC_OUT(type) * [iterator_1]; \ 224 std::string separator="_"; \ 225 for (uint32_t it1=0; it1<iterator_1; it1++) \ 226 { \ 227 std::string str = "out_"+interface_name+separator+toString(it1)+separator+name; \ 228 sig [it1] = new SC_OUT(type) (str.c_str()); \ 229 } \ 121 230 } 122 231 123 232 #ifdef POSITION 124 #define ALLOC1_INTERFACE( name, direction, localisation, str, it1)\125 INTERFACE_PRINT(name); 126 const uint32_t iterator_1 = it1;\127 Interface_fifo * interface [iterator_1];\128 { 129 std::string separator="_"; 130 for (uint32_t alloc_interface_it1=0; alloc_interface_it1<iterator_1; alloc_interface_it1++)\131 { 132 interface [alloc_interface_it1] = _interfaces->set_interface( name+separator+toString(alloc_interface_it1), direction, localisation, str); \133 } 233 #define ALLOC1_INTERFACE( name, direction, localisation, str, x1) \ 234 INTERFACE_PRINT(name); \ 235 const uint32_t iterator_1 = x1; \ 236 morpheo::behavioural::Interface_fifo * interface [iterator_1]; \ 237 { \ 238 std::string separator="_"; \ 239 for (uint32_t it1=0; it1<iterator_1; it1++) \ 240 { \ 241 interface [it1] = _interfaces->set_interface( name+separator+toString(it1), direction, localisation, str); \ 242 } \ 134 243 } 135 244 #else 136 #define ALLOC1_INTERFACE( name, direction, localisation, str, it1)\137 INTERFACE_PRINT(name); 138 const uint32_t iterator_1 = it1;\139 Interface_fifo * interface [iterator_1];\140 { 141 std::string separator="_"; 142 for (uint32_t alloc_interface_it1=0; alloc_interface_it1<iterator_1; alloc_interface_it1++)\143 { 144 interface [alloc_interface_it1] = _interfaces->set_interface( name+separator+toString(alloc_interface_it1)); \145 } 245 #define ALLOC1_INTERFACE( name, direction, localisation, str, x1) \ 246 INTERFACE_PRINT(name); \ 247 const uint32_t iterator_1 = x1; \ 248 morpheo::behavioural::Interface_fifo * interface [iterator_1]; \ 249 { \ 250 std::string separator="_"; \ 251 for (uint32_t it1=0; it1<iterator_1; it1++) \ 252 { \ 253 interface [it1] = _interfaces->set_interface( name+separator+toString(it1)); \ 254 } \ 146 255 } 147 256 #endif 148 257 149 #define ALLOC1_VAL_ACK_IN( sig, name, type) \ 150 { \ 151 sig = new SC_IN (Tcontrol_t) * [iterator_1]; \ 152 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<iterator_1; alloc_signal_it1++) \ 153 { \ 154 sig [alloc_signal_it1] = interface[alloc_signal_it1]->set_signal_valack_in (name, type); \ 155 } \ 156 } 157 #define ALLOC1_VAL_ACK_OUT(sig, name, type) \ 158 { \ 159 sig = new SC_OUT(Tcontrol_t) * [iterator_1]; \ 160 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<iterator_1; alloc_signal_it1++) \ 161 { \ 162 sig [alloc_signal_it1] = interface[alloc_signal_it1]->set_signal_valack_out(name, type); \ 163 } \ 164 } 165 #define ALLOC1_VALACK_IN( sig, type) \ 166 { \ 167 sig = new SC_IN (Tcontrol_t) * [iterator_1]; \ 168 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<iterator_1; alloc_signal_it1++) \ 169 { \ 170 sig [alloc_signal_it1] = interface[alloc_signal_it1]->set_signal_valack_in (type); \ 171 } \ 172 } 173 #define ALLOC1_VALACK_OUT( sig, type) \ 174 { \ 175 sig = new SC_OUT(Tcontrol_t) * [iterator_1]; \ 176 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<iterator_1; alloc_signal_it1++) \ 177 { \ 178 sig [alloc_signal_it1] = interface[alloc_signal_it1]->set_signal_valack_out(type); \ 179 } \ 180 } 181 #define ALLOC1_SIGNAL_IN( sig, name, type, size) \ 182 { \ 183 sig = new SC_IN (type) * [iterator_1]; \ 184 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<iterator_1; alloc_signal_it1++) \ 185 { \ 186 if (size > 0) \ 187 { \ 188 sig [alloc_signal_it1] = interface[alloc_signal_it1]->set_signal_in <type> (name, size); \ 189 } \ 190 else \ 191 { \ 192 log_printf(INFO,true,FUNCTION,_("%s %s.%s.%s : size is nul."),MSG_INFORMATION,_component->get_name().c_str(),interface[alloc_signal_it1]->get_name().c_str(),name); \ 193 } \ 194 } \ 195 } 196 197 #define ALLOC1_SIGNAL_OUT(sig, name, type, size) \ 198 { \ 199 sig = new SC_OUT(type) * [iterator_1]; \ 200 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<iterator_1; alloc_signal_it1++) \ 201 { \ 202 if (size > 0) \ 203 { \ 204 sig [alloc_signal_it1] = interface[alloc_signal_it1]->set_signal_out<type> (name, size); \ 205 } \ 206 else \ 207 { \ 208 log_printf(INFO,true,FUNCTION,_("%s %s.%s.%s : size is nul."),MSG_INFORMATION,_component->get_name().c_str(),interface[alloc_signal_it1]->get_name().c_str(),name); \ 209 } \ 210 } \ 211 } 212 213 #define DELETE1_SIGNAL(sig, it1, size) \ 214 { \ 215 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<it1; alloc_signal_it1++) \ 216 { \ 217 if (size > 0) \ 218 { \ 219 delete sig[alloc_signal_it1]; \ 220 } \ 221 } \ 222 delete [] sig; \ 223 } 224 225 #define ALLOC1_SC_SIGNAL( sig, name, type, it1) \ 226 sc_signal<type> ** sig = new sc_signal<type> * [it1]; \ 227 { \ 228 std::string separator="_"; \ 229 std::string str; \ 230 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<it1; alloc_signal_it1++) \ 231 { \ 232 str = name+separator+toString(alloc_signal_it1); \ 233 sig [alloc_signal_it1] = new sc_signal<type> (str.c_str()); \ 234 } \ 235 } 236 237 #define INSTANCE1_SC_SIGNAL(component, sig, it1) \ 238 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<it1; alloc_signal_it1++) \ 239 { \ 240 TEST_PTR(component->sig [alloc_signal_it1]); \ 241 TEST_PTR(sig [alloc_signal_it1]); \ 242 (*(component->sig[alloc_signal_it1])) (*(sig[alloc_signal_it1])); \ 258 #define ALLOC1_VAL_ACK_IN( sig, name, type) \ 259 { \ 260 sig = new SC_IN (Tcontrol_t) * [iterator_1]; \ 261 for (uint32_t it1=0; it1<iterator_1; it1++) \ 262 { \ 263 sig [it1] = interface[it1]->set_signal_valack_in (name, type); \ 264 } \ 265 } 266 #define ALLOC1_VAL_ACK_OUT(sig, name, type) \ 267 { \ 268 sig = new SC_OUT(Tcontrol_t) * [iterator_1]; \ 269 for (uint32_t it1=0; it1<iterator_1; it1++) \ 270 { \ 271 sig [it1] = interface[it1]->set_signal_valack_out(name, type); \ 272 } \ 273 } 274 #define ALLOC1_VALACK_IN( sig, type) \ 275 { \ 276 sig = new SC_IN (Tcontrol_t) * [iterator_1]; \ 277 for (uint32_t it1=0; it1<iterator_1; it1++) \ 278 { \ 279 sig [it1] = interface[it1]->set_signal_valack_in (type); \ 280 } \ 281 } 282 #define ALLOC1_VALACK_OUT( sig, type) \ 283 { \ 284 sig = new SC_OUT(Tcontrol_t) * [iterator_1]; \ 285 for (uint32_t it1=0; it1<iterator_1; it1++) \ 286 { \ 287 sig [it1] = interface[it1]->set_signal_valack_out(type); \ 288 } \ 289 } 290 #define ALLOC1_SIGNAL_IN( sig, name, type, size) \ 291 { \ 292 sig = new SC_IN (type) * [iterator_1]; \ 293 for (uint32_t it1=0; it1<iterator_1; it1++) \ 294 { \ 295 if (size > 0) \ 296 { \ 297 sig [it1] = interface[it1]->set_signal_in <type> (name, size); \ 298 } \ 299 else \ 300 { \ 301 PRINT_SIZE_NUL(_component,interface[it1],name); \ 302 } \ 303 } \ 304 } 305 306 #define ALLOC1_SIGNAL_OUT(sig, name, type, size) \ 307 { \ 308 sig = new SC_OUT(type) * [iterator_1]; \ 309 for (uint32_t it1=0; it1<iterator_1; it1++) \ 310 { \ 311 if (size > 0) \ 312 { \ 313 sig [it1] = interface[it1]->set_signal_out<type> (name, size); \ 314 } \ 315 else \ 316 { \ 317 PRINT_SIZE_NUL(_component,interface[it1],name); \ 318 } \ 319 } \ 320 } 321 322 #define DELETE1_SIGNAL(sig, x1, size) \ 323 { \ 324 for (uint32_t it1=0; it1<x1; it1++) \ 325 { \ 326 if (size > 0) \ 327 { \ 328 delete sig[it1]; \ 329 } \ 330 } \ 331 delete [] sig; \ 332 } 333 334 #define ALLOC1_SC_SIGNAL( sig, name, type, x1) \ 335 sc_signal<type> ** sig = new sc_signal<type> * [x1]; \ 336 { \ 337 std::string separator="_"; \ 338 std::string str; \ 339 for (uint32_t it1=0; it1<x1; it1++) \ 340 { \ 341 str = name+separator+toString(it1); \ 342 sig [it1] = new sc_signal<type> (str.c_str()); \ 343 PRINT_SIGNAL_ADDRESS(str.c_str(),sig[it1]); \ 344 } \ 345 } 346 347 #define INSTANCE1_SC_SIGNAL(component, sig, x1) \ 348 for (uint32_t it1=0; it1<x1; it1++) \ 349 { \ 350 TEST_SIGNAL(component->sig [it1]->name(),component->sig [it1]); \ 351 TEST_SIGNAL(sig [it1]->name(),sig [it1]); \ 352 (*(component->sig[it1])) (*(sig[it1])); \ 243 353 } 244 354 245 #define DELETE1_SC_SIGNAL(sig, it1) \ 246 { \ 247 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<it1; alloc_signal_it1++) \ 248 { \ 249 delete sig[alloc_signal_it1]; \ 250 } \ 251 delete [] sig; \ 355 #define _INSTANCE1_SC_SIGNAL(component, sig1, sig2, x1) \ 356 for (uint32_t it1=0; it1<x1; it1++) \ 357 { \ 358 TEST_SIGNAL(component->sig1 [it1]->name(),component->sig1 [it1]); \ 359 TEST_SIGNAL(sig2 [it1]->name(),sig2 [it1]); \ 360 (*(component->sig1[it1])) (*(sig2[it1])); \ 361 } 362 363 #define DELETE1_SC_SIGNAL(sig, x1) \ 364 { \ 365 for (uint32_t it1=0; it1<x1; it1++) \ 366 { \ 367 delete sig[it1]; \ 368 } \ 369 delete [] sig; \ 252 370 } 253 371 … … 257 375 258 376 #ifdef POSITION 259 #define ALLOC2_INTERFACE( name, direction, localisation, str, it1, it2)\260 INTERFACE_PRINT(name); 261 uint32_t iterator_1 = 0; 262 uint32_t iterator_2 = 0; 263 Interface_fifo *** interface;\264 { 265 std::string separator="_"; 266 iterator_1 = it1;\267 interface = new Interface_fifo ** [iterator_1];\268 for (uint32_t alloc_interface_it1=0; alloc_interface_it1<iterator_1; alloc_interface_it1++)\269 { 270 iterator_2 = it2;\271 interface [alloc_interface_it1] = newInterface_fifo * [iterator_2]; \272 for (uint32_t alloc_interface_it2=0; alloc_interface_it2<iterator_2; alloc_interface_it2++)\273 {\274 interface [alloc_interface_it1][alloc_interface_it2] = _interfaces->set_interface( name+separator+toString(alloc_interface_it1)+separator+toString(alloc_interface_it2), direction, localisation, str); \275 }\276 } 377 #define ALLOC2_INTERFACE( name, direction, localisation, str, x1, x2) \ 378 INTERFACE_PRINT(name); \ 379 uint32_t iterator_1 = 0; \ 380 uint32_t iterator_2 = 0; \ 381 morpheo::behavioural::Interface_fifo *** interface; \ 382 { \ 383 std::string separator="_"; \ 384 iterator_1 = x1; \ 385 interface = new morpheo::behavioural::Interface_fifo ** [iterator_1]; \ 386 for (uint32_t it1=0; it1<iterator_1; it1++) \ 387 { \ 388 iterator_2 = x2; \ 389 interface [it1] = new morpheo::behavioural::Interface_fifo * [iterator_2]; \ 390 for (uint32_t it2=0; it2<iterator_2; it2++) \ 391 { \ 392 interface [it1][it2] = _interfaces->set_interface( name+separator+toString(it1)+separator+toString(it2), direction, localisation, str); \ 393 } \ 394 } \ 277 395 } 278 396 #else 279 #define ALLOC2_INTERFACE( name, direction, localisation, str, it1, it2)\280 INTERFACE_PRINT(name); 281 uint32_t iterator_1 = 0; 282 uint32_t iterator_2 = 0; 283 Interface_fifo *** interface;\284 { 285 std::string separator="_"; 286 iterator_1 = it1;\287 interface = new Interface_fifo ** [iterator_1];\288 for (uint32_t alloc_interface_it1=0; alloc_interface_it1<iterator_1; alloc_interface_it1++)\289 { 290 iterator_2 = it2;\291 interface [alloc_interface_it1] = newInterface_fifo * [iterator_2]; \292 for (uint32_t alloc_interface_it2=0; alloc_interface_it2<iterator_2; alloc_interface_it2++)\293 {\294 interface [alloc_interface_it1][alloc_interface_it2] = _interfaces->set_interface( name+separator+toString(alloc_interface_it1)+separator+toString(alloc_interface_it2)); \295 }\296 } 397 #define ALLOC2_INTERFACE( name, direction, localisation, str, x1, x2) \ 398 INTERFACE_PRINT(name); \ 399 uint32_t iterator_1 = 0; \ 400 uint32_t iterator_2 = 0; \ 401 morpheo::behavioural::Interface_fifo *** interface; \ 402 { \ 403 std::string separator="_"; \ 404 iterator_1 = x1; \ 405 interface = new morpheo::behavioural::Interface_fifo ** [iterator_1]; \ 406 for (uint32_t it1=0; it1<iterator_1; it1++) \ 407 { \ 408 iterator_2 = x2; \ 409 interface [it1] = new morpheo::behavioural::Interface_fifo * [iterator_2]; \ 410 for (uint32_t it2=0; it2<iterator_2; it2++) \ 411 { \ 412 interface [it1][it2] = _interfaces->set_interface( name+separator+toString(it1)+separator+toString(it2)); \ 413 } \ 414 } \ 297 415 } 298 416 #endif 299 417 300 #define _ALLOC2_VAL_ACK_IN( sig, name, type, it1, it2)\301 { 302 sig = new SC_IN (Tcontrol_t) ** [ it1];\303 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<it1; alloc_signal_it1++)\304 { 305 sig [alloc_signal_it1] = new SC_IN (Tcontrol_t) * [it2];\306 for (uint32_t alloc_signal_it2=0; alloc_signal_it2<it2; alloc_signal_it2++)\307 {\308 sig [alloc_signal_it1][alloc_signal_it2] = interface[alloc_signal_it1][alloc_signal_it2]->set_signal_valack_in (name, type); \309 }\310 } 311 } 312 313 #define _ALLOC2_VAL_ACK_OUT( sig, name, type, it1, it2)\314 { 315 sig = new SC_OUT (Tcontrol_t) ** [ it1];\316 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<it1; alloc_signal_it1++)\317 { 318 sig [alloc_signal_it1] = new SC_OUT (Tcontrol_t) * [it2];\319 for (uint32_t alloc_signal_it2=0; alloc_signal_it2<it2; alloc_signal_it2++)\320 {\321 sig [alloc_signal_it1][alloc_signal_it2] = interface[alloc_signal_it1][alloc_signal_it2]->set_signal_valack_out (name, type); \322 }\323 } 324 } 325 326 #define _ALLOC2_VALACK_IN( sig,type, it1, it2)\327 { 328 sig = new SC_IN (Tcontrol_t) ** [ it1];\329 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<it1; alloc_signal_it1++)\330 { 331 sig [alloc_signal_it1] = new SC_IN (Tcontrol_t) * [it2];\332 for (uint32_t alloc_signal_it2=0; alloc_signal_it2<it2; alloc_signal_it2++)\333 {\334 sig [alloc_signal_it1][alloc_signal_it2] = interface[alloc_signal_it1][alloc_signal_it2]->set_signal_valack_in (type); \335 }\336 } 337 } 338 339 #define _ALLOC2_VALACK_OUT( sig,type, it1, it2)\340 { 341 sig = new SC_OUT (Tcontrol_t) ** [ it1];\342 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<it1; alloc_signal_it1++)\343 { 344 sig [alloc_signal_it1] = new SC_OUT (Tcontrol_t) * [it2];\345 for (uint32_t alloc_signal_it2=0; alloc_signal_it2<it2; alloc_signal_it2++)\346 {\347 sig [alloc_signal_it1][alloc_signal_it2] = interface[alloc_signal_it1][alloc_signal_it2]->set_signal_valack_out (type); \348 }\349 } 350 } 351 352 #define _ALLOC2_SIGNAL_IN( sig, name, type, size, it1, it2)\353 { 354 sig = new SC_IN (type) ** [ it1];\355 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<it1; alloc_signal_it1++)\356 { 357 sig [alloc_signal_it1] = new SC_IN (type) * [it2];\358 for (uint32_t alloc_signal_it2=0; alloc_signal_it2<it2; alloc_signal_it2++)\359 {\360 if (size > 0)\361 {\362 sig [alloc_signal_it1][alloc_signal_it2] = interface[alloc_signal_it1][alloc_signal_it2]->set_signal_in <type> (name, size); \363 }\364 else\365 {\366 log_printf(INFO,true,FUNCTION,_("%s %s.%s.%s : size is nul."),MSG_INFORMATION,_component->get_name().c_str(),interface[alloc_signal_it1][alloc_signal_it2]->get_name().c_str(),name);\367 }\368 }\369 } 370 } 371 372 #define _ALLOC2_SIGNAL_OUT( sig, name, type, size, it1, it2)\373 { 374 sig = new SC_OUT (type) ** [ it1];\375 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<it1; alloc_signal_it1++)\376 { 377 sig [alloc_signal_it1] = new SC_OUT (type) * [it2];\378 for (uint32_t alloc_signal_it2=0; alloc_signal_it2<it2; alloc_signal_it2++)\379 {\380 if (size > 0)\381 {\382 sig [alloc_signal_it1][alloc_signal_it2] = interface[alloc_signal_it1][alloc_signal_it2]->set_signal_out <type> (name, size); \383 }\384 else\385 {\386 log_printf(INFO,true,FUNCTION,_("%s %s.%s.%s : size is nul."),MSG_INFORMATION,_component->get_name().c_str(),interface[alloc_signal_it1][alloc_signal_it2]->get_name().c_str(),name);\387 }\388 }\389 } 418 #define _ALLOC2_VAL_ACK_IN( sig, name, type, x1, x2) \ 419 { \ 420 sig = new SC_IN (Tcontrol_t) ** [x1]; \ 421 for (uint32_t it1=0; it1<x1; it1++) \ 422 { \ 423 sig [it1] = new SC_IN (Tcontrol_t) * [x2]; \ 424 for (uint32_t it2=0; it2<x2; it2++) \ 425 { \ 426 sig [it1][it2] = interface[it1][it2]->set_signal_valack_in (name, type); \ 427 } \ 428 } \ 429 } 430 431 #define _ALLOC2_VAL_ACK_OUT( sig, name, type, x1, x2) \ 432 { \ 433 sig = new SC_OUT (Tcontrol_t) ** [x1]; \ 434 for (uint32_t it1=0; it1<x1; it1++) \ 435 { \ 436 sig [it1] = new SC_OUT (Tcontrol_t) * [x2]; \ 437 for (uint32_t it2=0; it2<x2; it2++) \ 438 { \ 439 sig [it1][it2] = interface[it1][it2]->set_signal_valack_out (name, type); \ 440 } \ 441 } \ 442 } 443 444 #define _ALLOC2_VALACK_IN( sig,type, x1, x2) \ 445 { \ 446 sig = new SC_IN (Tcontrol_t) ** [x1]; \ 447 for (uint32_t it1=0; it1<x1; it1++) \ 448 { \ 449 sig [it1] = new SC_IN (Tcontrol_t) * [x2]; \ 450 for (uint32_t it2=0; it2<x2; it2++) \ 451 { \ 452 sig [it1][it2] = interface[it1][it2]->set_signal_valack_in (type); \ 453 } \ 454 } \ 455 } 456 457 #define _ALLOC2_VALACK_OUT( sig,type, x1, x2) \ 458 { \ 459 sig = new SC_OUT (Tcontrol_t) ** [x1]; \ 460 for (uint32_t it1=0; it1<x1; it1++) \ 461 { \ 462 sig [it1] = new SC_OUT (Tcontrol_t) * [x2]; \ 463 for (uint32_t it2=0; it2<x2; it2++) \ 464 { \ 465 sig [it1][it2] = interface[it1][it2]->set_signal_valack_out (type); \ 466 } \ 467 } \ 468 } 469 470 #define _ALLOC2_SIGNAL_IN( sig, name, type, size, x1, x2) \ 471 { \ 472 sig = new SC_IN (type) ** [x1]; \ 473 for (uint32_t it1=0; it1<x1; it1++) \ 474 { \ 475 sig [it1] = new SC_IN (type) * [x2]; \ 476 for (uint32_t it2=0; it2<x2; it2++) \ 477 { \ 478 if (size > 0) \ 479 { \ 480 sig [it1][it2] = interface[it1][it2]->set_signal_in <type> (name, size); \ 481 } \ 482 else \ 483 { \ 484 PRINT_SIZE_NUL(_component,interface[it1][it2],name); \ 485 } \ 486 } \ 487 } \ 488 } 489 490 #define _ALLOC2_SIGNAL_OUT( sig, name, type, size, x1, x2) \ 491 { \ 492 sig = new SC_OUT (type) ** [x1]; \ 493 for (uint32_t it1=0; it1<x1; it1++) \ 494 { \ 495 sig [it1] = new SC_OUT (type) * [x2]; \ 496 for (uint32_t it2=0; it2<x2; it2++) \ 497 { \ 498 if (size > 0) \ 499 { \ 500 sig [it1][it2] = interface[it1][it2]->set_signal_out <type> (name, size); \ 501 } \ 502 else \ 503 { \ 504 PRINT_SIZE_NUL(_component,interface[it1][it2],name); \ 505 } \ 506 } \ 507 } \ 390 508 } 391 509 … … 397 515 #define ALLOC2_SIGNAL_OUT( sig, name, type, size) _ALLOC2_SIGNAL_OUT( sig, name, type, size, iterator_1, iterator_2) 398 516 399 #define DELETE2_SIGNAL(sig, it1,it2, size) \ 400 { \ 401 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<it1; alloc_signal_it1++) \ 402 { \ 403 for (uint32_t alloc_signal_it2=0; alloc_signal_it2<it2; alloc_signal_it2++) \ 404 { \ 405 if (size > 0) \ 406 { \ 407 delete sig[alloc_signal_it1][alloc_signal_it2]; \ 408 } \ 409 } \ 410 delete [] sig[alloc_signal_it1]; \ 411 } \ 412 delete [] sig; \ 413 } 414 415 #define ALLOC2_SC_SIGNAL( sig, name, type, it1, it2) \ 416 sc_signal<type> *** sig = new sc_signal<type> ** [it1]; \ 417 { \ 418 std::string separator="_"; \ 419 std::string str; \ 420 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<it1; alloc_signal_it1++) \ 421 { \ 422 sig [alloc_signal_it1] = new sc_signal<type> * [it2]; \ 423 for (uint32_t alloc_signal_it2=0; alloc_signal_it2<it2; alloc_signal_it2++) \ 424 { \ 425 str = name+separator+toString(alloc_signal_it1)+separator+toString(alloc_signal_it2); \ 426 sig [alloc_signal_it1][alloc_signal_it2] = new sc_signal<type> (str.c_str()); \ 427 } \ 428 } \ 429 } 430 431 #define INSTANCE2_SC_SIGNAL(component, sig, it1, it2) \ 432 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<it1; alloc_signal_it1++) \ 433 for (uint32_t alloc_signal_it2=0; alloc_signal_it2<it2; alloc_signal_it2++) \ 434 { \ 435 TEST_PTR(component->sig [alloc_signal_it1][alloc_signal_it2]); \ 436 TEST_PTR(sig [alloc_signal_it1][alloc_signal_it2]); \ 437 (*(component->sig[alloc_signal_it1][alloc_signal_it2])) (*(sig[alloc_signal_it1][alloc_signal_it2])); \ 517 #define DELETE2_SIGNAL(sig, x1,x2, size) \ 518 { \ 519 for (uint32_t it1=0; it1<x1; it1++) \ 520 { \ 521 for (uint32_t it2=0; it2<x2; it2++) \ 522 { \ 523 if (size > 0) \ 524 { \ 525 delete sig[it1][it2]; \ 526 } \ 527 } \ 528 delete [] sig[it1]; \ 529 } \ 530 delete [] sig; \ 531 } 532 533 #define ALLOC2_SC_SIGNAL( sig, name, type, x1, x2) \ 534 sc_signal<type> *** sig = new sc_signal<type> ** [x1]; \ 535 { \ 536 std::string separator="_"; \ 537 std::string str; \ 538 for (uint32_t it1=0; it1<x1; it1++) \ 539 { \ 540 sig [it1] = new sc_signal<type> * [x2]; \ 541 for (uint32_t it2=0; it2<x2; it2++) \ 542 { \ 543 str = name+separator+toString(it1)+separator+toString(it2); \ 544 sig [it1][it2] = new sc_signal<type> (str.c_str()); \ 545 PRINT_SIGNAL_ADDRESS(str.c_str(),sig[it1][it2]); \ 546 } \ 547 } \ 548 } 549 550 #define INSTANCE2_SC_SIGNAL(component, sig, x1, x2) \ 551 for (uint32_t it1=0; it1<x1; it1++) \ 552 for (uint32_t it2=0; it2<x2; it2++) \ 553 { \ 554 TEST_SIGNAL(component->sig [it1][it2]->name(),component->sig [it1][it2]); \ 555 TEST_SIGNAL(sig [it1][it2]->name(),sig [it1][it2]); \ 556 (*(component->sig[it1][it2])) (*(sig[it1][it2])); \ 438 557 } 439 558 440 #define DELETE2_SC_SIGNAL(sig,it1,it2) \ 441 { \ 442 for (uint32_t alloc_signal_it1=0; alloc_signal_it1<it1; alloc_signal_it1++) \ 443 { \ 444 for (uint32_t alloc_signal_it2=0; alloc_signal_it2<it2; alloc_signal_it2++) \ 445 { \ 446 delete sig[alloc_signal_it1][alloc_signal_it2]; \ 447 } \ 448 delete [] sig[alloc_signal_it1]; \ 449 } \ 450 delete [] sig; \ 451 } 452 559 #define _INSTANCE2_SC_SIGNAL(component, sig1, sig2, x1, x2) \ 560 for (uint32_t it1=0; it1<x1; it1++) \ 561 for (uint32_t it2=0; it2<x2; it2++) \ 562 { \ 563 TEST_SIGNAL(component->sig1 [it1][it2]->name(),component->sig1 [it1][it2]); \ 564 TEST_SIGNAL(sig2 [it1][it2]->name(),sig2 [it1][it2]); \ 565 (*(component->sig1[it1][it2])) (*(sig2[it1][it2])); \ 566 } 567 568 #define DELETE2_SC_SIGNAL(sig,x1,x2) \ 569 { \ 570 for (uint32_t it1=0; it1<x1; it1++) \ 571 { \ 572 for (uint32_t it2=0; it2<x2; it2++) \ 573 { \ 574 delete sig[it1][it2]; \ 575 } \ 576 delete [] sig[it1]; \ 577 } \ 578 delete [] sig; \ 579 } 580 581 // ---------------------------------------------------------------------- 582 // -----[ ITERATION 3 ]-------------------------------------------------- 583 // ---------------------------------------------------------------------- 584 585 #ifdef POSITION 586 #define ALLOC3_INTERFACE( name, direction, localisation, str, x1, x2, x3) \ 587 INTERFACE_PRINT(name); \ 588 uint32_t iterator_1 = 0; \ 589 uint32_t iterator_2 = 0; \ 590 uint32_t iterator_3 = 0; \ 591 morpheo::behavioural::Interface_fifo **** interface; \ 592 { \ 593 std::string separator="_"; \ 594 iterator_1 = x1; \ 595 interface = new morpheo::behavioural::Interface_fifo *** [iterator_1]; \ 596 for (uint32_t it1=0; it1<iterator_1; it1++) \ 597 { \ 598 iterator_2 = x2; \ 599 interface [it1] = new morpheo::behavioural::Interface_fifo ** [iterator_2]; \ 600 for (uint32_t it2=0; it2<iterator_2; it2++) \ 601 { \ 602 iterator_3 = x3; \ 603 interface [it1][it2] = new morpheo::behavioural::Interface_fifo * [iterator_3]; \ 604 for (uint32_t it3=0; it3<iterator_3; it3++) \ 605 { \ 606 interface [it1][it2][it3] = _interfaces->set_interface( name+separator+toString(it1)+separator+toString(it2)+separator+toString(it3), direction, localisation, str); \ 607 } \ 608 } \ 609 } \ 610 } 611 #else 612 #define ALLOC3_INTERFACE( name, direction, localisation, str, x1, x2, x3) \ 613 INTERFACE_PRINT(name); \ 614 uint32_t iterator_1 = 0; \ 615 uint32_t iterator_2 = 0; \ 616 uint32_t iterator_3 = 0; \ 617 morpheo::behavioural::Interface_fifo **** interface; \ 618 { \ 619 std::string separator="_"; \ 620 iterator_1 = x1; \ 621 interface = new morpheo::behavioural::Interface_fifo *** [iterator_1]; \ 622 for (uint32_t it1=0; it1<iterator_1; it1++) \ 623 { \ 624 iterator_2 = x2; \ 625 interface [it1] = new morpheo::behavioural::Interface_fifo ** [iterator_2]; \ 626 for (uint32_t it2=0; it2<iterator_2; it2++) \ 627 { \ 628 iterator_3 = x3; \ 629 interface [it1][it2] = new morpheo::behavioural::Interface_fifo * [iterator_3]; \ 630 for (uint32_t it3=0; it3<iterator_3; it3++) \ 631 { \ 632 interface [it1][it2][it3] = _interfaces->set_interface( name+separator+toString(it1)+separator+toString(it2)+separator+toString(it3)); \ 633 } \ 634 } \ 635 } \ 636 } 453 637 #endif 638 639 // #define _ALLOC3_VAL_ACK_IN( sig, name, type, x1, x2, x3) 640 // #define _ALLOC3_VAL_ACK_OUT( sig, name, type, x1, x2, x3) 641 642 #define _ALLOC3_VALACK_IN( sig,type, x1, x2, x3) \ 643 { \ 644 sig = new SC_IN (Tcontrol_t) *** [x1]; \ 645 for (uint32_t it1=0; it1<x1; it1++) \ 646 { \ 647 sig [it1] = new SC_IN (Tcontrol_t) ** [x2]; \ 648 for (uint32_t it2=0; it2<x2; it2++) \ 649 { \ 650 sig [it1][it2] = new SC_IN (Tcontrol_t) * [x3]; \ 651 for (uint32_t it3=0; it3<x3; it3++) \ 652 { \ 653 sig [it1][it2][it3] = interface[it1][it2][it3]->set_signal_valack_in (type); \ 654 } \ 655 } \ 656 } \ 657 } 658 659 #define _ALLOC3_VALACK_OUT( sig,type, x1, x2, x3) \ 660 { \ 661 sig = new SC_OUT (Tcontrol_t) *** [x1]; \ 662 for (uint32_t it1=0; it1<x1; it1++) \ 663 { \ 664 sig [it1] = new SC_OUT (Tcontrol_t) ** [x2]; \ 665 for (uint32_t it2=0; it2<x2; it2++) \ 666 { \ 667 sig [it1][it2] = new SC_OUT (Tcontrol_t) * [x3]; \ 668 for (uint32_t it3=0; it3<x3; it3++) \ 669 { \ 670 sig [it1][it2][it3] = interface[it1][it2][it3]->set_signal_valack_out (type); \ 671 } \ 672 } \ 673 } \ 674 } 675 676 677 #define _ALLOC3_SIGNAL_IN( sig, name, type, size, x1, x2,x3) \ 678 { \ 679 sig = new SC_IN (type) *** [x1]; \ 680 for (uint32_t it1=0; it1<x1; it1++) \ 681 { \ 682 sig [it1] = new SC_IN (type) ** [x2]; \ 683 for (uint32_t it2=0; it2<x2; it2++) \ 684 { \ 685 sig [it1][it2] = new SC_IN (type) * [x3]; \ 686 for (uint32_t it3=0; it3<x3; it3++) \ 687 { \ 688 if (size > 0) \ 689 { \ 690 sig [it1][it2][it3] = interface[it1][it2][it3]->set_signal_in <type> (name, size); \ 691 } \ 692 else \ 693 { \ 694 PRINT_SIZE_NUL(_component,interface[it1][it2][it3],name); \ 695 } \ 696 } \ 697 } \ 698 } \ 699 } 700 701 #define _ALLOC3_SIGNAL_OUT( sig, name, type, size, x1, x2,x3) \ 702 { \ 703 sig = new SC_OUT (type) *** [x1]; \ 704 for (uint32_t it1=0; it1<x1; it1++) \ 705 { \ 706 sig [it1] = new SC_OUT (type) ** [x2]; \ 707 for (uint32_t it2=0; it2<x2; it2++) \ 708 { \ 709 sig [it1][it2] = new SC_OUT (type) * [x3]; \ 710 for (uint32_t it3=0; it3<x3; it3++) \ 711 { \ 712 if (size > 0) \ 713 { \ 714 sig [it1][it2][it3] = interface[it1][it2][it3]->set_signal_out <type> (name, size); \ 715 } \ 716 else \ 717 { \ 718 PRINT_SIZE_NUL(_component,interface[it1][it2][it3],name); \ 719 } \ 720 } \ 721 } \ 722 } \ 723 } 724 725 // #define ALLOC3_VAL_ACK_IN( sig, name, type ) _ALLOC3_VAL_ACK_IN( sig, name, type , iterator_1, iterator_2, iterator_3) 726 // #define ALLOC3_VAL_ACK_OUT(sig, name, type ) _ALLOC3_VAL_ACK_OUT(sig, name, type , iterator_1, iterator_2, iterator_3) 727 #define ALLOC3_VALACK_IN( sig, type ) _ALLOC3_VALACK_IN( sig, type , iterator_1, iterator_2, iterator_3) 728 #define ALLOC3_VALACK_OUT( sig, type ) _ALLOC3_VALACK_OUT( sig, type , iterator_1, iterator_2, iterator_3) 729 #define ALLOC3_SIGNAL_IN( sig, name, type, size) _ALLOC3_SIGNAL_IN( sig, name, type, size, iterator_1, iterator_2, iterator_3) 730 #define ALLOC3_SIGNAL_OUT( sig, name, type, size) _ALLOC3_SIGNAL_OUT( sig, name, type, size, iterator_1, iterator_2, iterator_3) 731 732 #define DELETE3_SIGNAL(sig, x1, x2, x3, size) \ 733 { \ 734 for (uint32_t it1=0; it1<x1; it1++) \ 735 { \ 736 for (uint32_t it2=0; it2<x2; it2++) \ 737 { \ 738 for (uint32_t it3=0; it3<x3; it3++) \ 739 { \ 740 if (size > 0) \ 741 { \ 742 delete sig[it1][it2][it3]; \ 743 } \ 744 } \ 745 delete [] sig[it1][it2]; \ 746 } \ 747 delete [] sig[it1]; \ 748 } \ 749 delete [] sig; \ 750 } 751 752 #define ALLOC3_SC_SIGNAL( sig, name, type, x1, x2, x3) \ 753 sc_signal<type> **** sig = new sc_signal<type> *** [x1]; \ 754 { \ 755 std::string separator="_"; \ 756 std::string str; \ 757 for (uint32_t it1=0; it1<x1; it1++) \ 758 { \ 759 sig [it1] = new sc_signal<type> ** [x2]; \ 760 for (uint32_t it2=0; it2<x2; it2++) \ 761 { \ 762 sig [it1][it2] = new sc_signal<type> * [x3]; \ 763 for (uint32_t it3=0; it3<x3; it3++) \ 764 { \ 765 str = name+separator+toString(it1)+separator+toString(it2)+separator+toString(it3); \ 766 sig [it1][it2][it3] = new sc_signal<type> (str.c_str()); \ 767 PRINT_SIGNAL_ADDRESS(str.c_str(),sig[it1][it2][it3]); \ 768 } \ 769 } \ 770 } \ 771 } 772 773 #define INSTANCE3_SC_SIGNAL(component, sig, x1, x2, x3) \ 774 for (uint32_t it1=0; it1<x1; it1++) \ 775 for (uint32_t it2=0; it2<x2; it2++) \ 776 for (uint32_t it3=0; it3<x3; it3++) \ 777 { \ 778 TEST_SIGNAL(component->sig [it1][it2][it3]->name(),component->sig [it1][it2][it3]); \ 779 TEST_SIGNAL(sig [it1][it2][it3]->name(),sig [it1][it2][it3]); \ 780 (*(component->sig[it1][it2][it3])) (*(sig[it1][it2][it3])); \ 781 } 782 783 #define _INSTANCE3_SC_SIGNAL(component, sig1, sig2, x1, x2, x3) \ 784 for (uint32_t it1=0; it1<x1; it1++) \ 785 for (uint32_t it2=0; it2<x2; it2++) \ 786 for (uint32_t it3=0; it3<x3; it3++) \ 787 { \ 788 TEST_SIGNAL(component->sig1 [it1][it2][it3]->name(),component->sig1 [it1][it2][it3]); \ 789 TEST_SIGNAL(sig2 [it1][it2][it3]->name(),sig2 [it1][it2][it3]); \ 790 (*(component->sig1[it1][it2][it3])) (*(sig2[it1][it2][it3])); \ 791 } 792 793 #define DELETE3_SC_SIGNAL(sig,x1,x2,x3) \ 794 { \ 795 for (uint32_t it1=0; it1<x1; it1++) \ 796 { \ 797 for (uint32_t it2=0; it2<x2; it2++) \ 798 { \ 799 for (uint32_t it3=0; it3<x3; it3++) \ 800 { \ 801 delete sig[it1][it2][it3]; \ 802 } \ 803 delete [] sig[it1][it2]; \ 804 } \ 805 delete [] sig[it1]; \ 806 } \ 807 delete [] sig; \ 808 } 809 810 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Constants.h
r81 r88 2 2 #define morpheo_behavioural_Constants_h 3 3 4 /* 5 WARNING : 6 7 I Use reserved exception : 8 9 0x10 - EXCEPTION_MEMORY_MISS_SPECULATION - Load miss speculation 10 0x11 - EXCEPTION_MEMORY_LOAD_SPECULATIVE - The load is speculative : write in register file, but don't commit 11 0x12 - EXCEPTION_ALU_SPR_ACCESS_INVALID - SPR present in ALU but not compatible privilege 12 0x13 - EXCEPTION_ALU_SPR_ACCESS_MUST_READ - SPR not present in ALU 13 0x14 - EXCEPTION_ALU_SPR_ACCESS_MUST_WRITE - SPR not present in ALU 14 15 I Use reserved SPR : 16 [0][19] - SPR_CID 17 */ 18 4 19 namespace morpheo { 5 20 namespace behavioural { 21 22 # define SET_FLAG( x,pos) {(x) |= (1<<(pos));} while (0) 23 # define UNSET_FLAG( x,pos) {(x) &= ~(1<<(pos));} while (0) 24 # define IS_SET_FLAG( x,pos) (((x) & (1<<(pos))) != 0) 25 # define IS_UNSET_FLAG(x,pos) (((x) & (1<<(pos))) == 0) 26 # define CHANGE_FLAG( x,pos,f) \ 27 { \ 28 if (f) \ 29 {SET_FLAG(x,pos);} \ 30 else \ 31 {UNSET_FLAG(x,pos);} \ 32 } while (0) 6 33 7 34 //=========================================================[ Type ]===== … … 10 37 # define TYPE_MOVE 0x2 // 00000 - unit multiple 11 38 # define TYPE_TEST 0x3 // 00000 - unit multiple 12 # define TYPE_MUL_DIV 0x4 // 00000 - unit multiple 13 # define TYPE_EXTEND 0x5 // 00000 - unit multiple, type optionnal 14 # define TYPE_FIND 0x6 // 00000 - unit multiple, type optionnal 15 # define TYPE_SPECIAL 0x7 // 00000 - unit uniq 16 # define TYPE_CUSTOM 0x8 // 00000 - unit uniq , type optionnal 17 # define TYPE_BRANCH 0x9 // 00000 - unit multiple 18 # define TYPE_MEMORY 0xa // 00000 - unit uniq 19 39 # define TYPE_MUL 0x4 // 00000 - unit multiple 40 # define TYPE_DIV 0x5 // 00000 - unit multiple, type optionnal 41 # define TYPE_EXTEND 0x6 // 00000 - unit multiple, type optionnal 42 # define TYPE_FIND 0x7 // 00000 - unit multiple, type optionnal 43 # define TYPE_SPECIAL 0x8 // 00000 - unit uniq 44 # define TYPE_CUSTOM 0x9 // 00000 - unit uniq , type optionnal 45 # define TYPE_BRANCH 0xa // 00000 - unit multiple 46 # define TYPE_MEMORY 0xb // 00000 - unit uniq 47 48 //#define NB_TYPE 11 20 49 # define SIZE_TYPE 5 21 50 # define MAX_TYPE (1<<SIZE_TYPE) 51 52 # define is_type_valid(x) \ 53 (( x == TYPE_ALU ) or \ 54 ( x == TYPE_SHIFT ) or \ 55 ( x == TYPE_MOVE ) or \ 56 ( x == TYPE_TEST ) or \ 57 ( x == TYPE_MUL ) or \ 58 ( x == TYPE_DIV ) or \ 59 ( x == TYPE_EXTEND ) or \ 60 ( x == TYPE_FIND ) or \ 61 ( x == TYPE_SPECIAL) or \ 62 ( x == TYPE_CUSTOM ) or \ 63 ( x == TYPE_BRANCH ) or \ 64 ( x == TYPE_MEMORY )) 22 65 23 66 //====================================================[ Operation ]===== … … 149 192 # define OPERATION_TEST_L_SFNE 0x20 // 000_0000 l.sfne , l.sfnei 150 193 151 # define OPERATION_MUL_DIV_L_MUL 0x1 // 000_0000 l.mul , l.muli 152 # define OPERATION_MUL_DIV_L_MULU 0x2 // 000_0000 l.mulu 153 # define OPERATION_MUL_DIV_L_DIV 0x4 // 000_0000 l.div 154 # define OPERATION_MUL_DIV_L_DIVU 0x8 // 000_0000 l.divu 194 # define OPERATION_MUL_L_MUL 0x1 // 000_0000 l.mul , l.muli 195 # define OPERATION_MUL_L_MULU 0x2 // 000_0000 l.mulu 196 197 # define OPERATION_DIV_L_DIV 0x1 // 000_0000 l.div 198 # define OPERATION_DIV_L_DIVU 0x2 // 000_0000 l.divu 155 199 156 200 # define OPERATION_EXTEND_L_EXTEND_Z 0x1 // 000_0000 l.extbz , l.exthz, l.extwz … … 204 248 # define SIZE_EXCEPTION 5 205 249 # define SIZE_EXCEPTION_USE 4 206 # define SIZE_EXCEPTION_MEMORY 3207 # define SIZE_EXCEPTION_CUSTOM 3208 # define SIZE_EXCEPTION_ALU 2209 # define SIZE_EXCEPTION_DECOD 2210 # define SIZE_EXCEPTION_IFETCH 2250 # define SIZE_EXCEPTION_MEMORY 5 251 # define SIZE_EXCEPTION_CUSTOM 5 252 # define SIZE_EXCEPTION_ALU 5 253 # define SIZE_EXCEPTION_DECOD 5 254 # define SIZE_EXCEPTION_IFETCH 5 211 255 212 256 # define EXCEPTION_NONE 0x00 // none exception … … 243 287 # define EXCEPTION_CUSTOM_6 0x1f // Reserved for custom exceptions 244 288 245 246 #define exception_to_address(x) (x<<8) 289 //SR[14].EPH : Exception Prefix High 290 // EPH = 0 Exceptions vectors are located in memory area starting at 0x0 291 // EPH = 1 Exception vectors are located in memory area starting at 0xF0000000 292 293 #define exception_to_address(eph,x) (((eph==0)?0x0:0xF0000000)+(x<<8)) 247 294 248 295 // Exception Execution 249 # define EXCEPTION_MEMORY_NONE 0x0 // Load/Store generate none exception 250 # define EXCEPTION_MEMORY_ALIGNMENT 0x1 // Load/Store access is not aligned 251 # define EXCEPTION_MEMORY_DATA_TLB 0x2 // DTLB miss 252 # define EXCEPTION_MEMORY_DATA_PAGE 0x3 // No matching or page violation protection in pages tables 253 # define EXCEPTION_MEMORY_BUS_ERROR 0x4 // Access at a invalid physical address 254 # define EXCEPTION_MEMORY_MISS_SPECULATION 0x5 // Load miss speculation 255 # define EXCEPTION_MEMORY_LOAD_SPECULATIVE 0x6 // The load is speculative : write in register file, but don't commit 256 257 # define EXCEPTION_CUSTOM_NONE 0x1 // Custom unit generate none exception 258 # define EXCEPTION_CUSTOM_CUST_0 0x1 // Reserved for custom exceptions 259 # define EXCEPTION_CUSTOM_CUST_1 0x2 // Reserved for custom exceptions 260 # define EXCEPTION_CUSTOM_CUST_2 0x3 // Reserved for custom exceptions 261 # define EXCEPTION_CUSTOM_CUST_3 0x4 // Reserved for custom exceptions 262 # define EXCEPTION_CUSTOM_CUST_4 0x5 // Reserved for custom exceptions 263 # define EXCEPTION_CUSTOM_CUST_5 0x6 // Reserved for custom exceptions 264 # define EXCEPTION_CUSTOM_CUST_6 0x7 // Reserved for custom exceptions 265 266 # define EXCEPTION_ALU_NONE 0x0 // Functionnal unit generate none exception 267 # define EXCEPTION_ALU_RANGE 0x1 // 268 # define EXCEPTION_ALU_SPR_ACCESS_INVALID 0x2 // SPR present in ALU but not compatible privilege 269 # define EXCEPTION_ALU_SPR_ACCESS_NOT_COMPLETE 0x3 // SPR not present in ALU 270 271 # define EXCEPTION_DECOD_NONE 0x0 // none exception 272 # define EXCEPTION_DECOD_ILLEGAL_INSTRUCTION 0x1 // Instruction is illegal (no implemented) 273 # define EXCEPTION_DECOD_SYSCALL 0x2 // System Call 274 //#define EXCEPTION_DECOD_TRAP 0x4 // L.trap or debug unit (note : must read SR !) 275 276 # define EXCEPTION_IFETCH_NONE 0x0 // Fetch Unit generate none exception 277 # define EXCEPTION_IFETCH_INSTRUCTION_TLB 0x1 // ITLB miss 278 # define EXCEPTION_IFETCH_INSTRUCTION_PAGE 0x2 // No matching or page violation protection in pages tables 279 # define EXCEPTION_IFETCH_BUS_ERROR 0x3 // Access at a invalid physical address 280 281 # define EXCEPTION_USE_NONE 0x0 // 282 # define EXCEPTION_USE_ILLEGAL_INSTRUCTION 0x1 // illegal_instruction 283 # define EXCEPTION_USE_RANGE 0x2 // range 284 # define EXCEPTION_USE_MEMORY_WITH_ALIGNMENT 0x3 // TLB miss, page fault, bus error, alignment 285 # define EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT 0x4 // TLB miss, page fault, bus error 286 # define EXCEPTION_USE_SYSCALL 0x5 // syscall 287 # define EXCEPTION_USE_TRAP 0x6 // trap 288 # define EXCEPTION_USE_CUSTOM_0 0x7 // 289 # define EXCEPTION_USE_CUSTOM_1 0x8 // 290 # define EXCEPTION_USE_CUSTOM_2 0x9 // 291 # define EXCEPTION_USE_CUSTOM_3 0xa // 292 # define EXCEPTION_USE_CUSTOM_4 0xb // 293 # define EXCEPTION_USE_CUSTOM_5 0xc // 294 # define EXCEPTION_USE_CUSTOM_6 0xd // 296 # define EXCEPTION_IFETCH_NONE 0x00 // Fetch Unit generate none exception 297 # define EXCEPTION_IFETCH_INSTRUCTION_TLB 0x0a // ITLB miss 298 # define EXCEPTION_IFETCH_INSTRUCTION_PAGE 0x04 // No matching or page violation protection in pages tables 299 # define EXCEPTION_IFETCH_BUS_ERROR 0x02 // Access at a invalid physical address 300 301 # define EXCEPTION_DECOD_NONE 0x00 // none exception 302 # define EXCEPTION_DECOD_ILLEGAL_INSTRUCTION 0x01 // Instruction is illegal (no implemented) 303 # define EXCEPTION_DECOD_SYSCALL 0x02 // System Call 304 //#define EXCEPTION_DECOD_TRAP 0x0e // L.trap or debug unit (note : must read SR !) 305 # define EXCEPTION_DECOD_INSTRUCTION_TLB 0x0a // ITLB miss 306 # define EXCEPTION_DECOD_INSTRUCTION_PAGE 0x04 // No matching or page violation protection in pages tables 307 # define EXCEPTION_DECOD_BUS_ERROR 0x02 // Access at a invalid physical address 308 309 # define EXCEPTION_ALU_NONE 0x00 // Functionnal unit generate none exception 310 # define EXCEPTION_ALU_RANGE 0x0b // 311 # define EXCEPTION_ALU_SPR_ACCESS_INVALID 0x12 // SPR present in ALU but not compatible privilege 312 # define EXCEPTION_ALU_SPR_ACCESS_MUST_READ 0x13 // SPR not present in ALU 313 # define EXCEPTION_ALU_SPR_ACCESS_MUST_WRITE 0x14 // SPR not present in ALU 314 315 # define EXCEPTION_MEMORY_NONE 0x00 // Load/Store generate none exception 316 # define EXCEPTION_MEMORY_ALIGNMENT 0x06 // Load/Store access is not aligned 317 # define EXCEPTION_MEMORY_DATA_TLB 0x09 // DTLB miss 318 # define EXCEPTION_MEMORY_DATA_PAGE 0x03 // No matching or page violation protection in pages tables 319 # define EXCEPTION_MEMORY_BUS_ERROR 0x02 // Access at a invalid physical address 320 # define EXCEPTION_MEMORY_MISS_SPECULATION 0x10 // Load miss speculation 321 # define EXCEPTION_MEMORY_LOAD_SPECULATIVE 0x11 // The load is speculative : write in register file, but don't commit 322 323 # define EXCEPTION_CUSTOM_NONE 0x00 // Custom unit generate none exception 324 # define EXCEPTION_CUSTOM_CUST_0 0x19 // Reserved for custom exceptions 325 # define EXCEPTION_CUSTOM_CUST_1 0x1a // Reserved for custom exceptions 326 # define EXCEPTION_CUSTOM_CUST_2 0x1b // Reserved for custom exceptions 327 # define EXCEPTION_CUSTOM_CUST_3 0x1c // Reserved for custom exceptions 328 # define EXCEPTION_CUSTOM_CUST_4 0x1d // Reserved for custom exceptions 329 # define EXCEPTION_CUSTOM_CUST_5 0x1e // Reserved for custom exceptions 330 # define EXCEPTION_CUSTOM_CUST_6 0x1f // Reserved for custom exceptions 331 332 # define EXCEPTION_USE_NONE 0x00 // 333 # define EXCEPTION_USE_ILLEGAL_INSTRUCTION 0x01 // illegal_instruction 334 # define EXCEPTION_USE_RANGE 0x02 // range 335 # define EXCEPTION_USE_MEMORY_WITH_ALIGNMENT 0x03 // TLB miss, page fault, bus error, alignment 336 # define EXCEPTION_USE_MEMORY_WITHOUT_ALIGNMENT 0x04 // TLB miss, page fault, bus error 337 # define EXCEPTION_USE_SYSCALL 0x05 // syscall 338 # define EXCEPTION_USE_TRAP 0x06 // trap 339 # define EXCEPTION_USE_CUSTOM_0 0x07 // 340 # define EXCEPTION_USE_CUSTOM_1 0x08 // 341 # define EXCEPTION_USE_CUSTOM_2 0x09 // 342 # define EXCEPTION_USE_CUSTOM_3 0x0a // 343 # define EXCEPTION_USE_CUSTOM_4 0x0b // 344 # define EXCEPTION_USE_CUSTOM_5 0x0c // 345 # define EXCEPTION_USE_CUSTOM_6 0x0d // 346 347 # define exception_ifetch_to_exception_decod(x) x 348 # define exception_decod_to_exception(x) x 349 # define exception_alu_to_exception(x) x 350 # define exception_memory_to_exception(x) x 351 # define exception_custom_to_exception(x) x 295 352 296 353 //=======================================================[ icache ]===== … … 298 355 //--------------------------------------------------[ icache_type ]----- 299 356 300 # define SIZE_ICACHE_TYPE 301 302 # define ICACHE_TYPE_LOAD 303 # define ICACHE_TYPE_LOCK 304 # define ICACHE_TYPE_INVALIDATE 305 # define ICACHE_TYPE_PREFETCH 357 # define SIZE_ICACHE_TYPE 2 358 359 # define ICACHE_TYPE_LOAD 0x0 // 0000 360 # define ICACHE_TYPE_LOCK 0x1 // 0001 361 # define ICACHE_TYPE_INVALIDATE 0x2 // 0010 362 # define ICACHE_TYPE_PREFETCH 0x3 // 0011 306 363 307 364 // just take the 2 less significative bits. … … 310 367 //-------------------------------------------------[ icache_error ]----- 311 368 312 # define SIZE_ICACHE_ERROR 313 314 # define ICACHE_ERROR_NONE 315 # define ICACHE_ERROR_BUS_ERROR 369 # define SIZE_ICACHE_ERROR 1 370 371 # define ICACHE_ERROR_NONE 0x0 372 # define ICACHE_ERROR_BUS_ERROR 0x1 316 373 317 374 //=======================================================[ dcache ]===== … … 319 376 //--------------------------------------------------[ dcache_type ]----- 320 377 321 # define SIZE_DCACHE_TYPE 322 323 //#define DCACHE_TYPE_ 324 # define DCACHE_TYPE_LOCK 325 # define DCACHE_TYPE_INVALIDATE 326 # define DCACHE_TYPE_PREFETCH 327 //#define DCACHE_TYPE_ 328 //#define DCACHE_TYPE_ 329 # define DCACHE_TYPE_FLUSH 330 # define DCACHE_TYPE_SYNCHRONIZATION 331 # define DCACHE_TYPE_LOAD_8 332 # define DCACHE_TYPE_LOAD_16 333 # define DCACHE_TYPE_LOAD_32 334 # define DCACHE_TYPE_LOAD_64 335 # define DCACHE_TYPE_STORE_8 336 # define DCACHE_TYPE_STORE_16 337 # define DCACHE_TYPE_STORE_32 338 # define DCACHE_TYPE_STORE_64 378 # define SIZE_DCACHE_TYPE 4 379 380 //#define DCACHE_TYPE_ 0x0 // 0000 381 # define DCACHE_TYPE_LOCK 0x1 // 0001 382 # define DCACHE_TYPE_INVALIDATE 0x2 // 0010 383 # define DCACHE_TYPE_PREFETCH 0x3 // 0011 384 //#define DCACHE_TYPE_ 0x4 // 0100 385 //#define DCACHE_TYPE_ 0x5 // 0101 386 # define DCACHE_TYPE_FLUSH 0x6 // 0110 387 # define DCACHE_TYPE_SYNCHRONIZATION 0x7 // 0111 388 # define DCACHE_TYPE_LOAD_8 0x8 // 1000 389 # define DCACHE_TYPE_LOAD_16 0x9 // 1001 390 # define DCACHE_TYPE_LOAD_32 0xa // 1010 391 # define DCACHE_TYPE_LOAD_64 0xb // 1011 392 # define DCACHE_TYPE_STORE_8 0xc // 1100 393 # define DCACHE_TYPE_STORE_16 0xd // 1101 394 # define DCACHE_TYPE_STORE_32 0xe // 1110 395 # define DCACHE_TYPE_STORE_64 0xf // 1111 339 396 340 397 // just take the 4 less significative bits. … … 343 400 //-------------------------------------------------[ dcache_error ]----- 344 401 345 # define SIZE_DCACHE_ERROR 346 347 # define DCACHE_ERROR_NONE 348 # define DCACHE_ERROR_BUS_ERROR 402 # define SIZE_DCACHE_ERROR 1 403 404 # define DCACHE_ERROR_NONE 0x0 405 # define DCACHE_ERROR_BUS_ERROR 0x1 349 406 350 407 //=================================================[ special_data ]===== 351 408 352 # define SIZE_SPECIAL_DATA 409 # define SIZE_SPECIAL_DATA 2 353 410 354 411 // Position of flag in "rename register SR" (NOT IN "SR") 355 # define FLAG_POSITION_F 356 # define FLAG_POSITION_CY 357 # define FLAG_POSITION_OV 358 359 # define FLAG_F 360 # define FLAG_CY 361 # define FLAG_OV 412 # define FLAG_POSITION_F 0x0 // Conditionnal branch flag 413 # define FLAG_POSITION_CY 0x1 // Carry was produced by last arithmetic operation 414 # define FLAG_POSITION_OV 0x0 // Overflow occured during last arithmetic operation 415 416 # define FLAG_F (1<<FLAG_POSITION_F ) // Conditionnal branch flag 417 # define FLAG_CY (1<<FLAG_POSITION_CY) // Carry was produced by last arithmetic operation 418 # define FLAG_OV (1<<FLAG_POSITION_OV) // Overflow occured during last arithmetic operation 362 419 363 420 //==========================================================[ spr ]===== … … 396 453 GROUP_CUSTOM_6, // 29 397 454 GROUP_CUSTOM_7, // 30 398 GROUP_CUSTOM_8 // 31 455 GROUP_CUSTOM_8, // 31 456 NB_GROUP 399 457 }; 400 458 401 # define NB_GROUP 32402 459 # define NB_REG_GROUP_SYSTEM_AND_CONTROL 1536 403 460 # define NB_REG_GROUP_DMMU 1536 … … 432 489 # define NB_REG_GROUP_CUSTOM_7 0 433 490 # define NB_REG_GROUP_CUSTOM_8 0 434 491 492 static const uint32_t NB_REG_GROUP [] = 493 {NB_REG_GROUP_SYSTEM_AND_CONTROL , 494 NB_REG_GROUP_DMMU , 495 NB_REG_GROUP_IMMU , 496 NB_REG_GROUP_DCACHE , 497 NB_REG_GROUP_ICACHE , 498 NB_REG_GROUP_MAC , 499 NB_REG_GROUP_DEBUG , 500 NB_REG_GROUP_PERFORMANCE_COUNTER , 501 NB_REG_GROUP_POWER_MANAGEMENT , 502 NB_REG_GROUP_PIC , 503 NB_REG_GROUP_TICK_TIMER , 504 NB_REG_GROUP_FLOATING_POINT , 505 NB_REG_GROUP_RESERVED_1 , 506 NB_REG_GROUP_RESERVED_2 , 507 NB_REG_GROUP_RESERVED_3 , 508 NB_REG_GROUP_RESERVED_4 , 509 NB_REG_GROUP_RESERVED_5 , 510 NB_REG_GROUP_RESERVED_6 , 511 NB_REG_GROUP_RESERVED_7 , 512 NB_REG_GROUP_RESERVED_8 , 513 NB_REG_GROUP_RESERVED_9 , 514 NB_REG_GROUP_RESERVED_10 , 515 NB_REG_GROUP_RESERVED_11 , 516 NB_REG_GROUP_RESERVED_12 , 517 NB_REG_GROUP_CUSTOM_1 , 518 NB_REG_GROUP_CUSTOM_2 , 519 NB_REG_GROUP_CUSTOM_3 , 520 NB_REG_GROUP_CUSTOM_4 , 521 NB_REG_GROUP_CUSTOM_5 , 522 NB_REG_GROUP_CUSTOM_6 , 523 NB_REG_GROUP_CUSTOM_7 , 524 NB_REG_GROUP_CUSTOM_8 }; 525 526 // GROUP_SYSTEM_AND_CONTROL 527 # define SPR_VR 0 // Version register 528 # define SPR_UPR 1 // Unit Present register 529 # define SPR_CPUCFGR 2 // CPU Configuration register 530 # define SPR_DMMUCFGR 3 // Data MMU Configuration register 531 # define SPR_IMMUCFGR 4 // Instruction MMU Configuration register 532 # define SPR_DCCFGR 5 // Data Cache Configuration register 533 # define SPR_ICCFGR 6 // Instruction Cache Configuration register 534 # define SPR_DCFGR 7 // Debug Configuration register 535 # define SPR_PCCFGR 8 // Performance Counters Configuration register 536 # define SPR_NPC 16 // PC mapped to SPR space (next PC) 537 # define SPR_SR 17 // Supervision register 538 # define SPR_PPC 18 // PC mapped to SPR space (previous PC) 539 # define SPR_CID 19 // Context Id 540 # define SPR_FPCSR 20 // FP Control Status register 541 # define SPR_EPCR 32 // Exception PC register 542 # define SPR_EEAR 48 // Exception EA register 543 # define SPR_ESR 64 // Exception SR register 544 # define SPR_GPR 1024 // GPRs mappted to SPR space 545 546 // GROUP_DCACHE 547 # define SPR_DCCR 0 // DC Control register 548 # define SPR_DCBPR 1 // DC Block Prefetch register 549 # define SPR_DCBFR 2 // DC Block Flush register 550 # define SPR_DCBIR 3 // DC Block Invalidate register 551 # define SPR_DCBWR 4 // DC Block Write-back register 552 # define SPR_DCBLR 5 // DC Block Lock register 553 554 // GROUP_ICACHE 555 # define SPR_ICCR 0 // IC Control register 556 # define SPR_ICBPR 1 // IC Block Prefetch register 557 # define SPR_ICBIR 2 // IC Block Invalidate register 558 # define SPR_ICBLR 3 // IC Block Lock register 435 559 436 560 // GROUP_MAC … … 438 562 # define SPR_MACHI 2 // MAC High 439 563 564 565 566 // SR RENAME 440 567 # define NB_SPR_LOGIC 2 441 568 # define LOG2_NB_SPR_LOGIC 1 … … 863 990 # define OPCOD_L_EXTWZ 0x1 // 0001 864 991 865 /*866 867 //--------------------------------------------------[ destination ]-----868 #define _size_destination1 4869 870 #define cst_DESTINATION1_NONE 0x0871 #define mask_DESTINATION1_GPR 0x1872 #define mask_DESTINATION1_MEMORY 0x2873 #define mask_DESTINATION1_SPR 0x4874 #define mask_DESTINATION1_MAC_UNIT 0x8875 876 #define _size_destination2 3877 878 #define cst_DESTINATION2_NONE 0x0879 #define mask_DESTINATION2_COMMIT 0x1880 #define mask_DESTINATION2_MEMORY 0x2881 #define mask_DESTINATION2_SPR 0x4882 883 //----------------------------------------------------[ exec_flag ]-----884 #define _size_exec_flag 2885 886 #define mask_EXEC_FLAG_NONE 0x1887 #define mask_EXEC_FLAG_CARRY 0x1888 #define mask_EXEC_FLAG_FLAG 0x1889 #define mask_EXEC_FLAG_OVERFLOW 0x2890 891 //---------------------------------------------------[ exec_excep ]-----892 #define _size_exec_excep 1893 894 #define mask_EXEC_EXCEP_NONE 0x0895 #define mask_EXEC_EXCEP_RANGE 0x1896 897 //----------------------------------------------------[ Condition ]-----898 #define _size_condition 3899 900 #define cst_CONDITION_UNCONDITIONAL 0x0 // None condition (jump)901 #define mask_CONDITION_CONDITIONAL 0x2902 #define mask_CONDITION_CONDITIONAL_NF 0x0 // Branch if Flag is clear903 #define mask_CONDITION_CONDITIONAL_F 0x1 // Branch if Flag is set904 #define mask_CONDITION_REG 0x4 // Branch if a register is read905 #define mask_CONDITION_STACK 0x8 // Branch with pop in stack pointer906 907 */908 909 /*910 #define M_CPU_SIZE_INST 32911 912 //----------------------------------------------------913 // Exception type914 //----------------------------------------------------915 916 #define M_CPU_LOG2_NB_EXCP 5917 #define M_CPU_NB_EXCP 32918 919 #define EXCP_NO 0x00 // none exception920 #define EXCP_RESET 0x01 // software or hardware reset921 #define EXCP_BERR 0x02 // Access at a invalid physical adress922 #define EXCP_D_PAGE 0x03 // No matching or page violation protection in pages tables923 #define EXCP_I_PAGE 0x04 // No matching or page violation protection in pages tables924 #define EXCP_TICK_TIMER 0x05 // Tick timer interruption925 #define EXCP_ALIGNMENT 0x06 // Load/Store access is not aligned926 #define EXCP_ILL_INST 0x07 // Instruction is illegal (no implemented)927 #define EXCP_IRQ 0x08 // External interruption928 #define EXCP_D_TLB 0x09 // DTLB miss929 #define EXCP_I_TLB 0x0a // ITLB miss930 #define EXCP_RANGE 0x0b // Overflow or access at a unimplemented register or context931 #define EXCP_SYSCALL 0x0c // System Call932 #define EXCP_FP 0x0d // Caused by a floating instruction933 #define EXCP_TRAP 0x0e // L.trap or debug unit934 #define EXCP_RES0 0x0f // Reserved for a futur usage935 #define EXCP_RES1 0x10 // Reserved for a futur usage936 #define EXCP_RES2 0x11 // Reserved for a futur usage937 #define EXCP_RES3 0x12 // Reserved for a futur usage938 #define EXCP_RES4 0x13 // Reserved for a futur usage939 #define EXCP_RES5 0x14 // Reserved for a futur usage940 #define EXCP_RES6 0x15 // Reserved for implemented specific exceptions941 #define EXCP_RES7 0x16 // Reserved for implemented specific exceptions942 #define EXCP_RES8 0x17 // Reserved for implemented specific exceptions943 #define EXCP_RES9 0x18 // Reserved for implemented specific exceptions944 #define EXCP_CUST0 0x19 // Reserved for custom exceptions945 #define EXCP_CUST1 0x1a // Reserved for custom exceptions946 #define EXCP_CUST2 0x1b // Reserved for custom exceptions947 #define EXCP_CUST3 0x1c // Reserved for custom exceptions948 #define EXCP_CUST4 0x1d // Reserved for custom exceptions949 #define EXCP_CUST5 0x1e // Reserved for custom exceptions950 #define EXCP_CUST6 0x1f // Reserved for custom exceptions951 952 //----------------------------------------------------953 // Flags954 //----------------------------------------------------955 956 #define M_CPU_NB_FLAG 3957 958 // Integer flags959 #define FLAG_F 0x1 // Conditionnal branch flag960 #define FLAG_CY 0x2 // Carry was produced by last arithmétic operation961 #define FLAG_OV 0x4 // Overflow occured during last arithmetic operation962 963 // Floating flags964 #define FLAG_OVF 0x004 // Overflow occured during last arithmetic operation965 #define FLAG_UNF 0x008 // Underflow flags966 #define FLAG_SNF 0x010 // Result SNAN967 #define FLAG_QNF 0x020 // Result QNAN968 #define FLAG_ZF 0x040 // Result is nul969 #define FLAG_IXF 0x080 // Result is inexact970 #define FLAG_IVF 0x100 // Result is invalid971 #define FLAG_INF 0x200 // Result is infinite972 #define FLAG_DZF 0x400 // Division by zero973 974 // Position of flag in "rename register SR" (NOT IN "SR")975 #define FLAG_POS_F 0x0 // Conditionnal branch flag976 #define FLAG_POS_CY 0x1 // Carry was produced by last arithmétic operation977 #define FLAG_POS_OV 0x0 // Overflow occured during last arithmetic operation978 979 //----------------------------------------------------980 // Instruction type981 //----------------------------------------------------982 983 #define M_CPU_LOG2_NB_TYPE 4984 985 #define TYPE_NOP 0x0986 #define TYPE_ALU_F 0x1 // Instruction ALU with flag using (ADD, SUB, ADDC ...)987 #define TYPE_ALU_NF 0x2 // Instruction ALU without flag using (AND, OR ...)988 #define TYPE_MAC 0x3 // Instruction ALU with utilisation of register HI/LO989 #define TYPE_J 0x4 // Branch instruction990 #define TYPE_SPR_READ 0x5 // Instruction special : l.mfspr991 #define TYPE_SPR_WRITE 0x6 // Instruction special : l.mtspr992 #define TYPE_SPECIAL 0x7 // Instruction execute in decode stage993 #define TYPE_CUSTOM 0x8 // Instruction Custom994 995 #define TYPE_LOAD_Z 0x9 // Load access (extended by zero)996 #define TYPE_LOAD_S 0xa // Load access (sign extended)997 #define TYPE_STORE 0xc // Store access998 999 //----------------------------------------------------1000 // Condition to branch1001 //----------------------------------------------------1002 1003 #define M_CPU_LOG2_NB_COND 41004 1005 #define COND_NONE 0x0 // None condition (jump)1006 #define COND_F 0x2 // Branch if Flag is set1007 #define COND_NF 0x3 // Branch if Flag is clear1008 #define COND_REG 0x4 // Branch if a register is read1009 #define COND_STACK 0x8 // Branch with pop in stack pointer1010 1011 //----------------------------------------------------1012 // Event : State and Type1013 //----------------------------------------------------1014 1015 #define EVENT_STATE_NO_EVENT 0 // no event : current case1016 #define EVENT_STATE_EVENT 1 // Have a event : make necessary to manage the event1017 #define EVENT_STATE_WAITEND 2 // Wait end of manage event (restaure a good context)1018 #define EVENT_STATE_END 3 // CPU can continue1019 1020 #define EVENT_TYPE_MISS 0 // miss of speculation1021 #define EVENT_TYPE_EXCP 1 // exception or interruption occure1022 1023 // SPEC? TAKE?1024 #define BRANCH_STATE_NONE 0 // 0 01025 #define BRANCH_STATE_NSPEC_TAKE 1 // 0 1 -> incondionnal1026 #define BRANCH_STATE_SPEC_NTAKE 2 // 1 01027 #define BRANCH_STATE_SPEC_TAKE 3 // 1 11028 1029 //----------------------------------------------------1030 // Name to particular register1031 //----------------------------------------------------1032 1033 //~~~~~~~~~~~~~~~~~~~~~~~~~~1034 // GENERAL PURPOSE REGISTER1035 //~~~~~~~~~~~~~~~~~~~~~~~~~~1036 #define M_CPU_LOG2_NB_GPR_LOG 51037 #define M_CPU_NB_GPR_LOG (1<<M_CPU_LOG2_NB_GPR_LOG)1038 1039 #define GPR_LOG_LR 0x09 // Link register1040 #define REG_PHY_SR 0x00 // Status register1041 1042 //~~~~~~~~~~~~~~~~~~~~~~~~~~1043 // SPECIAL PURPOSE REGISTER1044 //~~~~~~~~~~~~~~~~~~~~~~~~~~1045 #define M_CPU_LOG2_NB_SPR_LOG 11046 #define M_CPU_NB_SPR_LOG (1<<M_CPU_LOG2_NB_SPR_LOG)1047 #define M_CPU_SPR_SIZE_DATA 2 // Size of the most great register1048 1049 #define SPR_LOG_SR_F 0x00 // Status register bit F (size = 1)1050 #define SPR_LOG_SR_CY_OV 0x01 // Status register bit overflow and carry (size = 2)1051 //#define SPR_LOG_SR_LO 0x02 // MAC LSB (size = 32)1052 //#define SPR_LOG_SR_HI 0x03 // MAC MSB (size = 32)1053 */1054 1055 /*1056 */1057 1058 992 }; // end namespace behavioural 1059 993 }; // end namespace morpheo -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Debug_component.h
r86 r88 2 2 #define Debug_component_H 3 3 4 # define DEBUG_true true 5 # define DEBUG_false false 4 // Boolean 5 # define DEBUG_true true 6 # define DEBUG_false false 6 7 7 # define DEBUG_Behavioural false 8 # define DEBUG_Generic false 9 # define DEBUG_Counter false 10 # define DEBUG_Queue false 11 # define DEBUG_Queue_Control false 12 # define DEBUG_RegisterFile false 13 # define DEBUG_RegisterFile_Monolithic false 14 # define DEBUG_RegisterFile_Multi_Banked false 15 # define DEBUG_Select false 16 # define DEBUG_Select_Priority_Fixed false 17 # define DEBUG_Shifter false 18 # define DEBUG_Sort false 19 # define DEBUG_Victim false 20 # define DEBUG_Victim_Pseudo_LRU false 21 # define DEBUG_Core false 22 # define DEBUG_Multi_Execute_loop false 23 # define DEBUG_Execute_loop false 24 # define DEBUG_Multi_Execute_unit false 25 # define DEBUG_Execute_unit false 26 # define DEBUG_Functionnal_unit false 27 # define DEBUG_Load_store_unit false 28 # define DEBUG_Multi_Read_unit false 29 # define DEBUG_Read_unit false 30 # define DEBUG_Read_queue false 31 # define DEBUG_Reservation_station false 32 # define DEBUG_Multi_Write_unit false 33 # define DEBUG_Write_unit false 34 # define DEBUG_Execute_queue false 35 # define DEBUG_Write_queue false 36 # define DEBUG_Network false 37 # define DEBUG_Execution_unit_to_Write_unit false 38 # define DEBUG_Read_unit_to_Execution_unit false 39 # define DEBUG_Register_unit false 40 # define DEBUG_Register_unit_Glue false 41 # define DEBUG_Multi_Front_end false 42 # define DEBUG_Front_end false 43 # define DEBUG_Context_State false 44 # define DEBUG_Decod_unit true 45 # define DEBUG_Decod true 46 # define DEBUG_Decod_queue true 47 # define DEBUG_Ifetch_unit false 48 # define DEBUG_Address_management false 49 # define DEBUG_Ifetch_queue false 50 # define DEBUG_Ifetch_unit_Glue false 51 # define DEBUG_Prediction_unit false 52 # define DEBUG_Branch_Target_Buffer false 53 # define DEBUG_Branch_Target_Buffer_Glue false 54 # define DEBUG_Branch_Target_Buffer_Register false 55 # define DEBUG_Direction false 56 # define DEBUG_Direction_Glue false 57 # define DEBUG_Meta_Predictor false 58 # define DEBUG_Meta_Predictor_Glue false 59 # define DEBUG_Two_Level_Branch_Predictor false 60 # define DEBUG_Two_Level_Branch_Predictor_Glue false 61 # define DEBUG_Branch_History_Table false 62 # define DEBUG_Pattern_History_Table false 63 # define DEBUG_Prediction_unit_Glue false 64 # define DEBUG_Return_Address_Stack false 65 # define DEBUG_Update_Prediction_Table false 66 # define DEBUG_Multi_OOO_Engine false 67 # define DEBUG_OOO_Engine false 68 # define DEBUG_Rename_unit false 69 # define DEBUG_Load_Store_pointer_unit false 70 # define DEBUG_Register_translation_unit false 71 # define DEBUG_Dependency_checking_unit false 72 # define DEBUG_Free_List_unit false 73 # define DEBUG_Register_Address_Translation_unit false 74 # define DEBUG_Register_translation_unit_Glue false 75 # define DEBUG_Stat_List_unit false 76 //#define DEBUG_Rename_queue false 77 # define DEBUG_Rename_select false 8 // Component 9 # define DEBUG_Morpheo true 10 # define DEBUG_Behavioural true 11 # define DEBUG_Configuration true 12 # define DEBUG_Generic true 13 # define DEBUG_Counter true 14 # define DEBUG_Priority true 15 # define DEBUG_Queue true 16 # define DEBUG_Queue_Control true 17 # define DEBUG_RegisterFile true 18 # define DEBUG_RegisterFile_Monolithic true 19 # define DEBUG_RegisterFile_Multi_Banked true 20 # define DEBUG_Select true 21 # define DEBUG_Select_Priority_Fixed true 22 # define DEBUG_Shifter true 23 # define DEBUG_Sort true 24 # define DEBUG_Victim true 25 # define DEBUG_Victim_Pseudo_LRU true 26 # define DEBUG_Core true 27 # define DEBUG_Core_Glue true 28 # define DEBUG_Dcache_Access true 29 # define DEBUG_Icache_Access true 30 # define DEBUG_Multi_Front_end true 31 # define DEBUG_Front_end true 32 # define DEBUG_Context_State true 33 # define DEBUG_Decod_unit true 34 # define DEBUG_Decod true 35 # define DEBUG_Decod_queue true 36 # define DEBUG_Front_end_Glue true 37 # define DEBUG_Ifetch_unit true 38 # define DEBUG_Address_management true 39 # define DEBUG_Ifetch_queue true 40 # define DEBUG_Ifetch_unit_Glue true 41 # define DEBUG_Prediction_unit true 42 # define DEBUG_Branch_Target_Buffer true 43 # define DEBUG_Branch_Target_Buffer_Glue true 44 # define DEBUG_Branch_Target_Buffer_Register true 45 # define DEBUG_Direction true 46 # define DEBUG_Direction_Glue true 47 # define DEBUG_Meta_Predictor true 48 # define DEBUG_Meta_Predictor_Glue true 49 # define DEBUG_Two_Level_Branch_Predictor true 50 # define DEBUG_Two_Level_Branch_Predictor_Glue true 51 # define DEBUG_Branch_History_Table true 52 # define DEBUG_Pattern_History_Table true 53 # define DEBUG_Prediction_unit_Glue true 54 # define DEBUG_Return_Address_Stack true 55 # define DEBUG_Update_Prediction_Table true 56 # define DEBUG_Multi_OOO_Engine true 57 # define DEBUG_OOO_Engine true 58 # define DEBUG_Commit_unit true 59 # define DEBUG_Issue_queue true 60 # define DEBUG_OOO_Engine_Glue true 61 # define DEBUG_Reexecute_unit true 62 # define DEBUG_Rename_unit true 63 # define DEBUG_Load_Store_pointer_unit true 64 # define DEBUG_Register_translation_unit true 65 # define DEBUG_Dependency_checking_unit true 66 # define DEBUG_Free_List_unit true 67 # define DEBUG_Register_Address_Translation_unit true 68 # define DEBUG_Register_translation_unit_Glue true 69 # define DEBUG_Stat_List_unit true 70 # define DEBUG_Rename_select true 71 # define DEBUG_Rename_unit_Glue true 72 # define DEBUG_Special_Register_unit true 73 # define DEBUG_Multi_Execute_loop true 74 # define DEBUG_Execute_loop true 75 # define DEBUG_Execute_loop_Glue true 76 # define DEBUG_Multi_Execute_unit true 77 # define DEBUG_Execute_unit true 78 # define DEBUG_Functionnal_unit true 79 # define DEBUG_Load_store_unit true 80 # define DEBUG_Multi_Read_unit true 81 # define DEBUG_Read_unit true 82 # define DEBUG_Read_queue true 83 # define DEBUG_Reservation_station true 84 # define DEBUG_Multi_Write_unit true 85 # define DEBUG_Write_unit true 86 # define DEBUG_Execute_queue true 87 # define DEBUG_Write_queue true 88 # define DEBUG_Network true 89 # define DEBUG_Execution_unit_to_Write_unit true 90 # define DEBUG_Read_unit_to_Execution_unit true 91 # define DEBUG_Register_unit true 92 # define DEBUG_Register_unit_Glue true 93 94 // Others 95 # define DEBUG_Allocation true 96 # define DEBUG_Interface true 78 97 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Environment.h
r81 r88 2 2 #define morpheo_behavioural_Environment_h 3 3 4 #if (defined(STATISTICS) and not defined(SYSTEMC)) 5 # error "To have the statistics, you must set flags SYSTEMC" 6 #endif 7 8 #if (defined(INFORMATION) and not defined(STATISTICS)) 9 # error "To have the information, you must set flags STATISTICS" 10 #endif 11 12 #if (defined(VHDL_TESTBENCH) and not defined(SYSTEMC)) 13 # error "To have the vhdl's test bench, you must set flags SYSTEMC" 14 #endif 15 16 #if (defined(VHDL_TESTBENCH) and not defined(VHDL)) 17 # error "To have the vhdl's test bench, you must set flags VHDL" 18 #endif 19 20 #if (defined(VHDL_TESTBENCH_ASSERT) and not defined(VHDL_TESTBENCH)) 21 # error "To have an assert in vhdl's test bench, you must set flags VHDL_TESTBENCH" 22 #endif 23 24 #if (defined(VHDL_TESTBENCH) and defined(SYSTEMC)) 25 # define SYSTEMC_VHDL_COMPATIBILITY 26 #endif 27 28 #if (defined(DEBUG)) 29 # define DEBUG_TEST 30 #endif 31 32 // Environment variable 33 #define MORPHEO_HOME "MORPHEO_HOME" 4 //#include "Common/include/Environment.h" 34 5 35 6 #endif -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interface.h
r82 r88 34 34 { 35 35 // -----[ fields ]---------------------------------------------------- 36 protected : const std::string 36 protected : const std::string _name ; 37 37 #ifdef POSITION 38 38 protected : const direction_t _direction ; … … 42 42 43 43 #ifdef POSITION 44 protected : std::string 45 #endif 46 47 protected : std::list<Signal *> 44 protected : std::string _comment ; 45 #endif 46 47 protected : std::list<Signal *> * _list_signal ; 48 48 49 49 #ifdef POSITION … … 69 69 public : ~Interface (); 70 70 71 public : std::string 71 public : std::string get_name (); 72 72 73 73 #ifdef POSITION 74 74 public : void set_comment (std::string comment); 75 protected : std::string get_comment (void);76 #endif 77 78 protected : std::string signal_name (std::stringname_interface,79 std::string 75 protected : std::string get_comment (void); 76 #endif 77 78 protected : std::string signal_name (std::string name_interface, 79 std::string name_signal , 80 80 direction_t direction ); 81 81 … … 83 83 public : bool find_signal (Signal * signal); 84 84 85 protected : std::string 86 public : Signal * set_signal (std::string 85 protected : std::string get_signal (void); 86 public : Signal * set_signal (std::string name , 87 87 direction_t direction, 88 88 uint32_t size , 89 89 presence_port_t presence_port = PORT_VHDL_YES_TESTBENCH_YES); 90 public : std::list<Signal *> 90 public : std::list<Signal *> * get_signal_list (void); 91 91 92 92 #ifdef SYSTEMC 93 public : sc_in_clk * set_signal_clk (std::string 93 public : sc_in_clk * set_signal_clk (std::string name , 94 94 uint32_t size , 95 95 presence_port_t presence_port=CLOCK_VHDL_YES) … … 120 120 121 121 public : template <typename T> 122 sc_in <T> * set_signal_in (std::string 122 sc_in <T> * set_signal_in (std::string name , 123 123 uint32_t size , 124 124 presence_port_t presence_port=PORT_VHDL_YES_TESTBENCH_YES) … … 149 149 150 150 public : template <typename T> 151 sc_out <T> * set_signal_out (std::string 151 sc_out <T> * set_signal_out (std::string name , 152 152 uint32_t size , 153 153 presence_port_t presence_port=PORT_VHDL_YES_TESTBENCH_YES) … … 218 218 public : void testbench_cycle (void); 219 219 public : void testbench_body (Vhdl * & vhdl , 220 std::string 221 std::string 220 std::string counter_name , 221 std::string reset_name ); 222 222 public : std::string testbench_test (Vhdl * & vhdl , 223 std::string 224 std::string 225 public : std::string testbench_test_ok (Vhdl * & vhdl);226 protected : std::string testbench_test_name (Vhdl* & vhdl);227 protected : std::string testbench_test_ok_name (Vhdl* & vhdl);228 protected : std::string testbench_test_transaction_name (Vhdl* & vhdl);223 std::string counter_name, 224 std::string reset_name); 225 public : std::string testbench_test_ok (Vhdl * & vhdl); 226 protected : std::string testbench_test_name (Vhdl * & vhdl); 227 protected : std::string testbench_test_ok_name (Vhdl * & vhdl); 228 protected : std::string testbench_test_transaction_name (Vhdl * & vhdl); 229 229 #endif 230 230 231 231 public : bool test_map (uint32_t depth, bool top_level, bool is_behavioural); 232 // 232 //public : bool test_equi (uint32_t depth); 233 233 234 234 #ifdef POSITION … … 238 238 public : XML toXML_mapping (void); 239 239 #endif 240 public : friend std::ostream& 241 240 public : friend std::ostream& operator<< (std::ostream& output_stream, 241 morpheo::behavioural::Interface & x); 242 242 243 243 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interface_fifo.h
r82 r88 5 5 * $Id$ 6 6 * 7 * [ 7 * [ Description ] 8 8 * 9 9 */ … … 35 35 36 36 #ifdef VHDL_TESTBENCH 37 private : bool _test_exhaustive;37 private : bool _test_exhaustive; 38 38 private : std::list<uint32_t> * _list_cycle ; 39 39 #endif 40 40 41 // -----[ 41 // -----[ methods ]--------------------------------------------------- 42 42 public : Interface_fifo (std::string name 43 43 #ifdef POSITION … … 107 107 public : bool testbench_transaction(void); 108 108 public : void testbench_cycle (void); 109 public : std::string testbench_test (Vhdl * & vhdl , 110 std::string counter_name, 111 std::string reset_name ); 109 public : std::string testbench_test (Vhdl * & vhdl , 110 std::string counter_name, 111 std::string reset_name ); 112 #ifdef VHDL_TESTBENCH_ASSERT 113 public : void testbench_assert (Vhdl * & vhdl , 114 std::string counter_name); 115 #endif 112 116 113 117 public : std::string testbench_test_transaction (Vhdl * & vhdl); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Interfaces.h
r82 r88 27 27 { 28 28 // -----[ fields ]---------------------------------------------------- 29 private : const std::string 30 private : const Tusage_t _usage;31 private : std::list<Interface_fifo*> 29 private : const std::string _name; 30 private : const Tusage_t _usage; 31 private : std::list<Interface_fifo*> * _list_interface; 32 32 33 33 // -----[ methods ]--------------------------------------------------- -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Parameters.h
r82 r88 9 9 */ 10 10 11 #include <stdint.h> 12 #include <iostream> 13 #include <math.h> 14 #include "Behavioural/include/Environment.h" 11 #include "Common/include/Environment.h" 12 #include "Behavioural/include/Parameters_test.h" 15 13 #include "Behavioural/include/Constants.h" 16 14 #include "Behavioural/include/Test.h" … … 19 17 #include "Common/include/Log2.h" 20 18 #include "Common/include/Debug.h" 19 #include <stdint.h> 20 #include <iostream> 21 #include <math.h> 21 22 22 23 namespace morpheo { 23 24 namespace behavioural { 25 26 #ifdef COPY 27 #error "Need COPY macro" 28 #endif 24 29 25 template <typename T> bool test (uint32_t size) 26 { 27 return (size <= (8*sizeof(T))); 28 }; 29 30 class Parameters_test 31 { 32 private : std::string _component; 33 protected : std::string _error; 34 protected : std::string _warning; 35 protected : std::string _information; 36 37 public : Parameters_test (std::string component) 38 { 39 _component = component; 40 _error = ""; 41 _warning = ""; 42 }; 43 public : ~Parameters_test (void) {}; 44 45 public : bool have_error (void) { return (_error.length() != 0);}; 46 public : void error (std::string str) { _error += MSG_ERROR ; _error += " <" + _component + "> " + str + "\n";} 47 public : void warning (std::string str) { _warning += MSG_WARNING ; _warning += " <" + _component + "> " + str + "\n";} 48 public : void information (std::string str) { _information += MSG_INFORMATION; _information += " <" + _component + "> " + str + "\n";} 49 public : std::string print (void) { return _error + _warning + _information;}; 50 }; 30 #define COPY(param) do {duplicate(param); param->copy();} while (0) 51 31 52 32 // Virtual Class - Interface of each component … … 54 34 { 55 35 // -----[ fields ]---------------------------------------------------- 56 public : static const uint32_t _size_instruction = 32; 57 public : static const uint32_t _nb_operation = MAX_OPERATION; 58 public : static const uint32_t _nb_type = MAX_TYPE; 59 public : static const uint32_t _size_operation = SIZE_OPERATION; 60 public : static const uint32_t _size_type = SIZE_TYPE; 61 public : static const uint32_t _size_exception = SIZE_EXCEPTION; 62 public : static const uint32_t _size_exception_use = SIZE_EXCEPTION_USE; 63 public : static const uint32_t _size_exception_memory = SIZE_EXCEPTION_MEMORY; 64 public : static const uint32_t _size_exception_custom = SIZE_EXCEPTION_CUSTOM; 65 public : static const uint32_t _size_exception_alu = SIZE_EXCEPTION_ALU ; 66 public : static const uint32_t _size_exception_decod = SIZE_EXCEPTION_DECOD ; 67 public : static const uint32_t _size_exception_ifetch = SIZE_EXCEPTION_IFETCH; 68 public : static const uint32_t _size_icache_type = SIZE_ICACHE_TYPE; 69 public : static const uint32_t _size_icache_error = SIZE_ICACHE_ERROR; 70 public : static const uint32_t _size_dcache_type = SIZE_DCACHE_TYPE; 71 public : static const uint32_t _size_dcache_error = SIZE_DCACHE_ERROR; 72 public : static const uint32_t _nb_general_register_logic = 32; 73 public : static const uint32_t _nb_special_register_logic = NB_SPR_LOGIC; 74 public : static const uint32_t _size_general_register_logic = 5; 75 public : static const uint32_t _size_special_register_logic = LOG2_NB_SPR_LOGIC; 76 public : static const uint32_t _size_event_state = SIZE_EVENT_STATE; 77 public : static const uint32_t _size_event_type = SIZE_EVENT_TYPE; 78 public : static const uint32_t _size_branch_state = SIZE_BRANCH_STATE; 79 public : static const uint32_t _size_branch_condition = SIZE_BRANCH_CONDITION; 36 public : static const uint32_t _size_instruction = 32; 37 public : static const uint32_t _size_spr = 32; 38 public : static const uint32_t _nb_operation = MAX_OPERATION; 39 public : static const uint32_t _nb_type = MAX_TYPE; 40 public : static const uint32_t _size_operation = SIZE_OPERATION; 41 public : static const uint32_t _size_type = SIZE_TYPE; 42 public : static const uint32_t _size_exception = SIZE_EXCEPTION; 43 public : static const uint32_t _size_exception_use = SIZE_EXCEPTION_USE; 44 public : static const uint32_t _size_exception_memory = SIZE_EXCEPTION_MEMORY; 45 public : static const uint32_t _size_exception_custom = SIZE_EXCEPTION_CUSTOM; 46 public : static const uint32_t _size_exception_alu = SIZE_EXCEPTION_ALU ; 47 public : static const uint32_t _size_exception_decod = SIZE_EXCEPTION_DECOD ; 48 public : static const uint32_t _size_exception_ifetch = SIZE_EXCEPTION_IFETCH; 49 public : static const uint32_t _size_icache_type = SIZE_ICACHE_TYPE; 50 public : static const uint32_t _size_icache_error = SIZE_ICACHE_ERROR; 51 public : static const uint32_t _size_dcache_type = SIZE_DCACHE_TYPE; 52 public : static const uint32_t _size_dcache_error = SIZE_DCACHE_ERROR; 53 public : static const uint32_t _nb_general_register_logic = 32; 54 public : static const uint32_t _nb_special_register_logic = NB_SPR_LOGIC; 55 public : static const uint32_t _size_general_register_logic = 5; 56 public : static const uint32_t _size_special_register_logic = LOG2_NB_SPR_LOGIC; 57 public : static const uint32_t _size_special_address_group = 5; 58 public : static const uint32_t _size_special_address_register = 11; 59 public : static const uint32_t _size_event_state = SIZE_EVENT_STATE; 60 public : static const uint32_t _size_event_type = SIZE_EVENT_TYPE; 61 public : static const uint32_t _size_branch_state = SIZE_BRANCH_STATE; 62 public : static const uint32_t _size_branch_condition = SIZE_BRANCH_CONDITION; 63 64 public : static const uint32_t _shift_spr_num_group = _size_special_address_register; 65 public : static const uint32_t _mask_spr_num_group = 0x1f ; // 1_1111 66 public : static const uint32_t _mask_spr_num_reg = 0x7ff; // 111_1111_1111 67 68 // simulation 69 public : uint64_t _simulation_nb_cyle ; 70 public : uint64_t _simulation_nb_instruction ; 71 72 // parameters depends 73 public : uint32_t _size_context_id ; 74 public : bool _have_port_context_id ; 75 76 public : uint32_t _size_front_end_id ; 77 public : bool _have_port_front_end_id ; 78 79 public : uint32_t _size_ooo_engine_id ; 80 public : bool _have_port_ooo_engine_id ; 81 82 public : uint32_t _size_instruction_address ; 83 //public : bool _have_port_instruction_address ; // always true 84 85 public : uint32_t _size_data_address ; 86 //public : bool _have_port_data_address ; // always true 87 88 public : uint32_t _size_nb_inst_decod ; 89 //public : bool _have_port_nb_inst_decod ; // always true 90 91 public : uint32_t _size_nb_inst_commit ; 92 //public : bool _have_port_nb_inst_commit ; // always true 93 94 public : uint32_t _size_depth ; 95 public : bool _have_port_depth ; 96 97 public : uint32_t _size_ifetch_queue_ptr ; 98 public : bool _have_port_ifetch_queue_ptr ; 99 100 public : uint32_t _size_inst_ifetch_ptr ; // nb_inst_fetch 101 public : bool _have_port_inst_ifetch_ptr ; 102 103 //public : uint32_t _size_branch_update_prediction_id ; // = size_depth 104 //public : bool _have_port_branch_update_prediction_id ; // = size_depth 105 106 public : uint32_t _size_rob_ptr ; 107 public : bool _have_port_rob_ptr ; 108 109 public : uint32_t _size_load_queue_ptr ; 110 public : bool _have_port_load_queue_ptr ; 111 112 public : uint32_t _size_store_queue_ptr ; 113 //public : bool _have_port_store_queue_ptr ; // always true (min = 1) 114 115 public : uint32_t _size_general_data ; 116 //public : bool _have_port_general_data ; // always true 117 118 public : uint32_t _size_special_data ; 119 //public : bool _have_port_special_data ; // always true 120 121 public : uint32_t _size_general_register ; 122 //public : bool _have_port_general_register ; // always true 123 124 public : uint32_t _size_special_register ; 125 //public : bool _have_port_special_register ; // always true 80 126 81 127 // -----[ methods ]--------------------------------------------------- … … 87 133 public : virtual Parameters_test msg_error (void) = 0; 88 134 89 // methods to generate configuration file 90 135 // methods to copy depends parameters 136 // (these parameters can't be static : because can have multi instance of toplevel) 137 public : virtual void copy (void) = 0; 138 //public : void copy (Parameters * param); 139 public : void duplicate (Parameters * param); 140 91 141 // methods to test 92 142 public : void test (void); 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trunk/IPs/systemC/processor/Morpheo/Behavioural/include/SPR_access_mode.h
r81 r88 10 10 namespace behavioural { 11 11 12 typedef struct12 class spr_address_t 13 13 { 14 Tgeneral_data_t _group; 15 Tgeneral_data_t _register; 16 } spr_address_t; 14 public : Tgeneral_data_t _group; 15 public : Tgeneral_data_t _register; 17 16 17 public : spr_address_t (void) {}; 18 public : spr_address_t (Tgeneral_data_t grp, 19 Tgeneral_data_t reg) 20 { 21 _group = grp; 22 _register = reg; 23 }; 24 }; 18 25 19 26 class SPR_access_mode 20 27 { 21 private : spr_access_mode_t ** _spr_generic ;22 private : uint32_t * _max_register_by_group; 28 private : spr_access_mode_t ** _spr_generic ; //[NB_GROUP][NB_REG_GROUP] 29 private : uint32_t * _max_register_by_group; //[NB_GROUP] 23 30 24 31 public : SPR_access_mode(); … … 29 36 public : bool valid (uint32_t num_group, uint32_t num_reg); 30 37 public : bool valid (spr_address_t address); 38 public : bool exist (uint32_t num_group, uint32_t num_reg); 39 public : bool exist (spr_address_t address); 31 40 public : bool read (spr_address_t address, Tcontrol_t SM, Tcontrol_t SUMRA); 32 41 public : bool write (spr_address_t address, Tcontrol_t SM, Tcontrol_t SUMRA); … … 35 44 public : uint32_t implement_group (uint32_t num_group); 36 45 public : void change_mode (uint32_t num_group, uint32_t num_reg, spr_access_mode_t new_mode); 46 public : void invalid_register(uint32_t num_group, uint32_t num_reg); 47 37 48 }; 38 49 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Signal.h
r82 r88 38 38 UINT64_T } type_info_t; 39 39 40 typedef enum {PORT_VHDL_YES_TESTBENCH_YES, 40 typedef enum {PORT_SYSTEMC_NO , // also, vhdl_no and testbench_no 41 PORT_VHDL_YES_TESTBENCH_YES, 41 42 PORT_VHDL_YES_TESTBENCH_NO , 42 43 PORT_VHDL_NO_TESTBENCH_YES , … … 72 73 73 74 // -----[ methods ]--------------------------------------------------- 74 public : Signal (std::stringname ,75 direction_t direction ,76 uint32_t size ,77 presence_port_t presence_port = PORT_VHDL_YES_TESTBENCH_YES);78 public : Signal (const Signal &);79 public : ~Signal ();75 public : Signal (std::string name , 76 direction_t direction , 77 uint32_t size , 78 presence_port_t presence_port = PORT_VHDL_YES_TESTBENCH_YES); 79 public : Signal (const Signal &); 80 public : ~Signal (); 80 81 81 82 public : std::string get_name (void); … … 93 94 94 95 public : bool test_map (uint32_t depth, bool top_level, bool is_behavioural); 95 // 96 //public : bool test_equi (uint32_t depth); 96 97 97 98 public : void link (Signal * signal_dest, … … 108 109 case IN : {return read_in <T>();} 109 110 case OUT : {return read_out <T>();} 110 default : throw (ErrorMorpheo ("Signal \""+_name+"\" : direction unknow. "));111 default : throw (ErrorMorpheo ("Signal \""+_name+"\" : direction unknow.\n")); 111 112 } 112 113 } … … 122 123 case UINT32_T : return (static_cast<sc_in <uint32_t> *>(_sc_signal_map)->read()); 123 124 case UINT64_T : return (static_cast<sc_in <uint64_t> *>(_sc_signal_map)->read()); 124 default : throw (ErrorMorpheo ("Signal \""+_name+"\" : type unknow. "));125 default : throw (ErrorMorpheo ("Signal \""+_name+"\" : type unknow.\n")); 125 126 } 126 127 } … … 136 137 case UINT32_T : return (static_cast<sc_out <uint32_t> *>(_sc_signal_map)->read()); 137 138 case UINT64_T : return (static_cast<sc_out <uint64_t> *>(_sc_signal_map)->read()); 138 default : throw (ErrorMorpheo ("Signal \""+_name+"\" : type unknow. "));139 default : throw (ErrorMorpheo ("Signal \""+_name+"\" : type unknow.\n")); 139 140 } 140 141 } … … 148 149 149 150 if (_type_info != UNKNOW) 150 throw (ErrorMorpheo ( "Signal \""+_name+"\" : already allocate."));151 throw (ErrorMorpheo (toString(_("Signal \"%s\" : already allocate.\n"),_name.c_str()))); 151 152 152 153 if (test<T>(_size) == false) 153 throw (ErrorMorpheo ( "Signal \""+_name+"\" : size is too small to the associate type."));154 throw (ErrorMorpheo (toString(_("Signal \"%s\" : size is too small (%d bits) to the associate type (%d bits).\n"),_name.c_str(),_size,8*sizeof(T)))); 154 155 155 156 _is_allocate = true; … … 157 158 _sc_signal_map = sc_signal; 158 159 159 log_printf(TRACE,Behavioural,FUNCTION, "Allocation of %s - %.8x", _name.c_str(), (uint32_t)(_sc_signal_map));160 161 160 if (typeid(T) == typeid(bool )) 162 161 _type_info = BOOL; … … 175 174 else 176 175 _type_info = UNKNOW; 176 177 log_printf(TRACE,Behavioural,FUNCTION, "Allocation of %s (%s, 0x%.8x)", _name.c_str(),toString(_type_info).c_str(), static_cast<uint32_t>(reinterpret_cast<uint64_t>(_sc_signal_map))); 177 178 178 179 log_printf(FUNC,Behavioural,FUNCTION,"End"); … … 204 205 }; 205 206 }; // end namespace behavioural 207 208 209 206 210 207 211 template<> inline std::string toString<morpheo::behavioural::presence_port_t>(const morpheo::behavioural::presence_port_t& x) … … 221 225 } 222 226 227 typedef enum {UNKNOW , 228 BOOL , 229 UINT8_T , 230 UINT16_T , 231 UINT32_T , 232 UINT64_T } type_info_t; 233 234 template<> inline std::string toString<morpheo::behavioural::type_info_t>(const morpheo::behavioural::type_info_t& x) 235 { 236 switch (x) 237 { 238 case morpheo::behavioural::BOOL : return "bool" ; break; 239 case morpheo::behavioural::UINT8_T : return "uint8_t" ; break; 240 case morpheo::behavioural::UINT16_T : return "uint16_t"; break; 241 case morpheo::behavioural::UINT32_T : return "uint32_t"; break; 242 case morpheo::behavioural::UINT64_T : return "uint64_t"; break; 243 case morpheo::behavioural::UNKNOW : 244 default : return "unknow" ; break; 245 } 246 } 247 223 248 }; // end namespace morpheo 224 249 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Stat.h
r84 r88 44 44 class Stat 45 45 { 46 47 48 49 50 46 private: const std::string _name_instance; 47 private: const std::string _name_component; 48 private: const cycle_t _nb_cycle_before_begin; 49 private: const cycle_t _period; 50 private: const bool _save_periodic; 51 51 // Tableau des variables 52 52 private: std::map<std::string, var_t> * _list_operand; 53 53 // Liste chaîné des expressions 54 54 private: std::list<expr_t> * _list_expr; 55 55 56 56 private: counter_t * _cycle; 57 57 58 58 private: std::list<Stat *> * _list_stat; 59 59 60 60 private: bool _generate_file; 61 61 62 62 public : Stat (std::string name_instance, -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Stat_binary_tree.h
r81 r88 14 14 namespace behavioural { 15 15 16 typedef enum { VARIABLE, CONSTANT, OPERATOR_UNARY, OPERATOR_BINARY} data_type_t;16 typedef enum {NONE, VARIABLE, CONSTANT, OPERATOR_UNARY, OPERATOR_BINARY} data_type_t; 17 17 18 18 typedef union … … 26 26 { 27 27 // arbre binaire 28 29 30 31 32 28 private : Stat_binary_tree * _root; 29 private : Stat_binary_tree * _left; 30 private : Stat_binary_tree * _right; 31 private : data_type_t _data_type; 32 private : data_t _data; 33 33 34 34 /* private : Stat_binary_tree (data_type_t data_type, data_t data); */ 35 public : Stat_binary_tree (counter_t cst);36 public : Stat_binary_tree (counter_t * var);37 public : Stat_binary_tree (operator_t op);38 39 public : ~Stat_binary_tree (void);35 public : Stat_binary_tree (std::string expr, 36 std::map<std::string, counter_t*> * operand); 37 public : Stat_binary_tree (counter_t cst); 38 public : Stat_binary_tree (counter_t * var); 39 public : Stat_binary_tree (operator_t op ); 40 40 41 private : void insert_tree (Stat_binary_tree * tree); 42 public : Stat_binary_tree * insert_tree (counter_t cst); 43 public : Stat_binary_tree * insert_tree (counter_t * var); 44 public : Stat_binary_tree * insert_tree (operator_t op ); 41 public : ~Stat_binary_tree (void); 42 43 private : void insert_tree (Stat_binary_tree * tree); 44 public : Stat_binary_tree * insert_tree (counter_t cst); 45 public : Stat_binary_tree * insert_tree (counter_t * var); 46 public : Stat_binary_tree * insert_tree (operator_t op ); 45 47 46 public : Stat_binary_tree * goto_top_level (void); 47 public : Stat_binary_tree * goto_next_root (void); 48 private : void change_type (counter_t cst); 49 private : void change_type (counter_t * var); 50 private : void change_type (operator_t op ); 51 52 public : Stat_binary_tree * goto_top_level (void); 53 public : Stat_binary_tree * goto_next_root (void); 48 54 49 public : boolvalid (void);55 public : bool valid (void); 50 56 51 public : counter_teval (void);57 public : counter_t eval (void); 52 58 53 private : counter_t val_tree (void); 54 private : counter_t val_leaf (void); 55 private : bool is_leaf (void); 59 private : counter_t val_tree (void); 60 private : counter_t val_leaf (void); 61 private : bool is_leaf (void); 62 63 public : void import (std::string expr, 64 std::map<std::string, counter_t*> * operand); 65 66 67 public : void print (uint32_t depth=0); 56 68 57 69 // public : friend std::ostream& operator<< (std::ostream&, const morpheo::Stat_binary_tree &); -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Types.h
r81 r88 25 25 typedef uint8_t Tcounter_t; // universal counter 26 26 typedef uint8_t Tptr_t; // universal pointer 27 27 typedef uint32_t Tspr_t; 28 typedef uint16_t Tspr_address_t; 29 28 30 //typedef uint32_t Tdestination1_t; 29 31 //typedef uint32_t Tdestination2_t; … … 69 71 typedef enum 70 72 { 73 ORBIS32, 74 ORBIS64, 75 ORFPX32, 76 ORFPX64, 77 ORVDX64 78 } ISA; 79 80 typedef enum 81 { 71 82 PRIORITY_STATIC, 72 83 PRIORITY_ROUND_ROBIN … … 93 104 PREDICTOR_NEVER_TAKE , // Branch is never Take 94 105 PREDICTOR_ALWAYS_TAKE , // Branch is always Take 95 PREDICTOR_STATIC , // If the ad ress of destination is previous, then the branch is take106 PREDICTOR_STATIC , // If the address of destination is previous, then the branch is take 96 107 PREDICTOR_LAST_TAKE , // The direction is as the last time (if is the first time : static) 97 108 PREDICTOR_COUNTER , // Counter table … … 99 110 PREDICTOR_GLOBAL , // Counter bank indexed with history table 100 111 PREDICTOR_META , // A meta_predictor choose between 2 predictor : the local or the global 101 PREDICTOR_CUSTOM // Not epredefined scheme112 PREDICTOR_CUSTOM // Not predefined scheme 102 113 } Tpredictor_t; 114 115 //--------------------------------------------------[ instruction ]----- 116 class instruction_t 117 { 118 public : 119 Ttype_t _type ; 120 Toperation_t _operation ; 121 ISA _isa_subset; 122 uint8_t _isa_class ; 123 124 instruction_t (Ttype_t type , 125 Toperation_t operation , 126 ISA isa_subset, 127 uint8_t isa_class ) 128 { 129 _type = type ; 130 _operation = operation ; 131 _isa_subset = isa_subset; 132 _isa_class = isa_class ; 133 } 134 }; 135 136 instruction_t instruction_information (uint32_t instruction); 137 uint32_t instruction_size_data (uint32_t instruction); 103 138 104 139 //----------------------------------------------[ spr_mode_access ]----- … … 122 157 switch (x) 123 158 { 124 case TYPE_ALU : return "ALU" ; break; 125 case TYPE_SHIFT : return "SHIFT" ; break; 126 case TYPE_MOVE : return "MOVE" ; break; 127 case TYPE_TEST : return "TEST" ; break; 128 case TYPE_MUL_DIV : return "MUL_DIV"; break; 129 case TYPE_EXTEND : return "EXTEND" ; break; 130 case TYPE_FIND : return "FIND" ; break; 131 case TYPE_SPECIAL : return "SPECIAL"; break; 132 case TYPE_CUSTOM : return "CUSTOM" ; break; 133 case TYPE_BRANCH : return "BRANCH" ; break; 134 case TYPE_MEMORY : return "MEMORY" ; break; 135 default : return "" ; break; 159 case TYPE_ALU : return "ALU" ; break; 160 case TYPE_SHIFT : return "SHIFT" ; break; 161 case TYPE_MOVE : return "MOVE" ; break; 162 case TYPE_TEST : return "TEST" ; break; 163 case TYPE_MUL : return "MUL" ; break; 164 case TYPE_DIV : return "DIV" ; break; 165 case TYPE_EXTEND : return "EXTEND" ; break; 166 case TYPE_FIND : return "FIND" ; break; 167 case TYPE_SPECIAL : return "SPECIAL" ; break; 168 case TYPE_CUSTOM : return "CUSTOM" ; break; 169 case TYPE_BRANCH : return "BRANCH" ; break; 170 case TYPE_MEMORY : return "MEMORY" ; break; 171 default : return "Unknow type"; break; 136 172 } 137 173 }; -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Usage.h
r81 r88 16 16 # define USE_STATISTICS 0x20 17 17 # define USE_INFORMATION 0x40 18 # define USE_HEADER 0x80 18 19 //#define USE_ 0x80 19 20 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h
r87 r88 10 10 #define MORPHEO_MAJOR_VERSION 0 11 11 #define MORPHEO_MINOR_VERSION 2 12 #define MORPHEO_REVISION 87 12 #define MORPHEO_REVISION @REVISION 13 #define MORPHEO_CODENAME "Castor" 14 15 #define MORPHEO_DATE_DAY @DATE_DAY 16 #define MORPHEO_DATE_MONTH @DATE_MONTH 17 #define MORPHEO_DATE_YEAR @DATE_YEAR 13 18 14 19 #define MORPHEO_VERSION morpheo::toString(MORPHEO_MAJOR_VERSION)+"."+morpheo::toString(MORPHEO_MINOR_VERSION)+"."+morpheo::toString(MORPHEO_REVISION) 20 #define MORPHEO_HEADER morpheo::toString(MORPHEO_VERSION)+" - "+morpheo::toString(MORPHEO_CODENAME) 21 #define MORPHEO_DATE morpheo::toString(MORPHEO_DATE_YEAR)+"/"+morpheo::toString(MORPHEO_DATE_MONTH)+"/"+morpheo::toString(MORPHEO_DATE_DAY) 15 22 16 23 /* 17 18 24 [ Change Log ] 19 25 | … … 22 28 | SystemC Only 23 29 | 24 +-[ Minor Version 1 ] 30 +-[ Minor Version 1 ] - Castor 25 31 | | 26 32 | | Second Architecture, change the load_store_unit and implement exception -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h.sed
r85 r88 11 11 #define MORPHEO_MINOR_VERSION 2 12 12 #define MORPHEO_REVISION @REVISION 13 #define MORPHEO_CODENAME "Castor" 14 15 #define MORPHEO_DATE_DAY @DATE_DAY 16 #define MORPHEO_DATE_MONTH @DATE_MONTH 17 #define MORPHEO_DATE_YEAR @DATE_YEAR 13 18 14 19 #define MORPHEO_VERSION morpheo::toString(MORPHEO_MAJOR_VERSION)+"."+morpheo::toString(MORPHEO_MINOR_VERSION)+"."+morpheo::toString(MORPHEO_REVISION) 20 #define MORPHEO_HEADER morpheo::toString(MORPHEO_VERSION)+" - "+morpheo::toString(MORPHEO_CODENAME) 21 #define MORPHEO_DATE morpheo::toString(MORPHEO_DATE_YEAR)+"/"+morpheo::toString(MORPHEO_DATE_MONTH)+"/"+morpheo::toString(MORPHEO_DATE_DAY) 15 22 16 23 /* 17 18 24 [ Change Log ] 19 25 | … … 22 28 | SystemC Only 23 29 | 24 +-[ Minor Version 1 ] 30 +-[ Minor Version 1 ] - Castor 25 31 | | 26 32 | | Second Architecture, change the load_store_unit and implement exception -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Vhdl.h
r81 r88 14 14 #include <iostream> 15 15 #include <list> 16 #include " Behavioural/include/Environment.h"16 #include "Common/include/Environment.h" 17 17 #include "Behavioural/include/Direction.h" 18 18 #include "Common/include/ToString.h" … … 53 53 private : void generate_file_package (void); 54 54 private : void generate_file_model (void); 55 56 private : std::string 57 std::stringfilename ,58 std::stringpackage_name ,59 std::stringentity_name );60 private : std::string 61 std::stringfilename ,62 std::stringentity_name ,63 std::stringarchitecture_name );64 private : std::string 65 std::stringfilename );66 private : std::string 67 std::stringname );68 private : std::string 69 std::stringname ,70 std::stringentity_name );71 private : std::string 72 std::stringname );73 74 private : std::string 75 public : void set_port (std::string 55 56 private : std::string get_package (uint32_t depth , 57 std::string filename , 58 std::string package_name , 59 std::string entity_name ); 60 private : std::string get_model (uint32_t depth , 61 std::string filename , 62 std::string entity_name , 63 std::string architecture_name ); 64 private : std::string get_header (uint32_t depth , 65 std::string filename ); 66 private : std::string get_entity (uint32_t depth , 67 std::string name ); 68 private : std::string get_architecture (uint32_t depth , 69 std::string name , 70 std::string entity_name ); 71 private : std::string get_component (uint32_t depth , 72 std::string name ); 73 74 private : std::string get_port (uint32_t depth ); 75 public : void set_port (std::string name , 76 76 direction_t direction , 77 std::string 78 public : void set_port (std::string 77 std::string type ); 78 public : void set_port (std::string name , 79 79 direction_t direction , 80 80 uint32_t size ); 81 private : std::string 82 public : void set_signal (std::string 83 std::string 84 public : void set_signal (std::string 81 private : std::string get_signal (uint32_t depth ); 82 public : void set_signal (std::string name , 83 std::string type ); 84 public : void set_signal (std::string name , 85 85 uint32_t signal ); 86 public : void set_signal (std::string 87 std::string 88 std::string 89 public : void set_signal (std::string 86 public : void set_signal (std::string name , 87 std::string type , 88 std::string init ); 89 public : void set_signal (std::string name , 90 90 uint32_t size , 91 std::string 92 public : void set_signal (std::string 91 std::string init ); 92 public : void set_signal (std::string name , 93 93 uint32_t size , 94 94 uint32_t init ); 95 public : void set_constant (std::string 96 std::string 97 std::string 98 public : void set_constant (std::string 95 public : void set_constant (std::string name , 96 std::string type , 97 std::string init ); 98 public : void set_constant (std::string name , 99 99 uint32_t size , 100 std::string 101 public : void set_constant (std::string 100 std::string init ); 101 public : void set_constant (std::string name , 102 102 uint32_t size , 103 103 uint32_t init ); 104 104 105 private : std::string 106 public : void set_type (std::string 107 std::string 108 private : std::string 109 public : void set_alias (std::string 110 std::string 111 std::string 112 std::string 113 public : void set_alias (std::string 105 private : std::string get_type (uint32_t depth ); 106 public : void set_type (std::string name , 107 std::string type ); 108 private : std::string get_alias (uint32_t depth ); 109 public : void set_alias (std::string name1 , 110 std::string type1 , 111 std::string name2 , 112 std::string range2 ); 113 public : void set_alias (std::string name1 , 114 114 uint32_t size1 , 115 std::string name2 , 116 std::string range2 ); 115 std::string name2 , 116 std::string range2 ); 117 118 public : std::string get_list (std::list<std::string> liste , 119 uint32_t depth , 120 std::string separator , 121 bool last_separator ); 122 public : void set_list (std::list<std::string> & liste , 123 std::string text ); 117 124 118 public : std::string get_list (std::list<std::string> liste , 119 uint32_t depth , 120 std::string separator , 121 bool last_separator ); 122 public : void set_list (std::list<std::string> & liste , 123 std::string text ); 125 private : std::string get_body (uint32_t depth ); 126 public : void set_body (std::string text ); 127 128 public : void set_body (Vhdl * vhdl ); 129 130 public : void set_body_component (std::string name_instance , 131 std::string name_component , 132 std::list<std::string> list_port_map); 133 public : void set_body_component_port_map (std::list<std::string> & list_port_map, 134 std::string name_port , 135 uint32_t size_port , 136 std::string name_signal , 137 uint32_t size_signal ); 124 138 125 private : std::string get_body (uint32_t depth ); 126 public : void set_body (std::string text ); 139 private : std::string get_library_ieee (uint32_t depth ); 140 private : std::string get_library_work (uint32_t depth ); 141 public : void set_library_work (std::string package_name ); 127 142 128 public : void set_body_component (std::string name_instance , 129 std::string name_component , 130 std::list<std::string> list_port_map ); 131 public : void set_body_component_port_map (std::list<std::string> & list_port_map , 132 std::string name_port , 133 uint32_t size_port , 134 std::string name_signal , 135 uint32_t size_signal ); 136 137 private : std::string get_library_ieee (uint32_t depth ); 138 private : std::string get_library_work (uint32_t depth ); 139 public : void set_library_work (std::string package_name ); 140 141 private : std::string direction_toString (direction_t direction); 143 private : std::string direction_toString (direction_t direction ); 142 144 }; 143 145 -
trunk/IPs/systemC/processor/Morpheo/Behavioural/include/XML.h
r81 r88 40 40 public : bool singleton_end (void); 41 41 public : bool attribut (std::string name, std::string value); 42 public : bool insert_XML (XML xml 42 public : bool insert_XML (XML xml, uint32_t offset_depth=0); 43 43 44 44 public : void filename_extension (std::string extension); 45 public : void generate_file ( void);46 public : void generate_file (std::string encoding);47 public : std::string 48 public : std::string 45 public : void generate_file (std::string dirname, std::string encoding); 46 public : void generate_file (std::string dirname="."); 47 public : std::string get_body (void); 48 public : std::string get_body (uint32_t depth); 49 49 50 50 public : bool comment (std::string text); 51 51 public : bool text (std::string text); 52 52 53 private : std::string 54 private : std::string 53 private : std::string indent (uint32_t depth ); 54 private : std::string indent (void); 55 55 private : uint32_t depth (void); 56 56
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