Ignore:
Timestamp:
Dec 16, 2008, 8:36:25 PM (16 years ago)
Author:
moulu
Message:

1) Execute_queue VHDL.

Location:
trunk/IPs/systemC/processor/Morpheo/Behavioural
Files:
1 added
10 edited

Legend:

Unmodified
Added
Removed

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest/src/test.cpp

    r88 r96  
    77 */
    88
    9 #define NB_ITERATION  16
     9#define NB_ITERATION  1
    1010#define CYCLE_MAX     (128*NB_ITERATION)
    1111

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_genMoore.cpp

    r88 r96  
    33 * $Id$
    44 *
    5  * [ Description ]
     5 * [ Description ]
    66 *
    77 */

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_transition.cpp

    r88 r96  
    33 * $Id$
    44 *
    5  * [ Description ]
     5 * [ Description ]
    66 *
    77 */

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_vhdl_body.cpp

    r81 r96  
    33 * $Id$
    44 *
    5  * [ Description ]
     5 * [ Description ]
    66 *
    77 */
    … …  
    2424  {
    2525    log_printf(FUNC,Execute_queue,FUNCTION,"Begin");
    26     vhdl->set_body ("");
     26    vhdl->set_body (0,"");
     27    vhdl->set_body (0,"process (in_CLOCK)");
     28    vhdl->set_body (0,"begin");
     29    vhdl->set_body (1,"if in_CLOCK'event and in_CLOCK = '1' then");
     30//     vhdl->set_body (2,"if in_NRESET = '0' then");
     31//     vhdl->set_body (3,"reg_CURRENT_STATE <= STATE_0;");
     32//     vhdl->set_body (2,"else");
     33    vhdl->set_body (3,"reg_CURRENT_STATE <= sig_NEXT_STATE;");
     34//     vhdl->set_body (2,"end if;");
     35
     36    for (uint32_t i = 0; i <_param->_size_queue - 1; i++)
     37      {
     38        vhdl->set_body (2,"if sig_WEN_"+toString(i)+" = '1' then");
     39        vhdl->set_body (3,"if sig_SEL_"+toString(i)+" = '0' then");
     40        if (_param->_have_port_context_id)
     41        vhdl->set_body (4,"reg_CONTEXT_ID_"+toString(i)+"    <= in_EXECUTE_QUEUE_IN_CONTEXT_ID;");
     42        if (_param->_have_port_front_end_id)
     43        vhdl->set_body (4,"reg_FRONT_END_ID_"+toString(i)+"  <= in_EXECUTE_QUEUE_IN_FRONT_END_ID;");
     44        if (_param->_have_port_ooo_engine_id)
     45        vhdl->set_body (4,"reg_OOO_ENGINE_ID_"+toString(i)+" <= in_EXECUTE_QUEUE_IN_OOO_ENGINE_ID;");
     46        if (_param->_have_port_rob_ptr)
     47        vhdl->set_body (4,"reg_PACKET_ID_"+toString(i)+"     <= in_EXECUTE_QUEUE_IN_PACKET_ID;");
     48        vhdl->set_body (4, "reg_FLAGS_"+toString(i)+"        <= in_EXECUTE_QUEUE_IN_FLAGS;");
     49        vhdl->set_body (4, "reg_EXCEPTION_"+toString(i)+"    <= in_EXECUTE_QUEUE_IN_EXCEPTION;");
     50        vhdl->set_body (4, "reg_NO_SEQUENCE_"+toString(i)+"  <= in_EXECUTE_QUEUE_IN_NO_SEQUENCE;");
     51        vhdl->set_body (4, "reg_ADDRESS_"+toString(i)+"      <= in_EXECUTE_QUEUE_IN_ADDRESS;");
     52        vhdl->set_body (4, "reg_DATA_"+toString(i)+"         <= in_EXECUTE_QUEUE_IN_DATA;");
     53
     54        vhdl->set_body (3, "else");
     55        if (_param->_have_port_context_id)
     56        vhdl->set_body (4,"reg_CONTEXT_ID_"+toString(i)+"    <= reg_CONTEXT_ID_"+toString(i+1)+";");
     57        if (_param->_have_port_front_end_id)
     58        vhdl->set_body (4,"reg_FRONT_END_ID_"+toString(i)+"  <= reg_FRONT_END_ID_"+toString(i+1)+";");
     59        if (_param->_have_port_ooo_engine_id)
     60        vhdl->set_body (4,"reg_OOO_ENGINE_ID_"+toString(i)+" <= reg_OOO_ENGINE_ID_"+toString(i+1)+";");
     61        if (_param->_have_port_rob_ptr)
     62        vhdl->set_body (4,"reg_PACKET_ID_"+toString(i)+"     <= reg_PACKET_ID_"+toString(i+1)+";");
     63        vhdl->set_body (4, "reg_FLAGS_"+toString(i)+"        <= reg_FLAGS_"+toString(i+1)+";");
     64        vhdl->set_body (4, "reg_EXCEPTION_"+toString(i)+"    <= reg_EXCEPTION_"+toString(i+1)+";");
     65        vhdl->set_body (4, "reg_NO_SEQUENCE_"+toString(i)+"  <= reg_NO_SEQUENCE_"+toString(i+1)+";");
     66        vhdl->set_body (4, "reg_ADDRESS_"+toString(i)+"      <= reg_ADDRESS_"+toString(i+1)+";");
     67        vhdl->set_body (4, "reg_DATA_"+toString(i)+"         <= reg_DATA_"+toString(i+1)+";");
     68       
     69        vhdl->set_body (3,"end if;");
     70
     71        vhdl->set_body (2,"end if;");
     72      }
     73
     74    vhdl->set_body (2,"if sig_WEN_"+toString(_param->_size_queue-1)+" = '1' then");
     75    if (_param->_have_port_context_id)
     76      vhdl->set_body (3,"reg_CONTEXT_ID_"+toString(_param->_size_queue-1)+"    <= in_EXECUTE_QUEUE_IN_CONTEXT_ID;");
     77    if (_param->_have_port_front_end_id)
     78      vhdl->set_body (3,"reg_FRONT_END_ID_"+toString(_param->_size_queue-1)+"  <= in_EXECUTE_QUEUE_IN_FRONT_END_ID;");
     79    if (_param->_have_port_ooo_engine_id)
     80      vhdl->set_body (3,"reg_OOO_ENGINE_ID_"+toString(_param->_size_queue-1)+" <= in_EXECUTE_QUEUE_IN_OOO_ENGINE_ID;");
     81    if (_param->_have_port_rob_ptr)
     82      vhdl->set_body (3,"reg_PACKET_ID_"+toString(_param->_size_queue-1)+"     <= in_EXECUTE_QUEUE_IN_PACKET_ID;");
     83    vhdl->set_body (3, "reg_FLAGS_"+toString(_param->_size_queue-1)+"        <= in_EXECUTE_QUEUE_IN_FLAGS;");
     84    vhdl->set_body (3, "reg_EXCEPTION_"+toString(_param->_size_queue-1)+"    <= in_EXECUTE_QUEUE_IN_EXCEPTION;");
     85    vhdl->set_body (3, "reg_NO_SEQUENCE_"+toString(_param->_size_queue-1)+"  <= in_EXECUTE_QUEUE_IN_NO_SEQUENCE;");
     86    vhdl->set_body (3, "reg_ADDRESS_"+toString(_param->_size_queue-1)+"      <= in_EXECUTE_QUEUE_IN_ADDRESS;");
     87    vhdl->set_body (3, "reg_DATA_"+toString(_param->_size_queue-1)+"         <= in_EXECUTE_QUEUE_IN_DATA;");
     88    vhdl->set_body (2,"end if;");
     89
     90
     91    vhdl->set_body (1,"end if;");
     92    vhdl->set_body (0,"end process;");
     93
     94
     95    vhdl->set_body (0,"");
     96    vhdl->set_body (0,"");
     97    vhdl->set_body (0,"");
     98
     99    vhdl->set_body (0,"out_EXECUTE_QUEUE_OUT_VAL <= sig_OUT_VAL;");
     100    vhdl->set_body (0,"out_EXECUTE_QUEUE_IN_ACK <= sig_IN_ACK;");
     101    if (_param->_have_port_context_id)
     102    vhdl->set_body (0,"out_EXECUTE_QUEUE_OUT_CONTEXT_ID <= reg_CONTEXT_ID_0;");
     103    if (_param->_have_port_front_end_id)
     104    vhdl->set_body (0,"out_EXECUTE_QUEUE_OUT_FRONT_END_ID <= reg_FRONT_END_ID_0;");
     105    if (_param->_have_port_ooo_engine_id)
     106    vhdl->set_body (0,"out_EXECUTE_QUEUE_OUT_OOO_ENGINE_ID <= reg_OOO_ENGINE_ID_0;");
     107    if (_param->_have_port_rob_ptr)
     108    vhdl->set_body (0,"out_EXECUTE_QUEUE_OUT_PACKET_ID <= reg_PACKET_ID_0;");
     109    vhdl->set_body (0, "out_EXECUTE_QUEUE_OUT_FLAGS <= reg_FLAGS_0;");
     110    vhdl->set_body (0, "out_EXECUTE_QUEUE_OUT_EXCEPTION <= reg_EXCEPTION_0;");
     111    vhdl->set_body (0, "out_EXECUTE_QUEUE_OUT_NO_SEQUENCE <= reg_NO_SEQUENCE_0;");
     112    vhdl->set_body (0, "out_EXECUTE_QUEUE_OUT_ADDRESS <= reg_ADDRESS_0;");
     113    vhdl->set_body (0, "out_EXECUTE_QUEUE_OUT_DATA <= reg_DATA_0;");
     114
     115
     116    vhdl->set_body (0,"");
     117
     118    vhdl->set_body (0,"process (reg_CURRENT_STATE, in_EXECUTE_QUEUE_OUT_ACK, in_EXECUTE_QUEUE_IN_VAL, in_NRESET)");
     119    vhdl->set_body (0,"begin");
     120    vhdl->set_body (1,"if in_NRESET = '0' then");
     121    vhdl->set_body (2,"sig_NEXT_STATE <= STATE_0;");
     122    vhdl->set_body (1,"else");
     123    vhdl->set_body (2,"case reg_CURRENT_STATE is");
     124    for (uint32_t i = 0; i <_param->_size_queue + 1; i++)
     125      {
     126        vhdl->set_body (3,"when STATE_"+toString(i)+" =>");
     127        if (i == 0)
     128          {
     129            vhdl->set_body (4,"if in_EXECUTE_QUEUE_IN_VAL = '1' then");
     130            vhdl->set_body (5,"sig_NEXT_STATE <= reg_CURRENT_STATE ("+toString(_param->_size_queue-1)+" downto 0) & '0';");
     131            vhdl->set_body (4,"else");
     132            vhdl->set_body (5,"sig_NEXT_STATE <= reg_CURRENT_STATE;");
     133            vhdl->set_body (4,"end if;");
     134            continue;
     135          }
     136        if (i == (_param->_size_queue))
     137          {
     138            vhdl->set_body (4,"if in_EXECUTE_QUEUE_OUT_ACK = '1' then");
     139            vhdl->set_body (5,"sig_NEXT_STATE <= '0' & reg_CURRENT_STATE ("+toString(_param->_size_queue)+" downto 1);");
     140            vhdl->set_body (4,"else");
     141            vhdl->set_body (5,"sig_NEXT_STATE <= reg_CURRENT_STATE;");
     142            vhdl->set_body (4,"end if;");
     143            continue;
     144          }
     145        vhdl->set_body (4,"if in_EXECUTE_QUEUE_IN_VAL = '1' and in_EXECUTE_QUEUE_OUT_ACK = '0' then");
     146        vhdl->set_body (5,"sig_NEXT_STATE <= reg_CURRENT_STATE ("+toString(_param->_size_queue-1)+" downto 0) & '0';");
     147        vhdl->set_body (4,"elsif in_EXECUTE_QUEUE_IN_VAL = '0' and in_EXECUTE_QUEUE_OUT_ACK = '1' then");
     148        vhdl->set_body (5,"sig_NEXT_STATE <= '0' & reg_CURRENT_STATE ("+toString(_param->_size_queue)+" downto 1);");
     149        vhdl->set_body (4,"else");
     150        vhdl->set_body (5,"sig_NEXT_STATE <= reg_CURRENT_STATE;");
     151        vhdl->set_body (4,"end if;");
     152      }
     153    vhdl->set_body (3,"when others => assert false report \"wrong state\" severity failure;");
     154    vhdl->set_body (2,"end case;");
     155    vhdl->set_body (1,"end if;");
     156
     157    vhdl->set_body (2,"case reg_CURRENT_STATE is");
     158    for (uint32_t i = 0; i <_param->_size_queue + 1; i++)
     159      {
     160        vhdl->set_body (3,"when STATE_"+toString(i)+" =>");
     161        if (i == 0)
     162          {
     163            vhdl->set_body (4,"sig_OUT_VAL <= '0';");
     164            vhdl->set_body (4,"sig_IN_ACK <= '1';");
     165            for (uint32_t j = 0; j <_param->_size_queue; j++)
     166              {
     167                if (i == j)
     168                  {
     169                    vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= '0';");
     170                    vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= in_EXECUTE_QUEUE_IN_VAL;");
     171                  }
     172                else
     173                  {
     174                    if (j < (_param->_size_queue - 1))
     175                      vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= '0';");
     176                    vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= '0';");
     177                  }
     178              }
     179            continue;
     180          }
     181        if (i == (_param->_size_queue))
     182          {
     183            vhdl->set_body (4,"sig_OUT_VAL <= '1';");
     184            vhdl->set_body (4,"sig_IN_ACK <= '0';");
     185            for (uint32_t j = 0; j <_param->_size_queue; j++)
     186              {
     187                if (j == (i - 1))
     188                  {
     189                    vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= '0';");
     190                  }
     191                else
     192                  {
     193                    vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= in_EXECUTE_QUEUE_OUT_ACK;");
     194                    vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= in_EXECUTE_QUEUE_OUT_ACK;");
     195                  }
     196              }
     197            continue;
     198          }
     199        vhdl->set_body (4,"sig_OUT_VAL <= '1';");
     200        vhdl->set_body (4,"sig_IN_ACK <= '1';");
     201        for (uint32_t j = 0; j <_param->_size_queue; j++)
     202          {
     203            if (j < (i - 1))
     204              {
     205                vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= in_EXECUTE_QUEUE_OUT_ACK;");
     206                vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= in_EXECUTE_QUEUE_OUT_ACK;");
     207              }
     208            if (j == (i - 1))
     209              {
     210                vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= '0';");
     211                vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= in_EXECUTE_QUEUE_OUT_ACK and in_EXECUTE_QUEUE_IN_VAL;");
     212              }
     213            if (j == i)
     214              {
     215                if (j < (_param->_size_queue - 1))
     216                  vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= '0';");
     217                vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= in_EXECUTE_QUEUE_IN_VAL and not in_EXECUTE_QUEUE_OUT_ACK;");
     218              }
     219            if (j > i)
     220              {
     221                if (j < (_param->_size_queue - 1))
     222                  vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= '0';");
     223                vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= '0';");
     224              }
     225          }
     226      }
     227    vhdl->set_body (3,"when others =>");
     228    vhdl->set_body (2,"end case;");
     229
     230    vhdl->set_body (0,"end process;");
     231
     232 
     233
     234//     vhdl->set_body (2,"end case;");
     235//     for (uint32_t i = 0; i <_param->_size_queue; i++)
     236//       {
     237//      if (i == 0)
     238//        vhdl->set_body (4,"sig_WEN_"+toString(i)+" <= in_EXECUTE_QUEUE_IN_VAL;");
     239//      else
     240//        vhdl->set_body (4,"sig_WEN_"+toString(i)+" <= '0';");
     241//      if (i < _param->_size_queue - 1)
     242//        vhdl->set_body (4,"sig_SEL_"+toString(i)+" <= '0';");
     243//       }
     244//     vhdl->set_body (2,"end process;");
     245       
     246//     vhdl->set_body (0,"sig_TRANS_OUT <=");
     247//     vhdl->set_body (1,"'0' when reg_CURRENT_STATE = STATE_0 else");
     248//     vhdl->set_body (1,"'1';");
     249
     250//     vhdl->set_body (0,"sig_TRANS_IN <=");
     251//     vhdl->set_body (1,"'0' when reg_CURRENT_STATE = STATE_"+toString(_param->_size_queue)+" else");
     252//     vhdl->set_body (1,"'1';");
     253
     254
     255
     256//     vhdl->set_body (0,"sig_NEXT_STATE <=");
     257//     vhdl->set_body (1,"reg_CURRENT_STATE("+toString(_param->_size_queue-1)+" downto 0) & '0' when in_EXECUTE_QUEUE_IN_VAL = '1' and ((reg_CURRENT_STATE = STATE_0) xor (in_EXECUTE_QUEUE_OUT_ACK = '0')) and sig_TRANS_IN = '1' else");
     258//     vhdl->set_body (1,"'0' & reg_CURRENT_STATE("+toString(_param->_size_queue)+" downto 1) when in_EXECUTE_QUEUE_OUT_ACK = '1' and ((in_EXECUTE_QUEUE_IN_VAL = '0') xor (reg_CURRENT_STATE = STATE_"+toString(_param->_size_queue)+")) and sig_TRANS_OUT = '1' else");
     259//     vhdl->set_body (1,"reg_CURRENT_STATE;");
     260
     261//     vhdl->set_body (0,"sig_WEN_0 <=");
     262//     vhdl->set_body (1,"in_EXECUTE_QUEUE_IN_VAL when reg_CURRENT_STATE = STATE_0 else");
     263//     vhdl->set_body (1,"in_EXECUTE_QUEUE_OUT_ACK and in_EXECUTE_QUEUE_IN_VAL when reg_CURRENT_STATE = STATE_1 else");
     264//     vhdl->set_body (1,"in_EXECUTE_QUEUE_OUT_ACK;");
     265//      for (uint32_t i = 1; i <_param->_size_queue-1; i++)
     266//       {
     267//      vhdl->set_body (0,"sig_WEN_"+toString(i)+" <=");
     268//      vhdl->set_body (1,"in_EXECUTE_QUEUE_IN_VAL and not in_EXECUTE_QUEUE_OUT_ACK when reg_CURRENT_STATE = STATE_"+toString(i)+" else");
     269//      vhdl->set_body (1,"in_EXECUTE_QUEUE_IN_VAL and in_EXECUTE_QUEUE_OUT_ACK when reg_CURRENT_STATE = STATE_"+toString(i+1)+" else");
     270//      vhdl->set_body (1,"in_EXECUTE_QUEUE_OUT_ACK;");
     271//       }
     272//     vhdl->set_body (0,"sig_WEN_"+toString(_param->_size_queue-1)+" <=");
     273//     vhdl->set_body (1,"in_EXECUTE_QUEUE_IN_VAL and not in_EXECUTE_QUEUE_OUT_ACK when reg_CURRENT_STATE = STATE_"+toString(_param->_size_queue-1)+" else");
     274//     vhdl->set_body (1,"in_EXECUTE_QUEUE_OUT_ACK;");
     275
     276//     vhdl->set_body (0,"");
     277//     for (uint32_t i = 0; i <_param->_size_queue-1; i++)
     278//       {
     279//      vhdl->set_body (0,"sig_SEL_"+toString(i)+" <=");
     280//      vhdl->set_body (1,"'0' when reg_CURRENT_STATE = STATE_"+toString(i+1)+" or reg_CURRENT_STATE = STATE_"+toString(i)+" else");
     281//      vhdl->set_body (1,"in_EXECUTE_QUEUE_OUT_ACK;");
     282//       }
     283
     284//   process (reg_CURRENT_STATE, in_PUSH_0_VAL, in_POP_0_ACK)
     285//   begin
     286//     case reg_CURRENT_STATE is
     287   
     288// with reg_CURRENT_STATE select
     289//   sig_WEN0 <=
     290//   0 when 1,
     291//   4 when 6;
     292//       when "00001" => out_POP_0_VAL <= '0';
     293//                      out_PUSH_0_ACK <= '1';
     294//                      sig_SEL0 <= '0';
     295//                      sig_WEN0 <= in_PUSH_0_VAL;
     296//                      sig_SEL1 <= '0';
     297//                      sig_WEN1 <= '0';
     298//                      sig_SEL2 <= '0';
     299//                      sig_WEN2 <= '0';
     300//                      sig_WEN3 <= '0';
     301//                      if in_PUSH_0_VAL = '1' then
     302//                        sig_NEXT_STATE <= reg_CURRENT_STATE(3 downto 0) & '0';
     303//                      else
     304//                        sig_NEXT_STATE <= reg_CURRENT_STATE;
     305//                      end if;
     306
     307//       when "00010" => out_POP_0_VAL <= '1';
     308//                      out_PUSH_0_ACK <= '1';
     309//                      sig_SEL0 <= '0';
     310//                      sig_WEN0 <= in_POP_0_ACK and in_PUSH_0_VAL;
     311//                      sig_SEL1 <= '0';
     312//                      sig_WEN1 <= in_PUSH_0_VAL and not in_POP_0_ACK;
     313//                      sig_SEL2 <= '0';
     314//                      sig_WEN2 <= '0';
     315//                      sig_WEN3 <= '0';
     316//                      if (in_PUSH_0_VAL = '1') and (in_POP_0_ACK = '0') then
     317//                        sig_NEXT_STATE <= reg_CURRENT_STATE(3 downto 0) & '0';
     318//                      elsif (in_PUSH_0_VAL = '0') and (in_POP_0_ACK = '1') then
     319//                        sig_NEXT_STATE <= '0' & reg_CURRENT_STATE(4 downto 1);
     320//                      else
     321//                        sig_NEXT_STATE <= reg_CURRENT_STATE;
     322//                      end if;
     323
     324//       when "00100" => out_POP_0_VAL <= '1';
     325//                      out_PUSH_0_ACK <= '1';
     326//                      sig_SEL0 <= in_POP_0_ACK;
     327//                      sig_WEN0 <= in_POP_0_ACK;
     328//                      sig_SEL1 <= '0';
     329//                      sig_WEN1 <= in_POP_0_ACK and in_PUSH_0_VAL;
     330//                      sig_SEL2 <= '0';
     331//                      sig_WEN2 <= in_PUSH_0_VAL and not in_POP_0_ACK;
     332//                      sig_WEN3 <= '0';
     333//                      if (in_PUSH_0_VAL = '1') and (in_POP_0_ACK = '0') then
     334//                        sig_NEXT_STATE <= reg_CURRENT_STATE(3 downto 0) & '0';
     335//                      elsif (in_PUSH_0_VAL = '0') and (in_POP_0_ACK = '1') then
     336//                        sig_NEXT_STATE <= '0' & reg_CURRENT_STATE(4 downto 1);
     337//                      else
     338//                        sig_NEXT_STATE <= reg_CURRENT_STATE;
     339//                      end if;
     340
     341//       when "01000" => out_POP_0_VAL <= '1';
     342//                      out_PUSH_0_ACK <= '1';
     343//                      sig_SEL0 <= in_POP_0_ACK;
     344//                      sig_WEN0 <= in_POP_0_ACK;
     345//                      sig_SEL1 <= in_POP_0_ACK;
     346//                      sig_WEN1 <= in_POP_0_ACK;
     347//                      sig_SEL2 <= '0';
     348//                      sig_WEN2 <= in_POP_0_ACK and in_PUSH_0_VAL;
     349//                      sig_WEN3 <= in_PUSH_0_VAL and not in_POP_0_ACK;
     350//                      if (in_PUSH_0_VAL = '1') and (in_POP_0_ACK = '0') then
     351//                        sig_NEXT_STATE <= reg_CURRENT_STATE(3 downto 0) & '0';
     352//                      elsif (in_PUSH_0_VAL = '0') and (in_POP_0_ACK = '1') then
     353//                        sig_NEXT_STATE <= '0' & reg_CURRENT_STATE(4 downto 1);
     354//                      else
     355//                        sig_NEXT_STATE <= reg_CURRENT_STATE;
     356//                      end if;
     357
     358//       when "10000" => out_POP_0_VAL <= '1';
     359//                      out_PUSH_0_ACK <= '0';
     360//                      sig_SEL0 <= in_POP_0_ACK;
     361//                      sig_WEN0 <= in_POP_0_ACK;
     362//                      sig_SEL1 <= in_POP_0_ACK;
     363//                      sig_WEN1 <= in_POP_0_ACK;
     364//                      sig_SEL2 <= in_POP_0_ACK;
     365//                      sig_WEN2 <= in_POP_0_ACK;
     366//                      sig_WEN3 <= '0';
     367//                      if (in_PUSH_0_VAL = '0') and (in_POP_0_ACK = '1') then
     368//                        sig_NEXT_STATE <= '0' & reg_CURRENT_STATE(4 downto 1);
     369//                      else
     370//                        sig_NEXT_STATE <= reg_CURRENT_STATE;
     371//                      end if;
     372
     373//          when others =>
     374//                      sig_next_state <= "00001";
     375
     376//      end case;
     377//   end process;
     378
    27379    log_printf(FUNC,Execute_queue,FUNCTION,"End");
    28380  };

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_vhdl_declaration.cpp

    r81 r96  
    33 * $Id$
    44 *
    5  * [ Description ]
     5 * [ Description ]
    66 *
    77 */
    … …  
    2424  {
    2525    log_printf(FUNC,Execute_queue,FUNCTION,"Begin");
     26
     27    for (uint32_t i=0; i<_param->_size_queue; ++i)
     28      {
     29        if (_param->_have_port_context_id)
     30          vhdl->set_signal("reg_CONTEXT_ID_"+toString(i),_param->_size_context_id);
     31        if (_param->_have_port_front_end_id)
     32          vhdl->set_signal("reg_FRONT_END_ID_"+toString(i),_param->_size_front_end_id);
     33        if (_param->_have_port_ooo_engine_id)
     34          vhdl->set_signal("reg_OOO_ENGINE_ID_"+toString(i),_param->_size_ooo_engine_id);
     35        if (_param->_have_port_rob_ptr)
     36          vhdl->set_signal("reg_PACKET_ID_"+toString(i),_param->_size_rob_ptr);
     37        vhdl->set_signal("reg_FLAGS_"+toString(i),_param->_size_special_data);
     38        vhdl->set_signal("reg_EXCEPTION_"+toString(i),_param->_size_exception);
     39        vhdl->set_signal("reg_NO_SEQUENCE_"+toString(i),1);
     40        vhdl->set_signal("reg_ADDRESS_"+toString(i),_param->_size_instruction_address);
     41        vhdl->set_signal("reg_DATA_"+toString(i),_param->_size_general_data);
     42      }
     43
     44    vhdl->set_signal("reg_CURRENT_STATE",_param->_size_queue+1);
     45
     46    vhdl->set_signal("sig_NEXT_STATE",_param->_size_queue+1);
     47
     48    for (uint32_t i=0; i<_param->_size_queue-1; ++i)
     49      {
     50        vhdl->set_signal("sig_WEN_"+toString(i),1);
     51        vhdl->set_signal("sig_SEL_"+toString(i),1);
     52      }
     53    vhdl->set_signal("sig_WEN_"+toString(_param->_size_queue - 1),1);
     54
     55    vhdl->set_signal("sig_IN_ACK",1);
     56    vhdl->set_signal("sig_OUT_VAL",1);
     57
     58   for (uint32_t i=0; i<_param->_size_queue+1; ++i)
     59      vhdl->set_constant("STATE_"+toString(i),_param->_size_queue+1,1<<i);
     60
    2661    log_printf(FUNC,Execute_queue,FUNCTION,"End");
    2762  };
    … …  
    3772}; // end namespace morpheo             
    3873#endif
     74//   signal reg_0             : std_logic_vector (15 downto 0);
     75//   signal reg_1             : std_logic_vector (15 downto 0);
     76//   signal reg_2             : std_logic_vector (15 downto 0);
     77//   signal reg_3             : std_logic_vector (15 downto 0);
     78//   signal reg_CURRENT_STATE : std_logic_vector (4 downto 0);
     79
     80//   signal sig_NEXT_STATE    : std_logic_vector (4 downto 0);
     81//   signal sig_WEN0          : std_logic;
     82//   signal sig_SEL0          : std_logic;
     83//   signal sig_WEN1          : std_logic;
     84//   signal sig_SEL1          : std_logic;
     85//   signal sig_WEN2          : std_logic;
     86//   signal sig_SEL2          : std_logic;
     87//   signal sig_WEN3          : std_logic;

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Parameters.cpp

    r88 r96  
    4747        _size_general_data       = size_general_data;
    4848        _size_special_data       = size_special_data;
    49        
     49        _size_instruction_address= size_general_data;
     50
    5051        _have_port_context_id    = _size_context_id    > 0;
    5152        _have_port_front_end_id  = _size_front_end_id  > 0;

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.Synthesis

    r88 r96  
    5454                                        $(ECHO) -e ""                                     >> $(FPGA_CFG_FILE_LOCAL);                    \
    5555                                done;                                   \
    56                                 ($(XILINX_ENV); cd $(FPGA_CFG_FILE_GLOBAL_DIR); $(FPGA_CFG_FILE_GLOBAL));                               \
     56                                ($(XILINX_ENV); cd $(FPGA_CFG_FILE_GLOBAL_DIR); ./$(FPGA_CFG_FILE_GLOBAL));                             \
    5757                                $(MAKE) $(FPGA_LOG_FILES);
    5858

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Makefile.mkf

    r81 r96  
    33#
    44
    5 all: _Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest
     5all: _Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest
    66
    7 _Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest:
    8         make all -C Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest
     7_Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest:
     8        gmake all -C Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest
    99
    1010clean:
    11         make clean -C Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest
     11        gmake clean -C Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest
    1212
    1313re: clean all
    1414
    1515install:
    16         make install -C Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest
     16        gmake install -C Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest
    1717

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/include/Version.h

    r95 r96  
    1010#define MORPHEO_MAJOR_VERSION 0
    1111#define MORPHEO_MINOR_VERSION 2
    12 #define MORPHEO_REVISION      "95"
     12#define MORPHEO_REVISION      "96"
    1313#define MORPHEO_CODENAME      "Castor"
    1414

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/mkf.info

    r81 r96  
    2020#target_dep             all             Generic/Select/Select_Priority_Fixed/SelfTest
    2121#target_dep             all             Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Read_queue/SelfTest
    22 target_dep              all             Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest
     22#target_dep             all             Core/Multi_Execute_loop/Execute_loop/Multi_Read_unit/Read_unit/Reservation_station/SelfTest
    2323#target_dep             all             Core/Multi_Execute_loop/Execute_loop/Register_unit/SelfTest
    2424#target_dep             all             Core/Multi_Execute_loop/Execute_loop/Register_unit/Register_unit_Glue/SelfTest
     25target_dep              all             Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/SelfTest
    2526# mkf include path
    2627var_define              _mkf_path       include_mkf
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