Changeset 97 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test2.cpp

Timestamp:

Dec 19, 2008, 4:34:00 PM (16 years ago)

Author:

rosiere

Message:

1) Update Prediction Table : statistics
2) Size instruction address on 30 bits
3) Change Log File
4) Add debug_level in simulation configuration file

File:

• trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test2.cpp (modified) (5 diffs)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Execute_unit/Execute_unit/Load_store_unit/SelfTest/src/test2.cpp

@@ -97 +97 @@
   ALLOC1_SC_SIGNAL(out_MEMORY_OUT_PACKET_ID           ,"out_MEMORY_OUT_PACKET_ID           ",Tpacket_t         ,_param->_nb_inst_memory);
 //ALLOC1_SC_SIGNAL(out_MEMORY_OUT_OPERATION           ,"out_MEMORY_OUT_OPERATION           ",Toperation_t      ,_param->_nb_inst_memory);
-  ALLOC1_SC_SIGNAL(out_MEMORY_OUT_TYPE                ,"out_MEMORY_OUT_TYPE                ",Ttype_t           ,_param->_nb_inst_memory);
+//ALLOC1_SC_SIGNAL(out_MEMORY_OUT_TYPE                ,"out_MEMORY_OUT_TYPE                ",Ttype_t           ,_param->_nb_inst_memory);
   ALLOC1_SC_SIGNAL(out_MEMORY_OUT_WRITE_RD            ,"out_MEMORY_OUT_WRITE_RD            ",Tcontrol_t        ,_param->_nb_inst_memory); // = (operation==load)
   ALLOC1_SC_SIGNAL(out_MEMORY_OUT_NUM_REG_RD          ,"out_MEMORY_OUT_NUM_REG_RD          ",Tgeneral_address_t,_param->_nb_inst_memory); // destination (load)
@@ -106 +106 @@
   ALLOC1_SC_SIGNAL(out_MEMORY_OUT_EXCEPTION           ,"out_MEMORY_OUT_EXCEPTION           ",Texception_t      ,_param->_nb_inst_memory);
   ALLOC1_SC_SIGNAL(out_MEMORY_OUT_NO_SEQUENCE         ,"out_MEMORY_OUT_NO_SEQUENCE         ",Tcontrol_t        ,_param->_nb_inst_memory);
-  ALLOC1_SC_SIGNAL(out_MEMORY_OUT_ADDRESS             ,"out_MEMORY_OUT_ADDRESS             ",Tgeneral_data_t   ,_param->_nb_inst_memory);
+  ALLOC1_SC_SIGNAL(out_MEMORY_OUT_ADDRESS             ,"out_MEMORY_OUT_ADDRESS             ",Taddress_t        ,_param->_nb_inst_memory);
   ALLOC1_SC_SIGNAL(out_DCACHE_REQ_VAL                 ,"out_DCACHE_REQ_VAL                 ",Tcontrol_t        ,_param->_nb_cache_port);
   ALLOC1_SC_SIGNAL( in_DCACHE_REQ_ACK                 ," in_DCACHE_REQ_ACK                 ",Tcontrol_t        ,_param->_nb_cache_port);
@@ -169 +169 @@
   INSTANCE1_SC_SIGNAL(_Load_store_unit,out_MEMORY_OUT_PACKET_ID    ,_param->_nb_inst_memory);
 //INSTANCE1_SC_SIGNAL(_Load_store_unit,out_MEMORY_OUT_OPERATION    ,_param->_nb_inst_memory);
-  INSTANCE1_SC_SIGNAL(_Load_store_unit,out_MEMORY_OUT_TYPE         ,_param->_nb_inst_memory);
+//INSTANCE1_SC_SIGNAL(_Load_store_unit,out_MEMORY_OUT_TYPE         ,_param->_nb_inst_memory);
   INSTANCE1_SC_SIGNAL(_Load_store_unit,out_MEMORY_OUT_WRITE_RD     ,_param->_nb_inst_memory);
   INSTANCE1_SC_SIGNAL(_Load_store_unit,out_MEMORY_OUT_NUM_REG_RD   ,_param->_nb_inst_memory);
@@ -520 +520 @@
                   TEST(Tcontext_t        , out_MEMORY_OUT_OOO_ENGINE_ID[0]->read(), tab_request[packet_id]._ooo_engine_id);
 //                TEST(Toperation_t      , out_MEMORY_OUT_OPERATION    [0]->read(), tab_request[packet_id]._operation    );
-                  TEST(Ttype_t           , out_MEMORY_OUT_TYPE         [0]->read(), TYPE_MEMORY                          );
+//                TEST(Ttype_t           , out_MEMORY_OUT_TYPE         [0]->read(), TYPE_MEMORY                          );
 
                   if (is_operation_memory_load (tab_request[packet_id]._operation))
@@ -730 +730 @@
   DELETE1_SC_SIGNAL(out_MEMORY_OUT_PACKET_ID    ,_param->_nb_inst_memory);
 //DELETE1_SC_SIGNAL(out_MEMORY_OUT_OPERATION    ,_param->_nb_inst_memory);
-  DELETE1_SC_SIGNAL(out_MEMORY_OUT_TYPE         ,_param->_nb_inst_memory);
+//DELETE1_SC_SIGNAL(out_MEMORY_OUT_TYPE         ,_param->_nb_inst_memory);
   DELETE1_SC_SIGNAL(out_MEMORY_OUT_WRITE_RD     ,_param->_nb_inst_memory);
   DELETE1_SC_SIGNAL(out_MEMORY_OUT_NUM_REG_RD   ,_param->_nb_inst_memory);