Changeset 97 for trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_transition.cpp

Timestamp:

Dec 19, 2008, 4:34:00 PM (16 years ago)

Author:

rosiere

Message:

1) Update Prediction Table : statistics
2) Size instruction address on 30 bits
3) Change Log File
4) Add debug_level in simulation configuration file

File:

• trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_transition.cpp (modified) (2 diffs)

trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_transition.cpp

@@ -53 +53 @@
                (_param->_have_port_rob_ptr      )?PORT_READ(in_WRITE_QUEUE_IN_PACKET_ID    ):0,
              //PORT_READ(in_WRITE_QUEUE_IN_OPERATION    ),
-               PORT_READ(in_WRITE_QUEUE_IN_TYPE         ),
+             //PORT_READ(in_WRITE_QUEUE_IN_TYPE         ),
                PORT_READ(in_WRITE_QUEUE_IN_WRITE_RD     ),
                PORT_READ(in_WRITE_QUEUE_IN_NUM_REG_RD   ),
@@ -72 +72 @@
         if ( (internal_WRITE_QUEUE_OUT_VAL and PORT_READ(in_WRITE_QUEUE_OUT_ACK)) or
              ((_queue->empty() == false)                                         and
-              (_queue->front()->_type      == TYPE_MEMORY)                       and
-              (_queue->front()->_exception == EXCEPTION_MEMORY_LOAD_SPECULATIVE) and
+//            (_queue->front()->_type      == TYPE_MEMORY)                       and
+              (_queue->front()->_exception == EXCEPTION_MEMORY_LOAD_SPECULATIVE) and // this exception code must be uniq
               (_queue->front()->_write_rd  == 0)                                 and
               (_queue->front()->_write_re  == 0)))