Ignore:
Timestamp:
Dec 31, 2008, 11:18:08 AM (16 years ago)
Author:
rosiere
Message:

1) Fix bug (read unit, RAT -> write in R0, SPR desallocation ...)
2) Change VHDL Execute_queue -> use Generic/Queue?
3) Complete document on VHDL generation
4) Add soc test

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Core_Glue/src/Core_Glue.cpp

    r88 r98  
    112112              sensitive << (*(in_BRANCH_COMPLETE_OOO_ENGINE_VAL            [i][j]))
    113113                        << (*(in_BRANCH_COMPLETE_OOO_ENGINE_ADDRESS        [i][j]))
    114                         << (*(in_BRANCH_COMPLETE_OOO_ENGINE_FLAG           [i][j]));
     114                        << (*(in_BRANCH_COMPLETE_OOO_ENGINE_NO_SEQUENCE    [i][j]));
    115115              if (_param->_have_port_front_end_id)
    116116              sensitive << (*(in_BRANCH_COMPLETE_OOO_ENGINE_FRONT_END_ID   [i][j]));
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