Ignore:
Timestamp:
Dec 31, 2008, 11:18:08 AM (16 years ago)
Author:
rosiere
Message:

1) Fix bug (read unit, RAT -> write in R0, SPR desallocation ...)
2) Change VHDL Execute_queue -> use Generic/Queue?
3) Complete document on VHDL generation
4) Add soc test

File:
1 edited

Legend:

Unmodified
Added
Removed

  • trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/src/Execute_queue_vhdl_body.cpp

    r96 r98  
    2424  {
    2525    log_printf(FUNC,Execute_queue,FUNCTION,"Begin");
    26     vhdl->set_body (0,"");
    27     vhdl->set_body (0,"process (in_CLOCK)");
    28     vhdl->set_body (0,"begin");
    29     vhdl->set_body (1,"if in_CLOCK'event and in_CLOCK = '1' then");
    30 //     vhdl->set_body (2,"if in_NRESET = '0' then");
    31 //     vhdl->set_body (3,"reg_CURRENT_STATE <= STATE_0;");
    32 //     vhdl->set_body (2,"else");
    33     vhdl->set_body (3,"reg_CURRENT_STATE <= sig_NEXT_STATE;");
     26
     27    vhdl->set_comment(0,"");
     28    vhdl->set_comment(0,"-----------------------------------");
     29    vhdl->set_comment(0,"-- Instance queue                  ");
     30    vhdl->set_comment(0,"-----------------------------------");
     31    vhdl->set_comment(0,"");
     32
     33    vhdl->set_body   (0,"instance_"+_name+"_queue : "+_name+"_queue");
     34    vhdl->set_body   (0,"port map (");
     35    vhdl->set_body   (1,"  in_CLOCK       \t=>\t      in_CLOCK ");
     36    vhdl->set_body   (1,", in_NRESET      \t=>\t      in_NRESET");
     37    vhdl->set_body   (1,", in_INSERT_VAL  \t=>\tinternal_QUEUE_INSERT_VAL");
     38    vhdl->set_body   (1,",out_INSERT_ACK  \t=>\tinternal_QUEUE_INSERT_ACK");
     39    vhdl->set_body   (1,", in_INSERT_DATA \t=>\tinternal_QUEUE_INSERT_DATA");
     40    vhdl->set_body   (1,",out_RETIRE_VAL  \t=>\tinternal_QUEUE_RETIRE_VAL");
     41    vhdl->set_body   (1,", in_RETIRE_ACK  \t=>\tinternal_QUEUE_RETIRE_ACK");
     42    vhdl->set_body   (1,",out_RETIRE_DATA \t=>\tinternal_QUEUE_RETIRE_DATA");
     43    vhdl->set_body   (0,");");
     44
     45    vhdl->set_comment(0,"");
     46    vhdl->set_comment(0,"-----------------------------------");
     47    vhdl->set_comment(0,"-- Input  Buffer                   ");
     48    vhdl->set_comment(0,"-----------------------------------");
     49    vhdl->set_comment(0,"");
     50
     51    {
     52    uint32_t min = 0;
     53    uint32_t max, size;
     54
     55    if(_param->_have_port_context_id   )
     56      {
     57    size = _param->_size_context_id;
     58    max = min-1+size;
     59    vhdl->set_body   (0,"internal_QUEUE_INSERT_DATA "+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_EXECUTE_QUEUE_IN_CONTEXT_ID;");
     60    min = max+1;
     61      }
     62    if(_param->_have_port_front_end_id   )
     63      {
     64    size = _param->_size_front_end_id;
     65    max = min-1+size;
     66    vhdl->set_body   (0,"internal_QUEUE_INSERT_DATA "+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_EXECUTE_QUEUE_IN_FRONT_END_ID;");
     67    min = max+1;
     68      }
     69    if(_param->_have_port_ooo_engine_id   )
     70      {
     71    size = _param->_size_ooo_engine_id;
     72    max = min-1+size;
     73    vhdl->set_body   (0,"internal_QUEUE_INSERT_DATA "+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_EXECUTE_QUEUE_IN_OOO_ENGINE_ID;");
     74    min = max+1;
     75      }
     76    if(_param->_have_port_rob_ptr)
     77      {
     78    size = _param->_size_rob_ptr;
     79    max = min-1+size;
     80    vhdl->set_body   (0,"internal_QUEUE_INSERT_DATA "+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_EXECUTE_QUEUE_IN_PACKET_ID;");
     81    min = max+1;
     82      }
     83
     84//  size = _param->_size_operation;
     85//  max = min-1+size;
     86//  vhdl->set_body   (0,"internal_QUEUE_INSERT_DATA "+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_EXECUTE_QUEUE_IN_OPERATION;");
     87//  min = max+1;
     88//
     89//  size = _param->_size_type;
     90//  max = min-1+size;
     91//  vhdl->set_body   (0,"internal_QUEUE_INSERT_DATA "+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_EXECUTE_QUEUE_IN_TYPE;");
     92//  min = max+1;
     93
     94    size = _param->_size_special_data;
     95    max = min-1+size;
     96    vhdl->set_body   (0,"internal_QUEUE_INSERT_DATA "+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_EXECUTE_QUEUE_IN_FLAGS;");
     97    min = max+1;
     98
     99    size = _param->_size_exception;   
     100    max = min-1+size;
     101    vhdl->set_body   (0,"internal_QUEUE_INSERT_DATA "+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_EXECUTE_QUEUE_IN_EXCEPTION;");
     102    min = max+1;
     103
     104    size = 1;
     105    max = min-1+size;
     106    vhdl->set_body   (0,"internal_QUEUE_INSERT_DATA "+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_EXECUTE_QUEUE_IN_NO_SEQUENCE;");
     107    min = max+1;
     108
     109    size = _param->_size_instruction_address;
     110    max = min-1+size;
     111    vhdl->set_body   (0,"internal_QUEUE_INSERT_DATA "+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_EXECUTE_QUEUE_IN_ADDRESS;");
     112    min = max+1;
     113
     114    size = _param->_size_general_data;
     115    max = min-1+size;
     116    vhdl->set_body   (0,"internal_QUEUE_INSERT_DATA "+std_logic_range(_param->_size_internal_queue,max,min)+" <= in_EXECUTE_QUEUE_IN_DATA;");
     117    min = max+1;
     118    }
     119
     120    vhdl->set_comment(0,"");
     121    vhdl->set_comment(0,"-----------------------------------");
     122    vhdl->set_comment(0,"-- Output Buffer                   ");
     123    vhdl->set_comment(0,"-----------------------------------");
     124    vhdl->set_comment(0,"");
     125
     126    if(_param->_have_port_context_id)
     127    vhdl->set_body   (0,"out_EXECUTE_QUEUE_OUT_CONTEXT_ID    <= internal_EXECUTE_QUEUE_OUT_CONTEXT_ID   ;");
     128    if(_param->_have_port_front_end_id)
     129    vhdl->set_body   (0,"out_EXECUTE_QUEUE_OUT_FRONT_END_ID  <= internal_EXECUTE_QUEUE_OUT_FRONT_END_ID ;");
     130    if(_param->_have_port_ooo_engine_id)
     131    vhdl->set_body   (0,"out_EXECUTE_QUEUE_OUT_OOO_ENGINE_ID <= internal_EXECUTE_QUEUE_OUT_OOO_ENGINE_ID;");
     132    if(_param->_have_port_rob_ptr)
     133    vhdl->set_body   (0,"out_EXECUTE_QUEUE_OUT_PACKET_ID     <= internal_EXECUTE_QUEUE_OUT_PACKET_ID    ;");
     134//  vhdl->set_body   (0,"out_EXECUTE_QUEUE_OUT_OPERATION     <= internal_EXECUTE_QUEUE_OUT_OPERATION    ;");
     135//  vhdl->set_body   (0,"out_EXECUTE_QUEUE_OUT_TYPE          <= internal_EXECUTE_QUEUE_OUT_TYPE         ;");
     136    vhdl->set_body   (0,"out_EXECUTE_QUEUE_OUT_FLAGS         <= internal_EXECUTE_QUEUE_OUT_FLAGS        ;");
     137    vhdl->set_body   (0,"out_EXECUTE_QUEUE_OUT_EXCEPTION     <= internal_EXECUTE_QUEUE_OUT_EXCEPTION    ;");
     138    vhdl->set_body   (0,"out_EXECUTE_QUEUE_OUT_NO_SEQUENCE   <= internal_EXECUTE_QUEUE_OUT_NO_SEQUENCE  ;");
     139    vhdl->set_body   (0,"out_EXECUTE_QUEUE_OUT_ADDRESS       <= internal_EXECUTE_QUEUE_OUT_ADDRESS      ;");
     140    vhdl->set_body   (0,"out_EXECUTE_QUEUE_OUT_DATA          <= internal_EXECUTE_QUEUE_OUT_DATA         ;");
     141
     142
     143//     vhdl->set_body (0,"");
     144//     vhdl->set_body (0,"process (in_CLOCK)");
     145//     vhdl->set_body (0,"begin");
     146//     vhdl->set_body (1,"if in_CLOCK'event and in_CLOCK = '1' then");
     147// //     vhdl->set_body (2,"if in_NRESET = '0' then");
     148// //     vhdl->set_body (3,"reg_CURRENT_STATE <= STATE_0;");
     149// //     vhdl->set_body (2,"else");
     150//     vhdl->set_body (3,"reg_CURRENT_STATE <= sig_NEXT_STATE;");
     151// //     vhdl->set_body (2,"end if;");
     152
     153//     for (uint32_t i = 0; i <_param->_size_queue - 1; i++)
     154//       {
     155//      vhdl->set_body (2,"if sig_WEN_"+toString(i)+" = '1' then");
     156//      vhdl->set_body (3,"if sig_SEL_"+toString(i)+" = '0' then");
     157//      if (_param->_have_port_context_id)
     158//      vhdl->set_body (4,"reg_CONTEXT_ID_"+toString(i)+"    <= in_EXECUTE_QUEUE_IN_CONTEXT_ID;");
     159//      if (_param->_have_port_front_end_id)
     160//      vhdl->set_body (4,"reg_FRONT_END_ID_"+toString(i)+"  <= in_EXECUTE_QUEUE_IN_FRONT_END_ID;");
     161//      if (_param->_have_port_ooo_engine_id)
     162//      vhdl->set_body (4,"reg_OOO_ENGINE_ID_"+toString(i)+" <= in_EXECUTE_QUEUE_IN_OOO_ENGINE_ID;");
     163//      if (_param->_have_port_rob_ptr)
     164//         vhdl->set_body (4,"reg_PACKET_ID_"+toString(i)+"     <= in_EXECUTE_QUEUE_IN_PACKET_ID;");
     165//      vhdl->set_body (4, "reg_FLAGS_"+toString(i)+"        <= in_EXECUTE_QUEUE_IN_FLAGS;");
     166//      vhdl->set_body (4, "reg_EXCEPTION_"+toString(i)+"    <= in_EXECUTE_QUEUE_IN_EXCEPTION;");
     167//      vhdl->set_body (4, "reg_NO_SEQUENCE_"+toString(i)+"  <= in_EXECUTE_QUEUE_IN_NO_SEQUENCE;");
     168//      vhdl->set_body (4, "reg_ADDRESS_"+toString(i)+"      <= in_EXECUTE_QUEUE_IN_ADDRESS;");
     169//      vhdl->set_body (4, "reg_DATA_"+toString(i)+"         <= in_EXECUTE_QUEUE_IN_DATA;");
     170
     171//      vhdl->set_body (3, "else");
     172//      if (_param->_have_port_context_id)
     173//      vhdl->set_body (4,"reg_CONTEXT_ID_"+toString(i)+"    <= reg_CONTEXT_ID_"+toString(i+1)+";");
     174//      if (_param->_have_port_front_end_id)
     175//      vhdl->set_body (4,"reg_FRONT_END_ID_"+toString(i)+"  <= reg_FRONT_END_ID_"+toString(i+1)+";");
     176//      if (_param->_have_port_ooo_engine_id)
     177//      vhdl->set_body (4,"reg_OOO_ENGINE_ID_"+toString(i)+" <= reg_OOO_ENGINE_ID_"+toString(i+1)+";");
     178//      if (_param->_have_port_rob_ptr)
     179//         vhdl->set_body (4,"reg_PACKET_ID_"+toString(i)+"     <= reg_PACKET_ID_"+toString(i+1)+";");
     180//      vhdl->set_body (4, "reg_FLAGS_"+toString(i)+"        <= reg_FLAGS_"+toString(i+1)+";");
     181//      vhdl->set_body (4, "reg_EXCEPTION_"+toString(i)+"    <= reg_EXCEPTION_"+toString(i+1)+";");
     182//      vhdl->set_body (4, "reg_NO_SEQUENCE_"+toString(i)+"  <= reg_NO_SEQUENCE_"+toString(i+1)+";");
     183//      vhdl->set_body (4, "reg_ADDRESS_"+toString(i)+"      <= reg_ADDRESS_"+toString(i+1)+";");
     184//      vhdl->set_body (4, "reg_DATA_"+toString(i)+"         <= reg_DATA_"+toString(i+1)+";");
     185       
     186//      vhdl->set_body (3,"end if;");
     187
     188//      vhdl->set_body (2,"end if;");
     189//       }
     190
     191//     vhdl->set_body (2,"if sig_WEN_"+toString(_param->_size_queue-1)+" = '1' then");
     192//     if (_param->_have_port_context_id)
     193//       vhdl->set_body (3,"reg_CONTEXT_ID_"+toString(_param->_size_queue-1)+"    <= in_EXECUTE_QUEUE_IN_CONTEXT_ID;");
     194//     if (_param->_have_port_front_end_id)
     195//       vhdl->set_body (3,"reg_FRONT_END_ID_"+toString(_param->_size_queue-1)+"  <= in_EXECUTE_QUEUE_IN_FRONT_END_ID;");
     196//     if (_param->_have_port_ooo_engine_id)
     197//       vhdl->set_body (3,"reg_OOO_ENGINE_ID_"+toString(_param->_size_queue-1)+" <= in_EXECUTE_QUEUE_IN_OOO_ENGINE_ID;");
     198//     if (_param->_have_port_rob_ptr)
     199//       vhdl->set_body (3,"reg_PACKET_ID_"+toString(_param->_size_queue-1)+"     <= in_EXECUTE_QUEUE_IN_PACKET_ID;");
     200//     vhdl->set_body (3, "reg_FLAGS_"+toString(_param->_size_queue-1)+"        <= in_EXECUTE_QUEUE_IN_FLAGS;");
     201//     vhdl->set_body (3, "reg_EXCEPTION_"+toString(_param->_size_queue-1)+"    <= in_EXECUTE_QUEUE_IN_EXCEPTION;");
     202//     vhdl->set_body (3, "reg_NO_SEQUENCE_"+toString(_param->_size_queue-1)+"  <= in_EXECUTE_QUEUE_IN_NO_SEQUENCE;");
     203//     vhdl->set_body (3, "reg_ADDRESS_"+toString(_param->_size_queue-1)+"      <= in_EXECUTE_QUEUE_IN_ADDRESS;");
     204//     vhdl->set_body (3, "reg_DATA_"+toString(_param->_size_queue-1)+"         <= in_EXECUTE_QUEUE_IN_DATA;");
    34205//     vhdl->set_body (2,"end if;");
    35206
    36     for (uint32_t i = 0; i <_param->_size_queue - 1; i++)
    37       {
    38         vhdl->set_body (2,"if sig_WEN_"+toString(i)+" = '1' then");
    39         vhdl->set_body (3,"if sig_SEL_"+toString(i)+" = '0' then");
    40         if (_param->_have_port_context_id)
    41         vhdl->set_body (4,"reg_CONTEXT_ID_"+toString(i)+"    <= in_EXECUTE_QUEUE_IN_CONTEXT_ID;");
    42         if (_param->_have_port_front_end_id)
    43         vhdl->set_body (4,"reg_FRONT_END_ID_"+toString(i)+"  <= in_EXECUTE_QUEUE_IN_FRONT_END_ID;");
    44         if (_param->_have_port_ooo_engine_id)
    45         vhdl->set_body (4,"reg_OOO_ENGINE_ID_"+toString(i)+" <= in_EXECUTE_QUEUE_IN_OOO_ENGINE_ID;");
    46         if (_param->_have_port_rob_ptr)
    47         vhdl->set_body (4,"reg_PACKET_ID_"+toString(i)+"     <= in_EXECUTE_QUEUE_IN_PACKET_ID;");
    48         vhdl->set_body (4, "reg_FLAGS_"+toString(i)+"        <= in_EXECUTE_QUEUE_IN_FLAGS;");
    49         vhdl->set_body (4, "reg_EXCEPTION_"+toString(i)+"    <= in_EXECUTE_QUEUE_IN_EXCEPTION;");
    50         vhdl->set_body (4, "reg_NO_SEQUENCE_"+toString(i)+"  <= in_EXECUTE_QUEUE_IN_NO_SEQUENCE;");
    51         vhdl->set_body (4, "reg_ADDRESS_"+toString(i)+"      <= in_EXECUTE_QUEUE_IN_ADDRESS;");
    52         vhdl->set_body (4, "reg_DATA_"+toString(i)+"         <= in_EXECUTE_QUEUE_IN_DATA;");
    53 
    54         vhdl->set_body (3, "else");
    55         if (_param->_have_port_context_id)
    56         vhdl->set_body (4,"reg_CONTEXT_ID_"+toString(i)+"    <= reg_CONTEXT_ID_"+toString(i+1)+";");
    57         if (_param->_have_port_front_end_id)
    58         vhdl->set_body (4,"reg_FRONT_END_ID_"+toString(i)+"  <= reg_FRONT_END_ID_"+toString(i+1)+";");
    59         if (_param->_have_port_ooo_engine_id)
    60         vhdl->set_body (4,"reg_OOO_ENGINE_ID_"+toString(i)+" <= reg_OOO_ENGINE_ID_"+toString(i+1)+";");
    61         if (_param->_have_port_rob_ptr)
    62         vhdl->set_body (4,"reg_PACKET_ID_"+toString(i)+"     <= reg_PACKET_ID_"+toString(i+1)+";");
    63         vhdl->set_body (4, "reg_FLAGS_"+toString(i)+"        <= reg_FLAGS_"+toString(i+1)+";");
    64         vhdl->set_body (4, "reg_EXCEPTION_"+toString(i)+"    <= reg_EXCEPTION_"+toString(i+1)+";");
    65         vhdl->set_body (4, "reg_NO_SEQUENCE_"+toString(i)+"  <= reg_NO_SEQUENCE_"+toString(i+1)+";");
    66         vhdl->set_body (4, "reg_ADDRESS_"+toString(i)+"      <= reg_ADDRESS_"+toString(i+1)+";");
    67         vhdl->set_body (4, "reg_DATA_"+toString(i)+"         <= reg_DATA_"+toString(i+1)+";");
    68        
    69         vhdl->set_body (3,"end if;");
    70 
    71         vhdl->set_body (2,"end if;");
    72       }
    73 
    74     vhdl->set_body (2,"if sig_WEN_"+toString(_param->_size_queue-1)+" = '1' then");
    75     if (_param->_have_port_context_id)
    76       vhdl->set_body (3,"reg_CONTEXT_ID_"+toString(_param->_size_queue-1)+"    <= in_EXECUTE_QUEUE_IN_CONTEXT_ID;");
    77     if (_param->_have_port_front_end_id)
    78       vhdl->set_body (3,"reg_FRONT_END_ID_"+toString(_param->_size_queue-1)+"  <= in_EXECUTE_QUEUE_IN_FRONT_END_ID;");
    79     if (_param->_have_port_ooo_engine_id)
    80       vhdl->set_body (3,"reg_OOO_ENGINE_ID_"+toString(_param->_size_queue-1)+" <= in_EXECUTE_QUEUE_IN_OOO_ENGINE_ID;");
    81     if (_param->_have_port_rob_ptr)
    82       vhdl->set_body (3,"reg_PACKET_ID_"+toString(_param->_size_queue-1)+"     <= in_EXECUTE_QUEUE_IN_PACKET_ID;");
    83     vhdl->set_body (3, "reg_FLAGS_"+toString(_param->_size_queue-1)+"        <= in_EXECUTE_QUEUE_IN_FLAGS;");
    84     vhdl->set_body (3, "reg_EXCEPTION_"+toString(_param->_size_queue-1)+"    <= in_EXECUTE_QUEUE_IN_EXCEPTION;");
    85     vhdl->set_body (3, "reg_NO_SEQUENCE_"+toString(_param->_size_queue-1)+"  <= in_EXECUTE_QUEUE_IN_NO_SEQUENCE;");
    86     vhdl->set_body (3, "reg_ADDRESS_"+toString(_param->_size_queue-1)+"      <= in_EXECUTE_QUEUE_IN_ADDRESS;");
    87     vhdl->set_body (3, "reg_DATA_"+toString(_param->_size_queue-1)+"         <= in_EXECUTE_QUEUE_IN_DATA;");
    88     vhdl->set_body (2,"end if;");
    89 
    90 
    91     vhdl->set_body (1,"end if;");
    92     vhdl->set_body (0,"end process;");
    93 
    94 
    95     vhdl->set_body (0,"");
    96     vhdl->set_body (0,"");
    97     vhdl->set_body (0,"");
    98 
    99     vhdl->set_body (0,"out_EXECUTE_QUEUE_OUT_VAL <= sig_OUT_VAL;");
    100     vhdl->set_body (0,"out_EXECUTE_QUEUE_IN_ACK <= sig_IN_ACK;");
    101     if (_param->_have_port_context_id)
    102     vhdl->set_body (0,"out_EXECUTE_QUEUE_OUT_CONTEXT_ID <= reg_CONTEXT_ID_0;");
    103     if (_param->_have_port_front_end_id)
    104     vhdl->set_body (0,"out_EXECUTE_QUEUE_OUT_FRONT_END_ID <= reg_FRONT_END_ID_0;");
    105     if (_param->_have_port_ooo_engine_id)
    106     vhdl->set_body (0,"out_EXECUTE_QUEUE_OUT_OOO_ENGINE_ID <= reg_OOO_ENGINE_ID_0;");
    107     if (_param->_have_port_rob_ptr)
    108     vhdl->set_body (0,"out_EXECUTE_QUEUE_OUT_PACKET_ID <= reg_PACKET_ID_0;");
    109     vhdl->set_body (0, "out_EXECUTE_QUEUE_OUT_FLAGS <= reg_FLAGS_0;");
    110     vhdl->set_body (0, "out_EXECUTE_QUEUE_OUT_EXCEPTION <= reg_EXCEPTION_0;");
    111     vhdl->set_body (0, "out_EXECUTE_QUEUE_OUT_NO_SEQUENCE <= reg_NO_SEQUENCE_0;");
    112     vhdl->set_body (0, "out_EXECUTE_QUEUE_OUT_ADDRESS <= reg_ADDRESS_0;");
    113     vhdl->set_body (0, "out_EXECUTE_QUEUE_OUT_DATA <= reg_DATA_0;");
    114 
    115 
    116     vhdl->set_body (0,"");
    117 
    118     vhdl->set_body (0,"process (reg_CURRENT_STATE, in_EXECUTE_QUEUE_OUT_ACK, in_EXECUTE_QUEUE_IN_VAL, in_NRESET)");
    119     vhdl->set_body (0,"begin");
    120     vhdl->set_body (1,"if in_NRESET = '0' then");
    121     vhdl->set_body (2,"sig_NEXT_STATE <= STATE_0;");
    122     vhdl->set_body (1,"else");
    123     vhdl->set_body (2,"case reg_CURRENT_STATE is");
    124     for (uint32_t i = 0; i <_param->_size_queue + 1; i++)
    125       {
    126         vhdl->set_body (3,"when STATE_"+toString(i)+" =>");
    127         if (i == 0)
    128           {
    129             vhdl->set_body (4,"if in_EXECUTE_QUEUE_IN_VAL = '1' then");
    130             vhdl->set_body (5,"sig_NEXT_STATE <= reg_CURRENT_STATE ("+toString(_param->_size_queue-1)+" downto 0) & '0';");
    131             vhdl->set_body (4,"else");
    132             vhdl->set_body (5,"sig_NEXT_STATE <= reg_CURRENT_STATE;");
    133             vhdl->set_body (4,"end if;");
    134             continue;
    135           }
    136         if (i == (_param->_size_queue))
    137           {
    138             vhdl->set_body (4,"if in_EXECUTE_QUEUE_OUT_ACK = '1' then");
    139             vhdl->set_body (5,"sig_NEXT_STATE <= '0' & reg_CURRENT_STATE ("+toString(_param->_size_queue)+" downto 1);");
    140             vhdl->set_body (4,"else");
    141             vhdl->set_body (5,"sig_NEXT_STATE <= reg_CURRENT_STATE;");
    142             vhdl->set_body (4,"end if;");
    143             continue;
    144           }
    145         vhdl->set_body (4,"if in_EXECUTE_QUEUE_IN_VAL = '1' and in_EXECUTE_QUEUE_OUT_ACK = '0' then");
    146         vhdl->set_body (5,"sig_NEXT_STATE <= reg_CURRENT_STATE ("+toString(_param->_size_queue-1)+" downto 0) & '0';");
    147         vhdl->set_body (4,"elsif in_EXECUTE_QUEUE_IN_VAL = '0' and in_EXECUTE_QUEUE_OUT_ACK = '1' then");
    148         vhdl->set_body (5,"sig_NEXT_STATE <= '0' & reg_CURRENT_STATE ("+toString(_param->_size_queue)+" downto 1);");
    149         vhdl->set_body (4,"else");
    150         vhdl->set_body (5,"sig_NEXT_STATE <= reg_CURRENT_STATE;");
    151         vhdl->set_body (4,"end if;");
    152       }
    153     vhdl->set_body (3,"when others => assert false report \"wrong state\" severity failure;");
    154     vhdl->set_body (2,"end case;");
    155     vhdl->set_body (1,"end if;");
    156 
    157     vhdl->set_body (2,"case reg_CURRENT_STATE is");
    158     for (uint32_t i = 0; i <_param->_size_queue + 1; i++)
    159       {
    160         vhdl->set_body (3,"when STATE_"+toString(i)+" =>");
    161         if (i == 0)
    162           {
    163             vhdl->set_body (4,"sig_OUT_VAL <= '0';");
    164             vhdl->set_body (4,"sig_IN_ACK <= '1';");
    165             for (uint32_t j = 0; j <_param->_size_queue; j++)
    166               {
    167                 if (i == j)
    168                   {
    169                     vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= '0';");
    170                     vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= in_EXECUTE_QUEUE_IN_VAL;");
    171                   }
    172                 else
    173                   {
    174                     if (j < (_param->_size_queue - 1))
    175                       vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= '0';");
    176                     vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= '0';");
    177                   }
    178               }
    179             continue;
    180           }
    181         if (i == (_param->_size_queue))
    182           {
    183             vhdl->set_body (4,"sig_OUT_VAL <= '1';");
    184             vhdl->set_body (4,"sig_IN_ACK <= '0';");
    185             for (uint32_t j = 0; j <_param->_size_queue; j++)
    186               {
    187                 if (j == (i - 1))
    188                   {
    189                     vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= '0';");
    190                   }
    191                 else
    192                   {
    193                     vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= in_EXECUTE_QUEUE_OUT_ACK;");
    194                     vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= in_EXECUTE_QUEUE_OUT_ACK;");
    195                   }
    196               }
    197             continue;
    198           }
    199         vhdl->set_body (4,"sig_OUT_VAL <= '1';");
    200         vhdl->set_body (4,"sig_IN_ACK <= '1';");
    201         for (uint32_t j = 0; j <_param->_size_queue; j++)
    202           {
    203             if (j < (i - 1))
    204               {
    205                 vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= in_EXECUTE_QUEUE_OUT_ACK;");
    206                 vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= in_EXECUTE_QUEUE_OUT_ACK;");
    207               }
    208             if (j == (i - 1))
    209               {
    210                 vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= '0';");
    211                 vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= in_EXECUTE_QUEUE_OUT_ACK and in_EXECUTE_QUEUE_IN_VAL;");
    212               }
    213             if (j == i)
    214               {
    215                 if (j < (_param->_size_queue - 1))
    216                   vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= '0';");
    217                 vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= in_EXECUTE_QUEUE_IN_VAL and not in_EXECUTE_QUEUE_OUT_ACK;");
    218               }
    219             if (j > i)
    220               {
    221                 if (j < (_param->_size_queue - 1))
    222                   vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= '0';");
    223                 vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= '0';");
    224               }
    225           }
    226       }
    227     vhdl->set_body (3,"when others =>");
    228     vhdl->set_body (2,"end case;");
    229 
    230     vhdl->set_body (0,"end process;");
    231 
    232  
    233 
     207
     208//     vhdl->set_body (1,"end if;");
     209//     vhdl->set_body (0,"end process;");
     210
     211
     212//     vhdl->set_body (0,"");
     213//     vhdl->set_body (0,"");
     214//     vhdl->set_body (0,"");
     215
     216//     vhdl->set_body (0,"out_EXECUTE_QUEUE_OUT_VAL <= sig_OUT_VAL;");
     217//     vhdl->set_body (0,"out_EXECUTE_QUEUE_IN_ACK <= sig_IN_ACK;");
     218//     if (_param->_have_port_context_id)
     219//     vhdl->set_body (0,"out_EXECUTE_QUEUE_OUT_CONTEXT_ID <= reg_CONTEXT_ID_0;");
     220//     if (_param->_have_port_front_end_id)
     221//     vhdl->set_body (0,"out_EXECUTE_QUEUE_OUT_FRONT_END_ID <= reg_FRONT_END_ID_0;");
     222//     if (_param->_have_port_ooo_engine_id)
     223//     vhdl->set_body (0,"out_EXECUTE_QUEUE_OUT_OOO_ENGINE_ID <= reg_OOO_ENGINE_ID_0;");
     224//     if (_param->_have_port_rob_ptr)
     225//     vhdl->set_body (0,"out_EXECUTE_QUEUE_OUT_PACKET_ID <= reg_PACKET_ID_0;");
     226//     vhdl->set_body (0, "out_EXECUTE_QUEUE_OUT_FLAGS <= reg_FLAGS_0;");
     227//     vhdl->set_body (0, "out_EXECUTE_QUEUE_OUT_EXCEPTION <= reg_EXCEPTION_0;");
     228//     vhdl->set_body (0, "out_EXECUTE_QUEUE_OUT_NO_SEQUENCE <= reg_NO_SEQUENCE_0;");
     229//     vhdl->set_body (0, "out_EXECUTE_QUEUE_OUT_ADDRESS <= reg_ADDRESS_0;");
     230//     vhdl->set_body (0, "out_EXECUTE_QUEUE_OUT_DATA <= reg_DATA_0;");
     231
     232
     233//     vhdl->set_body (0,"");
     234
     235//     vhdl->set_body (0,"process (reg_CURRENT_STATE, in_EXECUTE_QUEUE_OUT_ACK, in_EXECUTE_QUEUE_IN_VAL, in_NRESET)");
     236//     vhdl->set_body (0,"begin");
     237//     vhdl->set_body (1,"if in_NRESET = '0' then");
     238//     vhdl->set_body (2,"sig_NEXT_STATE <= STATE_0;");
     239//     vhdl->set_body (1,"else");
     240//     vhdl->set_body (2,"case reg_CURRENT_STATE is");
     241//     for (uint32_t i = 0; i <_param->_size_queue + 1; i++)
     242//       {
     243//      vhdl->set_body (3,"when STATE_"+toString(i)+" =>");
     244//      if (i == 0)
     245//        {
     246//          vhdl->set_body (4,"if in_EXECUTE_QUEUE_IN_VAL = '1' then");
     247//          vhdl->set_body (5,"sig_NEXT_STATE <= reg_CURRENT_STATE ("+toString(_param->_size_queue-1)+" downto 0) & '0';");
     248//          vhdl->set_body (4,"else");
     249//          vhdl->set_body (5,"sig_NEXT_STATE <= reg_CURRENT_STATE;");
     250//          vhdl->set_body (4,"end if;");
     251//          continue;
     252//        }
     253//      if (i == (_param->_size_queue))
     254//        {
     255//          vhdl->set_body (4,"if in_EXECUTE_QUEUE_OUT_ACK = '1' then");
     256//          vhdl->set_body (5,"sig_NEXT_STATE <= '0' & reg_CURRENT_STATE ("+toString(_param->_size_queue)+" downto 1);");
     257//          vhdl->set_body (4,"else");
     258//          vhdl->set_body (5,"sig_NEXT_STATE <= reg_CURRENT_STATE;");
     259//          vhdl->set_body (4,"end if;");
     260//          continue;
     261//        }
     262//      vhdl->set_body (4,"if in_EXECUTE_QUEUE_IN_VAL = '1' and in_EXECUTE_QUEUE_OUT_ACK = '0' then");
     263//      vhdl->set_body (5,"sig_NEXT_STATE <= reg_CURRENT_STATE ("+toString(_param->_size_queue-1)+" downto 0) & '0';");
     264//      vhdl->set_body (4,"elsif in_EXECUTE_QUEUE_IN_VAL = '0' and in_EXECUTE_QUEUE_OUT_ACK = '1' then");
     265//      vhdl->set_body (5,"sig_NEXT_STATE <= '0' & reg_CURRENT_STATE ("+toString(_param->_size_queue)+" downto 1);");
     266//      vhdl->set_body (4,"else");
     267//      vhdl->set_body (5,"sig_NEXT_STATE <= reg_CURRENT_STATE;");
     268//      vhdl->set_body (4,"end if;");
     269//       }
     270//     vhdl->set_body (3,"when others => assert false report \"wrong state\" severity failure;");
    234271//     vhdl->set_body (2,"end case;");
    235 //     for (uint32_t i = 0; i <_param->_size_queue; i++)
     272//     vhdl->set_body (1,"end if;");
     273
     274//     vhdl->set_body (2,"case reg_CURRENT_STATE is");
     275//     for (uint32_t i = 0; i <_param->_size_queue + 1; i++)
    236276//       {
    237 //      if (i == 0)
    238 //        vhdl->set_body (4,"sig_WEN_"+toString(i)+" <= in_EXECUTE_QUEUE_IN_VAL;");
    239 //      else
    240 //        vhdl->set_body (4,"sig_WEN_"+toString(i)+" <= '0';");
    241 //      if (i < _param->_size_queue - 1)
    242 //        vhdl->set_body (4,"sig_SEL_"+toString(i)+" <= '0';");
     277//      vhdl->set_body (3,"when STATE_"+toString(i)+" =>");
     278//      if (i == 0)
     279//        {
     280//          vhdl->set_body (4,"sig_OUT_VAL <= '0';");
     281//          vhdl->set_body (4,"sig_IN_ACK <= '1';");
     282//          for (uint32_t j = 0; j <_param->_size_queue; j++)
     283//            {
     284//              if (i == j)
     285//                {
     286//                  vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= '0';");
     287//                  vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= in_EXECUTE_QUEUE_IN_VAL;");
     288//                }
     289//              else
     290//                {
     291//                  if (j < (_param->_size_queue - 1))
     292//                    vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= '0';");
     293//                  vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= '0';");
     294//                }
     295//            }
     296//          continue;
     297//        }
     298//      if (i == (_param->_size_queue))
     299//        {
     300//          vhdl->set_body (4,"sig_OUT_VAL <= '1';");
     301//          vhdl->set_body (4,"sig_IN_ACK <= '0';");
     302//          for (uint32_t j = 0; j <_param->_size_queue; j++)
     303//            {
     304//              if (j == (i - 1))
     305//                {
     306//                  vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= '0';");
     307//                }
     308//              else
     309//                {
     310//                  vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= in_EXECUTE_QUEUE_OUT_ACK;");
     311//                  vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= in_EXECUTE_QUEUE_OUT_ACK;");
     312//                }
     313//            }
     314//          continue;
     315//        }
     316//      vhdl->set_body (4,"sig_OUT_VAL <= '1';");
     317//      vhdl->set_body (4,"sig_IN_ACK <= '1';");
     318//      for (uint32_t j = 0; j <_param->_size_queue; j++)
     319//        {
     320//          if (j < (i - 1))
     321//            {
     322//              vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= in_EXECUTE_QUEUE_OUT_ACK;");
     323//              vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= in_EXECUTE_QUEUE_OUT_ACK;");
     324//            }
     325//          if (j == (i - 1))
     326//            {
     327//              vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= '0';");
     328//              vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= in_EXECUTE_QUEUE_OUT_ACK and in_EXECUTE_QUEUE_IN_VAL;");
     329//            }
     330//          if (j == i)
     331//            {
     332//              if (j < (_param->_size_queue - 1))
     333//                vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= '0';");
     334//              vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= in_EXECUTE_QUEUE_IN_VAL and not in_EXECUTE_QUEUE_OUT_ACK;");
     335//            }
     336//          if (j > i)
     337//            {
     338//              if (j < (_param->_size_queue - 1))
     339//                vhdl->set_body (4,"sig_SEL_"+toString(j)+" <= '0';");
     340//              vhdl->set_body (4,"sig_WEN_"+toString(j)+" <= '0';");
     341//            }
     342//        }
    243343//       }
    244 //     vhdl->set_body (2,"end process;");
    245        
    246 //     vhdl->set_body (0,"sig_TRANS_OUT <=");
    247 //     vhdl->set_body (1,"'0' when reg_CURRENT_STATE = STATE_0 else");
    248 //     vhdl->set_body (1,"'1';");
    249 
    250 //     vhdl->set_body (0,"sig_TRANS_IN <=");
    251 //     vhdl->set_body (1,"'0' when reg_CURRENT_STATE = STATE_"+toString(_param->_size_queue)+" else");
    252 //     vhdl->set_body (1,"'1';");
    253 
    254 
    255 
    256 //     vhdl->set_body (0,"sig_NEXT_STATE <=");
    257 //     vhdl->set_body (1,"reg_CURRENT_STATE("+toString(_param->_size_queue-1)+" downto 0) & '0' when in_EXECUTE_QUEUE_IN_VAL = '1' and ((reg_CURRENT_STATE = STATE_0) xor (in_EXECUTE_QUEUE_OUT_ACK = '0')) and sig_TRANS_IN = '1' else");
    258 //     vhdl->set_body (1,"'0' & reg_CURRENT_STATE("+toString(_param->_size_queue)+" downto 1) when in_EXECUTE_QUEUE_OUT_ACK = '1' and ((in_EXECUTE_QUEUE_IN_VAL = '0') xor (reg_CURRENT_STATE = STATE_"+toString(_param->_size_queue)+")) and sig_TRANS_OUT = '1' else");
    259 //     vhdl->set_body (1,"reg_CURRENT_STATE;");
    260 
    261 //     vhdl->set_body (0,"sig_WEN_0 <=");
    262 //     vhdl->set_body (1,"in_EXECUTE_QUEUE_IN_VAL when reg_CURRENT_STATE = STATE_0 else");
    263 //     vhdl->set_body (1,"in_EXECUTE_QUEUE_OUT_ACK and in_EXECUTE_QUEUE_IN_VAL when reg_CURRENT_STATE = STATE_1 else");
    264 //     vhdl->set_body (1,"in_EXECUTE_QUEUE_OUT_ACK;");
    265 //      for (uint32_t i = 1; i <_param->_size_queue-1; i++)
    266 //       {
    267 //      vhdl->set_body (0,"sig_WEN_"+toString(i)+" <=");
    268 //      vhdl->set_body (1,"in_EXECUTE_QUEUE_IN_VAL and not in_EXECUTE_QUEUE_OUT_ACK when reg_CURRENT_STATE = STATE_"+toString(i)+" else");
    269 //      vhdl->set_body (1,"in_EXECUTE_QUEUE_IN_VAL and in_EXECUTE_QUEUE_OUT_ACK when reg_CURRENT_STATE = STATE_"+toString(i+1)+" else");
    270 //      vhdl->set_body (1,"in_EXECUTE_QUEUE_OUT_ACK;");
    271 //       }
    272 //     vhdl->set_body (0,"sig_WEN_"+toString(_param->_size_queue-1)+" <=");
    273 //     vhdl->set_body (1,"in_EXECUTE_QUEUE_IN_VAL and not in_EXECUTE_QUEUE_OUT_ACK when reg_CURRENT_STATE = STATE_"+toString(_param->_size_queue-1)+" else");
    274 //     vhdl->set_body (1,"in_EXECUTE_QUEUE_OUT_ACK;");
    275 
    276 //     vhdl->set_body (0,"");
    277 //     for (uint32_t i = 0; i <_param->_size_queue-1; i++)
    278 //       {
    279 //      vhdl->set_body (0,"sig_SEL_"+toString(i)+" <=");
    280 //      vhdl->set_body (1,"'0' when reg_CURRENT_STATE = STATE_"+toString(i+1)+" or reg_CURRENT_STATE = STATE_"+toString(i)+" else");
    281 //      vhdl->set_body (1,"in_EXECUTE_QUEUE_OUT_ACK;");
    282 //       }
    283 
    284 //   process (reg_CURRENT_STATE, in_PUSH_0_VAL, in_POP_0_ACK)
    285 //   begin
    286 //     case reg_CURRENT_STATE is
    287    
    288 // with reg_CURRENT_STATE select
    289 //   sig_WEN0 <=
    290 //   0 when 1,
    291 //   4 when 6;
    292 //       when "00001" => out_POP_0_VAL <= '0';
    293 //                      out_PUSH_0_ACK <= '1';
    294 //                      sig_SEL0 <= '0';
    295 //                      sig_WEN0 <= in_PUSH_0_VAL;
    296 //                      sig_SEL1 <= '0';
    297 //                      sig_WEN1 <= '0';
    298 //                      sig_SEL2 <= '0';
    299 //                      sig_WEN2 <= '0';
    300 //                      sig_WEN3 <= '0';
    301 //                      if in_PUSH_0_VAL = '1' then
    302 //                        sig_NEXT_STATE <= reg_CURRENT_STATE(3 downto 0) & '0';
    303 //                      else
    304 //                        sig_NEXT_STATE <= reg_CURRENT_STATE;
    305 //                      end if;
    306 
    307 //       when "00010" => out_POP_0_VAL <= '1';
    308 //                      out_PUSH_0_ACK <= '1';
    309 //                      sig_SEL0 <= '0';
    310 //                      sig_WEN0 <= in_POP_0_ACK and in_PUSH_0_VAL;
    311 //                      sig_SEL1 <= '0';
    312 //                      sig_WEN1 <= in_PUSH_0_VAL and not in_POP_0_ACK;
    313 //                      sig_SEL2 <= '0';
    314 //                      sig_WEN2 <= '0';
    315 //                      sig_WEN3 <= '0';
    316 //                      if (in_PUSH_0_VAL = '1') and (in_POP_0_ACK = '0') then
    317 //                        sig_NEXT_STATE <= reg_CURRENT_STATE(3 downto 0) & '0';
    318 //                      elsif (in_PUSH_0_VAL = '0') and (in_POP_0_ACK = '1') then
    319 //                        sig_NEXT_STATE <= '0' & reg_CURRENT_STATE(4 downto 1);
    320 //                      else
    321 //                        sig_NEXT_STATE <= reg_CURRENT_STATE;
    322 //                      end if;
    323 
    324 //       when "00100" => out_POP_0_VAL <= '1';
    325 //                      out_PUSH_0_ACK <= '1';
    326 //                      sig_SEL0 <= in_POP_0_ACK;
    327 //                      sig_WEN0 <= in_POP_0_ACK;
    328 //                      sig_SEL1 <= '0';
    329 //                      sig_WEN1 <= in_POP_0_ACK and in_PUSH_0_VAL;
    330 //                      sig_SEL2 <= '0';
    331 //                      sig_WEN2 <= in_PUSH_0_VAL and not in_POP_0_ACK;
    332 //                      sig_WEN3 <= '0';
    333 //                      if (in_PUSH_0_VAL = '1') and (in_POP_0_ACK = '0') then
    334 //                        sig_NEXT_STATE <= reg_CURRENT_STATE(3 downto 0) & '0';
    335 //                      elsif (in_PUSH_0_VAL = '0') and (in_POP_0_ACK = '1') then
    336 //                        sig_NEXT_STATE <= '0' & reg_CURRENT_STATE(4 downto 1);
    337 //                      else
    338 //                        sig_NEXT_STATE <= reg_CURRENT_STATE;
    339 //                      end if;
    340 
    341 //       when "01000" => out_POP_0_VAL <= '1';
    342 //                      out_PUSH_0_ACK <= '1';
    343 //                      sig_SEL0 <= in_POP_0_ACK;
    344 //                      sig_WEN0 <= in_POP_0_ACK;
    345 //                      sig_SEL1 <= in_POP_0_ACK;
    346 //                      sig_WEN1 <= in_POP_0_ACK;
    347 //                      sig_SEL2 <= '0';
    348 //                      sig_WEN2 <= in_POP_0_ACK and in_PUSH_0_VAL;
    349 //                      sig_WEN3 <= in_PUSH_0_VAL and not in_POP_0_ACK;
    350 //                      if (in_PUSH_0_VAL = '1') and (in_POP_0_ACK = '0') then
    351 //                        sig_NEXT_STATE <= reg_CURRENT_STATE(3 downto 0) & '0';
    352 //                      elsif (in_PUSH_0_VAL = '0') and (in_POP_0_ACK = '1') then
    353 //                        sig_NEXT_STATE <= '0' & reg_CURRENT_STATE(4 downto 1);
    354 //                      else
    355 //                        sig_NEXT_STATE <= reg_CURRENT_STATE;
    356 //                      end if;
    357 
    358 //       when "10000" => out_POP_0_VAL <= '1';
    359 //                      out_PUSH_0_ACK <= '0';
    360 //                      sig_SEL0 <= in_POP_0_ACK;
    361 //                      sig_WEN0 <= in_POP_0_ACK;
    362 //                      sig_SEL1 <= in_POP_0_ACK;
    363 //                      sig_WEN1 <= in_POP_0_ACK;
    364 //                      sig_SEL2 <= in_POP_0_ACK;
    365 //                      sig_WEN2 <= in_POP_0_ACK;
    366 //                      sig_WEN3 <= '0';
    367 //                      if (in_PUSH_0_VAL = '0') and (in_POP_0_ACK = '1') then
    368 //                        sig_NEXT_STATE <= '0' & reg_CURRENT_STATE(4 downto 1);
    369 //                      else
    370 //                        sig_NEXT_STATE <= reg_CURRENT_STATE;
    371 //                      end if;
    372 
    373 //          when others =>
    374 //                      sig_next_state <= "00001";
    375 
    376 //      end case;
    377 //   end process;
     344//     vhdl->set_body (3,"when others =>");
     345//     vhdl->set_body (2,"end case;");
     346//     vhdl->set_body (0,"end process;");
    378347
    379348    log_printf(FUNC,Execute_queue,FUNCTION,"End");
Note: See TracChangeset for help on using the changeset viewer.