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systemC
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RegisterFile
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RegisterFile_Multi_Banked
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Rev
Age
Author
Log Message
(edit)
@113
15 years
rosiere
1) Add modelsim simulation systemC 2) Modelsim cosimulation systemC / …
(edit)
@112
15 years
rosiere
1) Stat_list : fix retire old and new register bug 2) Stat_list : …
(edit)
@111
16 years
rosiere
1) Decod_queue : multi implementation (one_fifo, multi_fifo) 2) …
(edit)
@106
16 years
rosiere
1) RAT : Fix bug when update and event in same cycle 2) Context State …
(edit)
@97
16 years
rosiere
1) Update Prediction Table : statistics 2) Size instruction address on …
(edit)
@88
16 years
rosiere
Almost complete design with Test and test platform
(edit)
@82
16 years
rosiere
* support locale (now must "just" translate) * update all component …
(edit)
@81
16 years
rosiere
- Finish Environment (and test) - Continue predictor_unit - Add …
(edit)
@78
16 years
rosiere
Add : * Execute_loop (must be test systemC) * Prediction * …
(edit)
@75
17 years
rosiere
Update all component (except front_end) to : * new statistics model …
(edit)
@68
17 years
rosiere
read_queue : systemC et vhdl ok ! queue : quelques petits modif pour …
(edit)
@67
17 years
rosiere
Ajout d'un nouveau composant : fifo generic (un port lecture et un …
(edit)
@65
17 years
rosiere
register_unit : systemc et VHDL ok
(edit)
@62
17 years
rosiere
Modification en profondeur de Component-port_map. Compilation ok pour …
(edit)
@59
17 years
rosiere
Add Load store queue -> but not terminated and tested Add article to …
(edit)
@58
17 years
rosiere
Vhdl : RegisterFile_Multi_Banked - "full crossbar" Correction d'un bug …
(edit)
@57
17 years
rosiere
* VHDL - RegisterFile_Multi_Banked (only partial_crossbar) * SystemC - …
(add)
@53
17 years
rosiere
* Banc de registre multi banc * Banc de registre générique.
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