Opened 16 years ago

Last modified 15 years ago

#11 closed enhancement

Handle exceptions through a context switch — at Version 2

Reported by: Nicolas Pouillon Owned by: Nicolas Pouillon
Priority: minor Milestone: Preemptive scheduler usage
Component: hexo Keywords:
Cc:

Description (last modified by Nicolas Pouillon)

There are two main types of exception/interrupts:

  • hardware interrupts
  • program exception (sysreq, faults, traps, ...)

We'll need to be able to switch from a task to another when handling exceptions, this is because of different needs, but in the end is wanted:

  • syscall triggering a device action, thus making the task non-eligible to scheduling until the request ends
  • syscall begin sched_switch() or yield()
  • page fault triggering a page refill

Sometimes for hardware interrupts, we want to be able to switch tasks as well (eg timer + preempt)

Unfortunately, we cant do most of these jobs directly from the exception handlers because some CPUs (arm) use a special stack pointer when handling interrupts and exceptions. We dont want to loose time in IRQ processing, so we'll spend more time in exception processing.

We could handle all this a portable and easy way if we switched back to kernel mode (not exception or user). On exception/syscall, we can switch to other kernel-mode threads.

Optional exception:

This does not concern IRQs, which must be as-quick as possible. But as we sometimes have to switch threads on IRQ, we should add a mecanism allowing the IRQ handler to request a system service ASAP. Then directly in the asm IRQ handling code, we can detect this service request, and make the IRQ handler jump to the syscall code rather than returning to the user code.

Change History (9)

comment:1 Changed 16 years ago by Nicolas Pouillon

Description: modified (diff)

comment:2 Changed 15 years ago by Nicolas Pouillon

Description: modified (diff)

Main handling

  • exception:
  • syscall:
    • if from_user_mode:
      • cleanup user-accessible registers
      • push user_mode [1]
    • push cpu_mode ; switch to kernel mode [2]
    • push registers
    • [handle exception]
    • pop registers
    • pop cpu_mode [3]
    • if was from_user_mode:
      • pop user_mode [4]
    • back to code

[1] change la pile user en pile kernel, save l'état du proc [2] change le mode du proc en kernel, IRQ masqués [3] repasse le proc en mode exception [4] repasse le proc en mode user + gestion d'exceptions

Changed 15 years ago by Nicolas Pouillon

Attachment: mips_cpu_switching.diff added

Mips support patch + hexo factorization

Changed 15 years ago by Nicolas Pouillon

Attachment: user_mode.diff added

Same, improved with PPC support

Changed 15 years ago by Nicolas Pouillon

Attachment: exception.diff added

Same, improved with PPC support

Changed 15 years ago by Nicolas Pouillon

Attachment: exception.2.diff added

Same, improved with PPC support, tried & tested through automated builds

Changed 15 years ago by Nicolas Pouillon

Attachment: exception.3.diff added

Same, improved with PPC support, tried & tested through automated builds, with correct ARM init

Changed 15 years ago by Nicolas Pouillon

Attachment: exception.4.diff added

Once again

Changed 15 years ago by Nicolas Pouillon

Attachment: exception.5.diff added

Close to final version ? with IRQ disabling support

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