Timeline



Dec 7, 2012:

1:30 PM Changeset [189] by bouyer
The FPGA tty gets only a \r as end-of-line, so ignore \n and convert …
10:25 AM Changeset [188] by bouyer
soclib's STATUS is a boolean so we can mask it with 0x1, for the …

Dec 5, 2012:

5:32 PM Changeset [187] by bouyer
Use \r\n for the benefit of FPGA serial console
5:31 PM Changeset [186] by bouyer
Remove redundant release: target
5:26 PM Changeset [185] by bouyer
Don't strip the TSARMD kernel
3:21 PM Changeset [184] by bouyer
Add a small bootable diskimage, with only a kernel+ramdisk

Dec 3, 2012:

9:51 PM Changeset [183] by bouyer
Install boot loaders and a kernel in the disk image

Dec 1, 2012:

7:31 PM Changeset [182] by bouyer
Fix primary boot name (probably doesn't matter)
7:07 PM Changeset [181] by bouyer
Can't call boot_putc before stack has been set up.
6:42 PM Changeset [180] by bouyer
handle vci::tty in addition to soclib::tty
6:38 PM Changeset [179] by bouyer
handle non-page-aligned fdt
6:07 PM Changeset [178] by bouyer
Factor out common code, and make /boot pass the tty address to the …
5:28 PM Changeset [177] by bouyer
Change the soclib boot loader to make the non-boot CPUs sleep on XICU …

Nov 30, 2012:

12:07 AM Changeset [176] by bouyer
Catch up with bootloader work
12:05 AM Changeset [175] by bouyer
Add a second stage boot loader
12:04 AM Changeset [174] by bouyer
Really give a 2k stack
12:04 AM Changeset [173] by bouyer
Rename to ramboot

Nov 29, 2012:

5:08 PM Changeset [172] by bouyer
Use TSARMIPS_BOOT_BLOCK_BLOCKSIZE instead of local TSAR_SECTSIZE

Nov 28, 2012:

12:43 PM Changeset [171] by bouyer
tsarmips support in installboot
12:27 PM Changeset [170] by bouyer
Hook first-stage boot to build
12:46 AM Changeset [169] by bouyer
First cut at a first-stage boot loader

Nov 26, 2012:

12:44 PM Changeset [168] by bouyer
rework to use only CPU interrupt lines 0-3.
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