source: PROJECT_CORE_MPI/CORE_MPI/TRUNK/MPI_NOC_preroute.twr @ 16

Last change on this file since 16 was 15, checked in by rolagamo, 12 years ago
File size: 11.8 KB
Line 
1--------------------------------------------------------------------------------
2Release 12.3 Trace  (nt64)
3Copyright (c) 1995-2010 Xilinx, Inc.  All rights reserved.
4
5d:\Xilinx\12.3\ISE_DS\ISE\bin\nt64\unwrapped\trce.exe -intstyle ise -v 3 -s 5
6-n 3 -fastpaths -xml MPI_NOC_preroute.twx MPI_NOC_map.ncd -o
7MPI_NOC_preroute.twr MPI_NOC.pcf -ucf MPI_NOC.ucf
8
9Design file:              MPI_NOC_map.ncd
10Physical constraint file: MPI_NOC.pcf
11Device,package,speed:     xc3s1200e,ft256,-5 (PRODUCTION 1.27 2010-09-15)
12Report level:             verbose report
13
14Environment Variable      Effect
15--------------------      ------
16NONE                      No environment variables were set
17--------------------------------------------------------------------------------
18
19INFO:Timing:2698 - No timing constraints found, doing default enumeration.
20INFO:Timing:2752 - To get complete path coverage, use the unconstrained paths
21   option. All paths that are not constrained will be reported in the
22   unconstrained paths section(s) of the report.
23INFO:Timing:3284 - This timing report was generated using estimated delay
24   information.  For accurate numbers, please refer to the post Place and Route
25   timing report.
26INFO:Timing:3339 - The clock-to-out numbers in this timing report are based on
27   a 50 Ohm transmission line loading model.  For the details of this model,
28   and for more information on accounting for different loading conditions,
29   please see the device datasheet.
30INFO:Timing:3390 - This architecture does not support a default System Jitter
31   value, please add SYSTEM_JITTER constraint to the UCF to modify the Clock
32   Uncertainty calculation.
33INFO:Timing:3389 - This architecture does not support 'Discrete Jitter' and
34   'Phase Error' calculations, these terms will be zero in the Clock
35   Uncertainty calculation.  Please make appropriate modification to
36   SYSTEM_JITTER to account for the unsupported Discrete Jitter and Phase
37   Error.
38
39
40
41Data Sheet report:
42-----------------
43All values displayed in nanoseconds (ns)
44
45Setup/Hold to clock MPI_Node_in<1>_clk
46------------------------------+------------+------------+------------------------+--------+
47                              |Max Setup to|Max Hold to |                        | Clock  |
48Source                        | clk (edge) | clk (edge) |Internal Clock(s)       | Phase  |
49------------------------------+------------+------------+------------------------+--------+
50MPI_Node_in<1>_hold_ack       |    1.337(R)|    1.112(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
51MPI_Node_in<1>_instruction_en |    0.903(R)|    1.122(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
52MPI_Node_in<1>_ram_data_out<0>|    1.323(R)|    1.335(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
53MPI_Node_in<1>_ram_data_out<1>|    1.323(R)|    1.335(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
54MPI_Node_in<1>_ram_data_out<2>|    1.323(R)|    1.335(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
55MPI_Node_in<1>_ram_data_out<3>|    1.323(R)|    1.335(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
56MPI_Node_in<1>_ram_data_out<4>|    1.323(R)|    1.335(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
57MPI_Node_in<1>_ram_data_out<5>|    1.323(R)|    1.335(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
58MPI_Node_in<1>_ram_data_out<6>|    1.323(R)|    1.335(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
59MPI_Node_in<1>_ram_data_out<7>|    1.323(R)|    1.335(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
60MPI_Node_in<1>_reset          |    0.466(R)|    1.712(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
61MPI_Node_in<2>_hold_ack       |    1.337(R)|    1.112(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
62MPI_Node_in<2>_instruction_en |    0.903(R)|    1.122(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
63MPI_Node_in<2>_ram_data_out<0>|    1.323(R)|    1.335(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
64MPI_Node_in<2>_ram_data_out<1>|    1.323(R)|    1.335(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
65MPI_Node_in<2>_ram_data_out<2>|    1.323(R)|    1.335(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
66MPI_Node_in<2>_ram_data_out<3>|    1.323(R)|    1.335(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
67MPI_Node_in<2>_ram_data_out<4>|    1.323(R)|    1.335(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
68MPI_Node_in<2>_ram_data_out<5>|    1.323(R)|    1.335(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
69MPI_Node_in<2>_ram_data_out<6>|    1.323(R)|    1.335(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
70MPI_Node_in<2>_ram_data_out<7>|    1.323(R)|    1.335(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
71------------------------------+------------+------------+------------------------+--------+
72
73Clock MPI_Node_in<1>_clk to Pad
74-------------------------------------+------------+------------------------+--------+
75                                     | clk (edge) |                        | Clock  |
76Destination                          |   to PAD   |Internal Clock(s)       | Phase  |
77-------------------------------------+------------+------------------------+--------+
78MPI_Node_Out<1>_PushOut<0>           |    6.286(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
79MPI_Node_Out<1>_hold_req             |    6.998(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
80MPI_Node_Out<1>_instruction_fifo_full|    7.713(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
81MPI_Node_Out<1>_ram_address_rd<0>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
82MPI_Node_Out<1>_ram_address_rd<1>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
83MPI_Node_Out<1>_ram_address_rd<2>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
84MPI_Node_Out<1>_ram_address_rd<3>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
85MPI_Node_Out<1>_ram_address_rd<4>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
86MPI_Node_Out<1>_ram_address_rd<5>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
87MPI_Node_Out<1>_ram_address_rd<6>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
88MPI_Node_Out<1>_ram_address_rd<7>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
89MPI_Node_Out<1>_ram_address_rd<8>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
90MPI_Node_Out<1>_ram_address_rd<9>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
91MPI_Node_Out<1>_ram_address_rd<10>   |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
92MPI_Node_Out<1>_ram_address_rd<11>   |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
93MPI_Node_Out<1>_ram_address_rd<12>   |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
94MPI_Node_Out<1>_ram_address_rd<13>   |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
95MPI_Node_Out<1>_ram_address_rd<14>   |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
96MPI_Node_Out<1>_ram_address_rd<15>   |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
97MPI_Node_Out<1>_ram_address_wr<0>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
98MPI_Node_Out<1>_ram_address_wr<1>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
99MPI_Node_Out<1>_ram_address_wr<2>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
100MPI_Node_Out<1>_ram_address_wr<3>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
101MPI_Node_Out<1>_ram_address_wr<4>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
102MPI_Node_Out<1>_ram_address_wr<5>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
103MPI_Node_Out<1>_ram_address_wr<6>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
104MPI_Node_Out<1>_ram_address_wr<7>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
105MPI_Node_Out<1>_ram_address_wr<8>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
106MPI_Node_Out<1>_ram_address_wr<9>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
107MPI_Node_Out<1>_ram_address_wr<10>   |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
108MPI_Node_Out<1>_ram_address_wr<11>   |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
109MPI_Node_Out<1>_ram_address_wr<12>   |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
110MPI_Node_Out<1>_ram_address_wr<13>   |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
111MPI_Node_Out<1>_ram_address_wr<14>   |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
112MPI_Node_Out<1>_ram_address_wr<15>   |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
113MPI_Node_Out<1>_ram_en               |    9.415(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
114MPI_Node_Out<1>_ram_we               |    8.425(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
115MPI_Node_Out<2>_PushOut<0>           |    6.286(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
116MPI_Node_Out<2>_hold_req             |    6.998(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
117MPI_Node_Out<2>_instruction_fifo_full|    7.713(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
118MPI_Node_Out<2>_ram_address_rd<0>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
119MPI_Node_Out<2>_ram_address_rd<1>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
120MPI_Node_Out<2>_ram_address_rd<2>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
121MPI_Node_Out<2>_ram_address_rd<3>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
122MPI_Node_Out<2>_ram_address_rd<4>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
123MPI_Node_Out<2>_ram_address_rd<5>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
124MPI_Node_Out<2>_ram_address_rd<6>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
125MPI_Node_Out<2>_ram_address_rd<7>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
126MPI_Node_Out<2>_ram_address_rd<8>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
127MPI_Node_Out<2>_ram_address_rd<9>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
128MPI_Node_Out<2>_ram_address_rd<10>   |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
129MPI_Node_Out<2>_ram_address_rd<11>   |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
130MPI_Node_Out<2>_ram_address_rd<12>   |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
131MPI_Node_Out<2>_ram_address_rd<13>   |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
132MPI_Node_Out<2>_ram_address_rd<14>   |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
133MPI_Node_Out<2>_ram_address_rd<15>   |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
134MPI_Node_Out<2>_ram_address_wr<0>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
135MPI_Node_Out<2>_ram_address_wr<1>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
136MPI_Node_Out<2>_ram_address_wr<2>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
137MPI_Node_Out<2>_ram_address_wr<3>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
138MPI_Node_Out<2>_ram_address_wr<4>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
139MPI_Node_Out<2>_ram_address_wr<5>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
140MPI_Node_Out<2>_ram_address_wr<6>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
141MPI_Node_Out<2>_ram_address_wr<7>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
142MPI_Node_Out<2>_ram_address_wr<8>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
143MPI_Node_Out<2>_ram_address_wr<9>    |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
144MPI_Node_Out<2>_ram_address_wr<10>   |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
145MPI_Node_Out<2>_ram_address_wr<11>   |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
146MPI_Node_Out<2>_ram_address_wr<12>   |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
147MPI_Node_Out<2>_ram_address_wr<13>   |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
148MPI_Node_Out<2>_ram_address_wr<14>   |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
149MPI_Node_Out<2>_ram_address_wr<15>   |    7.991(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
150MPI_Node_Out<2>_ram_en               |    9.415(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
151MPI_Node_Out<2>_ram_we               |    8.425(R)|MPI_Node_in_1__clk_BUFGP|   0.000|
152-------------------------------------+------------+------------------------+--------+
153
154Clock to Setup on destination clock MPI_Node_in<1>_clk
155------------------+---------+---------+---------+---------+
156                  | Src:Rise| Src:Fall| Src:Rise| Src:Fall|
157Source Clock      |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|
158------------------+---------+---------+---------+---------+
159MPI_Node_in<1>_clk|    8.699|         |         |         |
160------------------+---------+---------+---------+---------+
161
162
163Analysis completed Fri Aug 03 10:19:46 2012
164--------------------------------------------------------------------------------
165
166Trace Settings:
167-------------------------
168Trace Settings
169
170Peak Memory Usage: 238 MB
171
172
173
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