[153] | 1 | ---------------------------------------------------------------------------------- |
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| 2 | -- Company: |
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| 3 | -- Engineer: |
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| 4 | -- |
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| 5 | -- Create Date: 12:04:21 04/22/2013 |
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| 6 | -- Design Name: |
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| 7 | -- Module Name: HT_process - Behavioral |
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| 8 | -- Project Name: |
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| 9 | -- Target Devices: |
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| 10 | -- Tool versions: |
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| 11 | -- Description: |
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| 12 | -- |
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| 13 | -- Dependencies: |
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| 14 | -- |
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| 15 | -- Revision: |
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| 16 | -- Revision 0.01 - File Created |
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| 17 | -- Additional Comments: |
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| 18 | -- |
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| 19 | ---------------------------------------------------------------------------------- |
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| 20 | library IEEE; |
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| 21 | use IEEE.STD_LOGIC_1164.ALL; |
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| 22 | USE ieee.numeric_std.ALL; |
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| 23 | library NocLib ; |
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| 24 | |
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| 25 | use std.textio.all; |
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| 26 | use NocLib.CoreTypes.all; |
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| 27 | Library MPI_HCL; |
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| 28 | use MPI_HCL.Packet_type.all; |
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| 29 | use MPI_HCL.MPI_RMA.all; |
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| 30 | -- Uncomment the following library declaration if using |
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| 31 | -- arithmetic functions with Signed or Unsigned values |
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| 32 | --use IEEE.NUMERIC_STD.ALL; |
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| 33 | |
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| 34 | -- Uncomment the following library declaration if instantiating |
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| 35 | -- any Xilinx primitives in this code. |
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| 36 | --library UNISIM; |
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| 37 | --use UNISIM.VComponents.all; |
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| 38 | |
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| 39 | entity HT_dyn is |
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| 40 | generic (Task_id : natural:=0); |
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| 41 | Port ( clk : in STD_LOGIC; |
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| 42 | reset : in STD_LOGIC; |
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| 43 | en : in std_logic; -- active la tâche |
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| 44 | Interf_i : in core_i; --signaux pour l'interface IO |
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| 45 | Interf_o : out core_o; --signaux pour l'interface IO |
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| 46 | mem_o : out typ_dpram_o; -- signaux pour l'accès à la mémoire |
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| 47 | mem_i : in typ_dpram_i; -- signaux pour l'accès à la mémoire |
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| 48 | ct_out : out unsigned(7 downto 0); |
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| 49 | ht_state : out typ_mae; |
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| 50 | PE_in : in STD_LOGIC_VECTOR (Word-1 downto 0); --port GPIO pour le PE |
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| 51 | PE_out : out STD_LOGIC_VECTOR (Word-1 downto 0) --port GPIO pour le PE |
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| 52 | ); |
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| 53 | end HT_dyn; |
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| 54 | |
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| 55 | architecture Behavioral of HT_dyn is |
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| 56 | constant simres : time :=1 ps; --simulation resolution |
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| 57 | constant realres : real :=1.0e-3; --ramener le temps en ns |
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| 58 | |
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| 59 | --type typ_mae is (start,Fillmem,NextFill,InitApp,GetRank,WInCreate,WinPost,WinStart, |
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| 60 | --putdata,getdata,getcmd,WinWait,WinCompleted,MpiSpawn,finalize,st_timeout); |
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| 61 | signal sram : typ_dpram; |
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| 62 | signal MyGroup:mpi_group; |
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| 63 | signal MyWin : mpi_win; |
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| 64 | signal MyRank :std_logic_vector(3 downto 0); |
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| 65 | signal intercomm,array_of_errcodes : natural; |
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| 66 | signal ct_state:natural:=0; |
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| 67 | signal compteur:natural:=4321; |
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| 68 | signal Libr : Core_io; --regroupe tous les signaux IO de la bibliothèque |
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| 69 | signal RunState : typ_mae; |
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| 70 | signal load : std_logic; |
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| 71 | signal start1 : std_logic; |
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| 72 | signal loadval : std_logic_vector(31 downto 0); |
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| 73 | signal outval : std_logic_vector(31 downto 0); |
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| 74 | signal zero : std_logic; |
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| 75 | COMPONENT IP_Timer |
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| 76 | PORT( |
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| 77 | clk : IN std_logic; |
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| 78 | reset : IN std_logic; |
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| 79 | upDn : IN std_logic; |
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| 80 | load : IN std_logic; |
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| 81 | start : IN std_logic; |
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| 82 | loadval : IN std_logic_vector(31 downto 0); |
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| 83 | outval : OUT std_logic_vector(31 downto 0); |
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| 84 | zero : OUT std_logic |
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| 85 | ); |
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| 86 | END COMPONENT; |
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| 87 | begin |
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| 88 | Inst_IP_Timer: IP_Timer PORT MAP( |
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| 89 | clk =>clk , |
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| 90 | reset => reset, |
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| 91 | upDn => '0', |
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| 92 | load => load, |
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| 93 | start => start1, |
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| 94 | loadval => loadval, |
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| 95 | outval => outval, |
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| 96 | zero => zero |
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| 97 | ); |
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| 98 | |
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| 99 | --MAE du PE |
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| 100 | --======================================================================= |
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| 101 | -- Interf<=Libr; |
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| 102 | |
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| 103 | |
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| 104 | pPutGet:process(clk,reset,en) |
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| 105 | |
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| 106 | constant DATAPTR : natural :=256; |
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| 107 | variable nb_rma:natural range 0 to 15:=0; |
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| 108 | variable bfill,destrank,pid,mport : natural range 0 to 15; |
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| 109 | variable fsrc,ret : natural range 0 to 15:=0; |
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| 110 | variable timeout,ct,dlen,dcount : natural range 0 to 511; |
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| 111 | variable adrToset,SrcAdr,DestAdr : std_logic_vector(ADRLEN-1 downto 0); |
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| 112 | variable mywin : Mpi_win; |
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| 113 | variable command , argv , maxprocs , info , root : natural:=0; --variable pour le spawn |
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| 114 | variable comm : natural :=0; |
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| 115 | variable iack,spawn : std_logic:='0'; |
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| 116 | variable adresse,adresse_rd :natural range 0 to 65536; |
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| 117 | variable status_reg,config_reg,param :std_logic_vector(Word-1 downto 0):=(others=>'0'); |
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| 118 | |
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| 119 | --======================================================= |
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| 120 | --variables pour la création du fichier de résultats |
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| 121 | -- synthesis translate_off |
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| 122 | type char_file is file of character; |
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| 123 | file f: text; |
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| 124 | variable status :file_open_status ; |
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| 125 | variable char_count: integer range 0 to 65536 := 0; |
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| 126 | variable str: string (1 to 79) ; |
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| 127 | variable L: line; |
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| 128 | variable fopened: std_logic:='0'; |
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| 129 | |
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| 130 | -- constant simres : time :=1 ps; --simulation resolution |
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| 131 | -- constant realres : real :=1.0e-3; --ramener le temps en ns |
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| 132 | -- returns real value of time parameter using pure VHDL |
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| 133 | function rt(t : time) return real is |
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| 134 | begin |
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| 135 | --if (simres=0) then |
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| 136 | return real(t/1 ns) * realres; |
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| 137 | -- else |
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| 138 | -- return 0.0; |
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| 139 | -- end if; |
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| 140 | end; |
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| 141 | -- synthesis translate_on |
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| 142 | --====================================================== |
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| 143 | begin |
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| 144 | --=== Partie combinatoire du process =================================== |
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| 145 | |
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| 146 | --=== Fin de la partie combinatoire du process ========================== |
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| 147 | |
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| 148 | |
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| 149 | |
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| 150 | --end loop; |
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| 151 | |
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| 152 | if (clk'event and clk='1') and en='1' then |
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| 153 | |
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| 154 | |
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| 155 | if reset='1' then |
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| 156 | RunState<=start; |
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| 157 | bfill:=0; |
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| 158 | ct:=0; |
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| 159 | ct_state<=0; |
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| 160 | dcount:=0; |
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| 161 | sram<=init_dpram; |
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| 162 | Libr<=init_Core_io; |
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| 163 | spawn:='0';nb_rma:=0; |
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| 164 | else |
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| 165 | --========================================================== |
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| 166 | --affectation des entrées sorties mémoires |
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| 167 | sram.i.data_out<=mem_I.data_out; |
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| 168 | mem_o.addr_wr<=sram.O.addr_wr; |
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| 169 | mem_o.addr_rd<=sram.O.addr_rd ; |
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| 170 | mem_o.we<=sram.O.we; |
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| 171 | mem_o.ena<=sram.O.ena; |
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| 172 | mem_o.enb<=sram.O.enb; |
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| 173 | mem_o.data_in<=sram.O.data_in; |
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| 174 | --affectation des entrées sorties MPI_HCL |
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| 175 | Interf_o.Instr_EN<=Libr.O.instr_en; |
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| 176 | Interf_o.Membusy<=Libr.O.MemBusy; |
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| 177 | Interf_o.Instruction<=Libr.O.Instruction; |
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| 178 | Libr.i.Instr_ack<=Interf_i.Instr_ack; |
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| 179 | Libr.i.InitOk<=Interf_i.InitOk; |
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| 180 | Libr.i.Hold_Req<=Interf_i.Hold_req; |
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| 181 | Libr.I.Spawned<=Interf_i.Spawned; |
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| 182 | --Libr.i.Hold_Ack<=Interf_i.Hold_Ack; |
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| 183 | Libr.i.RamSel<=Interf_i.RamSel; |
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| 184 | --ct_state<=ct; --pour débogage |
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| 185 | --============================================================ |
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| 186 | |
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| 187 | case RunState is |
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| 188 | when start => |
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| 189 | --Dcount<=0; |
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| 190 | if bfill=0 then -- si le nombre de bloc de mémoire remplis est vide |
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| 191 | --RunState<=InitApp; |
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| 192 | runstate<=fillmem; |
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| 193 | end if; |
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| 194 | --Ram_busy<='0'; |
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| 195 | Libr.O.MemBusy<='0'; |
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| 196 | Libr.O.Instr_En<='0'; |
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| 197 | iack:='0'; |
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| 198 | adresse:=10;--DATAPTR; |
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| 199 | |
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| 200 | adresse_rd:=0; |
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| 201 | timeout:=0; |
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| 202 | --dcount<=0; |
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| 203 | sram.O.we<='0'; |
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| 204 | sram.O.ena<='0'; |
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| 205 | sram.O.enb<='0'; |
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| 206 | -- synthesis translate_off |
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| 207 | if fopened='0' then |
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| 208 | file_open(status,f, integer'image(Task_Id) & "test_file0.txt", APPEND_MODE); |
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| 209 | --while not endfile(c_file_handle) loop |
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| 210 | --end if; |
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| 211 | |
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| 212 | --write (l,string'("Ce fichier contient des resultats de la simulation ; ;" & " started at time ; " & time'image(now))); |
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| 213 | --report l.all; |
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| 214 | -- writeline (f, l) ; |
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| 215 | fopened:='1'; |
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| 216 | end if; |
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| 217 | -- synthesis translate_on |
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| 218 | when Fillmem => |
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| 219 | -- sram.O.we<='1'; |
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| 220 | -- sram.O.ena<='1'; |
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| 221 | -- sram.O.enb<='1'; |
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| 222 | -- if Libr.I.Ramsel='0' then |
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| 223 | -- sram.O.addr_rd<=std_logic_vector(to_unsigned(adresse,ADRLEN)); |
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| 224 | -- sram.O.addr_wr<=std_logic_vector(to_unsigned(adresse,ADRLEN)); |
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| 225 | -- sram.O.data_in<=std_logic_vector(to_unsigned(dcount,8)); -- x"0f"; |
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| 226 | Libr.O.Instr_En<='0'; |
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| 227 | Writemem(ct,Libr,SRam,std_logic_vector(to_unsigned(adresse,ADRLEN)),std_logic_vector(to_unsigned(Task_id+1,8))); |
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| 228 | if ct=0 then |
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| 229 | dcount:=dcount+1; |
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| 230 | timeout:=0; |
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| 231 | if dcount=250 then |
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| 232 | bfill:=bfill+1; |
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| 233 | |
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| 234 | if bfill=4 then |
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| 235 | --RunState<=WinCreate; |
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| 236 | Runstate<=InitApp; |
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| 237 | else |
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| 238 | RunState<=nextfill; |
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| 239 | end if; |
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| 240 | else |
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| 241 | adresse:=adresse+1; |
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| 242 | --sram.O.addr_wr<=std_logic_vector(to_unsigned(adresse,ADRLEN)); |
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| 243 | RunState<=Fillmem; |
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| 244 | end if; |
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| 245 | end if; |
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| 246 | --else -- attente de la libéraion de la mémoire |
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| 247 | -- timeout:=timeout+1; |
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| 248 | -- if timeout=500 then |
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| 249 | -- RunState<=st_timeout; |
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| 250 | -- end if; |
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| 251 | |
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| 252 | -- end if; |
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| 253 | when nextfill => --prépare le prochain bloc mémoire qui sera rempli |
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| 254 | adresse:=250*bfill+10; |
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| 255 | |
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| 256 | dcount:=0; |
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| 257 | ct:=0; |
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| 258 | RunState<=Fillmem; |
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| 259 | Libr.O.Instr_En<='0'; |
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| 260 | sram.O.we<='1'; |
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| 261 | sram.O.ena<='1'; |
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| 262 | sram.O.enb<='0'; |
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| 263 | when InitApp => |
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| 264 | --code pour Init |
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| 265 | dlen:=100; |
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| 266 | if ct=0 then |
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| 267 | -- synthesis translate_off |
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| 268 | write (l,string'("Dlen; ;INIT1 " & integer'image(Dlen)& "; " & image(MyRank) & "; started at ; " & real'image(rt(now)))); |
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| 269 | |
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| 270 | report l.all; |
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| 271 | writeline (f, l) ; |
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| 272 | -- synthesis translate_on |
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| 273 | end if; |
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| 274 | pMPI_Init(ct,Libr,Clk,SRam); |
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| 275 | |
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| 276 | adresse:=to_integer(unsigned(sram.O.addr_wr)); |
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| 277 | adresse_rd:=to_integer(unsigned(sram.O.addr_rd)); |
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| 278 | |
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| 279 | --if Libr.InitOk='1' then |
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| 280 | if ct=0 then |
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| 281 | RunState<=GetRank; |
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| 282 | -- synthesis translate_off |
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| 283 | write (l,string'("Dlen;" & integer'image(Dlen) & ";INIT2 " & integer'image(Dlen) & ";" & image(MyRank) & "; ended at ; " & real'image(rt(now)))); |
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| 284 | report l.all; |
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| 285 | writeline (f, l) ; |
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| 286 | -- synthesis translate_on |
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| 287 | end if; |
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| 288 | |
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| 289 | |
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| 290 | |
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| 291 | when GetRank => |
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| 292 | if ct=0 then |
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| 293 | -- synthesis translate_off |
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| 294 | write (l,string'("Dlen;" & integer'image(Dlen)& ";Rank1 " & integer'image(Dlen) & "; ; started ; " & real'image(rt(now)))); |
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| 295 | report l.all; |
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| 296 | writeline (f, l) ; |
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| 297 | -- synthesis translate_on |
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| 298 | end if; |
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| 299 | pMPI_Comm_rank(ct,Libr,sram,MPI_COMM_WORLD,MyRank); |
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| 300 | adresse_rd:=to_integer(unsigned(sram.O.addr_rd)); |
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| 301 | |
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| 302 | |
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| 303 | if ct=0 then |
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| 304 | RunState<=Fillmem; |
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| 305 | RunState<=Wincreate; |
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| 306 | -- synthesis translate_off |
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| 307 | write (l,string'("Dlen;"& integer'image(dlen) & ";Rank2 " & integer'image(Dlen) & ";" & image(MyRank) & "; ended at ; " & real'image(rt(now)))); |
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| 308 | report l.all; |
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| 309 | writeline (f, l) ; |
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| 310 | -- synthesis translate_on |
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| 311 | end if; |
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| 312 | |
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| 313 | |
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| 314 | when Wincreate => --par défaut la fenêtre 0 est utilisée ! |
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| 315 | case MyRank is |
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| 316 | when x"0"=> |
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| 317 | Mygroup.grp<=x"0002";-- rank 1 |
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| 318 | MyGroup.nb<=2; |
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| 319 | destRank:=1; |
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| 320 | DestAdr:=X"043F"; |
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| 321 | nb_rma:=1; |
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| 322 | when x"1" => |
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| 323 | Mygroup.grp<=x"0001";-- rank 0 |
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| 324 | destRank:=0; |
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| 325 | DestAdr:=X"0440"; |
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| 326 | when x"2" => |
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| 327 | Mygroup.grp<=x"0000";-- aucun rank |
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| 328 | destRank:=0; |
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| 329 | DestAdr:=X"0473"; |
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| 330 | when x"3" => |
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| 331 | Mygroup.grp<=x"0000";-- aucun rank |
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| 332 | destRank:=0; |
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| 333 | DestAdr:=X"04A5"; |
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| 334 | when others => --cas des processus spawn |
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| 335 | Mygroup.grp<=x"0000";-- rank 0 |
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| 336 | DestAdr:=X"022F"; |
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| 337 | destRank:=0; |
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| 338 | end case; |
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| 339 | RunState<=WinPost; |
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| 340 | when WinPost => |
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| 341 | if ct=0 then |
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| 342 | -- synthesis translate_off |
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| 343 | write (l,string'("Dlen;"& integer'image(dlen) & ";WPost1 " & integer'image(Dlen) & "; ; started ; " & real'image(rt(now)))); |
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| 344 | report l.all; |
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| 345 | writeline (f, l) ; |
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| 346 | -- synthesis translate_on |
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| 347 | end if; |
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| 348 | |
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| 349 | pMPI_Win_Post(ct,Libr,sram,MyGroup,0,MyWin); |
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| 350 | |
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| 351 | if ct=0 then |
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| 352 | RunState<=WinStart; |
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| 353 | -- synthesis translate_off |
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| 354 | write (l,string'("Dlen;"& integer'image(dlen) & ";WPost2 " & integer'image(Dlen) & ";" & image(MyRank) & "; ended at ; " & real'image(rt(now)))); |
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| 355 | report l.all; |
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| 356 | writeline (f, l) ; |
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| 357 | -- synthesis translate_on |
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| 358 | end if; |
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| 359 | |
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| 360 | when WinStart => |
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| 361 | if ct=0 then |
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| 362 | -- synthesis translate_off |
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| 363 | write (l,string'("Dlen;" & integer'image(dlen) & ";WStart1 " & integer'image(Dlen) & "; ; started ; " & real'image(rt(now)))); |
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| 364 | report l.all; |
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| 365 | writeline (f, l) ; |
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| 366 | -- synthesis translate_on |
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| 367 | end if; |
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| 368 | pMPI_Win_start(ct,Libr,sram,MyGroup,0,MyWin); |
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| 369 | adresse:=to_integer(unsigned(sram.O.addr_wr)); |
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| 370 | adresse_rd:=to_integer(unsigned(sram.O.addr_rd)); |
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| 371 | |
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| 372 | dcount:=ct; |
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| 373 | |
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| 374 | if ct=0 then |
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| 375 | if spawn='0' then |
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| 376 | RunState<=PutData; |
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| 377 | else |
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| 378 | RunState<=WinCompleted; |
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| 379 | end if; |
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| 380 | -- synthesis translate_off |
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| 381 | write (l,string'("Dlen;" & integer'image(dlen) & ";WStart2 " & integer'image(Dlen) & ";" & image(MyRank) & "; ended at ; " & real'image(rt(now)))); |
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| 382 | report l.all; |
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| 383 | writeline (f, l) ; |
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| 384 | -- synthesis translate_on |
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| 385 | end if; |
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| 386 | |
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| 387 | |
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| 388 | when putdata => --construire le packet pour le Put |
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| 389 | |
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| 390 | --dlen:=251; --- |
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| 391 | if ct=0 then |
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| 392 | -- synthesis translate_off |
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| 393 | write (l,string'("Dlen;" & integer'image(dlen) & ";PUT1 " & integer'image(dlen) & ";" & image(MyRank) & "; started at ; " & real'image(rt(now)))); |
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| 394 | report l.all; |
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| 395 | writeline (f, l) ; |
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| 396 | -- synthesis translate_on |
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| 397 | end if; |
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| 398 | |
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| 399 | SrcAdr:=X"0105";--std_logic_vector(to_unsigned(DATAPTR,ADRLEN)); |
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| 400 | --DestAdr:=X"033F"; |
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| 401 | pMPI_put(ct,Libr,Clk,Sram,SrcAdr,Dlen,MPI_int,destrank,DestAdr,Dlen,Mpi_int,Default_win); |
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| 402 | |
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| 403 | adresse:=to_integer(unsigned(sram.O.addr_wr)); |
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| 404 | adresse_rd:=to_integer(unsigned(sram.O.addr_rd)); |
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| 405 | |
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| 406 | dcount:=ct; |
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| 407 | |
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| 408 | if ct=0 then |
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| 409 | RunState<=GetData; |
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| 410 | -- synthesis translate_off |
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| 411 | report "Put of Process n°; " & image(MyRank) & "; ended at ; " & real'image(rt(now)); |
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| 412 | write (l,string'("Dlen;" & integer'image(dlen) & ";PUT2 " & integer'image(dlen) & ";" & image(MyRank) & "; ended at time ; " & real'image(rt(now)))); |
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| 413 | report l.all; |
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| 414 | writeline (f, l) ; |
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| 415 | -- synthesis translate_on |
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| 416 | end if; |
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| 417 | |
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| 418 | |
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| 419 | when getdata => --positionnement du mot de longueur des données |
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| 420 | --dlen:=251; --- |
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| 421 | if ct=0 then |
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| 422 | -- synthesis translate_off |
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| 423 | write (l,string'("Dlen;" & integer'image(dlen) & ";GET1; " & image(MyRank) & "; started at ; " & real'image(rt(now)))); |
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| 424 | report l.all; |
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| 425 | writeline (f, l) ; |
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| 426 | -- synthesis translate_on |
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| 427 | end if; |
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| 428 | |
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| 429 | SrcAdr:=X"0104"; |
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| 430 | DestAdr:=X"1400"; |
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| 431 | if unsigned(MyRank) = 0 then |
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| 432 | --pMPI_GET(ct,Libr,Clk,Sram,SrcAdr,Dlen,MPI_int,destrank,DestAdr,Dlen,Mpi_int,Default_win); |
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| 433 | else |
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| 434 | |
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| 435 | --pMPI_GET(ct,Libr,Clk,Sram,SrcAdr,Dlen,MPI_int,destrank,DestAdr,Dlen,Mpi_int,Default_win); |
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| 436 | end if; |
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| 437 | adresse:=to_integer(unsigned(sram.O.addr_wr)); |
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| 438 | adresse_rd:=to_integer(unsigned(sram.O.addr_rd)); |
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| 439 | |
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| 440 | dcount:=ct; |
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| 441 | |
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| 442 | if ct=0 then |
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| 443 | if unsigned(MyRank)/=0 then |
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| 444 | RunState<=wincompleted; |
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| 445 | else |
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| 446 | nb_rma:=nb_rma+1; |
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| 447 | if nb_rma=2 then |
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| 448 | RunState<=wincompleted; |
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| 449 | nb_rma:=0; |
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| 450 | end if; |
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| 451 | end if; |
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| 452 | -- synthesis translate_off |
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| 453 | assert ct/=0 report "GET_END " & integer'image(destrank) |
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| 454 | severity Warning ; |
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| 455 | write (l,string'("Dlen ;" & integer'image(dlen) & ";GET2 " & integer'image(dlen) & ";" & image(MyRank) & "; ended at ; " & real'image(rt(now)))); |
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| 456 | report l.all; |
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| 457 | |
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| 458 | writeline (f, l) ; |
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| 459 | -- synthesis translate_on |
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| 460 | end if; |
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| 461 | |
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| 462 | when WinCompleted => |
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| 463 | if ct=0 then |
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| 464 | -- synthesis translate_off |
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| 465 | write (l,string'("Dlen ;" & integer'image(dlen) & ";Compl1 " & integer'image(dlen) & ";" & image(MyRank) & "; started at ; " & real'image(rt(now)))); |
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| 466 | report l.all; |
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| 467 | writeline (f, l) ; |
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| 468 | -- synthesis translate_on |
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| 469 | end if; |
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| 470 | pMPI_Win_Complete(ct,Libr,sram,MyWin ); |
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| 471 | adresse:=to_integer(unsigned(sram.O.addr_wr)); |
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| 472 | adresse_rd:=to_integer(unsigned(sram.O.addr_rd)); |
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| 473 | |
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| 474 | if ct=0 then |
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| 475 | RunState<=WinWait; |
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| 476 | -- synthesis translate_off |
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| 477 | write (l,string'("Dlen ;" & integer'image(dlen) & ";Compl2 " & integer'image(dlen) & ";" & image(MyRank) & "; ended at ; " & real'image(rt(now)))); |
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| 478 | report l.all; |
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| 479 | writeline (f, l) ; |
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| 480 | -- synthesis translate_on |
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| 481 | |
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| 482 | end if; |
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| 483 | when WinWait => |
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| 484 | if ct=0 then |
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| 485 | -- synthesis translate_off |
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| 486 | write (l,string'("Dlen ;" & integer'image(dlen) & ";WAIT1 " & integer'image(dlen) & ";" & image(MyRank) & "; started at ; " & real'image(rt(now)))); |
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| 487 | report l.all; |
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| 488 | writeline (f, l) ; |
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| 489 | -- synthesis translate_on |
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| 490 | end if; |
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| 491 | pMPI_Win_wait(ct,Libr,sram,MyWin ); |
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| 492 | adresse:=to_integer(unsigned(sram.O.addr_wr)); |
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| 493 | adresse_rd:=to_integer(unsigned(sram.O.addr_rd)); |
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| 494 | |
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| 495 | if ct=0 then |
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| 496 | if unsigned(Myrank)>1 or spawn='1' then |
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| 497 | RunState<=Finalize; |
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| 498 | else |
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| 499 | RunState<=MpiSpawn; |
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| 500 | end if; |
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| 501 | -- synthesis translate_off |
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| 502 | write (l,string'("Dlen ;" & integer'image(dlen) & ";WAIT2 " & integer'image(dlen) & ";" & image(MyRank) & "; ended at ; " & real'image(rt(now)))); |
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| 503 | report l.all; |
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| 504 | writeline (f, l) ; |
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| 505 | -- synthesis translate_on |
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| 506 | |
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| 507 | end if; |
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| 508 | when GetCmd=> |
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| 509 | adresse:=4; --adresse des paramètres |
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| 510 | readmem(ct,Libr,SRam,std_logic_vector(to_unsigned(adresse,ADRLEN)),param); |
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| 511 | if ct=0 then |
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| 512 | if unsigned(MyRank)=0 then |
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| 513 | if unsigned(param)=5 then |
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| 514 | Runstate<=MPISpawn; |
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| 515 | end if; |
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| 516 | else |
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| 517 | Runstate<=MPISpawn; |
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| 518 | end if; |
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| 519 | |
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| 520 | end if; |
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| 521 | when MpiSpawn => |
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| 522 | if ct=0 then |
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| 523 | -- synthesis translate_off |
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| 524 | write (l,string'("Dlen ;" & integer'image(dlen) & ";Spawn1 " & integer'image(dlen) & ";" & image(MyRank) & "; started at ; " & real'image(rt(now)))); |
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| 525 | report l.all; |
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| 526 | writeline (f, l) ; |
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| 527 | -- synthesis translate_on |
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| 528 | end if; |
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| 529 | --(NextCtx : inout natural;signal Interf:inout Core_io;signal SysRam :inout typ_dpram; |
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| 530 | |
---|
| 531 | maxprocs:=2; |
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| 532 | pMPI_Comm_Spawn(ct,Libr,sram,command,argv,maxprocs,info,root,comm,intercomm,array_of_errcodes); |
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| 533 | adresse:=to_integer(unsigned(sram.O.addr_wr)); |
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| 534 | adresse_rd:=to_integer(unsigned(sram.O.addr_rd)); |
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| 535 | |
---|
| 536 | if ct=0 then |
---|
| 537 | if unsigned(Myrank)=0 and spawn='0' then |
---|
| 538 | MyGroup.Grp<=x"000C"; |
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| 539 | spawn:='1'; |
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| 540 | Runstate<=WinPost; |
---|
| 541 | else |
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| 542 | RunState<=Finalize; |
---|
| 543 | end if; |
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| 544 | -- synthesis translate_off |
---|
| 545 | write (l,string'("Dlen ;" & integer'image(dlen) & ";Spawn2 " & integer'image(dlen) & ";" & image(MyRank) & "; ended at ; " & real'image(rt(now)))); |
---|
| 546 | report l.all; |
---|
| 547 | writeline (f, l) ; |
---|
| 548 | -- synthesis translate_on |
---|
| 549 | |
---|
| 550 | end if; |
---|
| 551 | when finalize => |
---|
| 552 | if ct=0 then |
---|
| 553 | -- synthesis translate_off |
---|
| 554 | write (l,string'("Dlen ;" & integer'image(dlen) & ";FINALIZE1 " & integer'image(dlen) & ";" & image(MyRank) & "; started at ; " & real'image(rt(now)))); |
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| 555 | report l.all; |
---|
| 556 | writeline (f, l) ; |
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| 557 | -- synthesis translate_on |
---|
| 558 | end if; |
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| 559 | sram.O.we<='0'; |
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| 560 | sram.O.ena<='0'; |
---|
| 561 | sram.O.enb<='0'; |
---|
| 562 | if ct=0 then |
---|
| 563 | RunState<=start; |
---|
| 564 | -- synthesis translate_off |
---|
| 565 | write (l,string'("Dlen ;" & integer'image(dlen) & ";FINALIZE2 " & integer'image(dlen) & ";" & image(MyRank) & "; ended at ; " & real'image(rt(now)))); |
---|
| 566 | report l.all; |
---|
| 567 | writeline (f, l) ; |
---|
| 568 | file_close(f); |
---|
| 569 | fopened:='0'; |
---|
| 570 | -- synthesis translate_on |
---|
| 571 | end if; |
---|
| 572 | |
---|
| 573 | when st_timeout => |
---|
| 574 | |
---|
| 575 | sram.O.we<='0'; |
---|
| 576 | sram.O.ena<='0'; |
---|
| 577 | sram.O.enb<='0'; |
---|
| 578 | |
---|
| 579 | RunState<=start; |
---|
| 580 | end case; |
---|
| 581 | ct_state<=ct; --pour débogage |
---|
| 582 | --ct_out<=ct; |
---|
| 583 | end if; |
---|
| 584 | end if; |
---|
| 585 | --ct_out<=ct_state; |
---|
| 586 | ht_state<=runstate; |
---|
| 587 | end process pPutGet; |
---|
| 588 | out_proc:process(clk) |
---|
| 589 | |
---|
| 590 | begin |
---|
| 591 | |
---|
| 592 | if rising_edge(clk) then |
---|
| 593 | if Pe_in(0)='1' then |
---|
| 594 | ct_out<=x"00"; |
---|
| 595 | compteur<=0; |
---|
| 596 | elsif compteur>=5000000 then |
---|
| 597 | compteur<=0; |
---|
| 598 | ct_out<=to_unsigned(ct_state,8); |
---|
| 599 | elsif compteur<=2500000 then |
---|
| 600 | ct_out<=to_unsigned(ct_state+128,8); |
---|
| 601 | compteur<=compteur+1; |
---|
| 602 | else |
---|
| 603 | ct_out<=to_unsigned(ct_state,8); |
---|
| 604 | compteur<=0; |
---|
| 605 | end if; |
---|
| 606 | end if; |
---|
| 607 | end process; |
---|
| 608 | end Behavioral; |
---|
| 609 | |
---|