source: PROJECT_CORE_MPI/SWITCH_GEN/BRANCHES/v0.01/SWITCH_GEN.vhd @ 42

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1----------------------------------------------------------------------------------
2-- Company: ENSET 2011
3-- Engineer: GAMOM NGOUNOU
4--
5-- Create Date:    03:40:47 11/19/2011
6-- Design Name:
7-- Module Name:    SWITCH_GEN - Behavioral
8-- Project Name:
9-- Target Devices:
10-- Tool versions:
11-- Description:
12-- fichier principal du switch générique; en fonction du parametre generique le
13-- les directive de generation conditionnelle permettent de ne générer et synthétiser uniquement  la logique
14-- nécessaire à l'implémentation  du switch de la dimension voulue
15-- Dependencies:
16--
17-- Revision:
18-- Revision 0.01 - File Created
19-- Additional Comments:
20--
21----------------------------------------------------------------------------------
22library IEEE;
23use IEEE.STD_LOGIC_1164.ALL;
24use IEEE.STD_LOGIC_ARITH.ALL;
25use IEEE.STD_LOGIC_UNSIGNED.ALL;
26use work.Coretypes.all ;
27---- Uncomment the following library declaration if instantiating
28---- any Xilinx primitives in this code.
29--library UNISIM;
30--use UNISIM.VComponents.all;
31
32entity SWITCH_GEN is 
33 --type portio is array(positive range) of std_logic_vector (7 downto 0);   
34 generic(number_of_ports : positive := 4);
35     port(
36                -- ports d'entree
37           Port_in : in typ_portIO(1 to number_of_ports) ;
38--                        Port1_in : in  STD_LOGIC_VECTOR  (7 downto 0);
39--           Port2_in : in  STD_LOGIC_VECTOR  (7 downto 0);
40--           Port3_in : in  STD_LOGIC_VECTOR  (7 downto 0);
41--           Port4_in : in  STD_LOGIC_VECTOR  (7 downto 0);
42--                        Port5_in : in  STD_LOGIC_VECTOR  (7 downto 0);
43--           Port6_in : in  STD_LOGIC_VECTOR  (7 downto 0);
44--           Port7_in : in  STD_LOGIC_VECTOR  (7 downto 0);
45--           Port8_in : in  STD_LOGIC_VECTOR  (7 downto 0);
46--                        Port9_in : in  STD_LOGIC_VECTOR  (7 downto 0);
47--           Port10_in : in  STD_LOGIC_VECTOR (7 downto 0);
48--           Port11_in : in  STD_LOGIC_VECTOR (7 downto 0);
49--           Port12_in : in  STD_LOGIC_VECTOR (7 downto 0);
50--                        Port13_in : in  STD_LOGIC_VECTOR (7 downto 0);
51--           Port14_in : in  STD_LOGIC_VECTOR (7 downto 0);
52--           Port15_in : in  STD_LOGIC_VECTOR (7 downto 0);
53--           Port16_in : in  STD_LOGIC_VECTOR (7 downto 0);
54                         
55                          -- port de sortie
56                          Port_out : out  typ_portIO(1 to number_of_ports);
57--                        Port1_out : out  STD_LOGIC_VECTOR (7 downto 0);
58--           Port2_out : out  STD_LOGIC_VECTOR (7 downto 0);
59--           Port3_out : out  STD_LOGIC_VECTOR (7 downto 0);
60--           Port4_out : out  STD_LOGIC_VECTOR (7 downto 0);
61--                        Port5_out : out  STD_LOGIC_VECTOR (7 downto 0);
62--           Port6_out : out  STD_LOGIC_VECTOR (7 downto 0);
63--           Port7_out : out  STD_LOGIC_VECTOR (7 downto 0);
64--           Port8_out : out  STD_LOGIC_VECTOR (7 downto 0);
65--                        Port9_out : out  STD_LOGIC_VECTOR (7 downto 0);
66--           Port10_out : out  STD_LOGIC_VECTOR (7 downto 0);
67--           Port11_out : out  STD_LOGIC_VECTOR (7 downto 0);
68--           Port12_out : out  STD_LOGIC_VECTOR (7 downto 0);
69--                        Port13_out : out  STD_LOGIC_VECTOR (7 downto 0);
70--           Port14_out : out  STD_LOGIC_VECTOR (7 downto 0);
71--           Port15_out : out  STD_LOGIC_VECTOR (7 downto 0);
72--           Port16_out : out  STD_LOGIC_VECTOR (7 downto 0);
73                          -- signaux de controle
74                          data_in_en : in std_logic_vector(number_of_ports downto 1);
75                          cmd_in_en :  in std_logic_vector(number_of_ports downto 1);
76                          data_out_en : in std_logic_vector(number_of_ports downto 1);
77                          fifo_in_full : out std_logic_vector(number_of_ports downto 1);
78                          fifo_in_empty : out std_logic_vector(number_of_ports downto 1);
79                          data_available : out std_logic_vector(number_of_ports downto 1);
80                          clk       : in   STD_LOGIC;
81                          reset     : in   STD_LOGIC);
82end SWITCH_GEN;
83
84architecture Behavioral of SWITCH_GEN is
85-- declaration des modules du switch generique
86-- le module de gestion des ports d'entrée
87
88COMPONENT INPUT_PORT_MODULE
89  generic(number_of_ports : positive := 4;
90                        Port_num: natural);
91    Port ( data_in : in  STD_LOGIC_VECTOR (7 downto 0);
92           data_in_en : in  STD_LOGIC;
93                          cmd_in_en : in  STD_LOGIC;
94           reset : in  STD_LOGIC;
95                          clk   : in  STD_LOGIC;
96                          request : out  STD_LOGIC_VECTOR (number_of_ports downto 1);
97           grant : in  STD_LOGIC_VECTOR (number_of_ports  downto 1);                     
98           fifo_full : out  STD_LOGIC;
99                          fifo_empty : out  STD_LOGIC;
100                          priority_rotation : out std_logic;
101           data_out : out  STD_LOGIC_VECTOR (7 downto 0);
102                          data_out_pulse : out std_logic);
103END COMPONENT;
104
105-- le module des ports de sortie
106
107COMPONENT OUTPUT_PORT_MODULE
108        PORT(
109                data_in : IN std_logic_vector(7 downto 0);
110                reset : IN std_logic;
111                clk : IN std_logic;
112                wr_en : IN std_logic;
113                rd_out_en : IN std_logic;         
114                data_out : OUT std_logic_vector(7 downto 0);
115                fifo_full : OUT std_logic;
116                data_avalaible : OUT std_logic
117                );
118END COMPONENT;
119       
120-- le module du crossbar
121COMPONENT Crossbar
122 generic
123              (
124                          number_of_crossbar_ports: positive := 4
125                        );
126    Port ( 
127                --Port_in : in Typ_PortIO(1 to number_of_crossbar_ports);
128                          Port1_in : in  STD_LOGIC_VECTOR (7 downto 0);
129           Port2_in : in  STD_LOGIC_VECTOR (7 downto 0);
130           Port3_in : in  STD_LOGIC_VECTOR (7 downto 0);
131           Port4_in : in  STD_LOGIC_VECTOR (7 downto 0);
132                          Port5_in : in  STD_LOGIC_VECTOR (7 downto 0);
133           Port6_in : in  STD_LOGIC_VECTOR (7 downto 0);
134           Port7_in : in  STD_LOGIC_VECTOR (7 downto 0);
135           Port8_in : in  STD_LOGIC_VECTOR (7 downto 0);
136                          Port9_in : in  STD_LOGIC_VECTOR (7 downto 0);
137           Port10_in : in  STD_LOGIC_VECTOR (7 downto 0);
138           Port11_in : in  STD_LOGIC_VECTOR (7 downto 0);
139           Port12_in : in  STD_LOGIC_VECTOR (7 downto 0);
140                          Port13_in : in  STD_LOGIC_VECTOR (7 downto 0);
141           Port14_in : in  STD_LOGIC_VECTOR (7 downto 0);
142           Port15_in : in  STD_LOGIC_VECTOR (7 downto 0);
143           Port16_in : in  STD_LOGIC_VECTOR (7 downto 0);
144                         
145                          --Port_pulse_in : in std_logic_vector(1 to number_of_ports);
146                          Port1_pulse_in : in std_logic;
147                          Port2_pulse_in : in std_logic;
148                          Port3_pulse_in : in std_logic;
149                          Port4_pulse_in : in std_logic;
150                          Port5_pulse_in : in std_logic;
151                          Port6_pulse_in : in std_logic;
152                          Port7_pulse_in : in std_logic;
153                          Port8_pulse_in : in std_logic;
154                          Port9_pulse_in : in std_logic;
155                          Port10_pulse_in : in std_logic;
156                          Port11_pulse_in : in std_logic;
157                          Port12_pulse_in : in std_logic;
158                          Port13_pulse_in : in std_logic;
159                          Port14_pulse_in : in std_logic;
160                          Port15_pulse_in : in std_logic;
161                          Port16_pulse_in : in std_logic;
162                         
163                          --Port_pulse_out : in std_logic_vector(1 to number_of_ports);
164                          Port1_pulse_out : out std_logic;
165                          Port2_pulse_out : out std_logic;
166                          Port3_pulse_out : out std_logic;
167                          Port4_pulse_out : out std_logic;
168                          Port5_pulse_out : out std_logic;
169                          Port6_pulse_out : out std_logic;
170                          Port7_pulse_out : out std_logic;
171                          Port8_pulse_out : out std_logic;
172                          Port9_pulse_out : out std_logic;
173                          Port10_pulse_out : out std_logic;
174                          Port11_pulse_out : out std_logic;
175                          Port12_pulse_out : out std_logic;
176                          Port13_pulse_out : out std_logic;
177                          Port14_pulse_out : out std_logic;
178                          Port15_pulse_out : out std_logic;
179                          Port16_pulse_out : out std_logic;
180                         
181                          --Port_out : out Typ_PortIO(1 to number_of_crossbar_ports);
182                          Port1_out : out  STD_LOGIC_VECTOR (7 downto 0);
183           Port2_out : out  STD_LOGIC_VECTOR (7 downto 0);
184           Port3_out : out  STD_LOGIC_VECTOR (7 downto 0);
185           Port4_out : out  STD_LOGIC_VECTOR (7 downto 0); 
186                          Port5_out : out  STD_LOGIC_VECTOR (7 downto 0);
187           Port6_out : out  STD_LOGIC_VECTOR (7 downto 0);
188           Port7_out : out  STD_LOGIC_VECTOR (7 downto 0);
189           Port8_out : out  STD_LOGIC_VECTOR (7 downto 0); 
190                          Port9_out : out  STD_LOGIC_VECTOR (7 downto 0);
191           Port10_out : out  STD_LOGIC_VECTOR (7 downto 0);
192           Port11_out : out  STD_LOGIC_VECTOR (7 downto 0);
193           Port12_out : out  STD_LOGIC_VECTOR (7 downto 0); 
194                          Port13_out : out  STD_LOGIC_VECTOR (7 downto 0);
195           Port14_out : out  STD_LOGIC_VECTOR (7 downto 0);
196           Port15_out : out  STD_LOGIC_VECTOR (7 downto 0);
197           Port16_out : out  STD_LOGIC_VECTOR (7 downto 0); 
198                         
199           Ctrl : in  STD_LOGIC_VECTOR (number_of_crossbar_ports*number_of_crossbar_ports downto 1)
200       ); 
201 END COMPONENT;
202
203-- déclaration du  scheduler
204COMPONENT Scheduler
205        generic(number_of_ports : positive := 4);
206    Port ( Request : in  STD_LOGIC_VECTOR (number_of_ports*number_of_ports downto 1);
207                          Fifo_full : in STD_LOGIC_VECTOR (number_of_ports downto 1);
208           clk : in  STD_LOGIC;
209                reset : in  STD_LOGIC;
210                          priority_rotation : in  STD_LOGIC_VECTOR (number_of_ports downto 1);
211           port_grant : out  STD_LOGIC_VECTOR (number_of_ports*number_of_ports downto 1));
212END COMPONENT;
213
214--declaration des signaux de connection entre les modules du switch
215--type port_connection_type is array(16 downto 1) of std_logic_vector(7 downto 1);
216--signal crossbar_port_in_connetion : port_connection_type;
217--signal crossbar_port_out_connetion :port_connection_type;
218--signal request_connection : std_logic_vector(number_of_ports*number_of_ports downto 1);
219--signal grant_connection : std_logic_vector(number_of_ports*number_of_ports downto 1);
220--signal priority_rotation_connection : std_logic_vector(number_of_ports downto 1);
221--signal fifo_out_full_connection : std_logic_vector(1 to number_of_ports);
222--signal crossbar_in_pulse(_connection : std_logic_vector(number_of_ports downto 1);
223--signal crossbar_out_pulse_connection : std_logic_vector(number_of_ports downto 1);
224--variable i,j : integer;
225
226Signal Request_signal : STD_LOGIC_VECTOR(number_of_ports*number_of_ports downto 1);
227Signal grant_signal : STD_LOGIC_VECTOR(number_of_ports*number_of_ports downto 1);
228Signal priority_rotation_signal : STD_LOGIC_VECTOR(number_of_ports downto 1);
229signal fifo_out_full_signal : std_logic_vector(number_of_ports downto 1);
230
231signal crossbar_in_port :  Typ_PortIO(1 to number_of_ports);
232
233--signal crossbar_in_port1 : std_logic_vector(7 downto 0);
234--signal crossbar_in_port2 : std_logic_vector(7 downto 0);
235--signal crossbar_in_port3 : std_logic_vector(7 downto 0);
236--signal crossbar_in_port4 : std_logic_vector(7 downto 0);
237--signal crossbar_in_port5 : std_logic_vector(7 downto 0);
238--signal crossbar_in_port6 : std_logic_vector(7 downto 0);
239--signal crossbar_in_port7 : std_logic_vector(7 downto 0);
240--signal crossbar_in_port8 : std_logic_vector(7 downto 0);
241--signal crossbar_in_port9 : std_logic_vector(7 downto 0);
242--signal crossbar_in_port10 : std_logic_vector(7 downto 0);
243--signal crossbar_in_port11 : std_logic_vector(7 downto 0);
244--signal crossbar_in_port12 : std_logic_vector(7 downto 0);
245--signal crossbar_in_port13 : std_logic_vector(7 downto 0);
246--signal crossbar_in_port14 : std_logic_vector(7 downto 0);
247--signal crossbar_in_port15 : std_logic_vector(7 downto 0);
248--signal crossbar_in_port16 : std_logic_vector(7 downto 0);
249
250signal crossbar_out_port  :  Typ_PortIO(1 to number_of_ports);
251--signal crossbar_out_port1 : std_logic_vector(7 downto 0);
252--signal crossbar_out_port2 : std_logic_vector(7 downto 0);
253--signal crossbar_out_port3 : std_logic_vector(7 downto 0);
254--signal crossbar_out_port4 : std_logic_vector(7 downto 0);
255--signal crossbar_out_port5 : std_logic_vector(7 downto 0);
256--signal crossbar_out_port6 : std_logic_vector(7 downto 0);
257--signal crossbar_out_port7 : std_logic_vector(7 downto 0);
258--signal crossbar_out_port8 : std_logic_vector(7 downto 0);
259--signal crossbar_out_port9 : std_logic_vector(7 downto 0);
260--signal crossbar_out_port10 : std_logic_vector(7 downto 0);
261--signal crossbar_out_port11 : std_logic_vector(7 downto 0);
262--signal crossbar_out_port12 : std_logic_vector(7 downto 0);
263--signal crossbar_out_port13 : std_logic_vector(7 downto 0);
264--signal crossbar_out_port14 : std_logic_vector(7 downto 0);
265--signal crossbar_out_port15 : std_logic_vector(7 downto 0);
266--signal crossbar_out_port16 : std_logic_vector(7 downto 0);
267
268signal crossbar_in_pulse  : std_logic_vector(number_of_ports downto 1);
269--signal crossbar_in_pulse1 : std_logic;
270--signal crossbar_in_pulse2 : std_logic;
271--signal crossbar_in_pulse3 : std_logic;
272--signal crossbar_in_pulse4 : std_logic;
273--signal crossbar_in_pulse5 : std_logic;
274--signal crossbar_in_pulse6 : std_logic;
275--signal crossbar_in_pulse7 : std_logic;
276--signal crossbar_in_pulse8 : std_logic;
277--signal crossbar_in_pulse9 : std_logic;
278--signal crossbar_in_pulse10 : std_logic;
279--signal crossbar_in_pulse11 : std_logic;
280--signal crossbar_in_pulse12 : std_logic;
281--signal crossbar_in_pulse13 : std_logic;
282--signal crossbar_in_pulse14 : std_logic;
283--signal crossbar_in_pulse15 : std_logic;
284--signal crossbar_in_pulse16 : std_logic;
285
286signal crossbar_out_pulse  : std_logic_vector(number_of_ports downto 1);
287--signal crossbar_out_pulse1 : std_logic;
288--signal crossbar_out_pulse2 : std_logic;
289--signal crossbar_out_pulse3 : std_logic;
290--signal crossbar_out_pulse4 : std_logic;
291--signal crossbar_out_pulse5 : std_logic;
292--signal crossbar_out_pulse6 : std_logic;
293--signal crossbar_out_pulse7 : std_logic;
294--signal crossbar_out_pulse8 : std_logic;
295--signal crossbar_out_pulse9 : std_logic;
296--signal crossbar_out_pulse10 : std_logic;
297--signal crossbar_out_pulse11 : std_logic;
298--signal crossbar_out_pulse12 : std_logic;
299--signal crossbar_out_pulse13 : std_logic;
300--signal crossbar_out_pulse14 : std_logic;
301--signal crossbar_out_pulse15 : std_logic;
302--signal crossbar_out_pulse16 : std_logic;
303
304
305begin
306-- intstanciation et connexion des modules du switch en fonction du nombre de ports
307-- le circuit genere depend du parametre generique nombre de ports
308-- switch 2 ports
309switch2x2 : if number_of_ports = 2 generate
310
311PORT1_INPUT_PORT_MODULE: INPUT_PORT_MODULE
312GENERIC MAP(number_of_ports =>2,Port_num=>1)
313PORT MAP(
314   data_in => Port_in(1),
315   data_in_en => data_in_en(1),
316        cmd_in_en => cmd_in_en(1),
317   reset => reset,
318   clk =>clk,
319   grant(1) => grant_signal(1),
320   grant(2) => grant_signal(2),
321   fifo_full =>fifo_in_full(1),
322   priority_rotation =>  priority_rotation_signal(1),
323   fifo_empty => fifo_in_empty(1),
324   data_out =>crossbar_in_port(1),
325   data_out_pulse =>crossbar_in_pulse(1),
326   request(1) =>request_signal(1),
327   request(2) =>request_signal(2)
328);
329
330PORT2_INPUT_PORT_MODULE: INPUT_PORT_MODULE
331GENERIC MAP(number_of_ports =>2,Port_num=>2)
332PORT MAP(
333   data_in => Port_in(2),
334   data_in_en => data_in_en(2),
335        cmd_in_en => cmd_in_en(2),
336   reset => reset,
337   clk =>clk,
338   grant(1) => grant_signal(3),
339   grant(2) => grant_signal(4),
340   fifo_full =>fifo_in_full(2),
341   priority_rotation =>  priority_rotation_signal(2),
342   fifo_empty => fifo_in_empty(2),
343   data_out =>crossbar_in_port(2),
344   data_out_pulse =>crossbar_in_pulse(2),
345   request(1) =>request_signal(3),
346   request(2) =>request_signal(4)
347);
348
349end generate switch2x2;
350
351
352-- switch 3 ports
353switch3x3 : if number_of_ports = 3 generate
354
355PORT1_INPUT_PORT_MODULE: INPUT_PORT_MODULE
356GENERIC MAP(number_of_ports =>3,Port_num=>1)
357PORT MAP(
358   data_in => Port_in(1),
359   data_in_en => data_in_en(1),
360        cmd_in_en => cmd_in_en(1),
361   reset => reset,
362   clk =>clk,
363   grant(1) => grant_signal(1),
364   grant(2) => grant_signal(2),
365   grant(3) => grant_signal(3),
366   fifo_full =>fifo_in_full(1),
367   priority_rotation =>  priority_rotation_signal(1),
368   fifo_empty => fifo_in_empty(1),
369   data_out =>crossbar_in_port(1),
370   data_out_pulse =>crossbar_in_pulse(1),
371   request(1) =>request_signal(1),
372   request(2) =>request_signal(2),
373   request(3) =>request_signal(3)
374);
375
376PORT2_INPUT_PORT_MODULE: INPUT_PORT_MODULE
377GENERIC MAP(number_of_ports =>3,Port_num=>2)
378PORT MAP(
379   data_in => Port_in(2),
380   data_in_en => data_in_en(2),
381        cmd_in_en => cmd_in_en(2),
382   reset => reset,
383   clk =>clk,
384   grant(4) => grant_signal(4),
385   grant(5) => grant_signal(5),
386   grant(6) => grant_signal(6),
387   fifo_full =>fifo_in_full(2),
388   priority_rotation =>  priority_rotation_signal(2),
389   fifo_empty => fifo_in_empty(2),
390   data_out =>crossbar_in_port(2),
391   data_out_pulse =>crossbar_in_pulse(2),
392   request(4) =>request_signal(4),
393   request(5) =>request_signal(5),
394   request(6) =>request_signal(6)
395);
396
397PORT3_INPUT_PORT_MODULE: INPUT_PORT_MODULE
398GENERIC MAP(number_of_ports =>3,Port_num=>3)
399PORT MAP(
400   data_in => Port_in(3),
401   data_in_en => data_in_en(3),
402        cmd_in_en => cmd_in_en(3),
403   reset => reset,
404   clk =>clk,
405   grant(7) => grant_signal(7),
406   grant(8) => grant_signal(8),
407   grant(9) => grant_signal(9),
408   fifo_full =>fifo_in_full(3),
409   priority_rotation =>  priority_rotation_signal(3),
410   fifo_empty => fifo_in_empty(3),
411   data_out =>crossbar_in_port(3),
412   data_out_pulse =>crossbar_in_pulse(3),
413   request(7) =>request_signal(7),
414   request(8) =>request_signal(8),
415   request(9) =>request_signal(9)
416);
417
418end generate switch3x3;
419
420
421-- switch 4 à 7 ports
422switch4x4_7x7 : if number_of_ports >= 4 and number_of_ports <=7 generate
423
424switch_4x4_7x7:for i in 1 to number_of_ports generate
425
426constant j: natural:=number_of_ports*(i-1);
427begin
428--j=number_of_ports*(i-1);
429PORTx4_INPUT_PORT_MODULE: INPUT_PORT_MODULE
430GENERIC MAP(number_of_ports =>4,Port_num=>i)
431PORT MAP(
432   data_in => Port_in(i),
433   data_in_en => data_in_en(i),
434        cmd_in_en => cmd_in_en(i),
435   reset => reset,
436   clk =>clk,
437        grant =>grant_signal(j+NUMBER_OF_PORTS downto j+1),
438 
439   fifo_full =>fifo_in_full(i),
440   priority_rotation =>  priority_rotation_signal(i),
441   fifo_empty => fifo_in_empty(i),
442   data_out =>crossbar_in_port(i),
443   data_out_pulse =>crossbar_in_pulse(i),
444        request =>request_signal(j+NUMBER_OF_PORTS downto j+1)
445   
446);
447end generate switch_4x4_7x7;
448end generate switch4x4_7x7;
449
450
451---- switch 5 ports
452--switch5x5 : if number_of_ports = 5 generate
453--
454--PORT1_INPUT_PORT_MODULE: INPUT_PORT_MODULE
455--GENERIC MAP(number_of_ports =>5)
456--PORT MAP(
457--   data_in => Port_in(1),
458--   data_in_en => data_in_en(1),
459--   reset => reset,
460--   clk =>clk,
461--   grant(1) => grant_signal(1),
462--   grant(2) => grant_signal(2),
463--   grant(3) => grant_signal(3),
464--   grant(4) => grant_signal(4),
465--   grant(5) => grant_signal(5),
466--   fifo_full =>fifo_in_full(1),
467--   priority_rotation =>  priority_rotation_signal(1),
468--   fifo_empty => fifo_in_empty(1),
469--   data_out =>crossbar_in_port(1),
470--   data_out_pulse =>crossbar_in_pulse(1),
471--   request(1) =>request_signal(1),
472--   request(2) =>request_signal(2),
473--   request(3) =>request_signal(3),
474--   request(4) =>request_signal(4),
475--   request(5) =>request_signal(5)
476--);
477--
478--PORT2_INPUT_PORT_MODULE: INPUT_PORT_MODULE
479--GENERIC MAP(number_of_ports =>5)
480--PORT MAP(
481--   data_in => Port_in(2),
482--   data_in_en => data_in_en(2),
483--   reset => reset,
484--   clk =>clk,
485--   grant(1) => grant_signal(6),
486--   grant(2) => grant_signal(7),
487--   grant(3) => grant_signal(8),
488--   grant(4) => grant_signal(9),
489--   grant(5) => grant_signal(10),
490--   fifo_full =>fifo_in_full(2),
491--   priority_rotation =>  priority_rotation_signal(2),
492--   fifo_empty => fifo_in_empty(2),
493--   data_out =>crossbar_in_port(2),
494--   data_out_pulse =>crossbar_in_pulse(2),
495--   request(6) =>request_signal(6),
496--   request(7) =>request_signal(7),
497--   request(8) =>request_signal(8),
498--   request(9) =>request_signal(9),
499--   request(10) =>request_signal(10)
500--);
501--
502--PORT3_INPUT_PORT_MODULE: INPUT_PORT_MODULE
503--GENERIC MAP(number_of_ports =>5)
504--PORT MAP(
505--   data_in => Port_in(3),
506--   data_in_en => data_in_en(3),
507--   reset => reset,
508--   clk =>clk,
509--   grant(11) => grant_signal(11),
510--   grant(12) => grant_signal(12),
511--   grant(13) => grant_signal(13),
512--   grant(14) => grant_signal(14),
513--   grant(15) => grant_signal(15),
514--   fifo_full =>fifo_in_full(3),
515--   priority_rotation =>  priority_rotation_signal(3),
516--   fifo_empty => fifo_in_empty(3),
517--   data_out =>crossbar_in_port(3),
518--   data_out_pulse =>crossbar_in_pulse(3),
519--   request(11) =>request_signal(11),
520--   request(12) =>request_signal(12),
521--   request(13) =>request_signal(13),
522--   request(14) =>request_signal(14),
523--   request(15) =>request_signal(15)
524--);
525--
526--PORT4_INPUT_PORT_MODULE: INPUT_PORT_MODULE
527--GENERIC MAP(number_of_ports =>5)
528--PORT MAP(
529--   data_in => Port_in(4),
530--   data_in_en => data_in_en(4),
531--   reset => reset,
532--   clk =>clk,
533--   grant(16) => grant_signal(16),
534--   grant(17) => grant_signal(17),
535--   grant(18) => grant_signal(18),
536--   grant(19) => grant_signal(19),
537--   grant(20) => grant_signal(20),
538--   fifo_full =>fifo_in_full(4),
539--   priority_rotation =>  priority_rotation_signal(4),
540--   fifo_empty => fifo_in_empty(4),
541--   data_out =>crossbar_in_port(4),
542--   data_out_pulse =>crossbar_in_pulse(4),
543--   request(16) =>request_signal(16),
544--   request(17) =>request_signal(17),
545--   request(18) =>request_signal(18),
546--   request(19) =>request_signal(19),
547--   request(20) =>request_signal(20)
548--);
549--
550--PORT5_INPUT_PORT_MODULE: INPUT_PORT_MODULE
551--GENERIC MAP(number_of_ports =>5)
552--PORT MAP(
553--   data_in => Port_in(5),
554--   data_in_en => data_in_en(5),
555--   reset => reset,
556--   clk =>clk,
557--   grant(21) => grant_signal(21),
558--   grant(22) => grant_signal(22),
559--   grant(23) => grant_signal(23),
560--   grant(24) => grant_signal(24),
561--   grant(25) => grant_signal(25),
562--   fifo_full =>fifo_in_full(5),
563--   priority_rotation =>  priority_rotation_signal(5),
564--   fifo_empty => fifo_in_empty(5),
565--   data_out =>crossbar_in_port(5),
566--   data_out_pulse =>crossbar_in_pulse(5),
567--   request(21) =>request_signal(21),
568--   request(22) =>request_signal(22),
569--   request(23) =>request_signal(23),
570--   request(24) =>request_signal(24),
571--   request(25) =>request_signal(25)
572--);
573--
574--end generate switch5x5;
575--
576--
577---- switch 6 ports
578--switch6x6 : if number_of_ports = 6 generate
579--
580--PORT1_INPUT_PORT_MODULE: INPUT_PORT_MODULE
581--GENERIC MAP(number_of_ports =>6)
582--PORT MAP(
583--   data_in => Port_in(1),
584--   data_in_en => data_in_en(1),
585--      cmd_in_en => cmd_in_en(1),
586--   reset => reset,
587--   clk =>clk,
588--   grant(1) => grant_signal(1),
589--   grant(2) => grant_signal(2),
590--   grant(3) => grant_signal(3),
591--   grant(4) => grant_signal(4),
592--   grant(5) => grant_signal(5),
593--   grant(6) => grant_signal(6),
594--   fifo_full =>fifo_in_full(1),
595--   priority_rotation =>  priority_rotation_signal(1),
596--   fifo_empty => fifo_in_empty(1),
597--   data_out =>crossbar_in_port(1),
598--   data_out_pulse =>crossbar_in_pulse(1),
599--   request(1) =>request_signal(1),
600--   request(2) =>request_signal(2),
601--   request(3) =>request_signal(3),
602--   request(4) =>request_signal(4),
603--   request(5) =>request_signal(5),
604--   request(6) =>request_signal(6)
605--);
606--
607--PORT2_INPUT_PORT_MODULE: INPUT_PORT_MODULE
608--GENERIC MAP(number_of_ports =>6)
609--PORT MAP(
610--   data_in => Port_in(2),
611--   data_in_en => data_in_en(2),
612--   reset => reset,
613--   clk =>clk,
614--   grant(1) => grant_signal(7),
615--   grant(2) => grant_signal(8),
616--   grant(3) => grant_signal(9),
617--   grant(4) => grant_signal(10),
618--   grant(5) => grant_signal(11),
619--   grant(6) => grant_signal(12),
620--   fifo_full =>fifo_in_full(2),
621--   priority_rotation =>  priority_rotation_signal(2),
622--   fifo_empty => fifo_in_empty(2),
623--   data_out =>crossbar_in_port(2),
624--   data_out_pulse =>crossbar_in_pulse(2),
625--   request(1) =>request_signal(7),
626--   request(2) =>request_signal(8),
627--   request(3) =>request_signal(9),
628--   request(4) =>request_signal(10),
629--   request(5) =>request_signal(11),
630--   request(6) =>request_signal(12)
631--);
632--
633--PORT3_INPUT_PORT_MODULE: INPUT_PORT_MODULE
634--GENERIC MAP(number_of_ports =>6)
635--PORT MAP(
636--   data_in => Port_in(3),
637--   data_in_en => data_in_en(3),
638--   reset => reset,
639--   clk =>clk,
640--   grant(13) => grant_signal(13),
641--   grant(14) => grant_signal(14),
642--   grant(15) => grant_signal(15),
643--   grant(16) => grant_signal(16),
644--   grant(17) => grant_signal(17),
645--   grant(18) => grant_signal(18),
646--   fifo_full =>fifo_in_full(3),
647--   priority_rotation =>  priority_rotation_signal(3),
648--   fifo_empty => fifo_in_empty(3),
649--   data_out =>crossbar_in_port(3),
650--   data_out_pulse =>crossbar_in_pulse(3),
651--   request(13) =>request_signal(13),
652--   request(14) =>request_signal(14),
653--   request(15) =>request_signal(15),
654--   request(16) =>request_signal(16),
655--   request(17) =>request_signal(17),
656--   request(18) =>request_signal(18)
657--);
658--
659--PORT4_INPUT_PORT_MODULE: INPUT_PORT_MODULE
660--GENERIC MAP(number_of_ports =>6)
661--PORT MAP(
662--   data_in => Port_in(4),
663--   data_in_en => data_in_en(4),
664--      cmd_in_en => cmd_in_en(4),
665--   reset => reset,
666--   clk =>clk,
667--   grant(19) => grant_signal(19),
668--   grant(20) => grant_signal(20),
669--   grant(21) => grant_signal(21),
670--   grant(22) => grant_signal(22),
671--   grant(23) => grant_signal(23),
672--   grant(24) => grant_signal(24),
673--   fifo_full =>fifo_in_full(4),
674--   priority_rotation =>  priority_rotation_signal(4),
675--   fifo_empty => fifo_in_empty(4),
676--   data_out =>crossbar_in_port(4),
677--   data_out_pulse =>crossbar_in_pulse(4),
678--   request(19) =>request_signal(19),
679--   request(20) =>request_signal(20),
680--   request(21) =>request_signal(21),
681--   request(22) =>request_signal(22),
682--   request(23) =>request_signal(23),
683--   request(24) =>request_signal(24)
684--);
685--
686--PORT5_INPUT_PORT_MODULE: INPUT_PORT_MODULE
687--GENERIC MAP(number_of_ports =>6)
688--PORT MAP(
689--   data_in => Port_in(5),
690--   data_in_en => data_in_en(5),
691--      cmd_in_en => cmd_in_en(5),
692--   reset => reset,
693--   clk =>clk,
694--   grant(25) => grant_signal(25),
695--   grant(26) => grant_signal(26),
696--   grant(27) => grant_signal(27),
697--   grant(28) => grant_signal(28),
698--   grant(29) => grant_signal(29),
699--   grant(30) => grant_signal(30),
700--   fifo_full =>fifo_in_full(5),
701--   priority_rotation =>  priority_rotation_signal(5),
702--   fifo_empty => fifo_in_empty(5),
703--   data_out =>crossbar_in_port(5),
704--   data_out_pulse =>crossbar_in_pulse(5),
705--   request(25) =>request_signal(25),
706--   request(26) =>request_signal(26),
707--   request(27) =>request_signal(27),
708--   request(28) =>request_signal(28),
709--   request(29) =>request_signal(29),
710--   request(30) =>request_signal(30)
711--);
712--
713--PORT6_INPUT_PORT_MODULE: INPUT_PORT_MODULE
714--GENERIC MAP(number_of_ports =>6)
715--PORT MAP(
716--   data_in => Port_in(6),
717--   data_in_en => data_in_en(6),
718--   reset => reset,
719--   clk =>clk,
720--   grant(31) => grant_signal(31),
721--   grant(32) => grant_signal(32),
722--   grant(33) => grant_signal(33),
723--   grant(34) => grant_signal(34),
724--   grant(35) => grant_signal(35),
725--   grant(36) => grant_signal(36),
726--   fifo_full =>fifo_in_full(6),
727--   priority_rotation =>  priority_rotation_signal(6),
728--   fifo_empty => fifo_in_empty(6),
729--   data_out =>crossbar_in_port(6),
730--   data_out_pulse =>crossbar_in_pulse(6),
731--   request(31) =>request_signal(31),
732--   request(32) =>request_signal(32),
733--   request(33) =>request_signal(33),
734--   request(34) =>request_signal(34),
735--   request(35) =>request_signal(35),
736--   request(36) =>request_signal(36)
737--);
738--
739--end generate switch6x6;
740--
741--
742---- switch 7 ports
743--switch7x7 : if number_of_ports = 7 generate
744--
745--PORT1_INPUT_PORT_MODULE: INPUT_PORT_MODULE
746--GENERIC MAP(number_of_ports =>7)
747--PORT MAP(
748--   data_in => Port_in(1),
749--   data_in_en => data_in_en(1),
750--      cmd_in_en => cmd_in_en(1),
751--   reset => reset,
752--   clk =>clk,
753--   grant(1) => grant_signal(1),
754--   grant(2) => grant_signal(2),
755--   grant(3) => grant_signal(3),
756--   grant(4) => grant_signal(4),
757--   grant(5) => grant_signal(5),
758--   grant(6) => grant_signal(6),
759--   grant(7) => grant_signal(7),
760--   fifo_full =>fifo_in_full(1),
761--   priority_rotation =>  priority_rotation_signal(1),
762--   fifo_empty => fifo_in_empty(1),
763--   data_out =>crossbar_in_port(1),
764--   data_out_pulse =>crossbar_in_pulse(1),
765--   request(1) =>request_signal(1),
766--   request(2) =>request_signal(2),
767--   request(3) =>request_signal(3),
768--   request(4) =>request_signal(4),
769--   request(5) =>request_signal(5),
770--   request(6) =>request_signal(6),
771--   request(7) =>request_signal(7)
772--);
773--
774--PORT2_INPUT_PORT_MODULE: INPUT_PORT_MODULE
775--GENERIC MAP(number_of_ports =>7)
776--PORT MAP(
777--   data_in => Port_in(2),
778--   data_in_en => data_in_en(2),
779--   reset => reset,
780--   clk =>clk,
781--   grant(1) => grant_signal(8),
782--   grant(2) => grant_signal(9),
783--   grant(3) => grant_signal(10),
784--   grant(4) => grant_signal(11),
785--   grant(5) => grant_signal(12),
786--   grant(6) => grant_signal(13),
787--   grant(7) => grant_signal(14),
788--   fifo_full =>fifo_in_full(2),
789--   priority_rotation =>  priority_rotation_signal(2),
790--   fifo_empty => fifo_in_empty(2),
791--   data_out =>crossbar_in_port(2),
792--   data_out_pulse =>crossbar_in_pulse(2),
793--   request(8) =>request_signal(8),
794--   request(9) =>request_signal(9),
795--   request(10) =>request_signal(10),
796--   request(11) =>request_signal(11),
797--   request(12) =>request_signal(12),
798--   request(13) =>request_signal(13),
799--   request(14) =>request_signal(14)
800--);
801--
802--PORT3_INPUT_PORT_MODULE: INPUT_PORT_MODULE
803--GENERIC MAP(number_of_ports =>7)
804--PORT MAP(
805--   data_in => Port_in(3),
806--   data_in_en => data_in_en(3),
807--   reset => reset,
808--   clk =>clk,
809--   grant(15) => grant_signal(15),
810--   grant(16) => grant_signal(16),
811--   grant(17) => grant_signal(17),
812--   grant(18) => grant_signal(18),
813--   grant(19) => grant_signal(19),
814--   grant(20) => grant_signal(20),
815--   grant(21) => grant_signal(21),
816--   fifo_full =>fifo_in_full(3),
817--   priority_rotation =>  priority_rotation_signal(3),
818--   fifo_empty => fifo_in_empty(3),
819--   data_out =>crossbar_in_port(3),
820--   data_out_pulse =>crossbar_in_pulse(3),
821--   request(15) =>request_signal(15),
822--   request(16) =>request_signal(16),
823--   request(17) =>request_signal(17),
824--   request(18) =>request_signal(18),
825--   request(19) =>request_signal(19),
826--   request(20) =>request_signal(20),
827--   request(21) =>request_signal(21)
828--);
829--
830--PORT4_INPUT_PORT_MODULE: INPUT_PORT_MODULE
831--GENERIC MAP(number_of_ports =>7)
832--PORT MAP(
833--   data_in => Port_in(4),
834--   data_in_en => data_in_en(4),
835--   reset => reset,
836--   clk =>clk,
837--   grant(22) => grant_signal(22),
838--   grant(23) => grant_signal(23),
839--   grant(24) => grant_signal(24),
840--   grant(25) => grant_signal(25),
841--   grant(26) => grant_signal(26),
842--   grant(27) => grant_signal(27),
843--   grant(28) => grant_signal(28),
844--   fifo_full =>fifo_in_full(4),
845--   priority_rotation =>  priority_rotation_signal(4),
846--   fifo_empty => fifo_in_empty(4),
847--   data_out =>crossbar_in_port(4),
848--   data_out_pulse =>crossbar_in_pulse(4),
849--   request(22) =>request_signal(22),
850--   request(23) =>request_signal(23),
851--   request(24) =>request_signal(24),
852--   request(25) =>request_signal(25),
853--   request(26) =>request_signal(26),
854--   request(27) =>request_signal(27),
855--   request(28) =>request_signal(28)
856--);
857--
858--PORT5_INPUT_PORT_MODULE: INPUT_PORT_MODULE
859--GENERIC MAP(number_of_ports =>7)
860--PORT MAP(
861--   data_in => Port_in(5),
862--   data_in_en => data_in_en(5),
863--   reset => reset,
864--   clk =>clk,
865--   grant(29) => grant_signal(29),
866--   grant(30) => grant_signal(30),
867--   grant(31) => grant_signal(31),
868--   grant(32) => grant_signal(32),
869--   grant(33) => grant_signal(33),
870--   grant(34) => grant_signal(34),
871--   grant(35) => grant_signal(35),
872--   fifo_full =>fifo_in_full(5),
873--   priority_rotation =>  priority_rotation_signal(5),
874--   fifo_empty => fifo_in_empty(5),
875--   data_out =>crossbar_in_port(5),
876--   data_out_pulse =>crossbar_in_pulse(5),
877--   request(29) =>request_signal(29),
878--   request(30) =>request_signal(30),
879--   request(31) =>request_signal(31),
880--   request(32) =>request_signal(32),
881--   request(33) =>request_signal(33),
882--   request(34) =>request_signal(34),
883--   request(35) =>request_signal(35)
884--);
885--
886--PORT6_INPUT_PORT_MODULE: INPUT_PORT_MODULE
887--GENERIC MAP(number_of_ports =>7)
888--PORT MAP(
889--   data_in => Port_in(6),
890--   data_in_en => data_in_en(6),
891--   reset => reset,
892--   clk =>clk,
893--   grant(36) => grant_signal(36),
894--   grant(37) => grant_signal(37),
895--   grant(38) => grant_signal(38),
896--   grant(39) => grant_signal(39),
897--   grant(40) => grant_signal(40),
898--   grant(41) => grant_signal(41),
899--   grant(42) => grant_signal(42),
900--   fifo_full =>fifo_in_full(6),
901--   priority_rotation =>  priority_rotation_signal(6),
902--   fifo_empty => fifo_in_empty(6),
903--   data_out =>crossbar_in_port(6),
904--   data_out_pulse =>crossbar_in_pulse(6),
905--   request(36) =>request_signal(36),
906--   request(37) =>request_signal(37),
907--   request(38) =>request_signal(38),
908--   request(39) =>request_signal(39),
909--   request(40) =>request_signal(40),
910--   request(41) =>request_signal(41),
911--   request(42) =>request_signal(42)
912--);
913--
914--PORT7_INPUT_PORT_MODULE: INPUT_PORT_MODULE
915--GENERIC MAP(number_of_ports =>7)
916--PORT MAP(
917--   data_in => Port_in(7),
918--   data_in_en => data_in_en(7),
919--   reset => reset,
920--   clk =>clk,
921--   grant(43) => grant_signal(43),
922--   grant(44) => grant_signal(44),
923--   grant(45) => grant_signal(45),
924--   grant(46) => grant_signal(46),
925--   grant(47) => grant_signal(47),
926--   grant(48) => grant_signal(48),
927--   grant(49) => grant_signal(49),
928--   fifo_full =>fifo_in_full(7),
929--   priority_rotation =>  priority_rotation_signal(7),
930--   fifo_empty => fifo_in_empty(7),
931--   data_out =>crossbar_in_port(8),
932--   data_out_pulse =>crossbar_in_pulse(7),
933--   request(43) =>request_signal(43),
934--   request(44) =>request_signal(44),
935--   request(45) =>request_signal(45),
936--   request(46) =>request_signal(46),
937--   request(47) =>request_signal(47),
938--   request(48) =>request_signal(48),
939--   request(49) =>request_signal(49)
940--);
941--
942--end generate switch7x7;
943
944
945-- switch 8 ports
946switch8x8 : if number_of_ports = 8 generate
947switch_8x8:for i in 1 to number_of_ports generate
948constant j: natural:=number_of_ports*(i-1);
949begin
950--j<=number_of_ports*(i-1);
951PORTx8_INPUT_PORT_MODULE: INPUT_PORT_MODULE
952GENERIC MAP(number_of_ports =>8,Port_num=>i)
953PORT MAP(
954   data_in => Port_in(i),
955   data_in_en => data_in_en(i),
956        cmd_in_en => cmd_in_en(i),
957   reset => reset,
958   clk =>clk,
959        grant =>grant_signal(j+NUMBER_OF_PORTS downto j+1),
960   fifo_full =>fifo_in_full(i),
961   priority_rotation =>  priority_rotation_signal(i),
962   fifo_empty => fifo_in_empty(i),
963   data_out =>crossbar_in_port(i),
964   data_out_pulse =>crossbar_in_pulse(i),
965
966        request =>request_signal(j+NUMBER_OF_PORTS downto j+1)
967);
968end generate switch_8x8;
969end generate switch8x8;
970
971-- switch 9 ports
972switch9x9_to_15 : if (number_of_ports >= 9)and (number_of_ports <= 15) generate
973
974switch_9x9_to_15:for i in 1 to number_of_ports generate
975
976constant j: natural:=number_of_ports*(i-1);
977begin
978
979PORTx9_INPUT_PORT_MODULE: INPUT_PORT_MODULE
980GENERIC MAP(number_of_ports =>NUMBER_OF_PORTS,Port_num=>i)
981PORT MAP(
982   data_in => Port_in(i),
983   data_in_en => data_in_en(i),
984        cmd_in_en => cmd_in_en(i),
985   reset => reset,
986   clk =>clk,
987   grant => grant_signal(j+NUMBER_OF_PORTS downto j+1),
988   fifo_full =>fifo_in_full(i),
989   priority_rotation =>  priority_rotation_signal(i),
990   fifo_empty => fifo_in_empty(i),
991   data_out =>crossbar_in_port(i),
992   data_out_pulse =>crossbar_in_pulse(i),
993
994        request =>request_signal(j+NUMBER_OF_PORTS downto j+1)
995);
996end generate switch_9x9_to_15;
997end generate switch9x9_to_15;
998
999
1000
1001-- switch 10 ports
1002--switch10x10 : if number_of_ports = 10 generate
1003--
1004--PORT1_INPUT_PORT_MODULE: INPUT_PORT_MODULE
1005--GENERIC MAP(number_of_ports =>10)
1006--PORT MAP(
1007--   data_in => Port_in(1),
1008--   data_in_en => data_in_en(1),
1009--   reset => reset,
1010--   clk =>clk,
1011--   grant(1) => grant_signal(1),
1012--   grant(2) => grant_signal(2),
1013--   grant(3) => grant_signal(3),
1014--   grant(4) => grant_signal(4),
1015--   grant(5) => grant_signal(5),
1016--   grant(6) => grant_signal(6),
1017--   grant(7) => grant_signal(7),
1018--   grant(8) => grant_signal(8),
1019--   grant(9) => grant_signal(9),
1020--   grant(10) => grant_signal(10),
1021--   fifo_full =>fifo_in_full(1),
1022--   priority_rotation =>  priority_rotation_signal(1),
1023--   fifo_empty => fifo_in_empty(1),
1024--   data_out =>crossbar_in_port(1),
1025--   data_out_pulse =>crossbar_in_pulse(1),
1026--   request(1) =>request_signal(1),
1027--   request(2) =>request_signal(2),
1028--   request(3) =>request_signal(3),
1029--   request(4) =>request_signal(4),
1030--   request(5) =>request_signal(5),
1031--   request(6) =>request_signal(6),
1032--   request(7) =>request_signal(7),
1033--   request(8) =>request_signal(8),
1034--   request(9) =>request_signal(9),
1035--   request(10) =>request_signal(10)
1036--);
1037--
1038--PORT2_INPUT_PORT_MODULE: INPUT_PORT_MODULE
1039--GENERIC MAP(number_of_ports =>10)
1040--PORT MAP(
1041--   data_in => Port_in(2),
1042--   data_in_en => data_in_en(2),
1043--   reset => reset,
1044--   clk =>clk,
1045--   grant(1) => grant_signal(11),
1046--   grant(2) => grant_signal(12),
1047--   grant(3) => grant_signal(13),
1048--   grant(4) => grant_signal(14),
1049--   grant(5) => grant_signal(15),
1050--   grant(6) => grant_signal(16),
1051--   grant(7) => grant_signal(17),
1052--   grant(8) => grant_signal(18),
1053--   grant(9) => grant_signal(19),
1054--   grant(10) => grant_signal(20),
1055--   fifo_full =>fifo_in_full(2),
1056--   priority_rotation =>  priority_rotation_signal(2),
1057--   fifo_empty => fifo_in_empty(2),
1058--   data_out =>crossbar_in_port(2),
1059--   data_out_pulse =>crossbar_in_pulse(2),
1060--   request(1) =>request_signal(11),
1061--   request(2) =>request_signal(12),
1062--   request(3) =>request_signal(13),
1063--   request(4) =>request_signal(14),
1064--   request(5) =>request_signal(15),
1065--   request(6) =>request_signal(16),
1066--   request(7) =>request_signal(17),
1067--   request(8) =>request_signal(18),
1068--   request(9) =>request_signal(19),
1069--   request(10) =>request_signal(20)
1070--);
1071--
1072--PORT3_INPUT_PORT_MODULE: INPUT_PORT_MODULE
1073--GENERIC MAP(number_of_ports =>10)
1074--PORT MAP(
1075--   data_in => Port_in(3),
1076--   data_in_en => data_in_en(3),
1077--   reset => reset,
1078--   clk =>clk,
1079--   grant(1) => grant_signal(21),
1080--   grant(2) => grant_signal(22),
1081--   grant(3) => grant_signal(23),
1082--   grant(4) => grant_signal(24),
1083--   grant(5) => grant_signal(25),
1084--   grant(6) => grant_signal(26),
1085--   grant(7) => grant_signal(27),
1086--   grant(8) => grant_signal(28),
1087--   grant(9) => grant_signal(29),
1088--   grant(10) => grant_signal(30),
1089--   fifo_full =>fifo_in_full(3),
1090--   priority_rotation =>  priority_rotation_signal(3),
1091--   fifo_empty => fifo_in_empty(3),
1092--   data_out =>crossbar_in_port(3),
1093--   data_out_pulse =>crossbar_in_pulse(3),
1094--   request(1) =>request_signal(21),
1095--   request(2) =>request_signal(22),
1096--   request(3) =>request_signal(23),
1097--   request(4) =>request_signal(24),
1098--   request(5) =>request_signal(25),
1099--   request(6) =>request_signal(26),
1100--   request(7) =>request_signal(27),
1101--   request(8) =>request_signal(28),
1102--   request(9) =>request_signal(29),
1103--   request(10) =>request_signal(30)
1104--);
1105--
1106--PORT4_INPUT_PORT_MODULE: INPUT_PORT_MODULE
1107--GENERIC MAP(number_of_ports =>10)
1108--PORT MAP(
1109--   data_in => Port_in(4),
1110--   data_in_en => data_in_en(4),
1111--   reset => reset,
1112--   clk =>clk,
1113--   grant(1) => grant_signal(31),
1114--   grant(2) => grant_signal(32),
1115--   grant(3) => grant_signal(33),
1116--   grant(4) => grant_signal(34),
1117--   grant(5) => grant_signal(35),
1118--   grant(6) => grant_signal(36),
1119--   grant(7) => grant_signal(37),
1120--   grant(8) => grant_signal(38),
1121--   grant(9) => grant_signal(39),
1122--   grant(10) => grant_signal(40),
1123--   fifo_full =>fifo_in_full(4),
1124--   priority_rotation =>  priority_rotation_signal(4),
1125--   fifo_empty => fifo_in_empty(4),
1126--   data_out =>crossbar_in_port(4),
1127--   data_out_pulse =>crossbar_in_pulse(4),
1128--   request(1) =>request_signal(31),
1129--   request(2) =>request_signal(32),
1130--   request(3) =>request_signal(33),
1131--   request(4) =>request_signal(34),
1132--   request(5) =>request_signal(35),
1133--   request(6) =>request_signal(36),
1134--   request(7) =>request_signal(37),
1135--   request(8) =>request_signal(38),
1136--   request(9) =>request_signal(39),
1137--   request(10) =>request_signal(40)
1138--);
1139--
1140--PORT5_INPUT_PORT_MODULE: INPUT_PORT_MODULE
1141--GENERIC MAP(number_of_ports =>10)
1142--PORT MAP(
1143--   data_in => Port_in(5),
1144--   data_in_en => data_in_en(5),
1145--   reset => reset,
1146--   clk =>clk,
1147--   grant(1) => grant_signal(41),
1148--   grant(2) => grant_signal(42),
1149--   grant(3) => grant_signal(43),
1150--   grant(4) => grant_signal(44),
1151--   grant(5) => grant_signal(45),
1152--   grant(6) => grant_signal(46),
1153--   grant(7) => grant_signal(47),
1154--   grant(8) => grant_signal(48),
1155--   grant(9) => grant_signal(49),
1156--   grant(10) => grant_signal(50),
1157--   fifo_full =>fifo_in_full(5),
1158--   priority_rotation =>  priority_rotation_signal(5),
1159--   fifo_empty => fifo_in_empty(5),
1160--   data_out =>crossbar_in_port(5),
1161--   data_out_pulse =>crossbar_in_pulse(5),
1162--   request(1) =>request_signal(41),
1163--   request(2) =>request_signal(42),
1164--   request(3) =>request_signal(43),
1165--   request(4) =>request_signal(44),
1166--   request(5) =>request_signal(45),
1167--   request(6) =>request_signal(46),
1168--   request(7) =>request_signal(47),
1169--   request(8) =>request_signal(48),
1170--   request(9) =>request_signal(49),
1171--   request(10) =>request_signal(50)
1172--);
1173--
1174--PORT6_INPUT_PORT_MODULE: INPUT_PORT_MODULE
1175--GENERIC MAP(number_of_ports =>10)
1176--PORT MAP(
1177--   data_in => Port_in(6),
1178--   data_in_en => data_in_en(6),
1179--   reset => reset,
1180--   clk =>clk,
1181--   grant(1) => grant_signal(51),
1182--   grant(2) => grant_signal(52),
1183--   grant(3) => grant_signal(53),
1184--   grant(4) => grant_signal(54),
1185--   grant(5) => grant_signal(55),
1186--   grant(6) => grant_signal(56),
1187--   grant(7) => grant_signal(57),
1188--   grant(8) => grant_signal(58),
1189--   grant(9) => grant_signal(59),
1190--   grant(10) => grant_signal(60),
1191--   fifo_full =>fifo_in_full(6),
1192--   priority_rotation =>  priority_rotation_signal(6),
1193--   fifo_empty => fifo_in_empty(6),
1194--   data_out =>crossbar_in_port(6),
1195--   data_out_pulse =>crossbar_in_pulse(6),
1196--   request(1) =>request_signal(51),
1197--   request(2) =>request_signal(52),
1198--   request(3) =>request_signal(53),
1199--   request(4) =>request_signal(54),
1200--   request(5) =>request_signal(55),
1201--   request(6) =>request_signal(56),
1202--   request(7) =>request_signal(57),
1203--   request(8) =>request_signal(58),
1204--   request(9) =>request_signal(59),
1205--   request(10) =>request_signal(60)
1206--);
1207--
1208--PORT7_INPUT_PORT_MODULE: INPUT_PORT_MODULE
1209--GENERIC MAP(number_of_ports =>10)
1210--PORT MAP(
1211--   data_in => Port_in(7),
1212--   data_in_en => data_in_en(7),
1213--   reset => reset,
1214--   clk =>clk,
1215--   grant(1) => grant_signal(61),
1216--   grant(2) => grant_signal(62),
1217--   grant(3) => grant_signal(63),
1218--   grant(4) => grant_signal(64),
1219--   grant(5) => grant_signal(65),
1220--   grant(6) => grant_signal(66),
1221--   grant(7) => grant_signal(67),
1222--   grant(8) => grant_signal(68),
1223--   grant(9) => grant_signal(69),
1224--   grant(10) => grant_signal(70),
1225--   fifo_full =>fifo_in_full(7),
1226--   priority_rotation =>  priority_rotation_signal(7),
1227--   fifo_empty => fifo_in_empty(7),
1228--   data_out =>crossbar_in_port(7),
1229--   data_out_pulse =>crossbar_in_pulse(7),
1230--   request(1) =>request_signal(61),
1231--   request(2) =>request_signal(62),
1232--   request(3) =>request_signal(63),
1233--   request(4) =>request_signal(64),
1234--   request(5) =>request_signal(65),
1235--   request(6) =>request_signal(66),
1236--   request(7) =>request_signal(67),
1237--   request(8) =>request_signal(68),
1238--   request(9) =>request_signal(69),
1239--   request(10) =>request_signal(70)
1240--);
1241--
1242--PORT8_INPUT_PORT_MODULE: INPUT_PORT_MODULE
1243--GENERIC MAP(number_of_ports =>10)
1244--PORT MAP(
1245--   data_in => Port_in(8),
1246--   data_in_en => data_in_en(8),
1247--   reset => reset,
1248--   clk =>clk,
1249--   grant(1) => grant_signal(71),
1250--   grant(2) => grant_signal(72),
1251--   grant(3) => grant_signal(73),
1252--   grant(4) => grant_signal(74),
1253--   grant(5) => grant_signal(75),
1254--   grant(6) => grant_signal(76),
1255--   grant(7) => grant_signal(77),
1256--   grant(8) => grant_signal(78),
1257--   grant(9) => grant_signal(79),
1258--   grant(10) => grant_signal(80),
1259--   fifo_full =>fifo_in_full(8),
1260--   priority_rotation =>  priority_rotation_signal(8),
1261--   fifo_empty => fifo_in_empty(8),
1262--   data_out =>crossbar_in_port(8),
1263--   data_out_pulse =>crossbar_in_pulse(8),
1264--   request(1) =>request_signal(71),
1265--   request(2) =>request_signal(72),
1266--   request(3) =>request_signal(73),
1267--   request(4) =>request_signal(74),
1268--   request(5) =>request_signal(75),
1269--   request(6) =>request_signal(76),
1270--   request(7) =>request_signal(77),
1271--   request(8) =>request_signal(78),
1272--   request(9) =>request_signal(79),
1273--   request(10) =>request_signal(80)
1274--);
1275--
1276--PORT9_INPUT_PORT_MODULE: INPUT_PORT_MODULE
1277--GENERIC MAP(number_of_ports =>10)
1278--PORT MAP(
1279--   data_in => Port_in(9),
1280--   data_in_en => data_in_en(9),
1281--   reset => reset,
1282--   clk =>clk,
1283--   grant(1) => grant_signal(81),
1284--   grant(2) => grant_signal(82),
1285--   grant(3) => grant_signal(83),
1286--   grant(4) => grant_signal(84),
1287--   grant(5) => grant_signal(85),
1288--   grant(6) => grant_signal(86),
1289--   grant(7) => grant_signal(87),
1290--   grant(8) => grant_signal(88),
1291--   grant(9) => grant_signal(89),
1292--   grant(10) => grant_signal(90),
1293--   fifo_full =>fifo_in_full(9),
1294--   priority_rotation =>  priority_rotation_signal(9),
1295--   fifo_empty => fifo_in_empty(9),
1296--   data_out =>crossbar_in_port(9),
1297--   data_out_pulse =>crossbar_in_pulse(9),
1298--   request(1) =>request_signal(81),
1299--   request(2) =>request_signal(82),
1300--   request(3) =>request_signal(83),
1301--   request(4) =>request_signal(84),
1302--   request(5) =>request_signal(85),
1303--   request(6) =>request_signal(86),
1304--   request(7) =>request_signal(87),
1305--   request(8) =>request_signal(88),
1306--   request(9) =>request_signal(89),
1307--   request(10) =>request_signal(90)
1308--);
1309--
1310--PORT10_INPUT_PORT_MODULE: INPUT_PORT_MODULE
1311--GENERIC MAP(number_of_ports =>10)
1312--PORT MAP(
1313--   data_in => Port_in(10),
1314--   data_in_en => data_in_en(10),
1315--   reset => reset,
1316--   clk =>clk,
1317--   grant(1) => grant_signal(91),
1318--   grant(2) => grant_signal(92),
1319--   grant(3) => grant_signal(93),
1320--   grant(4) => grant_signal(94),
1321--   grant(5) => grant_signal(95),
1322--   grant(6) => grant_signal(96),
1323--   grant(7) => grant_signal(97),
1324--   grant(8) => grant_signal(98),
1325--   grant(9) => grant_signal(99),
1326--   grant(10) => grant_signal(100),
1327--   fifo_full =>fifo_in_full(10),
1328--   priority_rotation =>  priority_rotation_signal(10),
1329--   fifo_empty => fifo_in_empty(10),
1330--   data_out =>crossbar_in_port(10),
1331--   data_out_pulse =>crossbar_in_pulse(10),
1332--   request(1) =>request_signal(91),
1333--   request(2) =>request_signal(92),
1334--   request(3) =>request_signal(93),
1335--   request(4) =>request_signal(94),
1336--   request(5) =>request_signal(95),
1337--   request(6) =>request_signal(96),
1338--   request(7) =>request_signal(97),
1339--   request(8) =>request_signal(98),
1340--   request(9) =>request_signal(99),
1341--   request(10) =>request_signal(100)
1342--);
1343--
1344--end generate switch10x10;
1345--
1346--
1347---- switch 11 ports
1348--switch11x11 : if number_of_ports = 11 generate
1349--
1350--PORT1_INPUT_PORT_MODULE: INPUT_PORT_MODULE
1351--GENERIC MAP(number_of_ports =>11)
1352--PORT MAP(
1353--   data_in => Port_in(1),
1354--   data_in_en => data_in_en(1),
1355--   reset => reset,
1356--   clk =>clk,
1357--   grant(1) => grant_signal(1),
1358--   grant(2) => grant_signal(2),
1359--   grant(3) => grant_signal(3),
1360--   grant(4) => grant_signal(4),
1361--   grant(5) => grant_signal(5),
1362--   grant(6) => grant_signal(6),
1363--   grant(7) => grant_signal(7),
1364--   grant(8) => grant_signal(8),
1365--   grant(9) => grant_signal(9),
1366--   grant(10) => grant_signal(10),
1367--   grant(11) => grant_signal(11),
1368--   fifo_full =>fifo_in_full(1),
1369--   priority_rotation =>  priority_rotation_signal(1),
1370--   fifo_empty => fifo_in_empty(1),
1371--   data_out =>crossbar_in_port(1),
1372--   data_out_pulse =>crossbar_in_pulse(1),
1373--   request(1) =>request_signal(1),
1374--   request(2) =>request_signal(2),
1375--   request(3) =>request_signal(3),
1376--   request(4) =>request_signal(4),
1377--   request(5) =>request_signal(5),
1378--   request(6) =>request_signal(6),
1379--   request(7) =>request_signal(7),
1380--   request(8) =>request_signal(8),
1381--   request(9) =>request_signal(9),
1382--   request(10) =>request_signal(10),
1383--   request(11) =>request_signal(11)
1384--);
1385--
1386--PORT2_INPUT_PORT_MODULE: INPUT_PORT_MODULE
1387--GENERIC MAP(number_of_ports =>11)
1388--PORT MAP(
1389--   data_in => Port_in(2),
1390--   data_in_en => data_in_en(2),
1391--   reset => reset,
1392--   clk =>clk,
1393--   grant(1) => grant_signal(12),
1394--   grant(02) => grant_signal(13),
1395--   grant(03) => grant_signal(14),
1396--   grant(04) => grant_signal(15),
1397--   grant(05) => grant_signal(16),
1398--   grant(06) => grant_signal(17),
1399--   grant(07) => grant_signal(18),
1400--   grant(08) => grant_signal(19),
1401--   grant(09) => grant_signal(20),
1402--   grant(10) => grant_signal(21),
1403--   grant(11) => grant_signal(22),
1404--   fifo_full =>fifo_in_full(2),
1405--   priority_rotation =>  priority_rotation_signal(2),
1406--   fifo_empty => fifo_in_empty(2),
1407--   data_out =>crossbar_in_port(2),
1408--   data_out_pulse =>crossbar_in_pulse(2),
1409--   request(01) =>request_signal(12),
1410--   request(02) =>request_signal(13),
1411--   request(03) =>request_signal(14),
1412--   request(04) =>request_signal(15),
1413--   request(05) =>request_signal(16),
1414--   request(06) =>request_signal(17),
1415--   request(07) =>request_signal(18),
1416--   request(08) =>request_signal(19),
1417--   request(09) =>request_signal(20),
1418--   request(10) =>request_signal(21),
1419--   request(11) =>request_signal(22)
1420--);
1421--
1422--PORT3_INPUT_PORT_MODULE: INPUT_PORT_MODULE
1423--GENERIC MAP(number_of_ports =>11)
1424--PORT MAP(
1425--   data_in => Port_in(3),
1426--   data_in_en => data_in_en(3),
1427--   reset => reset,
1428--   clk =>clk,
1429--   grant(01) => grant_signal(23),
1430--   grant(02) => grant_signal(24),
1431--   grant(03) => grant_signal(25),
1432--   grant(04) => grant_signal(26),
1433--   grant(05) => grant_signal(27),
1434--   grant(06) => grant_signal(28),
1435--   grant(07) => grant_signal(29),
1436--   grant(08) => grant_signal(30),
1437--   grant(09) => grant_signal(31),
1438--   grant(10) => grant_signal(32),
1439--   grant(11) => grant_signal(33),
1440--   fifo_full =>fifo_in_full(3),
1441--   priority_rotation =>  priority_rotation_signal(3),
1442--   fifo_empty => fifo_in_empty(3),
1443--   data_out =>crossbar_in_port(3),
1444--   data_out_pulse =>crossbar_in_pulse(3),
1445--   request(01) =>request_signal(23),
1446--   request(02) =>request_signal(24),
1447--   request(03) =>request_signal(25),
1448--   request(04) =>request_signal(26),
1449--   request(05) =>request_signal(27),
1450--   request(06) =>request_signal(28),
1451--   request(07) =>request_signal(29),
1452--   request(08) =>request_signal(30),
1453--   request(09) =>request_signal(31),
1454--   request(10) =>request_signal(32),
1455--   request(11) =>request_signal(33)
1456--);
1457--
1458--PORT4_INPUT_PORT_MODULE: INPUT_PORT_MODULE
1459--GENERIC MAP(number_of_ports =>11)
1460--PORT MAP(
1461--   data_in => Port_in(4),
1462--   data_in_en => data_in_en(4),
1463--   reset => reset,
1464--   clk =>clk,
1465--   grant(01) => grant_signal(34),
1466--   grant(02) => grant_signal(35),
1467--   grant(03) => grant_signal(36),
1468--   grant(04) => grant_signal(37),
1469--   grant(05) => grant_signal(38),
1470--   grant(06) => grant_signal(39),
1471--   grant(07) => grant_signal(40),
1472--   grant(08) => grant_signal(41),
1473--   grant(09) => grant_signal(42),
1474--   grant(10) => grant_signal(43),
1475--   grant(11) => grant_signal(44),
1476--   fifo_full =>fifo_in_full(4),
1477--   priority_rotation =>  priority_rotation_signal(4),
1478--   fifo_empty => fifo_in_empty(4),
1479--   data_out =>crossbar_in_port(4),
1480--   data_out_pulse =>crossbar_in_pulse(4),
1481--   request(01) =>request_signal(34),
1482--   request(02) =>request_signal(35),
1483--   request(03) =>request_signal(36),
1484--   request(04) =>request_signal(37),
1485--   request(05) =>request_signal(38),
1486--   request(06) =>request_signal(39),
1487--   request(07) =>request_signal(40),
1488--   request(08) =>request_signal(41),
1489--   request(09) =>request_signal(42),
1490--   request(10) =>request_signal(43),
1491--   request(11) =>request_signal(44)
1492--);
1493--
1494--PORT5_INPUT_PORT_MODULE: INPUT_PORT_MODULE
1495--GENERIC MAP(number_of_ports =>11)
1496--PORT MAP(
1497--   data_in => Port_in(5),
1498--   data_in_en => data_in_en(5),
1499--   reset => reset,
1500--   clk =>clk,
1501--   grant(45) => grant_signal(45),
1502--   grant(46) => grant_signal(46),
1503--   grant(47) => grant_signal(47),
1504--   grant(48) => grant_signal(48),
1505--   grant(49) => grant_signal(49),
1506--   grant(50) => grant_signal(50),
1507--   grant(51) => grant_signal(51),
1508--   grant(52) => grant_signal(52),
1509--   grant(53) => grant_signal(53),
1510--   grant(54) => grant_signal(54),
1511--   grant(55) => grant_signal(55),
1512--   fifo_full =>fifo_in_full(5),
1513--   priority_rotation =>  priority_rotation_signal(5),
1514--   fifo_empty => fifo_in_empty(5),
1515--   data_out =>crossbar_in_port(5),
1516--   data_out_pulse =>crossbar_in_pulse(5),
1517--   request(45) =>request_signal(45),
1518--   request(46) =>request_signal(46),
1519--   request(47) =>request_signal(47),
1520--   request(48) =>request_signal(48),
1521--   request(49) =>request_signal(49),
1522--   request(50) =>request_signal(50),
1523--   request(51) =>request_signal(51),
1524--   request(52) =>request_signal(52),
1525--   request(53) =>request_signal(53),
1526--   request(54) =>request_signal(54),
1527--   request(55) =>request_signal(55)
1528--);
1529--
1530--PORT6_INPUT_PORT_MODULE: INPUT_PORT_MODULE
1531--GENERIC MAP(number_of_ports =>11)
1532--PORT MAP(
1533--   data_in => Port_in(6),
1534--   data_in_en => data_in_en(6),
1535--   reset => reset,
1536--   clk =>clk,
1537--   grant(56) => grant_signal(56),
1538--   grant(57) => grant_signal(57),
1539--   grant(58) => grant_signal(58),
1540--   grant(59) => grant_signal(59),
1541--   grant(60) => grant_signal(60),
1542--   grant(61) => grant_signal(61),
1543--   grant(62) => grant_signal(62),
1544--   grant(63) => grant_signal(63),
1545--   grant(64) => grant_signal(64),
1546--   grant(65) => grant_signal(65),
1547--   grant(66) => grant_signal(66),
1548--   fifo_full =>fifo_in_full(6),
1549--   priority_rotation =>  priority_rotation_signal(6),
1550--   fifo_empty => fifo_in_empty(6),
1551--   data_out =>crossbar_in_port(6),
1552--   data_out_pulse =>crossbar_in_pulse(6),
1553--   request(56) =>request_signal(56),
1554--   request(57) =>request_signal(57),
1555--   request(58) =>request_signal(58),
1556--   request(59) =>request_signal(59),
1557--   request(60) =>request_signal(60),
1558--   request(61) =>request_signal(61),
1559--   request(62) =>request_signal(62),
1560--   request(63) =>request_signal(63),
1561--   request(64) =>request_signal(64),
1562--   request(65) =>request_signal(65),
1563--   request(66) =>request_signal(66)
1564--);
1565--
1566--PORT7_INPUT_PORT_MODULE: INPUT_PORT_MODULE
1567--GENERIC MAP(number_of_ports =>11)
1568--PORT MAP(
1569--   data_in => Port_in(7),
1570--   data_in_en => data_in_en(7),
1571--   reset => reset,
1572--   clk =>clk,
1573--   grant(67) => grant_signal(67),
1574--   grant(68) => grant_signal(68),
1575--   grant(69) => grant_signal(69),
1576--   grant(70) => grant_signal(70),
1577--   grant(71) => grant_signal(71),
1578--   grant(72) => grant_signal(72),
1579--   grant(73) => grant_signal(73),
1580--   grant(74) => grant_signal(74),
1581--   grant(75) => grant_signal(75),
1582--   grant(76) => grant_signal(76),
1583--   grant(77) => grant_signal(77),
1584--   fifo_full =>fifo_in_full(7),
1585--   priority_rotation =>  priority_rotation_signal(7),
1586--   fifo_empty => fifo_in_empty(7),
1587--   data_out =>crossbar_in_port(8),
1588--   data_out_pulse =>crossbar_in_pulse(7),
1589--   request(67) =>request_signal(67),
1590--   request(68) =>request_signal(68),
1591--   request(69) =>request_signal(69),
1592--   request(70) =>request_signal(70),
1593--   request(71) =>request_signal(71),
1594--   request(72) =>request_signal(72),
1595--   request(73) =>request_signal(73),
1596--   request(74) =>request_signal(74),
1597--   request(75) =>request_signal(75),
1598--   request(76) =>request_signal(76),
1599--   request(77) =>request_signal(77)
1600--);
1601--
1602--PORT8_INPUT_PORT_MODULE: INPUT_PORT_MODULE
1603--GENERIC MAP(number_of_ports =>11)
1604--PORT MAP(
1605--   data_in => Port_in(8),
1606--   data_in_en => data_in_en(8),
1607--   reset => reset,
1608--   clk =>clk,
1609--   grant(78) => grant_signal(78),
1610--   grant(79) => grant_signal(79),
1611--   grant(80) => grant_signal(80),
1612--   grant(81) => grant_signal(81),
1613--   grant(82) => grant_signal(82),
1614--   grant(83) => grant_signal(83),
1615--   grant(84) => grant_signal(84),
1616--   grant(85) => grant_signal(85),
1617--   grant(86) => grant_signal(86),
1618--   grant(87) => grant_signal(87),
1619--   grant(88) => grant_signal(88),
1620--   fifo_full =>fifo_in_full(8),
1621--   priority_rotation =>  priority_rotation_signal(8),
1622--   fifo_empty => fifo_in_empty(8),
1623--   data_out =>crossbar_in_port(8),
1624--   data_out_pulse =>crossbar_in_pulse(8),
1625--   request(78) =>request_signal(78),
1626--   request(79) =>request_signal(79),
1627--   request(80) =>request_signal(80),
1628--   request(81) =>request_signal(81),
1629--   request(82) =>request_signal(82),
1630--   request(83) =>request_signal(83),
1631--   request(84) =>request_signal(84),
1632--   request(85) =>request_signal(85),
1633--   request(86) =>request_signal(86),
1634--   request(87) =>request_signal(87),
1635--   request(88) =>request_signal(88)
1636--);
1637--
1638--PORT9_INPUT_PORT_MODULE: INPUT_PORT_MODULE
1639--GENERIC MAP(number_of_ports =>11)
1640--PORT MAP(
1641--   data_in => Port_in(9),
1642--   data_in_en => data_in_en(9),
1643--   reset => reset,
1644--   clk =>clk,
1645--   grant(89) => grant_signal(89),
1646--   grant(90) => grant_signal(90),
1647--   grant(91) => grant_signal(91),
1648--   grant(92) => grant_signal(92),
1649--   grant(93) => grant_signal(93),
1650--   grant(94) => grant_signal(94),
1651--   grant(95) => grant_signal(95),
1652--   grant(96) => grant_signal(96),
1653--   grant(97) => grant_signal(97),
1654--   grant(98) => grant_signal(98),
1655--   grant(99) => grant_signal(99),
1656--   fifo_full =>fifo_in_full(9),
1657--   priority_rotation =>  priority_rotation_signal(9),
1658--   fifo_empty => fifo_in_empty(9),
1659--   data_out =>crossbar_in_port(9),
1660--   data_out_pulse =>crossbar_in_pulse(9),
1661--   request(89) =>request_signal(89),
1662--   request(90) =>request_signal(90),
1663--   request(91) =>request_signal(91),
1664--   request(92) =>request_signal(92),
1665--   request(93) =>request_signal(93),
1666--   request(94) =>request_signal(94),
1667--   request(95) =>request_signal(95),
1668--   request(96) =>request_signal(96),
1669--   request(97) =>request_signal(97),
1670--   request(98) =>request_signal(98),
1671--   request(99) =>request_signal(99)
1672--);
1673--
1674--PORT10_INPUT_PORT_MODULE: INPUT_PORT_MODULE
1675--GENERIC MAP(number_of_ports =>11)
1676--PORT MAP(
1677--   data_in => Port_in(10),
1678--   data_in_en => data_in_en(10),
1679--   reset => reset,
1680--   clk =>clk,
1681--   grant(1) => grant_signal(100),
1682--   grant(2) => grant_signal(101),
1683--   grant(3) => grant_signal(102),
1684--   grant(4) => grant_signal(103),
1685--   grant(5) => grant_signal(104),
1686--   grant(6) => grant_signal(105),
1687--   grant(7) => grant_signal(106),
1688--   grant(8) => grant_signal(107),
1689--   grant(9) => grant_signal(108),
1690--   grant(10) => grant_signal(109),
1691--   grant(11) => grant_signal(110),
1692--   fifo_full =>fifo_in_full(10),
1693--   priority_rotation =>  priority_rotation_signal(10),
1694--   fifo_empty => fifo_in_empty(10),
1695--   data_out =>crossbar_in_port(10),
1696--   data_out_pulse =>crossbar_in_pulse(10),
1697--   request(1) =>request_signal(100),
1698--   request(2) =>request_signal(101),
1699--   request(3) =>request_signal(102),
1700--   request(4) =>request_signal(103),
1701--   request(5) =>request_signal(104),
1702--   request(6) =>request_signal(105),
1703--   request(7) =>request_signal(106),
1704--   request(8) =>request_signal(107),
1705--   request(9) =>request_signal(108),
1706--   request(10) =>request_signal(109),
1707--   request(11) =>request_signal(110)
1708--);
1709--
1710--PORT11_INPUT_PORT_MODULE: INPUT_PORT_MODULE
1711--GENERIC MAP(number_of_ports =>11)
1712--PORT MAP(
1713--   data_in => Port_in(11),
1714--   data_in_en => data_in_en(11),
1715--   reset => reset,
1716--   clk =>clk,
1717--   grant(1) => grant_signal(111),
1718--   grant(2) => grant_signal(112),
1719--   grant(3) => grant_signal(113),
1720--   grant(4) => grant_signal(114),
1721--   grant(5) => grant_signal(115),
1722--   grant(6) => grant_signal(116),
1723--   grant(7) => grant_signal(117),
1724--   grant(8) => grant_signal(118),
1725--   grant(9) => grant_signal(119),
1726--   grant(10) => grant_signal(120),
1727--   grant(11) => grant_signal(121),
1728--   fifo_full =>fifo_in_full(11),
1729--   priority_rotation =>  priority_rotation_signal(11),
1730--   fifo_empty => fifo_in_empty(11),
1731--   data_out =>crossbar_in_port(11),
1732--   data_out_pulse =>crossbar_in_pulse(11),
1733--   request(1) =>request_signal(111),
1734--   request(2) =>request_signal(112),
1735--   request(3) =>request_signal(113),
1736--   request(4) =>request_signal(114),
1737--   request(5) =>request_signal(115),
1738--   request(6) =>request_signal(116),
1739--   request(7) =>request_signal(117),
1740--   request(8) =>request_signal(118),
1741--   request(9) =>request_signal(119),
1742--   request(10) =>request_signal(120),
1743--   request(11) =>request_signal(121)
1744--);
1745--
1746--end generate switch11x11;
1747--
1748--
1749---- switch 12 ports
1750--switch12x12 : if number_of_ports = 12 generate
1751--
1752--PORT1_INPUT_PORT_MODULE: INPUT_PORT_MODULE
1753--GENERIC MAP(number_of_ports =>12)
1754--PORT MAP(
1755--   data_in => Port_in(1),
1756--   data_in_en => data_in_en(1),
1757--   reset => reset,
1758--   clk =>clk,
1759--   grant(1) => grant_signal(1),
1760--   grant(2) => grant_signal(2),
1761--   grant(3) => grant_signal(3),
1762--   grant(4) => grant_signal(4),
1763--   grant(5) => grant_signal(5),
1764--   grant(6) => grant_signal(6),
1765--   grant(7) => grant_signal(7),
1766--   grant(8) => grant_signal(8),
1767--   grant(9) => grant_signal(9),
1768--   grant(10) => grant_signal(10),
1769--   grant(11) => grant_signal(11),
1770--   grant(12) => grant_signal(12),
1771--   fifo_full =>fifo_in_full(1),
1772--   priority_rotation =>  priority_rotation_signal(1),
1773--   fifo_empty => fifo_in_empty(1),
1774--   data_out =>crossbar_in_port(1),
1775--   data_out_pulse =>crossbar_in_pulse(1),
1776--   request(1) =>request_signal(1),
1777--   request(2) =>request_signal(2),
1778--   request(3) =>request_signal(3),
1779--   request(4) =>request_signal(4),
1780--   request(5) =>request_signal(5),
1781--   request(6) =>request_signal(6),
1782--   request(7) =>request_signal(7),
1783--   request(8) =>request_signal(8),
1784--   request(9) =>request_signal(9),
1785--   request(10) =>request_signal(10),
1786--   request(11) =>request_signal(11),
1787--   request(12) =>request_signal(12)
1788--);
1789--
1790--PORT2_INPUT_PORT_MODULE: INPUT_PORT_MODULE
1791--GENERIC MAP(number_of_ports =>12)
1792--PORT MAP(
1793--   data_in => Port_in(2),
1794--   data_in_en => data_in_en(2),
1795--   reset => reset,
1796--   clk =>clk,
1797--   grant(13) => grant_signal(13),
1798--   grant(14) => grant_signal(14),
1799--   grant(15) => grant_signal(15),
1800--   grant(16) => grant_signal(16),
1801--   grant(17) => grant_signal(17),
1802--   grant(18) => grant_signal(18),
1803--   grant(19) => grant_signal(19),
1804--   grant(20) => grant_signal(20),
1805--   grant(21) => grant_signal(21),
1806--   grant(22) => grant_signal(22),
1807--   grant(23) => grant_signal(23),
1808--   grant(24) => grant_signal(24),
1809--   fifo_full =>fifo_in_full(2),
1810--   priority_rotation =>  priority_rotation_signal(2),
1811--   fifo_empty => fifo_in_empty(2),
1812--   data_out =>crossbar_in_port(2),
1813--   data_out_pulse =>crossbar_in_pulse(2),
1814--   request(13) =>request_signal(13),
1815--   request(14) =>request_signal(14),
1816--   request(15) =>request_signal(15),
1817--   request(16) =>request_signal(16),
1818--   request(17) =>request_signal(17),
1819--   request(18) =>request_signal(18),
1820--   request(19) =>request_signal(19),
1821--   request(20) =>request_signal(20),
1822--   request(21) =>request_signal(21),
1823--   request(22) =>request_signal(22),
1824--   request(23) =>request_signal(23),
1825--   request(24) =>request_signal(24)
1826--);
1827--
1828--PORT3_INPUT_PORT_MODULE: INPUT_PORT_MODULE
1829--GENERIC MAP(number_of_ports =>12)
1830--PORT MAP(
1831--   data_in => Port_in(3),
1832--   data_in_en => data_in_en(3),
1833--   reset => reset,
1834--   clk =>clk,
1835--   grant(25) => grant_signal(25),
1836--   grant(26) => grant_signal(26),
1837--   grant(27) => grant_signal(27),
1838--   grant(28) => grant_signal(28),
1839--   grant(29) => grant_signal(29),
1840--   grant(30) => grant_signal(30),
1841--   grant(31) => grant_signal(31),
1842--   grant(32) => grant_signal(32),
1843--   grant(33) => grant_signal(33),
1844--   grant(34) => grant_signal(34),
1845--   grant(35) => grant_signal(35),
1846--   grant(36) => grant_signal(36),
1847--   fifo_full =>fifo_in_full(3),
1848--   priority_rotation =>  priority_rotation_signal(3),
1849--   fifo_empty => fifo_in_empty(3),
1850--   data_out =>crossbar_in_port(3),
1851--   data_out_pulse =>crossbar_in_pulse(3),
1852--   request(25) =>request_signal(25),
1853--   request(26) =>request_signal(26),
1854--   request(27) =>request_signal(27),
1855--   request(28) =>request_signal(28),
1856--   request(29) =>request_signal(29),
1857--   request(30) =>request_signal(30),
1858--   request(31) =>request_signal(31),
1859--   request(32) =>request_signal(32),
1860--   request(33) =>request_signal(33),
1861--   request(34) =>request_signal(34),
1862--   request(35) =>request_signal(35),
1863--   request(36) =>request_signal(36)
1864--);
1865--
1866--PORT4_INPUT_PORT_MODULE: INPUT_PORT_MODULE
1867--GENERIC MAP(number_of_ports =>12)
1868--PORT MAP(
1869--   data_in => Port_in(4),
1870--   data_in_en => data_in_en(4),
1871--   reset => reset,
1872--   clk =>clk,
1873--   grant(37) => grant_signal(37),
1874--   grant(38) => grant_signal(38),
1875--   grant(39) => grant_signal(39),
1876--   grant(40) => grant_signal(40),
1877--   grant(41) => grant_signal(41),
1878--   grant(42) => grant_signal(42),
1879--   grant(43) => grant_signal(43),
1880--   grant(44) => grant_signal(44),
1881--   grant(45) => grant_signal(45),
1882--   grant(46) => grant_signal(46),
1883--   grant(47) => grant_signal(47),
1884--   grant(48) => grant_signal(48),
1885--   fifo_full =>fifo_in_full(4),
1886--   priority_rotation =>  priority_rotation_signal(4),
1887--   fifo_empty => fifo_in_empty(4),
1888--   data_out =>crossbar_in_port(4),
1889--   data_out_pulse =>crossbar_in_pulse(4),
1890--   request(37) =>request_signal(37),
1891--   request(38) =>request_signal(38),
1892--   request(39) =>request_signal(39),
1893--   request(40) =>request_signal(40),
1894--   request(41) =>request_signal(41),
1895--   request(42) =>request_signal(42),
1896--   request(43) =>request_signal(43),
1897--   request(44) =>request_signal(44),
1898--   request(45) =>request_signal(45),
1899--   request(46) =>request_signal(46),
1900--   request(47) =>request_signal(47),
1901--   request(48) =>request_signal(48)
1902--);
1903--
1904--PORT5_INPUT_PORT_MODULE: INPUT_PORT_MODULE
1905--GENERIC MAP(number_of_ports =>12)
1906--PORT MAP(
1907--   data_in => Port_in(5),
1908--   data_in_en => data_in_en(5),
1909--   reset => reset,
1910--   clk =>clk,
1911--   grant(49) => grant_signal(49),
1912--   grant(50) => grant_signal(50),
1913--   grant(51) => grant_signal(51),
1914--   grant(52) => grant_signal(52),
1915--   grant(53) => grant_signal(53),
1916--   grant(54) => grant_signal(54),
1917--   grant(55) => grant_signal(55),
1918--   grant(56) => grant_signal(56),
1919--   grant(57) => grant_signal(57),
1920--   grant(58) => grant_signal(58),
1921--   grant(59) => grant_signal(59),
1922--   grant(60) => grant_signal(60),
1923--   fifo_full =>fifo_in_full(5),
1924--   priority_rotation =>  priority_rotation_signal(5),
1925--   fifo_empty => fifo_in_empty(5),
1926--   data_out =>crossbar_in_port(5),
1927--   data_out_pulse =>crossbar_in_pulse(5),
1928--   request(49) =>request_signal(49),
1929--   request(50) =>request_signal(50),
1930--   request(51) =>request_signal(51),
1931--   request(52) =>request_signal(52),
1932--   request(53) =>request_signal(53),
1933--   request(54) =>request_signal(54),
1934--   request(55) =>request_signal(55),
1935--   request(56) =>request_signal(56),
1936--   request(57) =>request_signal(57),
1937--   request(58) =>request_signal(58),
1938--   request(59) =>request_signal(59),
1939--   request(60) =>request_signal(60)
1940--);
1941--
1942--PORT6_INPUT_PORT_MODULE: INPUT_PORT_MODULE
1943--GENERIC MAP(number_of_ports =>12)
1944--PORT MAP(
1945--   data_in => Port_in(6),
1946--   data_in_en => data_in_en(6),
1947--   reset => reset,
1948--   clk =>clk,
1949--   grant(61) => grant_signal(61),
1950--   grant(62) => grant_signal(62),
1951--   grant(63) => grant_signal(63),
1952--   grant(64) => grant_signal(64),
1953--   grant(65) => grant_signal(65),
1954--   grant(66) => grant_signal(66),
1955--   grant(67) => grant_signal(67),
1956--   grant(68) => grant_signal(68),
1957--   grant(69) => grant_signal(69),
1958--   grant(70) => grant_signal(70),
1959--   grant(71) => grant_signal(71),
1960--   grant(72) => grant_signal(72),
1961--   fifo_full =>fifo_in_full(6),
1962--   priority_rotation =>  priority_rotation_signal(6),
1963--   fifo_empty => fifo_in_empty(6),
1964--   data_out =>crossbar_in_port(6),
1965--   data_out_pulse =>crossbar_in_pulse(6),
1966--   request(61) =>request_signal(61),
1967--   request(62) =>request_signal(62),
1968--   request(63) =>request_signal(63),
1969--   request(64) =>request_signal(64),
1970--   request(65) =>request_signal(65),
1971--   request(66) =>request_signal(66),
1972--   request(67) =>request_signal(67),
1973--   request(68) =>request_signal(68),
1974--   request(69) =>request_signal(69),
1975--   request(70) =>request_signal(70),
1976--   request(71) =>request_signal(71),
1977--   request(72) =>request_signal(72)
1978--);
1979--
1980--PORT7_INPUT_PORT_MODULE: INPUT_PORT_MODULE
1981--GENERIC MAP(number_of_ports =>12)
1982--PORT MAP(
1983--   data_in => Port_in(7),
1984--   data_in_en => data_in_en(7),
1985--   reset => reset,
1986--   clk =>clk,
1987--   grant(73) => grant_signal(73),
1988--   grant(74) => grant_signal(74),
1989--   grant(75) => grant_signal(75),
1990--   grant(76) => grant_signal(76),
1991--   grant(77) => grant_signal(77),
1992--   grant(78) => grant_signal(78),
1993--   grant(79) => grant_signal(79),
1994--   grant(80) => grant_signal(80),
1995--   grant(81) => grant_signal(81),
1996--   grant(82) => grant_signal(82),
1997--   grant(83) => grant_signal(83),
1998--   grant(84) => grant_signal(84),
1999--   fifo_full =>fifo_in_full(7),
2000--   priority_rotation =>  priority_rotation_signal(7),
2001--   fifo_empty => fifo_in_empty(7),
2002--   data_out =>crossbar_in_port(7),
2003--   data_out_pulse =>crossbar_in_pulse(7),
2004--   request(73) =>request_signal(73),
2005--   request(74) =>request_signal(74),
2006--   request(75) =>request_signal(75),
2007--   request(76) =>request_signal(76),
2008--   request(77) =>request_signal(77),
2009--   request(78) =>request_signal(78),
2010--   request(79) =>request_signal(79),
2011--   request(80) =>request_signal(80),
2012--   request(81) =>request_signal(81),
2013--   request(82) =>request_signal(82),
2014--   request(83) =>request_signal(83),
2015--   request(84) =>request_signal(84)
2016--);
2017--
2018--PORT8_INPUT_PORT_MODULE: INPUT_PORT_MODULE
2019--GENERIC MAP(number_of_ports =>12)
2020--PORT MAP(
2021--   data_in => Port_in(8),
2022--   data_in_en => data_in_en(8),
2023--   reset => reset,
2024--   clk =>clk,
2025--   grant(85) => grant_signal(85),
2026--   grant(86) => grant_signal(86),
2027--   grant(87) => grant_signal(87),
2028--   grant(88) => grant_signal(88),
2029--   grant(89) => grant_signal(89),
2030--   grant(90) => grant_signal(90),
2031--   grant(91) => grant_signal(91),
2032--   grant(92) => grant_signal(92),
2033--   grant(93) => grant_signal(93),
2034--   grant(94) => grant_signal(94),
2035--   grant(95) => grant_signal(95),
2036--   grant(96) => grant_signal(96),
2037--   fifo_full =>fifo_in_full(8),
2038--   priority_rotation =>  priority_rotation_signal(8),
2039--   fifo_empty => fifo_in_empty(8),
2040--   data_out =>crossbar_in_port(8),
2041--   data_out_pulse =>crossbar_in_pulse(8),
2042--   request(85) =>request_signal(85),
2043--   request(86) =>request_signal(86),
2044--   request(87) =>request_signal(87),
2045--   request(88) =>request_signal(88),
2046--   request(89) =>request_signal(89),
2047--   request(90) =>request_signal(90),
2048--   request(91) =>request_signal(91),
2049--   request(92) =>request_signal(92),
2050--   request(93) =>request_signal(93),
2051--   request(94) =>request_signal(94),
2052--   request(95) =>request_signal(95),
2053--   request(96) =>request_signal(96)
2054--);
2055--
2056--PORT9_INPUT_PORT_MODULE: INPUT_PORT_MODULE
2057--GENERIC MAP(number_of_ports =>12)
2058--PORT MAP(
2059--   data_in => Port_in(9),
2060--   data_in_en => data_in_en(9),
2061--   reset => reset,
2062--   clk =>clk,
2063--   grant(97) => grant_signal(97),
2064--   grant(98) => grant_signal(98),
2065--   grant(99) => grant_signal(99),
2066--   grant(100) => grant_signal(100),
2067--   grant(101) => grant_signal(101),
2068--   grant(102) => grant_signal(102),
2069--   grant(103) => grant_signal(103),
2070--   grant(104) => grant_signal(104),
2071--   grant(105) => grant_signal(105),
2072--   grant(106) => grant_signal(106),
2073--   grant(107) => grant_signal(107),
2074--   grant(108) => grant_signal(108),
2075--   fifo_full =>fifo_in_full(9),
2076--   priority_rotation =>  priority_rotation_signal(9),
2077--   fifo_empty => fifo_in_empty(9),
2078--   data_out =>crossbar_in_port(9),
2079--   data_out_pulse =>crossbar_in_pulse(9),
2080--   request(97) =>request_signal(97),
2081--   request(98) =>request_signal(98),
2082--   request(99) =>request_signal(99),
2083--   request(100) =>request_signal(100),
2084--   request(101) =>request_signal(101),
2085--   request(102) =>request_signal(102),
2086--   request(103) =>request_signal(103),
2087--   request(104) =>request_signal(104),
2088--   request(105) =>request_signal(105),
2089--   request(106) =>request_signal(106),
2090--   request(107) =>request_signal(107),
2091--   request(108) =>request_signal(108)
2092--);
2093--
2094--PORT10_INPUT_PORT_MODULE: INPUT_PORT_MODULE
2095--GENERIC MAP(number_of_ports =>12)
2096--PORT MAP(
2097--   data_in => Port_in(10),
2098--   data_in_en => data_in_en(10),
2099--   reset => reset,
2100--   clk =>clk,
2101--   grant(1) => grant_signal(109),
2102--   grant(2) => grant_signal(110),
2103--   grant(3) => grant_signal(111),
2104--   grant(4) => grant_signal(112),
2105--   grant(5) => grant_signal(113),
2106--   grant(6) => grant_signal(114),
2107--   grant(7) => grant_signal(115),
2108--   grant(8) => grant_signal(116),
2109--   grant(9) => grant_signal(117),
2110--   grant(10) => grant_signal(118),
2111--   grant(11) => grant_signal(119),
2112--   grant(12) => grant_signal(120),
2113--   fifo_full =>fifo_in_full(10),
2114--   priority_rotation =>  priority_rotation_signal(10),
2115--   fifo_empty => fifo_in_empty(10),
2116--   data_out =>crossbar_in_port(10),
2117--   data_out_pulse =>crossbar_in_pulse(10),
2118--   request(109) =>request_signal(109),
2119--   request(110) =>request_signal(110),
2120--   request(111) =>request_signal(111),
2121--   request(112) =>request_signal(112),
2122--   request(113) =>request_signal(113),
2123--   request(114) =>request_signal(114),
2124--   request(115) =>request_signal(115),
2125--   request(116) =>request_signal(116),
2126--   request(117) =>request_signal(117),
2127--   request(118) =>request_signal(118),
2128--   request(119) =>request_signal(119),
2129--   request(120) =>request_signal(120)
2130--);
2131--
2132--PORT11_INPUT_PORT_MODULE: INPUT_PORT_MODULE
2133--GENERIC MAP(number_of_ports =>12)
2134--PORT MAP(
2135--   data_in => Port_in(11),
2136--   data_in_en => data_in_en(11),
2137--   reset => reset,
2138--   clk =>clk,
2139--   grant(1) => grant_signal(121),
2140--   grant(2) => grant_signal(122),
2141--   grant(3) => grant_signal(123),
2142--   grant(4) => grant_signal(124),
2143--   grant(5) => grant_signal(125),
2144--   grant(6) => grant_signal(126),
2145--   grant(7) => grant_signal(127),
2146--   grant(8) => grant_signal(128),
2147--   grant(9) => grant_signal(129),
2148--   grant(10) => grant_signal(130),
2149--   grant(11) => grant_signal(131),
2150--   grant(12) => grant_signal(132),
2151--   fifo_full =>fifo_in_full(11),
2152--   priority_rotation =>  priority_rotation_signal(11),
2153--   fifo_empty => fifo_in_empty(11),
2154--   data_out =>crossbar_in_port(11),
2155--   data_out_pulse =>crossbar_in_pulse(11),
2156--   request(121) =>request_signal(121),
2157--   request(122) =>request_signal(122),
2158--   request(123) =>request_signal(123),
2159--   request(124) =>request_signal(124),
2160--   request(125) =>request_signal(125),
2161--   request(126) =>request_signal(126),
2162--   request(127) =>request_signal(127),
2163--   request(128) =>request_signal(128),
2164--   request(129) =>request_signal(129),
2165--   request(130) =>request_signal(130),
2166--   request(131) =>request_signal(131),
2167--   request(132) =>request_signal(132)
2168--);
2169--
2170--PORT12_INPUT_PORT_MODULE: INPUT_PORT_MODULE
2171--GENERIC MAP(number_of_ports =>12)
2172--PORT MAP(
2173--   data_in => Port_in(12),
2174--   data_in_en => data_in_en(12),
2175--   reset => reset,
2176--   clk =>clk,
2177--   grant(133) => grant_signal(133),
2178--   grant(134) => grant_signal(134),
2179--   grant(135) => grant_signal(135),
2180--   grant(136) => grant_signal(136),
2181--   grant(137) => grant_signal(137),
2182--   grant(138) => grant_signal(138),
2183--   grant(139) => grant_signal(139),
2184--   grant(140) => grant_signal(140),
2185--   grant(141) => grant_signal(141),
2186--   grant(142) => grant_signal(142),
2187--   grant(143) => grant_signal(143),
2188--   grant(144) => grant_signal(144),
2189--   fifo_full =>fifo_in_full(12),
2190--   priority_rotation =>  priority_rotation_signal(12),
2191--   fifo_empty => fifo_in_empty(12),
2192--   data_out =>crossbar_in_port(12),
2193--   data_out_pulse =>crossbar_in_pulse(12),
2194--   request(133) =>request_signal(133),
2195--   request(134) =>request_signal(134),
2196--   request(135) =>request_signal(135),
2197--   request(136) =>request_signal(136),
2198--   request(137) =>request_signal(137),
2199--   request(138) =>request_signal(138),
2200--   request(139) =>request_signal(139),
2201--   request(140) =>request_signal(140),
2202--   request(141) =>request_signal(141),
2203--   request(142) =>request_signal(142),
2204--   request(143) =>request_signal(143),
2205--   request(144) =>request_signal(144)
2206--);
2207--
2208--end generate switch12x12;
2209--
2210--
2211---- switch 13 ports
2212--switch13x13 : if number_of_ports = 13 generate
2213--
2214--PORT1_INPUT_PORT_MODULE: INPUT_PORT_MODULE
2215--GENERIC MAP(number_of_ports =>13)
2216--PORT MAP(
2217--   data_in => Port_in(1),
2218--   data_in_en => data_in_en(1),
2219--   reset => reset,
2220--   clk =>clk,
2221--   grant(1) => grant_signal(1),
2222--   grant(2) => grant_signal(2),
2223--   grant(3) => grant_signal(3),
2224--   grant(4) => grant_signal(4),
2225--   grant(5) => grant_signal(5),
2226--   grant(6) => grant_signal(6),
2227--   grant(7) => grant_signal(7),
2228--   grant(8) => grant_signal(8),
2229--   grant(9) => grant_signal(9),
2230--   grant(10) => grant_signal(10),
2231--   grant(11) => grant_signal(11),
2232--   grant(12) => grant_signal(12),
2233--   grant(13) => grant_signal(13),
2234--   fifo_full =>fifo_in_full(1),
2235--   priority_rotation =>  priority_rotation_signal(1),
2236--   fifo_empty => fifo_in_empty(1),
2237--   data_out =>crossbar_in_port(1),
2238--   data_out_pulse =>crossbar_in_pulse(1),
2239--   request(1) =>request_signal(1),
2240--   request(2) =>request_signal(2),
2241--   request(3) =>request_signal(3),
2242--   request(4) =>request_signal(4),
2243--   request(5) =>request_signal(5),
2244--   request(6) =>request_signal(6),
2245--   request(7) =>request_signal(7),
2246--   request(8) =>request_signal(8),
2247--   request(9) =>request_signal(9),
2248--   request(10) =>request_signal(10),
2249--   request(11) =>request_signal(11),
2250--   request(12) =>request_signal(12),
2251--   request(13) =>request_signal(13)
2252--);
2253--
2254--PORT2_INPUT_PORT_MODULE: INPUT_PORT_MODULE
2255--GENERIC MAP(number_of_ports =>13)
2256--PORT MAP(
2257--   data_in => Port_in(2),
2258--   data_in_en => data_in_en(2),
2259--   reset => reset,
2260--   clk =>clk,
2261--   grant(14) => grant_signal(14),
2262--   grant(15) => grant_signal(15),
2263--   grant(16) => grant_signal(16),
2264--   grant(17) => grant_signal(17),
2265--   grant(18) => grant_signal(18),
2266--   grant(19) => grant_signal(19),
2267--   grant(20) => grant_signal(20),
2268--   grant(21) => grant_signal(21),
2269--   grant(22) => grant_signal(22),
2270--   grant(23) => grant_signal(23),
2271--   grant(24) => grant_signal(24),
2272--   grant(25) => grant_signal(25),
2273--   grant(26) => grant_signal(26),
2274--   fifo_full =>fifo_in_full(2),
2275--   priority_rotation =>  priority_rotation_signal(2),
2276--   fifo_empty => fifo_in_empty(2),
2277--   data_out =>crossbar_in_port(2),
2278--   data_out_pulse =>crossbar_in_pulse(2),
2279--   request(14) =>request_signal(14),
2280--   request(15) =>request_signal(15),
2281--   request(16) =>request_signal(16),
2282--   request(17) =>request_signal(17),
2283--   request(18) =>request_signal(18),
2284--   request(19) =>request_signal(19),
2285--   request(20) =>request_signal(20),
2286--   request(21) =>request_signal(21),
2287--   request(22) =>request_signal(22),
2288--   request(23) =>request_signal(23),
2289--   request(24) =>request_signal(24),
2290--   request(25) =>request_signal(25),
2291--   request(26) =>request_signal(26)
2292--);
2293
2294--PORT3_INPUT_PORT_MODULE: INPUT_PORT_MODULE
2295--GENERIC MAP(number_of_ports =>13)
2296--PORT MAP(
2297--   data_in => Port_in(3),
2298--   data_in_en => data_in_en(3),
2299--   reset => reset,
2300--   clk =>clk,
2301--   grant(27) => grant_signal(27),
2302--   grant(28) => grant_signal(28),
2303--   grant(29) => grant_signal(29),
2304--   grant(30) => grant_signal(30),
2305--   grant(31) => grant_signal(31),
2306--   grant(32) => grant_signal(32),
2307--   grant(33) => grant_signal(33),
2308--   grant(34) => grant_signal(34),
2309--   grant(35) => grant_signal(35),
2310--   grant(36) => grant_signal(36),
2311--   grant(37) => grant_signal(37),
2312--   grant(38) => grant_signal(38),
2313--   grant(39) => grant_signal(39),
2314--   fifo_full =>fifo_in_full(3),
2315--   priority_rotation =>  priority_rotation_signal(3),
2316--   fifo_empty => fifo_in_empty(3),
2317--   data_out =>crossbar_in_port(3),
2318--   data_out_pulse =>crossbar_in_pulse(3),
2319--   request(27) =>request_signal(27),
2320--   request(28) =>request_signal(28),
2321--   request(29) =>request_signal(29),
2322--   request(30) =>request_signal(30),
2323--   request(31) =>request_signal(31),
2324--   request(32) =>request_signal(32),
2325--   request(33) =>request_signal(33),
2326--   request(34) =>request_signal(34),
2327--   request(35) =>request_signal(35),
2328--   request(36) =>request_signal(36),
2329--   request(37) =>request_signal(37),
2330--   request(38) =>request_signal(38),
2331--   request(39) =>request_signal(39)
2332--);
2333--
2334--PORT4_INPUT_PORT_MODULE: INPUT_PORT_MODULE
2335--GENERIC MAP(number_of_ports =>13)
2336--PORT MAP(
2337--   data_in => Port_in(4),
2338--   data_in_en => data_in_en(4),
2339--   reset => reset,
2340--   clk =>clk,
2341--   grant(40) => grant_signal(40),
2342--   grant(41) => grant_signal(41),
2343--   grant(42) => grant_signal(42),
2344--   grant(43) => grant_signal(43),
2345--   grant(44) => grant_signal(44),
2346--   grant(45) => grant_signal(45),
2347--   grant(46) => grant_signal(46),
2348--   grant(47) => grant_signal(47),
2349--   grant(48) => grant_signal(48),
2350--   grant(49) => grant_signal(49),
2351--   grant(50) => grant_signal(50),
2352--   grant(51) => grant_signal(51),
2353--   grant(52) => grant_signal(52),
2354--   fifo_full =>fifo_in_full(4),
2355--   priority_rotation =>  priority_rotation_signal(4),
2356--   fifo_empty => fifo_in_empty(4),
2357--   data_out =>crossbar_in_port(4),
2358--   data_out_pulse =>crossbar_in_pulse(4),
2359--   request(40) =>request_signal(40),
2360--   request(41) =>request_signal(41),
2361--   request(42) =>request_signal(42),
2362--   request(43) =>request_signal(43),
2363--   request(44) =>request_signal(44),
2364--   request(45) =>request_signal(45),
2365--   request(46) =>request_signal(46),
2366--   request(47) =>request_signal(47),
2367--   request(48) =>request_signal(48),
2368--   request(49) =>request_signal(49),
2369--   request(50) =>request_signal(50),
2370--   request(51) =>request_signal(51),
2371--   request(52) =>request_signal(52)
2372--);
2373--
2374--PORT5_INPUT_PORT_MODULE: INPUT_PORT_MODULE
2375--GENERIC MAP(number_of_ports =>13)
2376--PORT MAP(
2377--   data_in => Port_in(5),
2378--   data_in_en => data_in_en(5),
2379--   reset => reset,
2380--   clk =>clk,
2381--   grant(53) => grant_signal(53),
2382--   grant(54) => grant_signal(54),
2383--   grant(55) => grant_signal(55),
2384--   grant(56) => grant_signal(56),
2385--   grant(57) => grant_signal(57),
2386--   grant(58) => grant_signal(58),
2387--   grant(59) => grant_signal(59),
2388--   grant(60) => grant_signal(60),
2389--   grant(61) => grant_signal(61),
2390--   grant(62) => grant_signal(62),
2391--   grant(63) => grant_signal(63),
2392--   grant(64) => grant_signal(64),
2393--   grant(65) => grant_signal(65),
2394--   fifo_full =>fifo_in_full(5),
2395--   priority_rotation =>  priority_rotation_signal(5),
2396--   fifo_empty => fifo_in_empty(5),
2397--   data_out =>crossbar_in_port(5),
2398--   data_out_pulse =>crossbar_in_pulse(5),
2399--   request(53) =>request_signal(53),
2400--   request(54) =>request_signal(54),
2401--   request(55) =>request_signal(55),
2402--   request(56) =>request_signal(56),
2403--   request(57) =>request_signal(57),
2404--   request(58) =>request_signal(58),
2405--   request(59) =>request_signal(59),
2406--   request(60) =>request_signal(60),
2407--   request(61) =>request_signal(61),
2408--   request(62) =>request_signal(62),
2409--   request(63) =>request_signal(63),
2410--   request(64) =>request_signal(64),
2411--   request(65) =>request_signal(65)
2412--);
2413--
2414--PORT6_INPUT_PORT_MODULE: INPUT_PORT_MODULE
2415--GENERIC MAP(number_of_ports =>13)
2416--PORT MAP(
2417--   data_in => Port_in(6),
2418--   data_in_en => data_in_en(6),
2419--   reset => reset,
2420--   clk =>clk,
2421--   grant(66) => grant_signal(66),
2422--   grant(67) => grant_signal(67),
2423--   grant(68) => grant_signal(68),
2424--   grant(69) => grant_signal(69),
2425--   grant(70) => grant_signal(70),
2426--   grant(71) => grant_signal(71),
2427--   grant(72) => grant_signal(72),
2428--   grant(73) => grant_signal(73),
2429--   grant(74) => grant_signal(74),
2430--   grant(75) => grant_signal(75),
2431--   grant(76) => grant_signal(76),
2432--   grant(77) => grant_signal(77),
2433--   grant(78) => grant_signal(78),
2434--   fifo_full =>fifo_in_full(6),
2435--   priority_rotation =>  priority_rotation_signal(6),
2436--   fifo_empty => fifo_in_empty(6),
2437--   data_out =>crossbar_in_port(6),
2438--   data_out_pulse =>crossbar_in_pulse(6),
2439--   request(66) =>request_signal(66),
2440--   request(67) =>request_signal(67),
2441--   request(68) =>request_signal(68),
2442--   request(69) =>request_signal(69),
2443--   request(70) =>request_signal(70),
2444--   request(71) =>request_signal(71),
2445--   request(72) =>request_signal(72),
2446--   request(73) =>request_signal(73),
2447--   request(74) =>request_signal(74),
2448--   request(75) =>request_signal(75),
2449--   request(76) =>request_signal(76),
2450--   request(77) =>request_signal(77),
2451--   request(78) =>request_signal(78)
2452--);
2453--
2454--PORT7_INPUT_PORT_MODULE: INPUT_PORT_MODULE
2455--GENERIC MAP(number_of_ports =>13)
2456--PORT MAP(
2457--   data_in => Port_in(7),
2458--   data_in_en => data_in_en(7),
2459--   reset => reset,
2460--   clk =>clk,
2461--   grant(79) => grant_signal(79),
2462--   grant(80) => grant_signal(80),
2463--   grant(81) => grant_signal(81),
2464--   grant(82) => grant_signal(82),
2465--   grant(83) => grant_signal(83),
2466--   grant(84) => grant_signal(84),
2467--   grant(85) => grant_signal(85),
2468--   grant(86) => grant_signal(86),
2469--   grant(87) => grant_signal(87),
2470--   grant(88) => grant_signal(88),
2471--   grant(89) => grant_signal(89),
2472--   grant(90) => grant_signal(90),
2473--   grant(91) => grant_signal(91),
2474--   fifo_full =>fifo_in_full(7),
2475--   priority_rotation =>  priority_rotation_signal(7),
2476--   fifo_empty => fifo_in_empty(7),
2477--   data_out =>crossbar_in_port(7),
2478--   data_out_pulse =>crossbar_in_pulse(7),
2479--   request(79) =>request_signal(79),
2480--   request(80) =>request_signal(80),
2481--   request(81) =>request_signal(81),
2482--   request(82) =>request_signal(82),
2483--   request(83) =>request_signal(83),
2484--   request(84) =>request_signal(84),
2485--   request(85) =>request_signal(85),
2486--   request(86) =>request_signal(86),
2487--   request(87) =>request_signal(87),
2488--   request(88) =>request_signal(88),
2489--   request(89) =>request_signal(89),
2490--   request(90) =>request_signal(90),
2491--   request(91) =>request_signal(91)
2492--);
2493--
2494--PORT8_INPUT_PORT_MODULE: INPUT_PORT_MODULE
2495--GENERIC MAP(number_of_ports =>13)
2496--PORT MAP(
2497--   data_in => Port_in(8),
2498--   data_in_en => data_in_en(8),
2499--   reset => reset,
2500--   clk =>clk,
2501--   grant(92) => grant_signal(92),
2502--   grant(93) => grant_signal(93),
2503--   grant(94) => grant_signal(94),
2504--   grant(95) => grant_signal(95),
2505--   grant(96) => grant_signal(96),
2506--   grant(97) => grant_signal(97),
2507--   grant(98) => grant_signal(98),
2508--   grant(99) => grant_signal(99),
2509--   grant(100) => grant_signal(100),
2510--   grant(101) => grant_signal(101),
2511--   grant(102) => grant_signal(102),
2512--   grant(103) => grant_signal(103),
2513--   grant(104) => grant_signal(104),
2514--   fifo_full =>fifo_in_full(8),
2515--   priority_rotation =>  priority_rotation_signal(8),
2516--   fifo_empty => fifo_in_empty(8),
2517--   data_out =>crossbar_in_port(8),
2518--   data_out_pulse =>crossbar_in_pulse(8),
2519--   request(92) =>request_signal(92),
2520--   request(93) =>request_signal(93),
2521--   request(94) =>request_signal(94),
2522--   request(95) =>request_signal(95),
2523--   request(96) =>request_signal(96),
2524--   request(97) =>request_signal(97),
2525--   request(98) =>request_signal(98),
2526--   request(99) =>request_signal(99),
2527--   request(100) =>request_signal(100),
2528--   request(101) =>request_signal(101),
2529--   request(102) =>request_signal(102),
2530--   request(103) =>request_signal(103),
2531--   request(104) =>request_signal(104)
2532--);
2533--
2534--PORT9_INPUT_PORT_MODULE: INPUT_PORT_MODULE
2535--GENERIC MAP(number_of_ports =>13)
2536--PORT MAP(
2537--   data_in => Port_in(9),
2538--   data_in_en => data_in_en(9),
2539--   reset => reset,
2540--   clk =>clk,
2541--   grant(1) => grant_signal(105),
2542--   grant(2) => grant_signal(106),
2543--   grant(3) => grant_signal(107),
2544--   grant(4) => grant_signal(108),
2545--   grant(5) => grant_signal(109),
2546--   grant(6) => grant_signal(110),
2547--   grant(7) => grant_signal(111),
2548--   grant(8) => grant_signal(112),
2549--   grant(9) => grant_signal(113),
2550--   grant(10) => grant_signal(114),
2551--   grant(11) => grant_signal(115),
2552--   grant(12) => grant_signal(116),
2553--   grant(13) => grant_signal(117),
2554--   fifo_full =>fifo_in_full(9),
2555--   priority_rotation =>  priority_rotation_signal(9),
2556--   fifo_empty => fifo_in_empty(9),
2557--   data_out =>crossbar_in_port(9),
2558--   data_out_pulse =>crossbar_in_pulse(9),
2559--   request(105) =>request_signal(105),
2560--   request(106) =>request_signal(106),
2561--   request(107) =>request_signal(107),
2562--   request(108) =>request_signal(108),
2563--   request(109) =>request_signal(109),
2564--   request(110) =>request_signal(110),
2565--   request(111) =>request_signal(111),
2566--   request(112) =>request_signal(112),
2567--   request(113) =>request_signal(113),
2568--   request(114) =>request_signal(114),
2569--   request(115) =>request_signal(115),
2570--   request(116) =>request_signal(116),
2571--   request(117) =>request_signal(117)
2572--);
2573--
2574--PORT10_INPUT_PORT_MODULE: INPUT_PORT_MODULE
2575--GENERIC MAP(number_of_ports =>13)
2576--PORT MAP(
2577--   data_in => Port_in(10),
2578--   data_in_en => data_in_en(10),
2579--   reset => reset,
2580--   clk =>clk,
2581--   grant(1) => grant_signal(118),
2582--   grant(2) => grant_signal(119),
2583--   grant(3) => grant_signal(120),
2584--   grant(4) => grant_signal(121),
2585--   grant(5) => grant_signal(122),
2586--   grant(6) => grant_signal(123),
2587--   grant(7) => grant_signal(124),
2588--   grant(8) => grant_signal(125),
2589--   grant(9) => grant_signal(126),
2590--   grant(10) => grant_signal(127),
2591--   grant(11) => grant_signal(128),
2592--   grant(12) => grant_signal(129),
2593--   grant(13) => grant_signal(130),
2594--   fifo_full =>fifo_in_full(10),
2595--   priority_rotation =>  priority_rotation_signal(10),
2596--   fifo_empty => fifo_in_empty(10),
2597--   data_out =>crossbar_in_port(10),
2598--   data_out_pulse =>crossbar_in_pulse(10),
2599--   request(1) =>request_signal(118),
2600--   request(2) =>request_signal(119),
2601--   request(3) =>request_signal(120),
2602--   request(4) =>request_signal(121),
2603--   request(5) =>request_signal(122),
2604--   request(6) =>request_signal(123),
2605--   request(7) =>request_signal(124),
2606--   request(8) =>request_signal(125),
2607--   request(9) =>request_signal(126),
2608--   request(10) =>request_signal(127),
2609--   request(11) =>request_signal(128),
2610--   request(12) =>request_signal(129),
2611--   request(13) =>request_signal(130)
2612--);
2613--
2614--PORT11_INPUT_PORT_MODULE: INPUT_PORT_MODULE
2615--GENERIC MAP(number_of_ports =>13)
2616--PORT MAP(
2617--   data_in => Port_in(11),
2618--   data_in_en => data_in_en(11),
2619--   reset => reset,
2620--   clk =>clk,
2621--   grant(1) => grant_signal(131),
2622--   grant(2) => grant_signal(132),
2623--   grant(3) => grant_signal(133),
2624--   grant(4) => grant_signal(134),
2625--   grant(5) => grant_signal(135),
2626--   grant(6) => grant_signal(136),
2627--   grant(7) => grant_signal(137),
2628--   grant(8) => grant_signal(138),
2629--   grant(9) => grant_signal(139),
2630--   grant(10) => grant_signal(140),
2631--   grant(11) => grant_signal(141),
2632--   grant(12) => grant_signal(142),
2633--   grant(13) => grant_signal(143),
2634--   fifo_full =>fifo_in_full(11),
2635--   priority_rotation =>  priority_rotation_signal(11),
2636--   fifo_empty => fifo_in_empty(11),
2637--   data_out =>crossbar_in_port(11),
2638--   data_out_pulse =>crossbar_in_pulse(11),
2639--   request(1) =>request_signal(131),
2640--   request(2) =>request_signal(132),
2641--   request(3) =>request_signal(133),
2642--   request(4) =>request_signal(134),
2643--   request(5) =>request_signal(135),
2644--   request(6) =>request_signal(136),
2645--   request(7) =>request_signal(137),
2646--   request(8) =>request_signal(138),
2647--   request(9) =>request_signal(139),
2648--   request(10) =>request_signal(140),
2649--   request(11) =>request_signal(141),
2650--   request(12) =>request_signal(142),
2651--   request(13) =>request_signal(143)
2652--);
2653--
2654--PORT12_INPUT_PORT_MODULE: INPUT_PORT_MODULE
2655--GENERIC MAP(number_of_ports =>13)
2656--PORT MAP(
2657--   data_in => Port_in(12),
2658--   data_in_en => data_in_en(12),
2659--   reset => reset,
2660--   clk =>clk,
2661--   grant(1) => grant_signal(144),
2662--   grant(2) => grant_signal(145),
2663--   grant(3) => grant_signal(146),
2664--   grant(4) => grant_signal(147),
2665--   grant(5) => grant_signal(148),
2666--   grant(6) => grant_signal(149),
2667--   grant(7) => grant_signal(150),
2668--   grant(8) => grant_signal(151),
2669--   grant(9) => grant_signal(152),
2670--   grant(10) => grant_signal(153),
2671--   grant(11) => grant_signal(154),
2672--   grant(12) => grant_signal(155),
2673--   grant(13) => grant_signal(156),
2674--   fifo_full =>fifo_in_full(12),
2675--   priority_rotation =>  priority_rotation_signal(12),
2676--   fifo_empty => fifo_in_empty(12),
2677--   data_out =>crossbar_in_port(12),
2678--   data_out_pulse =>crossbar_in_pulse(12),
2679--   request(1) =>request_signal(144),
2680--   request(2) =>request_signal(145),
2681--   request(3) =>request_signal(146),
2682--   request(4) =>request_signal(147),
2683--   request(5) =>request_signal(148),
2684--   request(6) =>request_signal(149),
2685--   request(7) =>request_signal(150),
2686--   request(8) =>request_signal(151),
2687--   request(9) =>request_signal(152),
2688--   request(10) =>request_signal(153),
2689--   request(11) =>request_signal(154),
2690--   request(12) =>request_signal(155),
2691--   request(13) =>request_signal(156)
2692--);
2693--
2694--PORT13_INPUT_PORT_MODULE: INPUT_PORT_MODULE
2695--GENERIC MAP(number_of_ports =>13)
2696--PORT MAP(
2697--   data_in => Port_in(13),
2698--   data_in_en => data_in_en(13),
2699--   reset => reset,
2700--   clk =>clk,
2701--   grant(1) => grant_signal(157),
2702--   grant(2) => grant_signal(158),
2703--   grant(3) => grant_signal(159),
2704--   grant(4) => grant_signal(160),
2705--   grant(5) => grant_signal(161),
2706--   grant(6) => grant_signal(162),
2707--   grant(7) => grant_signal(163),
2708--   grant(8) => grant_signal(164),
2709--   grant(9) => grant_signal(165),
2710--   grant(10) => grant_signal(166),
2711--   grant(11) => grant_signal(167),
2712--   grant(12) => grant_signal(168),
2713--   grant(13) => grant_signal(169),
2714--   fifo_full =>fifo_in_full(13),
2715--   priority_rotation =>  priority_rotation_signal(13),
2716--   fifo_empty => fifo_in_empty(13),
2717--   data_out =>crossbar_in_port(13),
2718--   data_out_pulse =>crossbar_in_pulse(13),
2719--   request(1) =>request_signal(157),
2720--   request(2) =>request_signal(158),
2721--   request(3) =>request_signal(159),
2722--   request(4) =>request_signal(160),
2723--   request(5) =>request_signal(161),
2724--   request(6) =>request_signal(162),
2725--   request(7) =>request_signal(163),
2726--   request(8) =>request_signal(164),
2727--   request(9) =>request_signal(165),
2728--   request(10) =>request_signal(166),
2729--   request(11) =>request_signal(167),
2730--   request(12) =>request_signal(168),
2731--   request(13) =>request_signal(169)
2732--);
2733--
2734--end generate switch13x13;
2735--
2736--
2737---- switch 14 ports
2738--switch14x14 : if number_of_ports = 14 generate
2739--
2740--PORT1_INPUT_PORT_MODULE: INPUT_PORT_MODULE
2741--GENERIC MAP(number_of_ports =>14)
2742--PORT MAP(
2743--   data_in => Port_in(1),
2744--   data_in_en => data_in_en(1),
2745--   reset => reset,
2746--   clk =>clk,
2747--   grant(1) => grant_signal(1),
2748--   grant(2) => grant_signal(2),
2749--   grant(3) => grant_signal(3),
2750--   grant(4) => grant_signal(4),
2751--   grant(5) => grant_signal(5),
2752--   grant(6) => grant_signal(6),
2753--   grant(7) => grant_signal(7),
2754--   grant(8) => grant_signal(8),
2755--   grant(9) => grant_signal(9),
2756--   grant(10) => grant_signal(10),
2757--   grant(11) => grant_signal(11),
2758--   grant(12) => grant_signal(12),
2759--   grant(13) => grant_signal(13),
2760--   grant(14) => grant_signal(14),
2761--   fifo_full =>fifo_in_full(1),
2762--   priority_rotation =>  priority_rotation_signal(1),
2763--   fifo_empty => fifo_in_empty(1),
2764--   data_out =>crossbar_in_port(1),
2765--   data_out_pulse =>crossbar_in_pulse(1),
2766--   request(1) =>request_signal(1),
2767--   request(2) =>request_signal(2),
2768--   request(3) =>request_signal(3),
2769--   request(4) =>request_signal(4),
2770--   request(5) =>request_signal(5),
2771--   request(6) =>request_signal(6),
2772--   request(7) =>request_signal(7),
2773--   request(8) =>request_signal(8),
2774--   request(9) =>request_signal(9),
2775--   request(10) =>request_signal(10),
2776--   request(11) =>request_signal(11),
2777--   request(12) =>request_signal(12),
2778--   request(13) =>request_signal(13),
2779--   request(14) =>request_signal(14)
2780--);
2781--
2782--PORT2_INPUT_PORT_MODULE: INPUT_PORT_MODULE
2783--GENERIC MAP(number_of_ports =>14)
2784--PORT MAP(
2785--   data_in => Port_in(2),
2786--   data_in_en => data_in_en(2),
2787--   reset => reset,
2788--   clk =>clk,
2789--   grant(1) => grant_signal(15),
2790--   grant(2) => grant_signal(16),
2791--   grant(3) => grant_signal(17),
2792--   grant(4) => grant_signal(18),
2793--   grant(5) => grant_signal(19),
2794--   grant(6) => grant_signal(20),
2795--   grant(7) => grant_signal(21),
2796--   grant(8) => grant_signal(22),
2797--   grant(9) => grant_signal(23),
2798--   grant(10) => grant_signal(24),
2799--   grant(11) => grant_signal(25),
2800--   grant(12) => grant_signal(26),
2801--   grant(13) => grant_signal(27),
2802--   grant(14) => grant_signal(28),
2803--   fifo_full =>fifo_in_full(2),
2804--   priority_rotation =>  priority_rotation_signal(2),
2805--   fifo_empty => fifo_in_empty(2),
2806--   data_out =>crossbar_in_port(2),
2807--   data_out_pulse =>crossbar_in_pulse(2),
2808--   request(1) =>request_signal(15),
2809--   request(2) =>request_signal(16),
2810--   request(3) =>request_signal(17),
2811--   request(4) =>request_signal(18),
2812--   request(5) =>request_signal(19),
2813--   request(6) =>request_signal(20),
2814--   request(7) =>request_signal(21),
2815--   request(8) =>request_signal(22),
2816--   request(9) =>request_signal(23),
2817--   request(10) =>request_signal(24),
2818--   request(11) =>request_signal(25),
2819--   request(12) =>request_signal(26),
2820--   request(13) =>request_signal(27),
2821--   request(14) =>request_signal(28)
2822--);
2823--
2824--PORT3_INPUT_PORT_MODULE: INPUT_PORT_MODULE
2825--GENERIC MAP(number_of_ports =>14)
2826--PORT MAP(
2827--   data_in => Port_in(3),
2828--   data_in_en => data_in_en(3),
2829--   reset => reset,
2830--   clk =>clk,
2831--   grant(1) => grant_signal(29),
2832--   grant(2) => grant_signal(30),
2833--   grant(3) => grant_signal(31),
2834--   grant(4) => grant_signal(32),
2835--   grant(5) => grant_signal(33),
2836--   grant(6) => grant_signal(34),
2837--   grant(7) => grant_signal(35),
2838--   grant(8) => grant_signal(36),
2839--   grant(9) => grant_signal(37),
2840--   grant(10)=> grant_signal(38),
2841--   grant(11) => grant_signal(39),
2842--   grant(12) => grant_signal(40),
2843--   grant(13) => grant_signal(41),
2844--   grant(14) => grant_signal(42),
2845--   fifo_full =>fifo_in_full(3),
2846--   priority_rotation =>  priority_rotation_signal(3),
2847--   fifo_empty => fifo_in_empty(3),
2848--   data_out =>crossbar_in_port(3),
2849--   data_out_pulse =>crossbar_in_pulse(3),
2850--   request(01) =>request_signal(29),
2851--   request(02) =>request_signal(30),
2852--   request(03) =>request_signal(31),
2853--   request(04) =>request_signal(32),
2854--   request(05) =>request_signal(33),
2855--   request(06) =>request_signal(34),
2856--   request(07) =>request_signal(35),
2857--   request(08) =>request_signal(36),
2858--   request(09) =>request_signal(37),
2859--   request(10) =>request_signal(38),
2860--   request(11) =>request_signal(39),
2861--   request(12) =>request_signal(40),
2862--   request(13) =>request_signal(41),
2863--   request(14) =>request_signal(42)
2864--);
2865--
2866--PORT4_INPUT_PORT_MODULE: INPUT_PORT_MODULE
2867--GENERIC MAP(number_of_ports =>14)
2868--PORT MAP(
2869--   data_in => Port_in(4),
2870--   data_in_en => data_in_en(4),
2871--   reset => reset,
2872--   clk =>clk,
2873--   grant(01) => grant_signal(43),
2874--   grant(02) => grant_signal(44),
2875--   grant(03) => grant_signal(45),
2876--   grant(04) => grant_signal(46),
2877--   grant(05) => grant_signal(47),
2878--   grant(06) => grant_signal(48),
2879--   grant(07) => grant_signal(49),
2880--   grant(08) => grant_signal(50),
2881--   grant(09) => grant_signal(51),
2882--   grant(10) => grant_signal(52),
2883--   grant(11) => grant_signal(53),
2884--   grant(12) => grant_signal(54),
2885--   grant(13) => grant_signal(55),
2886--   grant(14) => grant_signal(56),
2887--   fifo_full =>fifo_in_full(4),
2888--   priority_rotation =>  priority_rotation_signal(4),
2889--   fifo_empty => fifo_in_empty(4),
2890--   data_out =>crossbar_in_port(4),
2891--   data_out_pulse =>crossbar_in_pulse(4),
2892--   request(01) =>request_signal(43),
2893--   request(02) =>request_signal(44),
2894--   request(03) =>request_signal(45),
2895--   request(04) =>request_signal(46),
2896--   request(05) =>request_signal(47),
2897--   request(06) =>request_signal(48),
2898--   request(07) =>request_signal(49),
2899--   request(08) =>request_signal(50),
2900--   request(09) =>request_signal(51),
2901--   request(10) =>request_signal(52),
2902--   request(11) =>request_signal(53),
2903--   request(12) =>request_signal(54),
2904--   request(13) =>request_signal(55),
2905--   request(14) =>request_signal(56)
2906--);
2907--
2908--PORT5_INPUT_PORT_MODULE: INPUT_PORT_MODULE
2909--GENERIC MAP(number_of_ports =>14)
2910--PORT MAP(
2911--   data_in => Port_in(5),
2912--   data_in_en => data_in_en(5),
2913--   reset => reset,
2914--   clk =>clk,
2915--   grant(01) => grant_signal(57),
2916--   grant(02) => grant_signal(58),
2917--   grant(03) => grant_signal(59),
2918--   grant(04) => grant_signal(60),
2919--   grant(05) => grant_signal(61),
2920--   grant(06) => grant_signal(62),
2921--   grant(07) => grant_signal(63),
2922--   grant(08) => grant_signal(64),
2923--   grant(09) => grant_signal(65),
2924--   grant(10) => grant_signal(66),
2925--   grant(11) => grant_signal(67),
2926--   grant(12) => grant_signal(68),
2927--   grant(13) => grant_signal(69),
2928--   grant(14) => grant_signal(70),
2929--   fifo_full =>fifo_in_full(5),
2930--   priority_rotation =>  priority_rotation_signal(5),
2931--   fifo_empty => fifo_in_empty(5),
2932--   data_out =>crossbar_in_port(5),
2933--   data_out_pulse =>crossbar_in_pulse(5),
2934--   request(01) =>request_signal(57),
2935--   request(02) =>request_signal(58),
2936--   request(03) =>request_signal(59),
2937--   request(04) =>request_signal(60),
2938--   request(05) =>request_signal(61),
2939--   request(06) =>request_signal(62),
2940--   request(07) =>request_signal(63),
2941--   request(08) =>request_signal(64),
2942--   request(09) =>request_signal(65),
2943--   request(10) =>request_signal(66),
2944--   request(11) =>request_signal(67),
2945--   request(12) =>request_signal(68),
2946--   request(13) =>request_signal(69),
2947--   request(14) =>request_signal(70)
2948--);
2949--
2950--PORT6_INPUT_PORT_MODULE: INPUT_PORT_MODULE
2951--GENERIC MAP(number_of_ports =>14)
2952--PORT MAP(
2953--   data_in => Port_in(6),
2954--   data_in_en => data_in_en(6),
2955--   reset => reset,
2956--   clk =>clk,
2957--   grant(01) => grant_signal(71),
2958--   grant(02) => grant_signal(72),
2959--   grant(03) => grant_signal(73),
2960--   grant(04) => grant_signal(74),
2961--   grant(05) => grant_signal(75),
2962--   grant(06) => grant_signal(76),
2963--   grant(07) => grant_signal(77),
2964--   grant(08) => grant_signal(78),
2965--   grant(09) => grant_signal(79),
2966--   grant(10) => grant_signal(80),
2967--   grant(11) => grant_signal(81),
2968--   grant(12) => grant_signal(82),
2969--   grant(13) => grant_signal(83),
2970--   grant(14) => grant_signal(84),
2971--   fifo_full =>fifo_in_full(6),
2972--   priority_rotation =>  priority_rotation_signal(6),
2973--   fifo_empty => fifo_in_empty(6),
2974--   data_out =>crossbar_in_port(6),
2975--   data_out_pulse =>crossbar_in_pulse(6),
2976--   request(01) =>request_signal(71),
2977--   request(02) =>request_signal(72),
2978--   request(03) =>request_signal(73),
2979--   request(04) =>request_signal(74),
2980--   request(05) =>request_signal(75),
2981--   request(06) =>request_signal(76),
2982--   request(07) =>request_signal(77),
2983--   request(08) =>request_signal(78),
2984--   request(09) =>request_signal(79),
2985--   request(10) =>request_signal(80),
2986--   request(11) =>request_signal(81),
2987--   request(12) =>request_signal(82),
2988--   request(13) =>request_signal(83),
2989--   request(14) =>request_signal(84)
2990--);
2991--
2992--PORT7_INPUT_PORT_MODULE: INPUT_PORT_MODULE
2993--GENERIC MAP(number_of_ports =>14)
2994--PORT MAP(
2995--   data_in => Port_in(7),
2996--   data_in_en => data_in_en(7),
2997--   reset => reset,
2998--   clk =>clk,
2999--   grant(01) => grant_signal(85),
3000--   grant(02) => grant_signal(86),
3001--   grant(03) => grant_signal(87),
3002--   grant(04) => grant_signal(88),
3003--   grant(05) => grant_signal(89),
3004--   grant(06) => grant_signal(90),
3005--   grant(07) => grant_signal(91),
3006--   grant(08) => grant_signal(92),
3007--   grant(09) => grant_signal(93),
3008--   grant(10) => grant_signal(94),
3009--   grant(11) => grant_signal(95),
3010--   grant(12) => grant_signal(96),
3011--   grant(13) => grant_signal(97),
3012--   grant(14) => grant_signal(98),
3013--   fifo_full =>fifo_in_full(7),
3014--   priority_rotation =>  priority_rotation_signal(7),
3015--   fifo_empty => fifo_in_empty(7),
3016--   data_out =>crossbar_in_port(7),
3017--   data_out_pulse =>crossbar_in_pulse(7),
3018--   request(01) =>request_signal(85),
3019--   request(02) =>request_signal(86),
3020--   request(03) =>request_signal(87),
3021--   request(04) =>request_signal(88),
3022--   request(05) =>request_signal(89),
3023--   request(06) =>request_signal(90),
3024--   request(07) =>request_signal(91),
3025--   request(08) =>request_signal(92),
3026--   request(09) =>request_signal(93),
3027--   request(10) =>request_signal(94),
3028--   request(11) =>request_signal(95),
3029--   request(12) =>request_signal(96),
3030--   request(13) =>request_signal(97),
3031--   request(14) =>request_signal(98)
3032--);
3033--
3034--PORT8_INPUT_PORT_MODULE: INPUT_PORT_MODULE
3035--GENERIC MAP(number_of_ports =>14)
3036--PORT MAP(
3037--   data_in => Port_in(8),
3038--   data_in_en => data_in_en(8),
3039--   reset => reset,
3040--   clk =>clk,
3041--   grant(01) => grant_signal(99),
3042--   grant(02) => grant_signal(100),
3043--   grant(03) => grant_signal(101),
3044--   grant(04) => grant_signal(102),
3045--   grant(05) => grant_signal(103),
3046--   grant(06) => grant_signal(104),
3047--   grant(07) => grant_signal(105),
3048--   grant(08) => grant_signal(106),
3049--   grant(09) => grant_signal(107),
3050--   grant(10) => grant_signal(108),
3051--   grant(11) => grant_signal(109),
3052--   grant(12) => grant_signal(110),
3053--   grant(13) => grant_signal(111),
3054--   grant(14) => grant_signal(112),
3055--   fifo_full =>fifo_in_full(8),
3056--   priority_rotation =>  priority_rotation_signal(8),
3057--   fifo_empty => fifo_in_empty(8),
3058--   data_out =>crossbar_in_port(8),
3059--   data_out_pulse =>crossbar_in_pulse(8),
3060--   request(1) =>request_signal(99),
3061--   request(2) =>request_signal(100),
3062--   request(3) =>request_signal(101),
3063--   request(4) =>request_signal(102),
3064--   request(5) =>request_signal(103),
3065--   request(6) =>request_signal(104),
3066--   request(7) =>request_signal(105),
3067--   request(8) =>request_signal(106),
3068--   request(9) =>request_signal(107),
3069--   request(10) =>request_signal(108),
3070--   request(11) =>request_signal(109),
3071--   request(12) =>request_signal(110),
3072--   request(13) =>request_signal(111),
3073--   request(14) =>request_signal(112)
3074--);
3075--
3076--PORT9_INPUT_PORT_MODULE: INPUT_PORT_MODULE
3077--GENERIC MAP(number_of_ports =>14)
3078--PORT MAP(
3079--   data_in => Port_in(9),
3080--   data_in_en => data_in_en(9),
3081--   reset => reset,
3082--   clk =>clk,
3083--   grant(1) => grant_signal(113),
3084--   grant(2) => grant_signal(114),
3085--   grant(3) => grant_signal(115),
3086--   grant(4) => grant_signal(116),
3087--   grant(5) => grant_signal(117),
3088--   grant(6) => grant_signal(118),
3089--   grant(7) => grant_signal(119),
3090--   grant(8) => grant_signal(120),
3091--   grant(9) => grant_signal(121),
3092--   grant(10) => grant_signal(122),
3093--   grant(11) => grant_signal(123),
3094--   grant(12) => grant_signal(124),
3095--   grant(13) => grant_signal(125),
3096--   grant(14) => grant_signal(126),
3097--   fifo_full =>fifo_in_full(9),
3098--   priority_rotation =>  priority_rotation_signal(9),
3099--   fifo_empty => fifo_in_empty(9),
3100--   data_out =>crossbar_in_port(9),
3101--   data_out_pulse =>crossbar_in_pulse(9),
3102--   request(1) =>request_signal(113),
3103--   request(2) =>request_signal(114),
3104--   request(3) =>request_signal(115),
3105--   request(4) =>request_signal(116),
3106--   request(5) =>request_signal(117),
3107--   request(6) =>request_signal(118),
3108--   request(7) =>request_signal(119),
3109--   request(8) =>request_signal(120),
3110--   request(9) =>request_signal(121),
3111--   request(10) =>request_signal(122),
3112--   request(11) =>request_signal(123),
3113--   request(12) =>request_signal(124),
3114--   request(13) =>request_signal(125),
3115--   request(14) =>request_signal(126)
3116--);
3117--
3118--PORT10_INPUT_PORT_MODULE: INPUT_PORT_MODULE
3119--GENERIC MAP(number_of_ports =>14)
3120--PORT MAP(
3121--   data_in => Port_in(10),
3122--   data_in_en => data_in_en(10),
3123--   reset => reset,
3124--   clk =>clk,
3125--   grant(1) => grant_signal(127),
3126--   grant(2) => grant_signal(128),
3127--   grant(3) => grant_signal(129),
3128--   grant(4) => grant_signal(130),
3129--   grant(5) => grant_signal(131),
3130--   grant(6) => grant_signal(132),
3131--   grant(7) => grant_signal(133),
3132--   grant(8) => grant_signal(134),
3133--   grant(9) => grant_signal(135),
3134--   grant(10) => grant_signal(136),
3135--   grant(11) => grant_signal(137),
3136--   grant(12) => grant_signal(138),
3137--   grant(13) => grant_signal(139),
3138--   grant(14) => grant_signal(140),
3139--   fifo_full =>fifo_in_full(10),
3140--   priority_rotation =>  priority_rotation_signal(10),
3141--   fifo_empty => fifo_in_empty(10),
3142--   data_out =>crossbar_in_port(10),
3143--   data_out_pulse =>crossbar_in_pulse(10),
3144--   request(1) =>request_signal(127),
3145--   request(2) =>request_signal(128),
3146--   request(3) =>request_signal(129),
3147--   request(4) =>request_signal(130),
3148--   request(5) =>request_signal(131),
3149--   request(6) =>request_signal(132),
3150--   request(7) =>request_signal(133),
3151--   request(8) =>request_signal(134),
3152--   request(9) =>request_signal(135),
3153--   request(10) =>request_signal(136),
3154--   request(11) =>request_signal(137),
3155--   request(12) =>request_signal(138),
3156--   request(13) =>request_signal(139),
3157--   request(14) =>request_signal(140)
3158--);
3159--
3160--PORT11_INPUT_PORT_MODULE: INPUT_PORT_MODULE
3161--GENERIC MAP(number_of_ports =>14)
3162--PORT MAP(
3163--   data_in => Port_in(11),
3164--   data_in_en => data_in_en(11),
3165--   reset => reset,
3166--   clk =>clk,
3167--   grant(1) => grant_signal(141),
3168--   grant(2) => grant_signal(142),
3169--   grant(3) => grant_signal(143),
3170--   grant(4) => grant_signal(144),
3171--   grant(5) => grant_signal(145),
3172--   grant(6) => grant_signal(146),
3173--   grant(7) => grant_signal(147),
3174--   grant(8) => grant_signal(148),
3175--   grant(9) => grant_signal(149),
3176--   grant(10) => grant_signal(150),
3177--   grant(11) => grant_signal(151),
3178--   grant(12) => grant_signal(152),
3179--   grant(13) => grant_signal(153),
3180--   grant(14) => grant_signal(154),
3181--   fifo_full =>fifo_in_full(11),
3182--   priority_rotation =>  priority_rotation_signal(11),
3183--   fifo_empty => fifo_in_empty(11),
3184--   data_out =>crossbar_in_port(11),
3185--   data_out_pulse =>crossbar_in_pulse(11),
3186--   request(1) =>request_signal(141),
3187--   request(2) =>request_signal(142),
3188--   request(3) =>request_signal(143),
3189--   request(4) =>request_signal(144),
3190--   request(5) =>request_signal(145),
3191--   request(6) =>request_signal(146),
3192--   request(7) =>request_signal(147),
3193--   request(8) =>request_signal(148),
3194--   request(9) =>request_signal(149),
3195--   request(10) =>request_signal(150),
3196--   request(11) =>request_signal(151),
3197--   request(12) =>request_signal(152),
3198--   request(13) =>request_signal(153),
3199--   request(14) =>request_signal(154)
3200--);
3201--
3202--PORT12_INPUT_PORT_MODULE: INPUT_PORT_MODULE
3203--GENERIC MAP(number_of_ports =>14)
3204--PORT MAP(
3205--   data_in => Port_in(12),
3206--   data_in_en => data_in_en(12),
3207--   reset => reset,
3208--   clk =>clk,
3209--   grant(1) => grant_signal(155),
3210--   grant(2) => grant_signal(156),
3211--   grant(3) => grant_signal(157),
3212--   grant(4) => grant_signal(158),
3213--   grant(5) => grant_signal(159),
3214--   grant(6) => grant_signal(160),
3215--   grant(7) => grant_signal(161),
3216--   grant(8) => grant_signal(162),
3217--   grant(9) => grant_signal(163),
3218--   grant(10) => grant_signal(164),
3219--   grant(11) => grant_signal(165),
3220--   grant(12) => grant_signal(166),
3221--   grant(13) => grant_signal(167),
3222--   grant(14) => grant_signal(168),
3223--   fifo_full =>fifo_in_full(12),
3224--   priority_rotation =>  priority_rotation_signal(12),
3225--   fifo_empty => fifo_in_empty(12),
3226--   data_out =>crossbar_in_port(12),
3227--   data_out_pulse =>crossbar_in_pulse(12),
3228--   request(1) =>request_signal(155),
3229--   request(2) =>request_signal(156),
3230--   request(3) =>request_signal(157),
3231--   request(4) =>request_signal(158),
3232--   request(5) =>request_signal(159),
3233--   request(6) =>request_signal(160),
3234--   request(7) =>request_signal(161),
3235--   request(8) =>request_signal(162),
3236--   request(9) =>request_signal(163),
3237--   request(10) =>request_signal(164),
3238--   request(11) =>request_signal(165),
3239--   request(12) =>request_signal(166),
3240--   request(13) =>request_signal(167),
3241--   request(14) =>request_signal(168)
3242--);
3243--
3244--PORT13_INPUT_PORT_MODULE: INPUT_PORT_MODULE
3245--GENERIC MAP(number_of_ports =>14)
3246--PORT MAP(
3247--   data_in => Port_in(13),
3248--   data_in_en => data_in_en(13),
3249--   reset => reset,
3250--   clk =>clk,
3251--   grant(1) => grant_signal(169),
3252--   grant(2) => grant_signal(170),
3253--   grant(3) => grant_signal(171),
3254--   grant(4) => grant_signal(172),
3255--   grant(5) => grant_signal(173),
3256--   grant(6) => grant_signal(174),
3257--   grant(7) => grant_signal(175),
3258--   grant(8) => grant_signal(176),
3259--   grant(9) => grant_signal(177),
3260--   grant(10) => grant_signal(178),
3261--   grant(11) => grant_signal(179),
3262--   grant(12) => grant_signal(180),
3263--   grant(13) => grant_signal(181),
3264--   grant(14) => grant_signal(182),
3265--   fifo_full =>fifo_in_full(13),
3266--   priority_rotation =>  priority_rotation_signal(13),
3267--   fifo_empty => fifo_in_empty(13),
3268--   data_out =>crossbar_in_port(13),
3269--   data_out_pulse =>crossbar_in_pulse(13),
3270--   request(1) =>request_signal(169),
3271--   request(2) =>request_signal(170),
3272--   request(3) =>request_signal(171),
3273--   request(4) =>request_signal(172),
3274--   request(5) =>request_signal(173),
3275--   request(6) =>request_signal(174),
3276--   request(7) =>request_signal(175),
3277--   request(8) =>request_signal(176),
3278--   request(9) =>request_signal(177),
3279--   request(10) =>request_signal(178),
3280--   request(11) =>request_signal(179),
3281--   request(12) =>request_signal(180),
3282--   request(13) =>request_signal(181),
3283--   request(14) =>request_signal(182)
3284--);
3285--
3286--PORT14_INPUT_PORT_MODULE: INPUT_PORT_MODULE
3287--GENERIC MAP(number_of_ports =>14)
3288--PORT MAP(
3289--   data_in => Port_in(14),
3290--   data_in_en => data_in_en(14),
3291--   reset => reset,
3292--   clk =>clk,
3293--   grant(1) => grant_signal(183),
3294--   grant(2) => grant_signal(184),
3295--   grant(3) => grant_signal(185),
3296--   grant(4) => grant_signal(186),
3297--   grant(5) => grant_signal(187),
3298--   grant(6) => grant_signal(188),
3299--   grant(7) => grant_signal(189),
3300--   grant(8) => grant_signal(190),
3301--   grant(9) => grant_signal(191),
3302--   grant(10) => grant_signal(192),
3303--   grant(11) => grant_signal(193),
3304--   grant(12) => grant_signal(194),
3305--   grant(13) => grant_signal(195),
3306--   grant(14) => grant_signal(196),
3307--   fifo_full =>fifo_in_full(14),
3308--   priority_rotation =>  priority_rotation_signal(14),
3309--   fifo_empty => fifo_in_empty(14),
3310--   data_out =>crossbar_in_port(14),
3311--   data_out_pulse =>crossbar_in_pulse(14),
3312--   request(1) =>request_signal(183),
3313--   request(2) =>request_signal(184),
3314--   request(3) =>request_signal(185),
3315--   request(4) =>request_signal(186),
3316--   request(5) =>request_signal(187),
3317--   request(6) =>request_signal(188),
3318--   request(7) =>request_signal(189),
3319--   request(8) =>request_signal(190),
3320--   request(9) =>request_signal(191),
3321--   request(10) =>request_signal(192),
3322--   request(11) =>request_signal(193),
3323--   request(12) =>request_signal(194),
3324--   request(13) =>request_signal(195),
3325--   request(14) =>request_signal(196)
3326--);
3327--
3328--end generate switch14x14;
3329--
3330--
3331---- switch 15 ports
3332--switch15x15 : if number_of_ports = 15 generate
3333--
3334--PORT1_INPUT_PORT_MODULE: INPUT_PORT_MODULE
3335--GENERIC MAP(number_of_ports =>15)
3336--PORT MAP(
3337--   data_in => Port_in(1),
3338--   data_in_en => data_in_en(1),
3339--   reset => reset,
3340--   clk =>clk,
3341--   grant(1) => grant_signal(1),
3342--   grant(2) => grant_signal(2),
3343--   grant(3) => grant_signal(3),
3344--   grant(4) => grant_signal(4),
3345--   grant(5) => grant_signal(5),
3346--   grant(6) => grant_signal(6),
3347--   grant(7) => grant_signal(7),
3348--   grant(8) => grant_signal(8),
3349--   grant(9) => grant_signal(9),
3350--   grant(10) => grant_signal(10),
3351--   grant(11) => grant_signal(11),
3352--   grant(12) => grant_signal(12),
3353--   grant(13) => grant_signal(13),
3354--   grant(14) => grant_signal(14),
3355--   grant(15) => grant_signal(15),
3356--   fifo_full =>fifo_in_full(1),
3357--   priority_rotation =>  priority_rotation_signal(1),
3358--   fifo_empty => fifo_in_empty(1),
3359--   data_out =>crossbar_in_port(1),
3360--   data_out_pulse =>crossbar_in_pulse(1),
3361--   request(1) =>request_signal(1),
3362--   request(2) =>request_signal(2),
3363--   request(3) =>request_signal(3),
3364--   request(4) =>request_signal(4),
3365--   request(5) =>request_signal(5),
3366--   request(6) =>request_signal(6),
3367--   request(7) =>request_signal(7),
3368--   request(8) =>request_signal(8),
3369--   request(9) =>request_signal(9),
3370--   request(10) =>request_signal(10),
3371--   request(11) =>request_signal(11),
3372--   request(12) =>request_signal(12),
3373--   request(13) =>request_signal(13),
3374--   request(14) =>request_signal(14),
3375--   request(15) =>request_signal(15)
3376--);
3377--
3378--PORT2_INPUT_PORT_MODULE: INPUT_PORT_MODULE
3379--GENERIC MAP(number_of_ports =>15)
3380--PORT MAP(
3381--   data_in => Port_in(2),
3382--   data_in_en => data_in_en(2),
3383--   reset => reset,
3384--   clk =>clk,
3385--   grant(16) => grant_signal(16),
3386--   grant(17) => grant_signal(17),
3387--   grant(18) => grant_signal(18),
3388--   grant(19) => grant_signal(19),
3389--   grant(20) => grant_signal(20),
3390--   grant(21) => grant_signal(21),
3391--   grant(22) => grant_signal(22),
3392--   grant(23) => grant_signal(23),
3393--   grant(24) => grant_signal(24),
3394--   grant(25) => grant_signal(25),
3395--   grant(26) => grant_signal(26),
3396--   grant(27) => grant_signal(27),
3397--   grant(28) => grant_signal(28),
3398--   grant(29) => grant_signal(29),
3399--   grant(30) => grant_signal(30),
3400--   fifo_full =>fifo_in_full(2),
3401--   priority_rotation =>  priority_rotation_signal(2),
3402--   fifo_empty => fifo_in_empty(2),
3403--   data_out =>crossbar_in_port(2),
3404--   data_out_pulse =>crossbar_in_pulse(2),
3405--   request(16) =>request_signal(16),
3406--   request(17) =>request_signal(17),
3407--   request(18) =>request_signal(18),
3408--   request(19) =>request_signal(19),
3409--   request(20) =>request_signal(20),
3410--   request(21) =>request_signal(21),
3411--   request(22) =>request_signal(22),
3412--   request(23) =>request_signal(23),
3413--   request(24) =>request_signal(24),
3414--   request(25) =>request_signal(25),
3415--   request(26) =>request_signal(26),
3416--   request(27) =>request_signal(27),
3417--   request(28) =>request_signal(28),
3418--   request(29) =>request_signal(29),
3419--   request(30) =>request_signal(30)
3420--);
3421--
3422--PORT3_INPUT_PORT_MODULE: INPUT_PORT_MODULE
3423--GENERIC MAP(number_of_ports =>15)
3424--PORT MAP(
3425--   data_in => Port_in(3),
3426--   data_in_en => data_in_en(3),
3427--   reset => reset,
3428--   clk =>clk,
3429--   grant(31) => grant_signal(31),
3430--   grant(32) => grant_signal(32),
3431--   grant(33) => grant_signal(33),
3432--   grant(34) => grant_signal(34),
3433--   grant(35) => grant_signal(35),
3434--   grant(36) => grant_signal(36),
3435--   grant(37) => grant_signal(37),
3436--   grant(38) => grant_signal(38),
3437--   grant(39) => grant_signal(39),
3438--   grant(40) => grant_signal(40),
3439--   grant(41) => grant_signal(41),
3440--   grant(42) => grant_signal(42),
3441--   grant(43) => grant_signal(43),
3442--   grant(44) => grant_signal(44),
3443--   grant(45) => grant_signal(45),
3444--   fifo_full =>fifo_in_full(3),
3445--   priority_rotation =>  priority_rotation_signal(3),
3446--   fifo_empty => fifo_in_empty(3),
3447--   data_out =>crossbar_in_port(3),
3448--   data_out_pulse =>crossbar_in_pulse(3),
3449--   request(31) =>request_signal(31),
3450--   request(32) =>request_signal(32),
3451--   request(33) =>request_signal(33),
3452--   request(34) =>request_signal(34),
3453--   request(35) =>request_signal(35),
3454--   request(36) =>request_signal(36),
3455--   request(37) =>request_signal(37),
3456--   request(38) =>request_signal(38),
3457--   request(39) =>request_signal(39),
3458--   request(40) =>request_signal(40),
3459--   request(41) =>request_signal(41),
3460--   request(42) =>request_signal(42),
3461--   request(43) =>request_signal(43),
3462--   request(44) =>request_signal(44),
3463--   request(45) =>request_signal(45)
3464--);
3465--
3466--PORT4_INPUT_PORT_MODULE: INPUT_PORT_MODULE
3467--GENERIC MAP(number_of_ports =>15)
3468--PORT MAP(
3469--   data_in => Port_in(4),
3470--   data_in_en => data_in_en(4),
3471--   reset => reset,
3472--   clk =>clk,
3473--   grant(46) => grant_signal(46),
3474--   grant(47) => grant_signal(47),
3475--   grant(48) => grant_signal(48),
3476--   grant(49) => grant_signal(49),
3477--   grant(50) => grant_signal(50),
3478--   grant(51) => grant_signal(51),
3479--   grant(52) => grant_signal(52),
3480--   grant(53) => grant_signal(53),
3481--   grant(54) => grant_signal(54),
3482--   grant(55) => grant_signal(55),
3483--   grant(56) => grant_signal(56),
3484--   grant(57) => grant_signal(57),
3485--   grant(58) => grant_signal(58),
3486--   grant(59) => grant_signal(59),
3487--   grant(60) => grant_signal(60),
3488--   fifo_full =>fifo_in_full(4),
3489--   priority_rotation =>  priority_rotation_signal(4),
3490--   fifo_empty => fifo_in_empty(4),
3491--   data_out =>crossbar_in_port(4),
3492--   data_out_pulse =>crossbar_in_pulse(4),
3493--   request(46) =>request_signal(46),
3494--   request(47) =>request_signal(47),
3495--   request(48) =>request_signal(48),
3496--   request(49) =>request_signal(49),
3497--   request(50) =>request_signal(50),
3498--   request(51) =>request_signal(51),
3499--   request(52) =>request_signal(52),
3500--   request(53) =>request_signal(53),
3501--   request(54) =>request_signal(54),
3502--   request(55) =>request_signal(55),
3503--   request(56) =>request_signal(56),
3504--   request(57) =>request_signal(57),
3505--   request(58) =>request_signal(58),
3506--   request(59) =>request_signal(59),
3507--   request(60) =>request_signal(60)
3508--);
3509--
3510--PORT5_INPUT_PORT_MODULE: INPUT_PORT_MODULE
3511--GENERIC MAP(number_of_ports =>15)
3512--PORT MAP(
3513--   data_in => Port_in(5),
3514--   data_in_en => data_in_en(5),
3515--   reset => reset,
3516--   clk =>clk,
3517--   grant(61) => grant_signal(61),
3518--   grant(62) => grant_signal(62),
3519--   grant(63) => grant_signal(63),
3520--   grant(64) => grant_signal(64),
3521--   grant(65) => grant_signal(65),
3522--   grant(66) => grant_signal(66),
3523--   grant(67) => grant_signal(67),
3524--   grant(68) => grant_signal(68),
3525--   grant(69) => grant_signal(69),
3526--   grant(70) => grant_signal(70),
3527--   grant(71) => grant_signal(71),
3528--   grant(72) => grant_signal(72),
3529--   grant(73) => grant_signal(73),
3530--   grant(74) => grant_signal(74),
3531--   grant(75) => grant_signal(75),
3532--   fifo_full =>fifo_in_full(5),
3533--   priority_rotation =>  priority_rotation_signal(5),
3534--   fifo_empty => fifo_in_empty(5),
3535--   data_out =>crossbar_in_port(5),
3536--   data_out_pulse =>crossbar_in_pulse(5),
3537--   request(61) =>request_signal(61),
3538--   request(62) =>request_signal(62),
3539--   request(63) =>request_signal(63),
3540--   request(64) =>request_signal(64),
3541--   request(65) =>request_signal(65),
3542--   request(66) =>request_signal(66),
3543--   request(67) =>request_signal(67),
3544--   request(68) =>request_signal(68),
3545--   request(69) =>request_signal(69),
3546--   request(70) =>request_signal(70),
3547--   request(71) =>request_signal(71),
3548--   request(72) =>request_signal(72),
3549--   request(73) =>request_signal(73),
3550--   request(74) =>request_signal(74),
3551--   request(75) =>request_signal(75)
3552--);
3553--
3554--PORT6_INPUT_PORT_MODULE: INPUT_PORT_MODULE
3555--GENERIC MAP(number_of_ports =>15)
3556--PORT MAP(
3557--   data_in => Port_in(6),
3558--   data_in_en => data_in_en(6),
3559--   reset => reset,
3560--   clk =>clk,
3561--   grant(76) => grant_signal(76),
3562--   grant(77) => grant_signal(77),
3563--   grant(78) => grant_signal(78),
3564--   grant(79) => grant_signal(79),
3565--   grant(80) => grant_signal(80),
3566--   grant(81) => grant_signal(81),
3567--   grant(82) => grant_signal(82),
3568--   grant(83) => grant_signal(83),
3569--   grant(84) => grant_signal(84),
3570--   grant(85) => grant_signal(85),
3571--   grant(86) => grant_signal(86),
3572--   grant(87) => grant_signal(87),
3573--   grant(88) => grant_signal(88),
3574--   grant(89) => grant_signal(89),
3575--   grant(90) => grant_signal(90),
3576--   fifo_full =>fifo_in_full(6),
3577--   priority_rotation =>  priority_rotation_signal(6),
3578--   fifo_empty => fifo_in_empty(6),
3579--   data_out =>crossbar_in_port(6),
3580--   data_out_pulse =>crossbar_in_pulse(6),
3581--   request(76) =>request_signal(76),
3582--   request(77) =>request_signal(77),
3583--   request(78) =>request_signal(78),
3584--   request(79) =>request_signal(79),
3585--   request(80) =>request_signal(80),
3586--   request(81) =>request_signal(81),
3587--   request(82) =>request_signal(82),
3588--   request(83) =>request_signal(83),
3589--   request(84) =>request_signal(84),
3590--   request(85) =>request_signal(85),
3591--   request(86) =>request_signal(86),
3592--   request(87) =>request_signal(87),
3593--   request(88) =>request_signal(88),
3594--   request(89) =>request_signal(89),
3595--   request(90) =>request_signal(90)
3596--);
3597--
3598--PORT7_INPUT_PORT_MODULE: INPUT_PORT_MODULE
3599--GENERIC MAP(number_of_ports =>15)
3600--PORT MAP(
3601--   data_in => Port_in(7),
3602--   data_in_en => data_in_en(7),
3603--   reset => reset,
3604--   clk =>clk,
3605--   grant(91) => grant_signal(91),
3606--   grant(92) => grant_signal(92),
3607--   grant(93) => grant_signal(93),
3608--   grant(94) => grant_signal(94),
3609--   grant(95) => grant_signal(95),
3610--   grant(96) => grant_signal(96),
3611--   grant(97) => grant_signal(97),
3612--   grant(98) => grant_signal(98),
3613--   grant(99) => grant_signal(99),
3614--   grant(100) => grant_signal(100),
3615--   grant(101) => grant_signal(101),
3616--   grant(102) => grant_signal(102),
3617--   grant(103) => grant_signal(103),
3618--   grant(104) => grant_signal(104),
3619--   grant(105) => grant_signal(105),
3620--   fifo_full =>fifo_in_full(7),
3621--   priority_rotation =>  priority_rotation_signal(7),
3622--   fifo_empty => fifo_in_empty(7),
3623--   data_out =>crossbar_in_port(7),
3624--   data_out_pulse =>crossbar_in_pulse(7),
3625--   request(91) =>request_signal(91),
3626--   request(92) =>request_signal(92),
3627--   request(93) =>request_signal(93),
3628--   request(94) =>request_signal(94),
3629--   request(95) =>request_signal(95),
3630--   request(96) =>request_signal(96),
3631--   request(97) =>request_signal(97),
3632--   request(98) =>request_signal(98),
3633--   request(99) =>request_signal(99),
3634--   request(100) =>request_signal(100),
3635--   request(101) =>request_signal(101),
3636--   request(102) =>request_signal(102),
3637--   request(103) =>request_signal(103),
3638--   request(104) =>request_signal(104),
3639--   request(105) =>request_signal(105)
3640--);
3641--
3642--PORT8_INPUT_PORT_MODULE: INPUT_PORT_MODULE
3643--GENERIC MAP(number_of_ports =>15)
3644--PORT MAP(
3645--   data_in => Port_in(8),
3646--   data_in_en => data_in_en(8),
3647--   reset => reset,
3648--   clk =>clk,
3649--   grant(106) => grant_signal(106),
3650--   grant(107) => grant_signal(107),
3651--   grant(108) => grant_signal(108),
3652--   grant(109) => grant_signal(109),
3653--   grant(110) => grant_signal(110),
3654--   grant(111) => grant_signal(111),
3655--   grant(112) => grant_signal(112),
3656--   grant(113) => grant_signal(113),
3657--   grant(114) => grant_signal(114),
3658--   grant(115) => grant_signal(115),
3659--   grant(116) => grant_signal(116),
3660--   grant(117) => grant_signal(117),
3661--   grant(118) => grant_signal(118),
3662--   grant(119) => grant_signal(119),
3663--   grant(120) => grant_signal(120),
3664--   fifo_full =>fifo_in_full(8),
3665--   priority_rotation =>  priority_rotation_signal(8),
3666--   fifo_empty => fifo_in_empty(8),
3667--   data_out =>crossbar_in_port(8),
3668--   data_out_pulse =>crossbar_in_pulse(8),
3669--   request(106) =>request_signal(106),
3670--   request(107) =>request_signal(107),
3671--   request(108) =>request_signal(108),
3672--   request(109) =>request_signal(109),
3673--   request(110) =>request_signal(110),
3674--   request(111) =>request_signal(111),
3675--   request(112) =>request_signal(112),
3676--   request(113) =>request_signal(113),
3677--   request(114) =>request_signal(114),
3678--   request(115) =>request_signal(115),
3679--   request(116) =>request_signal(116),
3680--   request(117) =>request_signal(117),
3681--   request(118) =>request_signal(118),
3682--   request(119) =>request_signal(119),
3683--   request(120) =>request_signal(120)
3684--);
3685--
3686--PORT9_INPUT_PORT_MODULE: INPUT_PORT_MODULE
3687--GENERIC MAP(number_of_ports =>15)
3688--PORT MAP(
3689--   data_in => Port_in(9),
3690--   data_in_en => data_in_en(9),
3691--   reset => reset,
3692--   clk =>clk,
3693--   grant(121) => grant_signal(121),
3694--   grant(122) => grant_signal(122),
3695--   grant(123) => grant_signal(123),
3696--   grant(124) => grant_signal(124),
3697--   grant(125) => grant_signal(125),
3698--   grant(126) => grant_signal(126),
3699--   grant(127) => grant_signal(127),
3700--   grant(128) => grant_signal(128),
3701--   grant(129) => grant_signal(129),
3702--   grant(130) => grant_signal(130),
3703--   grant(131) => grant_signal(131),
3704--   grant(132) => grant_signal(132),
3705--   grant(133) => grant_signal(133),
3706--   grant(134) => grant_signal(134),
3707--   grant(135) => grant_signal(135),
3708--   fifo_full =>fifo_in_full(9),
3709--   priority_rotation =>  priority_rotation_signal(9),
3710--   fifo_empty => fifo_in_empty(9),
3711--   data_out =>crossbar_in_port(9),
3712--   data_out_pulse =>crossbar_in_pulse(9),
3713--   request(121) =>request_signal(121),
3714--   request(122) =>request_signal(122),
3715--   request(123) =>request_signal(123),
3716--   request(124) =>request_signal(124),
3717--   request(125) =>request_signal(125),
3718--   request(126) =>request_signal(126),
3719--   request(127) =>request_signal(127),
3720--   request(128) =>request_signal(128),
3721--   request(129) =>request_signal(129),
3722--   request(130) =>request_signal(130),
3723--   request(131) =>request_signal(131),
3724--   request(132) =>request_signal(132),
3725--   request(133) =>request_signal(133),
3726--   request(134) =>request_signal(134),
3727--   request(135) =>request_signal(135)
3728--);
3729--
3730--PORT10_INPUT_PORT_MODULE: INPUT_PORT_MODULE
3731--GENERIC MAP(number_of_ports =>15)
3732--PORT MAP(
3733--   data_in => Port_in(10),
3734--   data_in_en => data_in_en(10),
3735--   reset => reset,
3736--   clk =>clk,
3737--   grant(136) => grant_signal(136),
3738--   grant(137) => grant_signal(137),
3739--   grant(138) => grant_signal(138),
3740--   grant(139) => grant_signal(139),
3741--   grant(140) => grant_signal(140),
3742--   grant(141) => grant_signal(141),
3743--   grant(142) => grant_signal(142),
3744--   grant(143) => grant_signal(143),
3745--   grant(144) => grant_signal(144),
3746--   grant(145) => grant_signal(145),
3747--   grant(146) => grant_signal(146),
3748--   grant(147) => grant_signal(147),
3749--   grant(148) => grant_signal(148),
3750--   grant(149) => grant_signal(149),
3751--   grant(150) => grant_signal(150),
3752--   fifo_full =>fifo_in_full(10),
3753--   priority_rotation =>  priority_rotation_signal(10),
3754--   fifo_empty => fifo_in_empty(10),
3755--   data_out =>crossbar_in_port(10),
3756--   data_out_pulse =>crossbar_in_pulse(10),
3757--   request(136) =>request_signal(136),
3758--   request(137) =>request_signal(137),
3759--   request(138) =>request_signal(138),
3760--   request(139) =>request_signal(139),
3761--   request(140) =>request_signal(140),
3762--   request(141) =>request_signal(141),
3763--   request(142) =>request_signal(142),
3764--   request(143) =>request_signal(143),
3765--   request(144) =>request_signal(144),
3766--   request(145) =>request_signal(145),
3767--   request(146) =>request_signal(146),
3768--   request(147) =>request_signal(147),
3769--   request(148) =>request_signal(148),
3770--   request(149) =>request_signal(149),
3771--   request(150) =>request_signal(150)
3772--);
3773--
3774--PORT11_INPUT_PORT_MODULE: INPUT_PORT_MODULE
3775--GENERIC MAP(number_of_ports =>15)
3776--PORT MAP(
3777--   data_in => Port_in(11),
3778--   data_in_en => data_in_en(11),
3779--   reset => reset,
3780--   clk =>clk,
3781--   grant(151) => grant_signal(151),
3782--   grant(152) => grant_signal(152),
3783--   grant(153) => grant_signal(153),
3784--   grant(154) => grant_signal(154),
3785--   grant(155) => grant_signal(155),
3786--   grant(156) => grant_signal(156),
3787--   grant(157) => grant_signal(157),
3788--   grant(158) => grant_signal(158),
3789--   grant(159) => grant_signal(159),
3790--   grant(160) => grant_signal(160),
3791--   grant(161) => grant_signal(161),
3792--   grant(162) => grant_signal(162),
3793--   grant(163) => grant_signal(163),
3794--   grant(164) => grant_signal(164),
3795--   grant(165) => grant_signal(165),
3796--   fifo_full =>fifo_in_full(11),
3797--   priority_rotation =>  priority_rotation_signal(11),
3798--   fifo_empty => fifo_in_empty(11),
3799--   data_out =>crossbar_in_port(11),
3800--   data_out_pulse =>crossbar_in_pulse(11),
3801--   request(151) =>request_signal(151),
3802--   request(152) =>request_signal(152),
3803--   request(153) =>request_signal(153),
3804--   request(154) =>request_signal(154),
3805--   request(155) =>request_signal(155),
3806--   request(156) =>request_signal(156),
3807--   request(157) =>request_signal(157),
3808--   request(158) =>request_signal(158),
3809--   request(159) =>request_signal(159),
3810--   request(160) =>request_signal(160),
3811--   request(161) =>request_signal(161),
3812--   request(162) =>request_signal(162),
3813--   request(163) =>request_signal(163),
3814--   request(164) =>request_signal(164),
3815--   request(165) =>request_signal(165)
3816--);
3817--
3818--PORT12_INPUT_PORT_MODULE: INPUT_PORT_MODULE
3819--GENERIC MAP(number_of_ports =>15)
3820--PORT MAP(
3821--   data_in => Port_in(12),
3822--   data_in_en => data_in_en(12),
3823--   reset => reset,
3824--   clk =>clk,
3825--   grant(166) => grant_signal(166),
3826--   grant(167) => grant_signal(167),
3827--   grant(168) => grant_signal(168),
3828--   grant(169) => grant_signal(169),
3829--   grant(170) => grant_signal(170),
3830--   grant(171) => grant_signal(171),
3831--   grant(172) => grant_signal(172),
3832--   grant(173) => grant_signal(173),
3833--   grant(174) => grant_signal(174),
3834--   grant(175) => grant_signal(175),
3835--   grant(176) => grant_signal(176),
3836--   grant(177) => grant_signal(177),
3837--   grant(178) => grant_signal(178),
3838--   grant(179) => grant_signal(179),
3839--   grant(180) => grant_signal(180),
3840--   fifo_full =>fifo_in_full(12),
3841--   priority_rotation =>  priority_rotation_signal(12),
3842--   fifo_empty => fifo_in_empty(12),
3843--   data_out =>crossbar_in_port(12),
3844--   data_out_pulse =>crossbar_in_pulse(12),
3845--   request(166) =>request_signal(166),
3846--   request(167) =>request_signal(167),
3847--   request(168) =>request_signal(168),
3848--   request(169) =>request_signal(169),
3849--   request(170) =>request_signal(170),
3850--   request(171) =>request_signal(171),
3851--   request(172) =>request_signal(172),
3852--   request(173) =>request_signal(173),
3853--   request(174) =>request_signal(174),
3854--   request(175) =>request_signal(175),
3855--   request(176) =>request_signal(176),
3856--   request(177) =>request_signal(177),
3857--   request(178) =>request_signal(178),
3858--   request(179) =>request_signal(179),
3859--   request(180) =>request_signal(180)
3860--);
3861--
3862--PORT13_INPUT_PORT_MODULE: INPUT_PORT_MODULE
3863--GENERIC MAP(number_of_ports =>15)
3864--PORT MAP(
3865--   data_in => Port_in(13),
3866--   data_in_en => data_in_en(13),
3867--   reset => reset,
3868--   clk =>clk,
3869--   grant(181) => grant_signal(181),
3870--   grant(182) => grant_signal(182),
3871--   grant(183) => grant_signal(183),
3872--   grant(184) => grant_signal(184),
3873--   grant(185) => grant_signal(185),
3874--   grant(186) => grant_signal(186),
3875--   grant(187) => grant_signal(187),
3876--   grant(188) => grant_signal(188),
3877--   grant(189) => grant_signal(189),
3878--   grant(190) => grant_signal(190),
3879--   grant(191) => grant_signal(191),
3880--   grant(192) => grant_signal(192),
3881--   grant(193) => grant_signal(193),
3882--   grant(194) => grant_signal(194),
3883--   grant(195) => grant_signal(195),
3884--   fifo_full =>fifo_in_full(13),
3885--   priority_rotation =>  priority_rotation_signal(13),
3886--   fifo_empty => fifo_in_empty(13),
3887--   data_out =>crossbar_in_port(13),
3888--   data_out_pulse =>crossbar_in_pulse(13),
3889--   request(181) =>request_signal(181),
3890--   request(182) =>request_signal(182),
3891--   request(183) =>request_signal(183),
3892--   request(184) =>request_signal(184),
3893--   request(185) =>request_signal(185),
3894--   request(186) =>request_signal(186),
3895--   request(187) =>request_signal(187),
3896--   request(188) =>request_signal(188),
3897--   request(189) =>request_signal(189),
3898--   request(190) =>request_signal(190),
3899--   request(191) =>request_signal(191),
3900--   request(192) =>request_signal(192),
3901--   request(193) =>request_signal(193),
3902--   request(194) =>request_signal(194),
3903--   request(195) =>request_signal(195)
3904--);
3905--
3906--PORT14_INPUT_PORT_MODULE: INPUT_PORT_MODULE
3907--GENERIC MAP(number_of_ports =>15)
3908--PORT MAP(
3909--   data_in => Port_in(14),
3910--   data_in_en => data_in_en(14),
3911--   reset => reset,
3912--   clk =>clk,
3913--   grant(196) => grant_signal(196),
3914--   grant(197) => grant_signal(197),
3915--   grant(198) => grant_signal(198),
3916--   grant(199) => grant_signal(199),
3917--   grant(200) => grant_signal(200),
3918--   grant(201) => grant_signal(201),
3919--   grant(202) => grant_signal(202),
3920--   grant(203) => grant_signal(203),
3921--   grant(204) => grant_signal(204),
3922--   grant(205) => grant_signal(205),
3923--   grant(206) => grant_signal(206),
3924--   grant(207) => grant_signal(207),
3925--   grant(208) => grant_signal(208),
3926--   grant(209) => grant_signal(209),
3927--   grant(210) => grant_signal(210),
3928--   fifo_full =>fifo_in_full(14),
3929--   priority_rotation =>  priority_rotation_signal(14),
3930--   fifo_empty => fifo_in_empty(14),
3931--   data_out =>crossbar_in_port(14),
3932--   data_out_pulse =>crossbar_in_pulse(14),
3933--   request(196) =>request_signal(196),
3934--   request(197) =>request_signal(197),
3935--   request(198) =>request_signal(198),
3936--   request(199) =>request_signal(199),
3937--   request(200) =>request_signal(200),
3938--   request(201) =>request_signal(201),
3939--   request(202) =>request_signal(202),
3940--   request(203) =>request_signal(203),
3941--   request(204) =>request_signal(204),
3942--   request(205) =>request_signal(205),
3943--   request(206) =>request_signal(206),
3944--   request(207) =>request_signal(207),
3945--   request(208) =>request_signal(208),
3946--   request(209) =>request_signal(209),
3947--   request(210) =>request_signal(210)
3948--);
3949--
3950--PORT15_INPUT_PORT_MODULE: INPUT_PORT_MODULE
3951--GENERIC MAP(number_of_ports =>15)
3952--PORT MAP(
3953--   data_in => Port_in(15),
3954--   data_in_en => data_in_en(15),
3955--   reset => reset,
3956--   clk =>clk,
3957--   grant(211) => grant_signal(211),
3958--   grant(212) => grant_signal(212),
3959--   grant(213) => grant_signal(213),
3960--   grant(214) => grant_signal(214),
3961--   grant(215) => grant_signal(215),
3962--   grant(216) => grant_signal(216),
3963--   grant(217) => grant_signal(217),
3964--   grant(218) => grant_signal(218),
3965--   grant(219) => grant_signal(219),
3966--   grant(220) => grant_signal(220),
3967--   grant(221) => grant_signal(221),
3968--   grant(222) => grant_signal(222),
3969--   grant(223) => grant_signal(223),
3970--   grant(224) => grant_signal(224),
3971--   grant(225) => grant_signal(225),
3972--   fifo_full =>fifo_in_full(15),
3973--   priority_rotation =>  priority_rotation_signal(15),
3974--   fifo_empty => fifo_in_empty(15),
3975--   data_out =>crossbar_in_port(15),
3976--   data_out_pulse =>crossbar_in_pulse(15),
3977--   request(211) =>request_signal(211),
3978--   request(212) =>request_signal(212),
3979--   request(213) =>request_signal(213),
3980--   request(214) =>request_signal(214),
3981--   request(215) =>request_signal(215),
3982--   request(216) =>request_signal(216),
3983--   request(217) =>request_signal(217),
3984--   request(218) =>request_signal(218),
3985--   request(219) =>request_signal(219),
3986--   request(220) =>request_signal(220),
3987--   request(221) =>request_signal(221),
3988--   request(222) =>request_signal(222),
3989--   request(223) =>request_signal(223),
3990--   request(224) =>request_signal(224),
3991--   request(225) =>request_signal(225)
3992--);
3993--
3994--end generate switch15x15;
3995
3996
3997-- switch 16 ports
3998switch16x16 : if number_of_ports = 16 generate
3999switch_16x16 :for i in 1 to number_of_ports generate
4000Constant j : natural:=number_of_ports*(i-1);
4001begin
4002--j<=number_of_ports*(i-1);
4003PORTx16_INPUT_PORT_MODULE: INPUT_PORT_MODULE
4004GENERIC MAP(number_of_ports =>16,port_num=>i)
4005PORT MAP(
4006   data_in => Port_in(i),
4007   data_in_en => data_in_en(i),
4008        cmd_in_en => cmd_in_en(i),
4009   reset => reset,
4010   clk =>clk,
4011   grant(1) => grant_signal(j+1),
4012   grant(2) => grant_signal(j+2),
4013   grant(3) => grant_signal(j+3),
4014   grant(4) => grant_signal(j+4),
4015   grant(5) => grant_signal(j+5),
4016   grant(6) => grant_signal(j+6),
4017   grant(7) => grant_signal(j+7),
4018   grant(8) => grant_signal(j+8),
4019   grant(9) => grant_signal(j+9),
4020   grant(10) => grant_signal(j+10),
4021   grant(11) => grant_signal(j+11),
4022   grant(12) => grant_signal(j+12),
4023   grant(13) => grant_signal(j+13),
4024   grant(14) => grant_signal(j+14),
4025   grant(15) => grant_signal(j+15),
4026   grant(16) => grant_signal(j+16),
4027   fifo_full =>fifo_in_full(i),
4028   priority_rotation => priority_rotation_signal(i),
4029   fifo_empty => fifo_in_empty(i),
4030   data_out =>crossbar_in_port(i),
4031   data_out_pulse =>crossbar_in_pulse(i),
4032   request(1) =>request_signal(j+1),
4033   request(2) =>request_signal(j+2),
4034   request(3) =>request_signal(j+3),
4035   request(4) =>request_signal(j+4),
4036   request(5) =>request_signal(j+5),
4037   request(6) =>request_signal(j+6),
4038   request(7) =>request_signal(j+7),
4039   request(8) =>request_signal(j+8),
4040   request(9) =>request_signal(j+9),
4041   request(10) =>request_signal(j+10),
4042   request(11) =>request_signal(j+11),
4043   request(12) =>request_signal(j+12),
4044   request(13) =>request_signal(j+13),
4045   request(14) =>request_signal(j+14),
4046   request(15) =>request_signal(j+15),
4047   request(16) =>request_signal(j+16)
4048);
4049end generate switch_16x16;
4050end generate switch16x16;
4051--PORT2_INPUT_PORT_MODULE: INPUT_PORT_MODULE
4052--GENERIC MAP(number_of_ports =>16)
4053--PORT MAP(
4054--   data_in => Port_in(2),
4055--   data_in_en => data_in_en(2),
4056--   reset => reset,
4057--   clk =>clk,
4058--   grant(17) => grant_signal(17),
4059--   grant(18) => grant_signal(18),
4060--   grant(19) => grant_signal(19),
4061--   grant(20) => grant_signal(20),
4062--   grant(21) => grant_signal(21),
4063--   grant(22) => grant_signal(22),
4064--   grant(23) => grant_signal(23),
4065--   grant(24) => grant_signal(24),
4066--   grant(25) => grant_signal(25),
4067--   grant(26) => grant_signal(26),
4068--   grant(27) => grant_signal(27),
4069--   grant(28) => grant_signal(28),
4070--   grant(29) => grant_signal(29),
4071--   grant(30) => grant_signal(30),
4072--   grant(31) => grant_signal(31),
4073--   grant(32) => grant_signal(32),
4074--   fifo_full =>fifo_in_full(2),
4075--   priority_rotation =>  priority_rotation_signal(2),
4076--   fifo_empty => fifo_in_empty(2),
4077--   data_out =>crossbar_in_port2,
4078--   data_out_pulse =>crossbar_in_pulse(2,
4079--   request(17) =>request_signal(17),
4080--   request(18) =>request_signal(18),
4081--   request(19) =>request_signal(19),
4082--   request(20) =>request_signal(20),
4083--   request(21) =>request_signal(21),
4084--   request(22) =>request_signal(22),
4085--   request(23) =>request_signal(23),
4086--   request(24) =>request_signal(24),
4087--   request(25) =>request_signal(25),
4088--   request(26) =>request_signal(26),
4089--   request(27) =>request_signal(27),
4090--   request(28) =>request_signal(28),
4091--   request(29) =>request_signal(29),
4092--   request(30) =>request_signal(30),
4093--   request(31) =>request_signal(31),
4094--   request(32) =>request_signal(32)
4095--);
4096--
4097--PORT3_INPUT_PORT_MODULE: INPUT_PORT_MODULE
4098--GENERIC MAP(number_of_ports =>16)
4099--PORT MAP(
4100--   data_in => Port_in(3),
4101--   data_in_en => data_in_en(3),
4102--   reset => reset,
4103--   clk =>clk,
4104--   grant(33) => grant_signal(33),
4105--   grant(34) => grant_signal(34),
4106--   grant(35) => grant_signal(35),
4107--   grant(36) => grant_signal(36),
4108--   grant(37) => grant_signal(37),
4109--   grant(38) => grant_signal(38),
4110--   grant(39) => grant_signal(39),
4111--   grant(40) => grant_signal(40),
4112--   grant(41) => grant_signal(41),
4113--   grant(42) => grant_signal(42),
4114--   grant(43) => grant_signal(43),
4115--   grant(44) => grant_signal(44),
4116--   grant(45) => grant_signal(45),
4117--   grant(46) => grant_signal(46),
4118--   grant(47) => grant_signal(47),
4119--   grant(48) => grant_signal(48),
4120--   fifo_full =>fifo_in_full(3),
4121--   priority_rotation =>  priority_rotation_signal(3),
4122--   fifo_empty => fifo_in_empty(3),
4123--   data_out =>crossbar_in_port3,
4124--   data_out_pulse =>crossbar_in_pulse(3,
4125--   request(33) =>request_signal(33),
4126--   request(34) =>request_signal(34),
4127--   request(35) =>request_signal(35),
4128--   request(36) =>request_signal(36),
4129--   request(37) =>request_signal(37),
4130--   request(38) =>request_signal(38),
4131--   request(39) =>request_signal(39),
4132--   request(40) =>request_signal(40),
4133--   request(41) =>request_signal(41),
4134--   request(42) =>request_signal(42),
4135--   request(43) =>request_signal(43),
4136--   request(44) =>request_signal(44),
4137--   request(45) =>request_signal(45),
4138--   request(46) =>request_signal(46),
4139--   request(47) =>request_signal(47),
4140--   request(48) =>request_signal(48)
4141--);
4142--
4143--PORT4_INPUT_PORT_MODULE: INPUT_PORT_MODULE
4144--GENERIC MAP(number_of_ports =>16)
4145--PORT MAP(
4146--   data_in => Port_in(4),
4147--   data_in_en => data_in_en(4),
4148--   reset => reset,
4149--   clk =>clk,
4150--   grant(49) => grant_signal(49),
4151--   grant(50) => grant_signal(50),
4152--   grant(51) => grant_signal(51),
4153--   grant(52) => grant_signal(52),
4154--   grant(53) => grant_signal(53),
4155--   grant(54) => grant_signal(54),
4156--   grant(55) => grant_signal(55),
4157--   grant(56) => grant_signal(56),
4158--   grant(57) => grant_signal(57),
4159--   grant(58) => grant_signal(58),
4160--   grant(59) => grant_signal(59),
4161--   grant(60) => grant_signal(60),
4162--   grant(61) => grant_signal(61),
4163--   grant(62) => grant_signal(62),
4164--   grant(63) => grant_signal(63),
4165--   grant(64) => grant_signal(64),
4166--   fifo_full =>fifo_in_full(4),
4167--   priority_rotation =>  priority_rotation_signal(4),
4168--   fifo_empty => fifo_in_empty(4),
4169--   data_out =>crossbar_in_port(4),
4170--   data_out_pulse =>crossbar_in_pulse(4,
4171--   request(49) =>request_signal(49),
4172--   request(50) =>request_signal(50),
4173--   request(51) =>request_signal(51),
4174--   request(52) =>request_signal(52),
4175--   request(53) =>request_signal(53),
4176--   request(54) =>request_signal(54),
4177--   request(55) =>request_signal(55),
4178--   request(56) =>request_signal(56),
4179--   request(57) =>request_signal(57),
4180--   request(58) =>request_signal(58),
4181--   request(59) =>request_signal(59),
4182--   request(60) =>request_signal(60),
4183--   request(61) =>request_signal(61),
4184--   request(62) =>request_signal(62),
4185--   request(63) =>request_signal(63),
4186--   request(64) =>request_signal(64)
4187--);
4188--
4189--PORT5_INPUT_PORT_MODULE: INPUT_PORT_MODULE
4190--GENERIC MAP(number_of_ports =>16)
4191--PORT MAP(
4192--   data_in => Port_in(5),
4193--   data_in_en => data_in_en(5),
4194--   reset => reset,
4195--   clk =>clk,
4196--   grant(65) => grant_signal(65),
4197--   grant(66) => grant_signal(66),
4198--   grant(67) => grant_signal(67),
4199--   grant(68) => grant_signal(68),
4200--   grant(69) => grant_signal(69),
4201--   grant(70) => grant_signal(70),
4202--   grant(71) => grant_signal(71),
4203--   grant(72) => grant_signal(72),
4204--   grant(73) => grant_signal(73),
4205--   grant(74) => grant_signal(74),
4206--   grant(75) => grant_signal(75),
4207--   grant(76) => grant_signal(76),
4208--   grant(77) => grant_signal(77),
4209--   grant(78) => grant_signal(78),
4210--   grant(79) => grant_signal(79),
4211--   grant(80) => grant_signal(80),
4212--   fifo_full =>fifo_in_full(5),
4213--   priority_rotation =>  priority_rotation_signal(5),
4214--   fifo_empty => fifo_in_empty(5),
4215--   data_out =>crossbar_in_port(5),
4216--   data_out_pulse =>crossbar_in_pulse(5,
4217--   request(65) =>request_signal(65),
4218--   request(66) =>request_signal(66),
4219--   request(67) =>request_signal(67),
4220--   request(68) =>request_signal(68),
4221--   request(69) =>request_signal(69),
4222--   request(70) =>request_signal(70),
4223--   request(71) =>request_signal(71),
4224--   request(72) =>request_signal(72),
4225--   request(73) =>request_signal(73),
4226--   request(74) =>request_signal(74),
4227--   request(75) =>request_signal(75),
4228--   request(76) =>request_signal(76),
4229--   request(77) =>request_signal(77),
4230--   request(78) =>request_signal(78),
4231--   request(79) =>request_signal(79),
4232--   request(80) =>request_signal(80)
4233--);
4234--
4235--PORT6_INPUT_PORT_MODULE: INPUT_PORT_MODULE
4236--GENERIC MAP(number_of_ports =>16)
4237--PORT MAP(
4238--   data_in => Port_in(6),
4239--   data_in_en => data_in_en(6),
4240--   reset => reset,
4241--   clk =>clk,
4242--   grant(81) => grant_signal(81),
4243--   grant(82) => grant_signal(82),
4244--   grant(83) => grant_signal(83),
4245--   grant(84) => grant_signal(84),
4246--   grant(85) => grant_signal(85),
4247--   grant(86) => grant_signal(86),
4248--   grant(87) => grant_signal(87),
4249--   grant(88) => grant_signal(88),
4250--   grant(89) => grant_signal(89),
4251--   grant(90) => grant_signal(90),
4252--   grant(91) => grant_signal(91),
4253--   grant(92) => grant_signal(92),
4254--   grant(93) => grant_signal(93),
4255--   grant(94) => grant_signal(94),
4256--   grant(95) => grant_signal(95),
4257--   grant(96) => grant_signal(96),
4258--   fifo_full =>fifo_in_full(6),
4259--   priority_rotation =>  priority_rotation_signal(6),
4260--   fifo_empty => fifo_in_empty(6),
4261--   data_out =>crossbar_in_port(6),
4262--   data_out_pulse =>crossbar_in_pulse(6,
4263--   request(81) =>request_signal(81),
4264--   request(82) =>request_signal(82),
4265--   request(83) =>request_signal(83),
4266--   request(84) =>request_signal(84),
4267--   request(85) =>request_signal(85),
4268--   request(86) =>request_signal(86),
4269--   request(87) =>request_signal(87),
4270--   request(88) =>request_signal(88),
4271--   request(89) =>request_signal(89),
4272--   request(90) =>request_signal(90),
4273--   request(91) =>request_signal(91),
4274--   request(92) =>request_signal(92),
4275--   request(93) =>request_signal(93),
4276--   request(94) =>request_signal(94),
4277--   request(95) =>request_signal(95),
4278--   request(96) =>request_signal(96)
4279--);
4280--
4281--PORT7_INPUT_PORT_MODULE: INPUT_PORT_MODULE
4282--GENERIC MAP(number_of_ports =>16)
4283--PORT MAP(
4284--   data_in => Port_in(7),
4285--   data_in_en => data_in_en(7),
4286--   reset => reset,
4287--   clk =>clk,
4288--   grant(97) => grant_signal(97),
4289--   grant(98) => grant_signal(98),
4290--   grant(99) => grant_signal(99),
4291--   grant(0) => grant_signal(100),
4292--   grant(1) => grant_signal(101),
4293--   grant(2) => grant_signal(102),
4294--   grant(3) => grant_signal(103),
4295--   grant(4) => grant_signal(104),
4296--   grant(5) => grant_signal(105),
4297--   grant(6) => grant_signal(106),
4298--   grant(7) => grant_signal(107),
4299--   grant(8) => grant_signal(108),
4300--   grant(9) => grant_signal(109),
4301--   grant(110) => grant_signal(110),
4302--   grant(111) => grant_signal(111),
4303--   grant(112) => grant_signal(112),
4304--   fifo_full =>fifo_in_full(7),
4305--   priority_rotation =>  priority_rotation_signal(7),
4306--   fifo_empty => fifo_in_empty(7),
4307--   data_out =>crossbar_in_port(8),
4308--   data_out_pulse =>crossbar_in_pulse(7,
4309--   request(97) =>request_signal(97),
4310--   request(98) =>request_signal(98),
4311--   request(99) =>request_signal(99),
4312--   request(100) =>request_signal(100),
4313--   request(101) =>request_signal(101),
4314--   request(102) =>request_signal(102),
4315--   request(103) =>request_signal(103),
4316--   request(104) =>request_signal(104),
4317--   request(105) =>request_signal(105),
4318--   request(106) =>request_signal(106),
4319--   request(107) =>request_signal(107),
4320--   request(108) =>request_signal(108),
4321--   request(109) =>request_signal(109),
4322--   request(110) =>request_signal(110),
4323--   request(111) =>request_signal(111),
4324--   request(112) =>request_signal(112)
4325--);
4326--
4327--PORT8_INPUT_PORT_MODULE: INPUT_PORT_MODULE
4328--GENERIC MAP(number_of_ports =>16)
4329--PORT MAP(
4330--   data_in => Port_in(8),
4331--   data_in_en => data_in_en(8),
4332--   reset => reset,
4333--   clk =>clk,
4334--   grant(113) => grant_signal(113),
4335--   grant(114) => grant_signal(114),
4336--   grant(115) => grant_signal(115),
4337--   grant(116) => grant_signal(116),
4338--   grant(117) => grant_signal(117),
4339--   grant(118) => grant_signal(118),
4340--   grant(119) => grant_signal(119),
4341--   grant(120) => grant_signal(120),
4342--   grant(121) => grant_signal(121),
4343--   grant(122) => grant_signal(122),
4344--   grant(123) => grant_signal(123),
4345--   grant(124) => grant_signal(124),
4346--   grant(125) => grant_signal(125),
4347--   grant(126) => grant_signal(126),
4348--   grant(127) => grant_signal(127),
4349--   grant(128) => grant_signal(128),
4350--   fifo_full =>fifo_in_full(8),
4351--   priority_rotation =>  priority_rotation_signal(8),
4352--   fifo_empty => fifo_in_empty(8),
4353--   data_out =>crossbar_in_port8,
4354--   data_out_pulse =>crossbar_in_pulse(8,
4355--   request(113) =>request_signal(113),
4356--   request(114) =>request_signal(114),
4357--   request(115) =>request_signal(115),
4358--   request(116) =>request_signal(116),
4359--   request(117) =>request_signal(117),
4360--   request(118) =>request_signal(118),
4361--   request(119) =>request_signal(119),
4362--   request(120) =>request_signal(120),
4363--   request(121) =>request_signal(121),
4364--   request(122) =>request_signal(122),
4365--   request(123) =>request_signal(123),
4366--   request(124) =>request_signal(124),
4367--   request(125) =>request_signal(125),
4368--   request(126) =>request_signal(126),
4369--   request(127) =>request_signal(127),
4370--   request(128) =>request_signal(128)
4371--);
4372--
4373--PORT9_INPUT_PORT_MODULE: INPUT_PORT_MODULE
4374--GENERIC MAP(number_of_ports =>16)
4375--PORT MAP(
4376--   data_in => Port_in(9),
4377--   data_in_en => data_in_en(9),
4378--   reset => reset,
4379--   clk =>clk,
4380--   grant(129) => grant_signal(129),
4381--   grant(130) => grant_signal(130),
4382--   grant(131) => grant_signal(131),
4383--   grant(132) => grant_signal(132),
4384--   grant(133) => grant_signal(133),
4385--   grant(134) => grant_signal(134),
4386--   grant(135) => grant_signal(135),
4387--   grant(136) => grant_signal(136),
4388--   grant(137) => grant_signal(137),
4389--   grant(138) => grant_signal(138),
4390--   grant(139) => grant_signal(139),
4391--   grant(140) => grant_signal(140),
4392--   grant(141) => grant_signal(141),
4393--   grant(142) => grant_signal(142),
4394--   grant(143) => grant_signal(143),
4395--   grant(144) => grant_signal(144),
4396--   fifo_full =>fifo_in_full(9),
4397--   priority_rotation =>  priority_rotation_signal(9),
4398--   fifo_empty => fifo_in_empty(9),
4399--   data_out =>crossbar_in_port9,
4400--   data_out_pulse =>crossbar_in_pulse(9),
4401--   request(129) =>request_signal(129),
4402--   request(130) =>request_signal(130),
4403--   request(131) =>request_signal(131),
4404--   request(132) =>request_signal(132),
4405--   request(133) =>request_signal(133),
4406--   request(134) =>request_signal(134),
4407--   request(135) =>request_signal(135),
4408--   request(136) =>request_signal(136),
4409--   request(137) =>request_signal(137),
4410--   request(138) =>request_signal(138),
4411--   request(139) =>request_signal(139),
4412--   request(140) =>request_signal(140),
4413--   request(141) =>request_signal(141),
4414--   request(142) =>request_signal(142),
4415--   request(143) =>request_signal(143),
4416--   request(144) =>request_signal(144)
4417--);
4418--
4419--PORT10_INPUT_PORT_MODULE: INPUT_PORT_MODULE
4420--GENERIC MAP(number_of_ports =>16)
4421--PORT MAP(
4422--   data_in => Port_in(10),
4423--   data_in_en => data_in_en(10),
4424--   reset => reset,
4425--   clk =>clk,
4426--   grant(145) => grant_signal(145),
4427--   grant(146) => grant_signal(146),
4428--   grant(147) => grant_signal(147),
4429--   grant(148) => grant_signal(148),
4430--   grant(149) => grant_signal(149),
4431--   grant(150) => grant_signal(150),
4432--   grant(151) => grant_signal(151),
4433--   grant(152) => grant_signal(152),
4434--   grant(153) => grant_signal(153),
4435--   grant(154) => grant_signal(154),
4436--   grant(155) => grant_signal(155),
4437--   grant(156) => grant_signal(156),
4438--   grant(157) => grant_signal(157),
4439--   grant(158) => grant_signal(158),
4440--   grant(159) => grant_signal(159),
4441--   grant(160) => grant_signal(160),
4442--   fifo_full =>fifo_in_full(10),
4443--   priority_rotation =>  priority_rotation_signal(10),
4444--   fifo_empty => fifo_in_empty(10),
4445--   data_out =>crossbar_in_port(10),
4446--   data_out_pulse =>crossbar_in_pulse(10),
4447--   request(145) =>request_signal(145),
4448--   request(146) =>request_signal(146),
4449--   request(147) =>request_signal(147),
4450--   request(148) =>request_signal(148),
4451--   request(149) =>request_signal(149),
4452--   request(150) =>request_signal(150),
4453--   request(151) =>request_signal(151),
4454--   request(152) =>request_signal(152),
4455--   request(153) =>request_signal(153),
4456--   request(154) =>request_signal(154),
4457--   request(155) =>request_signal(155),
4458--   request(156) =>request_signal(156),
4459--   request(157) =>request_signal(157),
4460--   request(158) =>request_signal(158),
4461--   request(159) =>request_signal(159),
4462--   request(160) =>request_signal(160)
4463--);
4464--
4465--PORT11_INPUT_PORT_MODULE: INPUT_PORT_MODULE
4466--GENERIC MAP(number_of_ports =>16)
4467--PORT MAP(
4468--   data_in => Port_in(11),
4469--   data_in_en => data_in_en(11),
4470--   reset => reset,
4471--   clk =>clk,
4472--   grant(161) => grant_signal(161),
4473--   grant(162) => grant_signal(162),
4474--   grant(163) => grant_signal(163),
4475--   grant(164) => grant_signal(164),
4476--   grant(165) => grant_signal(165),
4477--   grant(166) => grant_signal(166),
4478--   grant(167) => grant_signal(167),
4479--   grant(168) => grant_signal(168),
4480--   grant(169) => grant_signal(169),
4481--   grant(170) => grant_signal(170),
4482--   grant(171) => grant_signal(171),
4483--   grant(172) => grant_signal(172),
4484--   grant(173) => grant_signal(173),
4485--   grant(174) => grant_signal(174),
4486--   grant(175) => grant_signal(175),
4487--   grant(176) => grant_signal(176),
4488--   fifo_full =>fifo_in_full(11),
4489--   priority_rotation =>  priority_rotation_signal(11),
4490--   fifo_empty => fifo_in_empty(11),
4491--   data_out =>crossbar_in_port(11),
4492--   data_out_pulse =>crossbar_in_pulse(11),
4493--   request(161) =>request_signal(161),
4494--   request(162) =>request_signal(162),
4495--   request(163) =>request_signal(163),
4496--   request(164) =>request_signal(164),
4497--   request(165) =>request_signal(165),
4498--   request(166) =>request_signal(166),
4499--   request(167) =>request_signal(167),
4500--   request(168) =>request_signal(168),
4501--   request(169) =>request_signal(169),
4502--   request(170) =>request_signal(170),
4503--   request(171) =>request_signal(171),
4504--   request(172) =>request_signal(172),
4505--   request(173) =>request_signal(173),
4506--   request(174) =>request_signal(174),
4507--   request(175) =>request_signal(175),
4508--   request(176) =>request_signal(176)
4509--);
4510--
4511--PORT12_INPUT_PORT_MODULE: INPUT_PORT_MODULE
4512--GENERIC MAP(number_of_ports =>16)
4513--PORT MAP(
4514--   data_in => Port_in(12),
4515--   data_in_en => data_in_en(12),
4516--   reset => reset,
4517--   clk =>clk,
4518--   grant(177) => grant_signal(177),
4519--   grant(178) => grant_signal(178),
4520--   grant(179) => grant_signal(179),
4521--   grant(180) => grant_signal(180),
4522--   grant(181) => grant_signal(181),
4523--   grant(182) => grant_signal(182),
4524--   grant(183) => grant_signal(183),
4525--   grant(184) => grant_signal(184),
4526--   grant(185) => grant_signal(185),
4527--   grant(186) => grant_signal(186),
4528--   grant(187) => grant_signal(187),
4529--   grant(188) => grant_signal(188),
4530--   grant(189) => grant_signal(189),
4531--   grant(190) => grant_signal(190),
4532--   grant(191) => grant_signal(191),
4533--   grant(192) => grant_signal(192),
4534--   fifo_full =>fifo_in_full(12),
4535--   priority_rotation =>  priority_rotation_signal(12),
4536--   fifo_empty => fifo_in_empty(12),
4537--   data_out =>crossbar_in_port(12),
4538--   data_out_pulse =>crossbar_in_pulse(12),
4539--   request(177) =>request_signal(177),
4540--   request(178) =>request_signal(178),
4541--   request(179) =>request_signal(179),
4542--   request(180) =>request_signal(180),
4543--   request(181) =>request_signal(181),
4544--   request(182) =>request_signal(182),
4545--   request(183) =>request_signal(183),
4546--   request(184) =>request_signal(184),
4547--   request(185) =>request_signal(185),
4548--   request(186) =>request_signal(186),
4549--   request(187) =>request_signal(187),
4550--   request(188) =>request_signal(188),
4551--   request(189) =>request_signal(189),
4552--   request(190) =>request_signal(190),
4553--   request(191) =>request_signal(191),
4554--   request(192) =>request_signal(192)
4555--);
4556--
4557--PORT13_INPUT_PORT_MODULE: INPUT_PORT_MODULE
4558--GENERIC MAP(number_of_ports =>16)
4559--PORT MAP(
4560--   data_in => Port_in(13),
4561--   data_in_en => data_in_en(13),
4562--   reset => reset,
4563--   clk =>clk,
4564--   grant(193) => grant_signal(193),
4565--   grant(194) => grant_signal(194),
4566--   grant(195) => grant_signal(195),
4567--   grant(196) => grant_signal(196),
4568--   grant(197) => grant_signal(197),
4569--   grant(198) => grant_signal(198),
4570--   grant(199) => grant_signal(199),
4571--   grant(200) => grant_signal(200),
4572--   grant(201) => grant_signal(201),
4573--   grant(202) => grant_signal(202),
4574--   grant(203) => grant_signal(203),
4575--   grant(204) => grant_signal(204),
4576--   grant(205) => grant_signal(205),
4577--   grant(206) => grant_signal(206),
4578--   grant(207) => grant_signal(207),
4579--   grant(208) => grant_signal(208),
4580--   fifo_full =>fifo_in_full(13),
4581--   priority_rotation =>  priority_rotation_signal(13),
4582--   fifo_empty => fifo_in_empty(13),
4583--   data_out =>crossbar_in_port13,
4584--   data_out_pulse =>crossbar_in_pulse(13,
4585--   request(193) =>request_signal(193),
4586--   request(194) =>request_signal(194),
4587--   request(195) =>request_signal(195),
4588--   request(196) =>request_signal(196),
4589--   request(197) =>request_signal(197),
4590--   request(198) =>request_signal(198),
4591--   request(199) =>request_signal(199),
4592--   request(200) =>request_signal(200),
4593--   request(201) =>request_signal(201),
4594--   request(202) =>request_signal(202),
4595--   request(203) =>request_signal(203),
4596--   request(204) =>request_signal(204),
4597--   request(205) =>request_signal(205),
4598--   request(206) =>request_signal(206),
4599--   request(207) =>request_signal(207),
4600--   request(208) =>request_signal(208)
4601--);
4602--
4603--PORT14_INPUT_PORT_MODULE: INPUT_PORT_MODULE
4604--GENERIC MAP(number_of_ports =>16)
4605--PORT MAP(
4606--   data_in => Port_in(14),
4607--   data_in_en => data_in_en(14),
4608--   reset => reset,
4609--   clk =>clk,
4610--   grant(209) => grant_signal(209),
4611--   grant(210) => grant_signal(210),
4612--   grant(211) => grant_signal(211),
4613--   grant(212) => grant_signal(212),
4614--   grant(213) => grant_signal(213),
4615--   grant(214) => grant_signal(214),
4616--   grant(215) => grant_signal(215),
4617--   grant(216) => grant_signal(216),
4618--   grant(217) => grant_signal(217),
4619--   grant(218) => grant_signal(218),
4620--   grant(219) => grant_signal(219),
4621--   grant(220) => grant_signal(220),
4622--   grant(221) => grant_signal(221),
4623--   grant(222) => grant_signal(222),
4624--   grant(223) => grant_signal(223),
4625--   grant(224) => grant_signal(224),
4626--   fifo_full =>fifo_in_full(14),
4627--   priority_rotation =>  priority_rotation_signal(14),
4628--   fifo_empty => fifo_in_empty(14),
4629--   data_out =>crossbar_in_port(14),
4630--   data_out_pulse =>crossbar_in_pulse(14),
4631--   request(209) =>request_signal(209),
4632--   request(210) =>request_signal(210),
4633--   request(211) =>request_signal(211),
4634--   request(212) =>request_signal(212),
4635--   request(213) =>request_signal(213),
4636--   request(214) =>request_signal(214),
4637--   request(215) =>request_signal(215),
4638--   request(216) =>request_signal(216),
4639--   request(217) =>request_signal(217),
4640--   request(218) =>request_signal(218),
4641--   request(219) =>request_signal(219),
4642--   request(220) =>request_signal(220),
4643--   request(221) =>request_signal(221),
4644--   request(222) =>request_signal(222),
4645--   request(223) =>request_signal(223),
4646--   request(224) =>request_signal(224)
4647--);
4648--
4649--PORT15_INPUT_PORT_MODULE: INPUT_PORT_MODULE
4650--GENERIC MAP(number_of_ports =>16)
4651--PORT MAP(
4652--   data_in => Port_in(15),
4653--   data_in_en => data_in_en(15),
4654--   reset => reset,
4655--   clk =>clk,
4656--   grant(225) => grant_signal(225),
4657--   grant(226) => grant_signal(226),
4658--   grant(227) => grant_signal(227),
4659--   grant(228) => grant_signal(228),
4660--   grant(229) => grant_signal(229),
4661--   grant(230) => grant_signal(230),
4662--   grant(231) => grant_signal(231),
4663--   grant(232) => grant_signal(232),
4664--   grant(233) => grant_signal(233),
4665--   grant(234) => grant_signal(234),
4666--   grant(235) => grant_signal(235),
4667--   grant(236) => grant_signal(236),
4668--   grant(237) => grant_signal(237),
4669--   grant(238) => grant_signal(238),
4670--   grant(239) => grant_signal(239),
4671--   grant(240) => grant_signal(240),
4672--   fifo_full =>fifo_in_full(15),
4673--   priority_rotation =>  priority_rotation_signal(15),
4674--   fifo_empty => fifo_in_empty(15),
4675--   data_out =>crossbar_in_port(15),
4676--   data_out_pulse =>crossbar_in_pulse(15),
4677--   request(225) =>request_signal(225),
4678--   request(226) =>request_signal(226),
4679--   request(227) =>request_signal(227),
4680--   request(228) =>request_signal(228),
4681--   request(229) =>request_signal(229),
4682--   request(230) =>request_signal(230),
4683--   request(231) =>request_signal(231),
4684--   request(232) =>request_signal(232),
4685--   request(233) =>request_signal(233),
4686--   request(234) =>request_signal(234),
4687--   request(235) =>request_signal(235),
4688--   request(236) =>request_signal(236),
4689--   request(237) =>request_signal(237),
4690--   request(238) =>request_signal(238),
4691--   request(239) =>request_signal(239),
4692--   request(240) =>request_signal(240)
4693--);
4694--
4695--PORT16_INPUT_PORT_MODULE: INPUT_PORT_MODULE
4696--GENERIC MAP(number_of_ports =>16)
4697--PORT MAP(
4698--   data_in => Port_in(16),
4699--   data_in_en => data_in_en(16),
4700--   reset => reset,
4701--   clk =>clk,
4702--   grant(241) => grant_signal(241),
4703--   grant(242) => grant_signal(242),
4704--   grant(243) => grant_signal(243),
4705--   grant(244) => grant_signal(244),
4706--   grant(245) => grant_signal(245),
4707--   grant(246) => grant_signal(246),
4708--   grant(247) => grant_signal(247),
4709--   grant(248) => grant_signal(248),
4710--   grant(249) => grant_signal(249),
4711--   grant(250) => grant_signal(250),
4712--   grant(251) => grant_signal(251),
4713--   grant(252) => grant_signal(252),
4714--   grant(253) => grant_signal(253),
4715--   grant(254) => grant_signal(254),
4716--   grant(255) => grant_signal(255),
4717--   grant(256) => grant_signal(256),
4718--   fifo_full =>fifo_in_full(16),
4719--   priority_rotation =>  priority_rotation_signal(16),
4720--   fifo_empty => fifo_in_empty(16),
4721--   data_out =>crossbar_in_port(16),
4722--   data_out_pulse =>crossbar_in_pulse(16),
4723--   request(241) =>request_signal(241),
4724--   request(242) =>request_signal(242),
4725--   request(243) =>request_signal(243),
4726--   request(244) =>request_signal(244),
4727--   request(245) =>request_signal(245),
4728--   request(246) =>request_signal(246),
4729--   request(247) =>request_signal(247),
4730--   request(248) =>request_signal(248),
4731--   request(249) =>request_signal(249),
4732--   request(250) =>request_signal(250),
4733--   request(251) =>request_signal(251),
4734--   request(252) =>request_signal(252),
4735--   request(253) =>request_signal(253),
4736--   request(254) =>request_signal(254),
4737--   request(255) =>request_signal(255),
4738--   request(256) =>request_signal(256)
4739--);
4740--
4741--end generate switch16x16;
4742-- intstanciation et connexion des modules des ports de sorties fonction du nombre de ports
4743-- le circuit genere depend du parametre generique nombre de ports
4744-- switch 2 ports
4745port_out_switch2x2 : if number_of_ports = 2 generate
4746
4747PORT1_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
4748   PORT MAP(
4749     data_in => crossbar_out_port(1),
4750     reset => reset,
4751     clk => clk,
4752     wr_en =>crossbar_out_pulse(1),
4753     data_out =>Port_out(1),
4754     fifo_full =>fifo_out_full_signal(1),
4755     data_avalaible => data_available(1),
4756     rd_out_en => data_out_en(1)
4757    );
4758
4759PORT2_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
4760   PORT MAP(
4761     data_in => crossbar_out_port(2),
4762     reset => reset,
4763     clk => clk,
4764     wr_en =>crossbar_out_pulse(2),
4765     data_out =>Port_out(2),
4766     fifo_full =>fifo_out_full_signal(2),
4767     data_avalaible => data_available(2),
4768     rd_out_en => data_out_en(2)
4769    );
4770
4771end generate port_out_switch2x2;
4772
4773
4774-- switch 3 ports
4775port_out_switch3x3 : if number_of_ports = 3 generate
4776
4777PORT1_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
4778   PORT MAP(
4779     data_in => crossbar_out_port(1),
4780     reset => reset,
4781     clk => clk,
4782     wr_en =>crossbar_out_pulse(1),
4783     data_out =>Port_out(1),
4784     fifo_full =>fifo_out_full_signal(1),
4785     data_avalaible => data_available(1),
4786     rd_out_en => data_out_en(1)
4787    );
4788
4789PORT2_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
4790   PORT MAP(
4791     data_in => crossbar_out_port(2),
4792     reset => reset,
4793     clk => clk,
4794     wr_en =>crossbar_out_pulse(2),
4795     data_out =>Port_out(2),
4796     fifo_full =>fifo_out_full_signal(2),
4797     data_avalaible => data_available(2),
4798     rd_out_en => data_out_en(2)
4799    );
4800
4801PORT3_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
4802   PORT MAP(
4803     data_in => crossbar_out_port(3),
4804     reset => reset,
4805     clk => clk,
4806     wr_en =>crossbar_out_pulse(3),
4807     data_out =>Port_out(3),
4808     fifo_full =>fifo_out_full_signal(3),
4809     data_avalaible => data_available(3),
4810     rd_out_en => data_out_en(3)
4811    );
4812
4813end generate port_out_switch3x3;
4814
4815
4816-- switch 4 ports
4817port_out_switch4x4 : if number_of_ports = 4 generate
4818
4819PORT1_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
4820   PORT MAP(
4821     data_in => crossbar_out_port(1),
4822     reset => reset,
4823     clk => clk,
4824     wr_en =>crossbar_out_pulse(1),
4825     data_out =>Port_out(1),
4826     fifo_full =>fifo_out_full_signal(1),
4827     data_avalaible => data_available(1),
4828     rd_out_en => data_out_en(1)
4829    );
4830
4831PORT2_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
4832   PORT MAP(
4833     data_in => crossbar_out_port(2),
4834     reset => reset,
4835     clk => clk,
4836     wr_en =>crossbar_out_pulse(2),
4837     data_out =>Port_out(2),
4838     fifo_full =>fifo_out_full_signal(2),
4839     data_avalaible => data_available(2),
4840     rd_out_en => data_out_en(2)
4841    );
4842
4843PORT3_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
4844   PORT MAP(
4845     data_in => crossbar_out_port(3),
4846     reset => reset,
4847     clk => clk,
4848     wr_en =>crossbar_out_pulse(3),
4849     data_out =>Port_out(3),
4850     fifo_full =>fifo_out_full_signal(3),
4851     data_avalaible => data_available(3),
4852     rd_out_en => data_out_en(3)
4853    );
4854
4855PORT4_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
4856   PORT MAP(
4857     data_in => crossbar_out_port(4),
4858     reset => reset,
4859     clk => clk,
4860     wr_en =>crossbar_out_pulse(4),
4861     data_out =>Port_out(4),
4862     fifo_full =>fifo_out_full_signal(4),
4863     data_avalaible => data_available(4),
4864     rd_out_en => data_out_en(4)
4865    );
4866
4867end generate port_out_switch4x4;
4868
4869
4870-- switch 5 ports
4871port_out_switch5x5 : if number_of_ports = 5 generate
4872
4873PORT1_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
4874   PORT MAP(
4875     data_in => crossbar_out_port(1),
4876     reset => reset,
4877     clk => clk,
4878     wr_en =>crossbar_out_pulse(1),
4879     data_out =>Port_out(1),
4880     fifo_full =>fifo_out_full_signal(1),
4881     data_avalaible => data_available(1),
4882     rd_out_en => data_out_en(1)
4883    );
4884
4885PORT2_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
4886   PORT MAP(
4887     data_in => crossbar_out_port(2),
4888     reset => reset,
4889     clk => clk,
4890     wr_en =>crossbar_out_pulse(2),
4891     data_out =>Port_out(2),
4892     fifo_full =>fifo_out_full_signal(2),
4893     data_avalaible => data_available(2),
4894     rd_out_en => data_out_en(2)
4895    );
4896
4897PORT3_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
4898   PORT MAP(
4899     data_in => crossbar_out_port(3),
4900     reset => reset,
4901     clk => clk,
4902     wr_en =>crossbar_out_pulse(3),
4903     data_out =>Port_out(3),
4904     fifo_full =>fifo_out_full_signal(3),
4905     data_avalaible => data_available(3),
4906     rd_out_en => data_out_en(3)
4907    );
4908
4909PORT4_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
4910   PORT MAP(
4911     data_in => crossbar_out_port(4),
4912     reset => reset,
4913     clk => clk,
4914     wr_en =>crossbar_out_pulse(4),
4915     data_out =>Port_out(4),
4916     fifo_full =>fifo_out_full_signal(4),
4917     data_avalaible => data_available(4),
4918     rd_out_en => data_out_en(4)
4919    );
4920
4921PORT5_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
4922   PORT MAP(
4923     data_in => crossbar_out_port(5),
4924     reset => reset,
4925     clk => clk,
4926     wr_en =>crossbar_out_pulse(5),
4927     data_out =>Port_out(5),
4928     fifo_full =>fifo_out_full_signal(5),
4929     data_avalaible => data_available(5),
4930     rd_out_en => data_out_en(5)
4931    );
4932
4933end generate port_out_switch5x5;
4934
4935
4936-- switch 6 ports
4937port_out_switch6x6 : if number_of_ports = 6 generate
4938
4939PORT1_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
4940   PORT MAP(
4941     data_in => crossbar_out_port(1),
4942     reset => reset,
4943     clk => clk,
4944     wr_en =>crossbar_out_pulse(1),
4945     data_out =>Port_out(1),
4946     fifo_full =>fifo_out_full_signal(1),
4947     data_avalaible => data_available(1),
4948     rd_out_en => data_out_en(1)
4949    );
4950
4951PORT2_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
4952   PORT MAP(
4953     data_in => crossbar_out_port(2),
4954     reset => reset,
4955     clk => clk,
4956     wr_en =>crossbar_out_pulse(2),
4957     data_out =>Port_out(2),
4958     fifo_full =>fifo_out_full_signal(2),
4959     data_avalaible => data_available(2),
4960     rd_out_en => data_out_en(2)
4961    );
4962
4963PORT3_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
4964   PORT MAP(
4965     data_in => crossbar_out_port(3),
4966     reset => reset,
4967     clk => clk,
4968     wr_en =>crossbar_out_pulse(3),
4969     data_out =>Port_out(3),
4970     fifo_full =>fifo_out_full_signal(3),
4971     data_avalaible => data_available(3),
4972     rd_out_en => data_out_en(3)
4973    );
4974
4975PORT4_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
4976   PORT MAP(
4977     data_in => crossbar_out_port(4),
4978     reset => reset,
4979     clk => clk,
4980     wr_en =>crossbar_out_pulse(4),
4981     data_out =>Port_out(4),
4982     fifo_full =>fifo_out_full_signal(4),
4983     data_avalaible => data_available(4),
4984     rd_out_en => data_out_en(4)
4985    );
4986
4987PORT5_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
4988   PORT MAP(
4989     data_in => crossbar_out_port(5),
4990     reset => reset,
4991     clk => clk,
4992     wr_en =>crossbar_out_pulse(5),
4993     data_out =>Port_out(5),
4994     fifo_full =>fifo_out_full_signal(5),
4995     data_avalaible => data_available(5),
4996     rd_out_en => data_out_en(5)
4997    );
4998
4999PORT6_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5000   PORT MAP(
5001     data_in => crossbar_out_port(6),
5002     reset => reset,
5003     clk => clk,
5004     wr_en =>crossbar_out_pulse(6),
5005     data_out =>Port_out(6),
5006     fifo_full =>fifo_out_full_signal(6),
5007     data_avalaible => data_available(6),
5008     rd_out_en => data_out_en(6)
5009    );
5010
5011end generate port_out_switch6x6;
5012
5013
5014-- switch 7 ports
5015port_out_switch7x7 : if number_of_ports = 7 generate
5016
5017PORT1_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5018   PORT MAP(
5019     data_in => crossbar_out_port(1),
5020     reset => reset,
5021     clk => clk,
5022     wr_en =>crossbar_out_pulse(1),
5023     data_out =>Port_out(1),
5024     fifo_full =>fifo_out_full_signal(1),
5025     data_avalaible => data_available(1),
5026     rd_out_en => data_out_en(1)
5027    );
5028
5029PORT2_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5030   PORT MAP(
5031     data_in => crossbar_out_port(2),
5032     reset => reset,
5033     clk => clk,
5034     wr_en =>crossbar_out_pulse(2),
5035     data_out =>Port_out(2),
5036     fifo_full =>fifo_out_full_signal(2),
5037     data_avalaible => data_available(2),
5038     rd_out_en => data_out_en(2)
5039    );
5040
5041PORT3_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5042   PORT MAP(
5043     data_in => crossbar_out_port(3),
5044     reset => reset,
5045     clk => clk,
5046     wr_en =>crossbar_out_pulse(3),
5047     data_out =>Port_out(3),
5048     fifo_full =>fifo_out_full_signal(3),
5049     data_avalaible => data_available(3),
5050     rd_out_en => data_out_en(3)
5051    );
5052
5053PORT4_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5054   PORT MAP(
5055     data_in => crossbar_out_port(4),
5056     reset => reset,
5057     clk => clk,
5058     wr_en =>crossbar_out_pulse(4),
5059     data_out =>Port_out(4),
5060     fifo_full =>fifo_out_full_signal(4),
5061     data_avalaible => data_available(4),
5062     rd_out_en => data_out_en(4)
5063    );
5064
5065PORT5_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5066   PORT MAP(
5067     data_in => crossbar_out_port(5),
5068     reset => reset,
5069     clk => clk,
5070     wr_en =>crossbar_out_pulse(5),
5071     data_out =>Port_out(5),
5072     fifo_full =>fifo_out_full_signal(5),
5073     data_avalaible => data_available(5),
5074     rd_out_en => data_out_en(5)
5075    );
5076
5077PORT6_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5078   PORT MAP(
5079     data_in => crossbar_out_port(6),
5080     reset => reset,
5081     clk => clk,
5082     wr_en =>crossbar_out_pulse(6),
5083     data_out =>Port_out(6),
5084     fifo_full =>fifo_out_full_signal(6),
5085     data_avalaible => data_available(6),
5086     rd_out_en => data_out_en(6)
5087    );
5088
5089PORT7_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5090   PORT MAP(
5091     data_in => crossbar_out_port(7),
5092     reset => reset,
5093     clk => clk,
5094     wr_en =>crossbar_out_pulse(7),
5095     data_out =>Port_out(7),
5096     fifo_full =>fifo_out_full_signal(7),
5097     data_avalaible => data_available(7),
5098     rd_out_en => data_out_en(7)
5099    );
5100
5101end generate port_out_switch7x7;
5102
5103
5104-- switch 8 ports
5105port_out_switch8x8 : if number_of_ports = 8 generate
5106
5107PORT1_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5108   PORT MAP(
5109     data_in => crossbar_out_port(1),
5110     reset => reset,
5111     clk => clk,
5112     wr_en =>crossbar_out_pulse(1),
5113     data_out =>Port_out(1),
5114     fifo_full =>fifo_out_full_signal(1),
5115     data_avalaible => data_available(1),
5116     rd_out_en => data_out_en(1)
5117    );
5118
5119PORT2_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5120   PORT MAP(
5121     data_in => crossbar_out_port(2),
5122     reset => reset,
5123     clk => clk,
5124     wr_en =>crossbar_out_pulse(2),
5125     data_out =>Port_out(2),
5126     fifo_full =>fifo_out_full_signal(2),
5127     data_avalaible => data_available(2),
5128     rd_out_en => data_out_en(2)
5129    );
5130
5131PORT3_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5132   PORT MAP(
5133     data_in => crossbar_out_port(3),
5134     reset => reset,
5135     clk => clk,
5136     wr_en =>crossbar_out_pulse(3),
5137     data_out =>Port_out(3),
5138     fifo_full =>fifo_out_full_signal(3),
5139     data_avalaible => data_available(3),
5140     rd_out_en => data_out_en(3)
5141    );
5142
5143PORT4_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5144   PORT MAP(
5145     data_in => crossbar_out_port(4),
5146     reset => reset,
5147     clk => clk,
5148     wr_en =>crossbar_out_pulse(4),
5149     data_out =>Port_out(4),
5150     fifo_full =>fifo_out_full_signal(4),
5151     data_avalaible => data_available(4),
5152     rd_out_en => data_out_en(4)
5153    );
5154
5155PORT5_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5156   PORT MAP(
5157     data_in => crossbar_out_port(5),
5158     reset => reset,
5159     clk => clk,
5160     wr_en =>crossbar_out_pulse(5),
5161     data_out =>Port_out(5),
5162     fifo_full =>fifo_out_full_signal(5),
5163     data_avalaible => data_available(5),
5164     rd_out_en => data_out_en(5)
5165    );
5166
5167PORT6_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5168   PORT MAP(
5169     data_in => crossbar_out_port(6),
5170     reset => reset,
5171     clk => clk,
5172     wr_en =>crossbar_out_pulse(6),
5173     data_out =>Port_out(6),
5174     fifo_full =>fifo_out_full_signal(6),
5175     data_avalaible => data_available(6),
5176     rd_out_en => data_out_en(6)
5177    );
5178
5179PORT7_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5180   PORT MAP(
5181     data_in => crossbar_out_port(7),
5182     reset => reset,
5183     clk => clk,
5184     wr_en =>crossbar_out_pulse(7),
5185     data_out =>Port_out(7),
5186     fifo_full =>fifo_out_full_signal(7),
5187     data_avalaible => data_available(7),
5188     rd_out_en => data_out_en(7)
5189    );
5190
5191PORT8_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5192   PORT MAP(
5193     data_in => crossbar_out_port(8),
5194     reset => reset,
5195     clk => clk,
5196     wr_en =>crossbar_out_pulse(8),
5197     data_out =>Port_out(8),
5198     fifo_full =>fifo_out_full_signal(8),
5199     data_avalaible => data_available(8),
5200     rd_out_en => data_out_en(8)
5201    );
5202
5203end generate port_out_switch8x8;
5204
5205
5206-- switch 9 ports
5207port_out_switch9x9 : if number_of_ports = 9 generate
5208
5209PORT1_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5210   PORT MAP(
5211     data_in => crossbar_out_port(1),
5212     reset => reset,
5213     clk => clk,
5214     wr_en =>crossbar_out_pulse(1),
5215     data_out =>Port_out(1),
5216     fifo_full =>fifo_out_full_signal(1),
5217     data_avalaible => data_available(1),
5218     rd_out_en => data_out_en(1)
5219    );
5220
5221PORT2_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5222   PORT MAP(
5223     data_in => crossbar_out_port(2),
5224     reset => reset,
5225     clk => clk,
5226     wr_en =>crossbar_out_pulse(2),
5227     data_out =>Port_out(2),
5228     fifo_full =>fifo_out_full_signal(2),
5229     data_avalaible => data_available(2),
5230     rd_out_en => data_out_en(2)
5231    );
5232
5233PORT3_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5234   PORT MAP(
5235     data_in => crossbar_out_port(3),
5236     reset => reset,
5237     clk => clk,
5238     wr_en =>crossbar_out_pulse(3),
5239     data_out =>Port_out(3),
5240     fifo_full =>fifo_out_full_signal(3),
5241     data_avalaible => data_available(3),
5242     rd_out_en => data_out_en(3)
5243    );
5244
5245PORT4_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5246   PORT MAP(
5247     data_in => crossbar_out_port(4),
5248     reset => reset,
5249     clk => clk,
5250     wr_en =>crossbar_out_pulse(4),
5251     data_out =>Port_out(4),
5252     fifo_full =>fifo_out_full_signal(4),
5253     data_avalaible => data_available(4),
5254     rd_out_en => data_out_en(4)
5255    );
5256
5257PORT5_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5258   PORT MAP(
5259     data_in => crossbar_out_port(5),
5260     reset => reset,
5261     clk => clk,
5262     wr_en =>crossbar_out_pulse(5),
5263     data_out =>Port_out(5),
5264     fifo_full =>fifo_out_full_signal(5),
5265     data_avalaible => data_available(5),
5266     rd_out_en => data_out_en(5)
5267    );
5268
5269PORT6_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5270   PORT MAP(
5271     data_in => crossbar_out_port(6),
5272     reset => reset,
5273     clk => clk,
5274     wr_en =>crossbar_out_pulse(6),
5275     data_out =>Port_out(6),
5276     fifo_full =>fifo_out_full_signal(6),
5277     data_avalaible => data_available(6),
5278     rd_out_en => data_out_en(6)
5279    );
5280
5281PORT7_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5282   PORT MAP(
5283     data_in => crossbar_out_port(7),
5284     reset => reset,
5285     clk => clk,
5286     wr_en =>crossbar_out_pulse(7),
5287     data_out =>Port_out(7),
5288     fifo_full =>fifo_out_full_signal(7),
5289     data_avalaible => data_available(7),
5290     rd_out_en => data_out_en(7)
5291    );
5292
5293PORT8_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5294   PORT MAP(
5295     data_in => crossbar_out_port(8),
5296     reset => reset,
5297     clk => clk,
5298     wr_en =>crossbar_out_pulse(8),
5299     data_out =>Port_out(8),
5300     fifo_full =>fifo_out_full_signal(8),
5301     data_avalaible => data_available(8),
5302     rd_out_en => data_out_en(8)
5303    );
5304
5305PORT9_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5306   PORT MAP(
5307     data_in => crossbar_out_port(9),
5308     reset => reset,
5309     clk => clk,
5310     wr_en =>crossbar_out_pulse(9),
5311     data_out =>Port_out(9),
5312     fifo_full =>fifo_out_full_signal(9),
5313     data_avalaible => data_available(9),
5314     rd_out_en => data_out_en(9)
5315    );
5316
5317end generate port_out_switch9x9;
5318
5319
5320-- switch 10 ports
5321port_out_switch10x10 : if number_of_ports = 10 generate
5322
5323PORT1_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5324   PORT MAP(
5325     data_in => crossbar_out_port(1),
5326     reset => reset,
5327     clk => clk,
5328     wr_en =>crossbar_out_pulse(1),
5329     data_out =>Port_out(1),
5330     fifo_full =>fifo_out_full_signal(1),
5331     data_avalaible => data_available(1),
5332     rd_out_en => data_out_en(1)
5333    );
5334
5335PORT2_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5336   PORT MAP(
5337     data_in => crossbar_out_port(2),
5338     reset => reset,
5339     clk => clk,
5340     wr_en =>crossbar_out_pulse(2),
5341     data_out =>Port_out(2),
5342     fifo_full =>fifo_out_full_signal(2),
5343     data_avalaible => data_available(2),
5344     rd_out_en => data_out_en(2)
5345    );
5346
5347PORT3_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5348   PORT MAP(
5349     data_in => crossbar_out_port(3),
5350     reset => reset,
5351     clk => clk,
5352     wr_en =>crossbar_out_pulse(3),
5353     data_out =>Port_out(3),
5354     fifo_full =>fifo_out_full_signal(3),
5355     data_avalaible => data_available(3),
5356     rd_out_en => data_out_en(3)
5357    );
5358
5359PORT4_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5360   PORT MAP(
5361     data_in => crossbar_out_port(4),
5362     reset => reset,
5363     clk => clk,
5364     wr_en =>crossbar_out_pulse(4),
5365     data_out =>Port_out(4),
5366     fifo_full =>fifo_out_full_signal(4),
5367     data_avalaible => data_available(4),
5368     rd_out_en => data_out_en(4)
5369    );
5370
5371PORT5_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5372   PORT MAP(
5373     data_in => crossbar_out_port(5),
5374     reset => reset,
5375     clk => clk,
5376     wr_en =>crossbar_out_pulse(5),
5377     data_out =>Port_out(5),
5378     fifo_full =>fifo_out_full_signal(5),
5379     data_avalaible => data_available(5),
5380     rd_out_en => data_out_en(5)
5381    );
5382
5383PORT6_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5384   PORT MAP(
5385     data_in => crossbar_out_port(6),
5386     reset => reset,
5387     clk => clk,
5388     wr_en =>crossbar_out_pulse(6),
5389     data_out =>Port_out(6),
5390     fifo_full =>fifo_out_full_signal(6),
5391     data_avalaible => data_available(6),
5392     rd_out_en => data_out_en(6)
5393    );
5394
5395PORT7_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5396   PORT MAP(
5397     data_in => crossbar_out_port(7),
5398     reset => reset,
5399     clk => clk,
5400     wr_en =>crossbar_out_pulse(7),
5401     data_out =>Port_out(7),
5402     fifo_full =>fifo_out_full_signal(7),
5403     data_avalaible => data_available(7),
5404     rd_out_en => data_out_en(7)
5405    );
5406
5407PORT8_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5408   PORT MAP(
5409     data_in => crossbar_out_port(8),
5410     reset => reset,
5411     clk => clk,
5412     wr_en =>crossbar_out_pulse(8),
5413     data_out =>Port_out(8),
5414     fifo_full =>fifo_out_full_signal(8),
5415     data_avalaible => data_available(8),
5416     rd_out_en => data_out_en(8)
5417    );
5418
5419PORT9_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5420   PORT MAP(
5421     data_in => crossbar_out_port(9),
5422     reset => reset,
5423     clk => clk,
5424     wr_en =>crossbar_out_pulse(9),
5425     data_out =>Port_out(9),
5426     fifo_full =>fifo_out_full_signal(9),
5427     data_avalaible => data_available(9),
5428     rd_out_en => data_out_en(9)
5429    );
5430
5431PORT10_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5432   PORT MAP(
5433     data_in => crossbar_out_port(10),
5434     reset => reset,
5435     clk => clk,
5436     wr_en =>crossbar_out_pulse(10),
5437     data_out =>Port_out(10),
5438     fifo_full =>fifo_out_full_signal(10),
5439     data_avalaible => data_available(10),
5440     rd_out_en => data_out_en(10)
5441    );
5442
5443end generate port_out_switch10x10;
5444
5445
5446-- switch 11 ports
5447port_out_switch11x11 : if number_of_ports = 11 generate
5448
5449PORT1_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5450   PORT MAP(
5451     data_in => crossbar_out_port(1),
5452     reset => reset,
5453     clk => clk,
5454     wr_en =>crossbar_out_pulse(1),
5455     data_out =>Port_out(1),
5456     fifo_full =>fifo_out_full_signal(1),
5457     data_avalaible => data_available(1),
5458     rd_out_en => data_out_en(1)
5459    );
5460
5461PORT2_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5462   PORT MAP(
5463     data_in => crossbar_out_port(2),
5464     reset => reset,
5465     clk => clk,
5466     wr_en =>crossbar_out_pulse(2),
5467     data_out =>Port_out(2),
5468     fifo_full =>fifo_out_full_signal(2),
5469     data_avalaible => data_available(2),
5470     rd_out_en => data_out_en(2)
5471    );
5472
5473PORT3_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5474   PORT MAP(
5475     data_in => crossbar_out_port(3),
5476     reset => reset,
5477     clk => clk,
5478     wr_en =>crossbar_out_pulse(3),
5479     data_out =>Port_out(3),
5480     fifo_full =>fifo_out_full_signal(3),
5481     data_avalaible => data_available(3),
5482     rd_out_en => data_out_en(3)
5483    );
5484
5485PORT4_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5486   PORT MAP(
5487     data_in => crossbar_out_port(4),
5488     reset => reset,
5489     clk => clk,
5490     wr_en =>crossbar_out_pulse(4),
5491     data_out =>Port_out(4),
5492     fifo_full =>fifo_out_full_signal(4),
5493     data_avalaible => data_available(4),
5494     rd_out_en => data_out_en(4)
5495    );
5496
5497PORT5_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5498   PORT MAP(
5499     data_in => crossbar_out_port(5),
5500     reset => reset,
5501     clk => clk,
5502     wr_en =>crossbar_out_pulse(5),
5503     data_out =>Port_out(5),
5504     fifo_full =>fifo_out_full_signal(5),
5505     data_avalaible => data_available(5),
5506     rd_out_en => data_out_en(5)
5507    );
5508
5509PORT6_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5510   PORT MAP(
5511     data_in => crossbar_out_port(6),
5512     reset => reset,
5513     clk => clk,
5514     wr_en =>crossbar_out_pulse(6),
5515     data_out =>Port_out(6),
5516     fifo_full =>fifo_out_full_signal(6),
5517     data_avalaible => data_available(6),
5518     rd_out_en => data_out_en(6)
5519    );
5520
5521PORT7_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5522   PORT MAP(
5523     data_in => crossbar_out_port(7),
5524     reset => reset,
5525     clk => clk,
5526     wr_en =>crossbar_out_pulse(7),
5527     data_out =>Port_out(7),
5528     fifo_full =>fifo_out_full_signal(7),
5529     data_avalaible => data_available(7),
5530     rd_out_en => data_out_en(7)
5531    );
5532
5533PORT8_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5534   PORT MAP(
5535     data_in => crossbar_out_port(8),
5536     reset => reset,
5537     clk => clk,
5538     wr_en =>crossbar_out_pulse(8),
5539     data_out =>Port_out(8),
5540     fifo_full =>fifo_out_full_signal(8),
5541     data_avalaible => data_available(8),
5542     rd_out_en => data_out_en(8)
5543    );
5544
5545PORT9_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5546   PORT MAP(
5547     data_in => crossbar_out_port(9),
5548     reset => reset,
5549     clk => clk,
5550     wr_en =>crossbar_out_pulse(9),
5551     data_out =>Port_out(9),
5552     fifo_full =>fifo_out_full_signal(9),
5553     data_avalaible => data_available(9),
5554     rd_out_en => data_out_en(9)
5555    );
5556
5557PORT10_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5558   PORT MAP(
5559     data_in => crossbar_out_port(10),
5560     reset => reset,
5561     clk => clk,
5562     wr_en =>crossbar_out_pulse(10),
5563     data_out =>Port_out(10),
5564     fifo_full =>fifo_out_full_signal(10),
5565     data_avalaible => data_available(10),
5566     rd_out_en => data_out_en(10)
5567    );
5568
5569PORT11_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5570   PORT MAP(
5571     data_in => crossbar_out_port(11),
5572     reset => reset,
5573     clk => clk,
5574     wr_en =>crossbar_out_pulse(11),
5575     data_out =>Port_out(11),
5576     fifo_full =>fifo_out_full_signal(11),
5577     data_avalaible => data_available(11),
5578     rd_out_en => data_out_en(11)
5579    );
5580
5581end generate port_out_switch11x11;
5582
5583
5584-- switch 12 ports
5585port_out_switch12x12 : if number_of_ports = 12 generate
5586
5587PORT1_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5588   PORT MAP(
5589     data_in => crossbar_out_port(1),
5590     reset => reset,
5591     clk => clk,
5592     wr_en =>crossbar_out_pulse(1),
5593     data_out =>Port_out(1),
5594     fifo_full =>fifo_out_full_signal(1),
5595     data_avalaible => data_available(1),
5596     rd_out_en => data_out_en(1)
5597    );
5598
5599PORT2_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5600   PORT MAP(
5601     data_in => crossbar_out_port(2),
5602     reset => reset,
5603     clk => clk,
5604     wr_en =>crossbar_out_pulse(2),
5605     data_out =>Port_out(2),
5606     fifo_full =>fifo_out_full_signal(2),
5607     data_avalaible => data_available(2),
5608     rd_out_en => data_out_en(2)
5609    );
5610
5611PORT3_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5612   PORT MAP(
5613     data_in => crossbar_out_port(3),
5614     reset => reset,
5615     clk => clk,
5616     wr_en =>crossbar_out_pulse(3),
5617     data_out =>Port_out(3),
5618     fifo_full =>fifo_out_full_signal(3),
5619     data_avalaible => data_available(3),
5620     rd_out_en => data_out_en(3)
5621    );
5622
5623PORT4_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5624   PORT MAP(
5625     data_in => crossbar_out_port(4),
5626     reset => reset,
5627     clk => clk,
5628     wr_en =>crossbar_out_pulse(4),
5629     data_out =>Port_out(4),
5630     fifo_full =>fifo_out_full_signal(4),
5631     data_avalaible => data_available(4),
5632     rd_out_en => data_out_en(4)
5633    );
5634
5635PORT5_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5636   PORT MAP(
5637     data_in => crossbar_out_port(5),
5638     reset => reset,
5639     clk => clk,
5640     wr_en =>crossbar_out_pulse(5),
5641     data_out =>Port_out(5),
5642     fifo_full =>fifo_out_full_signal(5),
5643     data_avalaible => data_available(5),
5644     rd_out_en => data_out_en(5)
5645    );
5646
5647PORT6_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5648   PORT MAP(
5649     data_in => crossbar_out_port(6),
5650     reset => reset,
5651     clk => clk,
5652     wr_en =>crossbar_out_pulse(6),
5653     data_out =>Port_out(6),
5654     fifo_full =>fifo_out_full_signal(6),
5655     data_avalaible => data_available(6),
5656     rd_out_en => data_out_en(6)
5657    );
5658
5659PORT7_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5660   PORT MAP(
5661     data_in => crossbar_out_port(7),
5662     reset => reset,
5663     clk => clk,
5664     wr_en =>crossbar_out_pulse(7),
5665     data_out =>Port_out(7),
5666     fifo_full =>fifo_out_full_signal(7),
5667     data_avalaible => data_available(7),
5668     rd_out_en => data_out_en(7)
5669    );
5670
5671PORT8_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5672   PORT MAP(
5673     data_in => crossbar_out_port(8),
5674     reset => reset,
5675     clk => clk,
5676     wr_en =>crossbar_out_pulse(8),
5677     data_out =>Port_out(8),
5678     fifo_full =>fifo_out_full_signal(8),
5679     data_avalaible => data_available(8),
5680     rd_out_en => data_out_en(8)
5681    );
5682
5683PORT9_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5684   PORT MAP(
5685     data_in => crossbar_out_port(9),
5686     reset => reset,
5687     clk => clk,
5688     wr_en =>crossbar_out_pulse(9),
5689     data_out =>Port_out(9),
5690     fifo_full =>fifo_out_full_signal(9),
5691     data_avalaible => data_available(9),
5692     rd_out_en => data_out_en(9)
5693    );
5694
5695PORT10_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5696   PORT MAP(
5697     data_in => crossbar_out_port(10),
5698     reset => reset,
5699     clk => clk,
5700     wr_en =>crossbar_out_pulse(10),
5701     data_out =>Port_out(10),
5702     fifo_full =>fifo_out_full_signal(10),
5703     data_avalaible => data_available(10),
5704     rd_out_en => data_out_en(10)
5705    );
5706
5707PORT11_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5708   PORT MAP(
5709     data_in => crossbar_out_port(11),
5710     reset => reset,
5711     clk => clk,
5712     wr_en =>crossbar_out_pulse(11),
5713     data_out =>Port_out(11),
5714     fifo_full =>fifo_out_full_signal(11),
5715     data_avalaible => data_available(11),
5716     rd_out_en => data_out_en(11)
5717    );
5718
5719PORT12_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5720   PORT MAP(
5721     data_in => crossbar_out_port(12),
5722     reset => reset,
5723     clk => clk,
5724     wr_en =>crossbar_out_pulse(12),
5725     data_out =>Port_out(12),
5726     fifo_full =>fifo_out_full_signal(12),
5727     data_avalaible => data_available(12),
5728     rd_out_en => data_out_en(12)
5729    );
5730
5731end generate port_out_switch12x12;
5732
5733
5734-- switch 13 ports
5735port_out_switch13x13 : if number_of_ports = 13 generate
5736
5737PORT1_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5738   PORT MAP(
5739     data_in => crossbar_out_port(1),
5740     reset => reset,
5741     clk => clk,
5742     wr_en =>crossbar_out_pulse(1),
5743     data_out =>Port_out(1),
5744     fifo_full =>fifo_out_full_signal(1),
5745     data_avalaible => data_available(1),
5746     rd_out_en => data_out_en(1)
5747    );
5748
5749PORT2_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5750   PORT MAP(
5751     data_in => crossbar_out_port(2),
5752     reset => reset,
5753     clk => clk,
5754     wr_en =>crossbar_out_pulse(2),
5755     data_out =>Port_out(2),
5756     fifo_full =>fifo_out_full_signal(2),
5757     data_avalaible => data_available(2),
5758     rd_out_en => data_out_en(2)
5759    );
5760
5761PORT3_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5762   PORT MAP(
5763     data_in => crossbar_out_port(3),
5764     reset => reset,
5765     clk => clk,
5766     wr_en =>crossbar_out_pulse(3),
5767     data_out =>Port_out(3),
5768     fifo_full =>fifo_out_full_signal(3),
5769     data_avalaible => data_available(3),
5770     rd_out_en => data_out_en(3)
5771    );
5772
5773PORT4_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5774   PORT MAP(
5775     data_in => crossbar_out_port(4),
5776     reset => reset,
5777     clk => clk,
5778     wr_en =>crossbar_out_pulse(4),
5779     data_out =>Port_out(4),
5780     fifo_full =>fifo_out_full_signal(4),
5781     data_avalaible => data_available(4),
5782     rd_out_en => data_out_en(4)
5783    );
5784
5785PORT5_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5786   PORT MAP(
5787     data_in => crossbar_out_port(5),
5788     reset => reset,
5789     clk => clk,
5790     wr_en =>crossbar_out_pulse(5),
5791     data_out =>Port_out(5),
5792     fifo_full =>fifo_out_full_signal(5),
5793     data_avalaible => data_available(5),
5794     rd_out_en => data_out_en(5)
5795    );
5796
5797PORT6_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5798   PORT MAP(
5799     data_in => crossbar_out_port(6),
5800     reset => reset,
5801     clk => clk,
5802     wr_en =>crossbar_out_pulse(6),
5803     data_out =>Port_out(6),
5804     fifo_full =>fifo_out_full_signal(6),
5805     data_avalaible => data_available(6),
5806     rd_out_en => data_out_en(6)
5807    );
5808
5809PORT7_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5810   PORT MAP(
5811     data_in => crossbar_out_port(7),
5812     reset => reset,
5813     clk => clk,
5814     wr_en =>crossbar_out_pulse(7),
5815     data_out =>Port_out(7),
5816     fifo_full =>fifo_out_full_signal(7),
5817     data_avalaible => data_available(7),
5818     rd_out_en => data_out_en(7)
5819    );
5820
5821PORT8_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5822   PORT MAP(
5823     data_in => crossbar_out_port(8),
5824     reset => reset,
5825     clk => clk,
5826     wr_en =>crossbar_out_pulse(8),
5827     data_out =>Port_out(8),
5828     fifo_full =>fifo_out_full_signal(8),
5829     data_avalaible => data_available(8),
5830     rd_out_en => data_out_en(8)
5831    );
5832
5833PORT9_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5834   PORT MAP(
5835     data_in => crossbar_out_port(9),
5836     reset => reset,
5837     clk => clk,
5838     wr_en =>crossbar_out_pulse(9),
5839     data_out =>Port_out(9),
5840     fifo_full =>fifo_out_full_signal(9),
5841     data_avalaible => data_available(9),
5842     rd_out_en => data_out_en(9)
5843    );
5844
5845PORT10_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5846   PORT MAP(
5847     data_in => crossbar_out_port(10),
5848     reset => reset,
5849     clk => clk,
5850     wr_en =>crossbar_out_pulse(10),
5851     data_out =>Port_out(10),
5852     fifo_full =>fifo_out_full_signal(10),
5853     data_avalaible => data_available(10),
5854     rd_out_en => data_out_en(10)
5855    );
5856
5857PORT11_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5858   PORT MAP(
5859     data_in => crossbar_out_port(11),
5860     reset => reset,
5861     clk => clk,
5862     wr_en =>crossbar_out_pulse(11),
5863     data_out =>Port_out(11),
5864     fifo_full =>fifo_out_full_signal(11),
5865     data_avalaible => data_available(11),
5866     rd_out_en => data_out_en(11)
5867    );
5868
5869PORT12_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5870   PORT MAP(
5871     data_in => crossbar_out_port(12),
5872     reset => reset,
5873     clk => clk,
5874     wr_en =>crossbar_out_pulse(12),
5875     data_out =>Port_out(12),
5876     fifo_full =>fifo_out_full_signal(12),
5877     data_avalaible => data_available(12),
5878     rd_out_en => data_out_en(12)
5879    );
5880
5881PORT13_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5882   PORT MAP(
5883     data_in => crossbar_out_port(13),
5884     reset => reset,
5885     clk => clk,
5886     wr_en =>crossbar_out_pulse(13),
5887     data_out =>Port_out(13),
5888     fifo_full =>fifo_out_full_signal(13),
5889     data_avalaible => data_available(13),
5890     rd_out_en => data_out_en(13)
5891    );
5892
5893end generate port_out_switch13x13;
5894
5895
5896-- switch 14 ports
5897port_out_switch14x14 : if number_of_ports = 14 generate
5898
5899PORT1_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5900   PORT MAP(
5901     data_in => crossbar_out_port(1),
5902     reset => reset,
5903     clk => clk,
5904     wr_en =>crossbar_out_pulse(1),
5905     data_out =>Port_out(1),
5906     fifo_full =>fifo_out_full_signal(1),
5907     data_avalaible => data_available(1),
5908     rd_out_en => data_out_en(1)
5909    );
5910
5911PORT2_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5912   PORT MAP(
5913     data_in => crossbar_out_port(2),
5914     reset => reset,
5915     clk => clk,
5916     wr_en =>crossbar_out_pulse(2),
5917     data_out =>Port_out(2),
5918     fifo_full =>fifo_out_full_signal(2),
5919     data_avalaible => data_available(2),
5920     rd_out_en => data_out_en(2)
5921    );
5922
5923PORT3_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5924   PORT MAP(
5925     data_in => crossbar_out_port(3),
5926     reset => reset,
5927     clk => clk,
5928     wr_en =>crossbar_out_pulse(3),
5929     data_out =>Port_out(3),
5930     fifo_full =>fifo_out_full_signal(3),
5931     data_avalaible => data_available(3),
5932     rd_out_en => data_out_en(3)
5933    );
5934
5935PORT4_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5936   PORT MAP(
5937     data_in => crossbar_out_port(4),
5938     reset => reset,
5939     clk => clk,
5940     wr_en =>crossbar_out_pulse(4),
5941     data_out =>Port_out(4),
5942     fifo_full =>fifo_out_full_signal(4),
5943     data_avalaible => data_available(4),
5944     rd_out_en => data_out_en(4)
5945    );
5946
5947PORT5_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5948   PORT MAP(
5949     data_in => crossbar_out_port(5),
5950     reset => reset,
5951     clk => clk,
5952     wr_en =>crossbar_out_pulse(5),
5953     data_out =>Port_out(5),
5954     fifo_full =>fifo_out_full_signal(5),
5955     data_avalaible => data_available(5),
5956     rd_out_en => data_out_en(5)
5957    );
5958
5959PORT6_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5960   PORT MAP(
5961     data_in => crossbar_out_port(6),
5962     reset => reset,
5963     clk => clk,
5964     wr_en =>crossbar_out_pulse(6),
5965     data_out =>Port_out(6),
5966     fifo_full =>fifo_out_full_signal(6),
5967     data_avalaible => data_available(6),
5968     rd_out_en => data_out_en(6)
5969    );
5970
5971PORT7_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5972   PORT MAP(
5973     data_in => crossbar_out_port(7),
5974     reset => reset,
5975     clk => clk,
5976     wr_en =>crossbar_out_pulse(7),
5977     data_out =>Port_out(7),
5978     fifo_full =>fifo_out_full_signal(7),
5979     data_avalaible => data_available(7),
5980     rd_out_en => data_out_en(7)
5981    );
5982
5983PORT8_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5984   PORT MAP(
5985     data_in => crossbar_out_port(8),
5986     reset => reset,
5987     clk => clk,
5988     wr_en =>crossbar_out_pulse(8),
5989     data_out =>Port_out(8),
5990     fifo_full =>fifo_out_full_signal(8),
5991     data_avalaible => data_available(8),
5992     rd_out_en => data_out_en(8)
5993    );
5994
5995PORT9_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
5996   PORT MAP(
5997     data_in => crossbar_out_port(9),
5998     reset => reset,
5999     clk => clk,
6000     wr_en =>crossbar_out_pulse(9),
6001     data_out =>Port_out(9),
6002     fifo_full =>fifo_out_full_signal(9),
6003     data_avalaible => data_available(9),
6004     rd_out_en => data_out_en(9)
6005    );
6006
6007PORT10_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
6008   PORT MAP(
6009     data_in => crossbar_out_port(10),
6010     reset => reset,
6011     clk => clk,
6012     wr_en =>crossbar_out_pulse(10),
6013     data_out =>Port_out(10),
6014     fifo_full =>fifo_out_full_signal(10),
6015     data_avalaible => data_available(10),
6016     rd_out_en => data_out_en(10)
6017    );
6018
6019PORT11_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
6020   PORT MAP(
6021     data_in => crossbar_out_port(11),
6022     reset => reset,
6023     clk => clk,
6024     wr_en =>crossbar_out_pulse(11),
6025     data_out =>Port_out(11),
6026     fifo_full =>fifo_out_full_signal(11),
6027     data_avalaible => data_available(11),
6028     rd_out_en => data_out_en(11)
6029    );
6030
6031PORT12_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
6032   PORT MAP(
6033     data_in => crossbar_out_port(12),
6034     reset => reset,
6035     clk => clk,
6036     wr_en =>crossbar_out_pulse(12),
6037     data_out =>Port_out(12),
6038     fifo_full =>fifo_out_full_signal(12),
6039     data_avalaible => data_available(12),
6040     rd_out_en => data_out_en(12)
6041    );
6042
6043PORT13_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
6044   PORT MAP(
6045     data_in => crossbar_out_port(13),
6046     reset => reset,
6047     clk => clk,
6048     wr_en =>crossbar_out_pulse(13),
6049     data_out =>Port_out(13),
6050     fifo_full =>fifo_out_full_signal(13),
6051     data_avalaible => data_available(13),
6052     rd_out_en => data_out_en(13)
6053    );
6054
6055PORT14_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
6056   PORT MAP(
6057     data_in => crossbar_out_port(14),
6058     reset => reset,
6059     clk => clk,
6060     wr_en =>crossbar_out_pulse(14),
6061     data_out =>Port_out(14),
6062     fifo_full =>fifo_out_full_signal(14),
6063     data_avalaible => data_available(14),
6064     rd_out_en => data_out_en(14)
6065    );
6066
6067end generate port_out_switch14x14;
6068
6069
6070-- switch 15 ports
6071port_out_switch15x15 : if number_of_ports = 15 generate
6072
6073PORT1_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
6074   PORT MAP(
6075     data_in => crossbar_out_port(1),
6076     reset => reset,
6077     clk => clk,
6078     wr_en =>crossbar_out_pulse(1),
6079     data_out =>Port_out(1),
6080     fifo_full =>fifo_out_full_signal(1),
6081     data_avalaible => data_available(1),
6082     rd_out_en => data_out_en(1)
6083    );
6084
6085PORT2_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
6086   PORT MAP(
6087     data_in => crossbar_out_port(2),
6088     reset => reset,
6089     clk => clk,
6090     wr_en =>crossbar_out_pulse(2),
6091     data_out =>Port_out(2),
6092     fifo_full =>fifo_out_full_signal(2),
6093     data_avalaible => data_available(2),
6094     rd_out_en => data_out_en(2)
6095    );
6096
6097PORT3_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
6098   PORT MAP(
6099     data_in => crossbar_out_port(3),
6100     reset => reset,
6101     clk => clk,
6102     wr_en =>crossbar_out_pulse(3),
6103     data_out =>Port_out(3),
6104     fifo_full =>fifo_out_full_signal(3),
6105     data_avalaible => data_available(3),
6106     rd_out_en => data_out_en(3)
6107    );
6108
6109PORT4_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
6110   PORT MAP(
6111     data_in => crossbar_out_port(4),
6112     reset => reset,
6113     clk => clk,
6114     wr_en =>crossbar_out_pulse(4),
6115     data_out =>Port_out(4),
6116     fifo_full =>fifo_out_full_signal(4),
6117     data_avalaible => data_available(4),
6118     rd_out_en => data_out_en(4)
6119    );
6120
6121PORT5_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
6122   PORT MAP(
6123     data_in => crossbar_out_port(5),
6124     reset => reset,
6125     clk => clk,
6126     wr_en =>crossbar_out_pulse(5),
6127     data_out =>Port_out(5),
6128     fifo_full =>fifo_out_full_signal(5),
6129     data_avalaible => data_available(5),
6130     rd_out_en => data_out_en(5)
6131    );
6132
6133PORT6_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
6134   PORT MAP(
6135     data_in => crossbar_out_port(6),
6136     reset => reset,
6137     clk => clk,
6138     wr_en =>crossbar_out_pulse(6),
6139     data_out =>Port_out(6),
6140     fifo_full =>fifo_out_full_signal(6),
6141     data_avalaible => data_available(6),
6142     rd_out_en => data_out_en(6)
6143    );
6144
6145PORT7_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
6146   PORT MAP(
6147     data_in => crossbar_out_port(7),
6148     reset => reset,
6149     clk => clk,
6150     wr_en =>crossbar_out_pulse(7),
6151     data_out =>Port_out(7),
6152     fifo_full =>fifo_out_full_signal(7),
6153     data_avalaible => data_available(7),
6154     rd_out_en => data_out_en(7)
6155    );
6156
6157PORT8_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
6158   PORT MAP(
6159     data_in => crossbar_out_port(8),
6160     reset => reset,
6161     clk => clk,
6162     wr_en =>crossbar_out_pulse(8),
6163     data_out =>Port_out(8),
6164     fifo_full =>fifo_out_full_signal(8),
6165     data_avalaible => data_available(8),
6166     rd_out_en => data_out_en(8)
6167    );
6168
6169PORT9_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
6170   PORT MAP(
6171     data_in => crossbar_out_port(9),
6172     reset => reset,
6173     clk => clk,
6174     wr_en =>crossbar_out_pulse(9),
6175     data_out =>Port_out(9),
6176     fifo_full =>fifo_out_full_signal(9),
6177     data_avalaible => data_available(9),
6178     rd_out_en => data_out_en(9)
6179    );
6180
6181PORT10_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
6182   PORT MAP(
6183     data_in => crossbar_out_port(10),
6184     reset => reset,
6185     clk => clk,
6186     wr_en =>crossbar_out_pulse(10),
6187     data_out =>Port_out(10),
6188     fifo_full =>fifo_out_full_signal(10),
6189     data_avalaible => data_available(10),
6190     rd_out_en => data_out_en(10)
6191    );
6192
6193PORT11_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
6194   PORT MAP(
6195     data_in => crossbar_out_port(11),
6196     reset => reset,
6197     clk => clk,
6198     wr_en =>crossbar_out_pulse(11),
6199     data_out =>Port_out(11),
6200     fifo_full =>fifo_out_full_signal(11),
6201     data_avalaible => data_available(11),
6202     rd_out_en => data_out_en(11)
6203    );
6204
6205PORT12_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
6206   PORT MAP(
6207     data_in => crossbar_out_port(12),
6208     reset => reset,
6209     clk => clk,
6210     wr_en =>crossbar_out_pulse(12),
6211     data_out =>Port_out(12),
6212     fifo_full =>fifo_out_full_signal(12),
6213     data_avalaible => data_available(12),
6214     rd_out_en => data_out_en(12)
6215    );
6216
6217PORT13_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
6218   PORT MAP(
6219     data_in => crossbar_out_port(13),
6220     reset => reset,
6221     clk => clk,
6222     wr_en =>crossbar_out_pulse(13),
6223     data_out =>Port_out(13),
6224     fifo_full =>fifo_out_full_signal(13),
6225     data_avalaible => data_available(13),
6226     rd_out_en => data_out_en(13)
6227    );
6228
6229PORT14_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
6230   PORT MAP(
6231     data_in => crossbar_out_port(14),
6232     reset => reset,
6233     clk => clk,
6234     wr_en =>crossbar_out_pulse(14),
6235     data_out =>Port_out(14),
6236     fifo_full =>fifo_out_full_signal(14),
6237     data_avalaible => data_available(14),
6238     rd_out_en => data_out_en(14)
6239    );
6240
6241PORT15_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
6242   PORT MAP(
6243     data_in => crossbar_out_port(15),
6244     reset => reset,
6245     clk => clk,
6246     wr_en =>crossbar_out_pulse(15),
6247     data_out =>Port_out(15),
6248     fifo_full =>fifo_out_full_signal(15),
6249     data_avalaible => data_available(15),
6250     rd_out_en => data_out_en(15)
6251    );
6252
6253end generate port_out_switch15x15;
6254
6255
6256-- switch 16 ports
6257port_out_switch16x16 : if number_of_ports = 16 generate
6258port_out_switch_16x16:for i in 1 to number_of_ports generate
6259  begin
6260  PORTx16_OUTPUT_PORT_MODULE: OUTPUT_PORT_MODULE
6261   PORT MAP(
6262     data_in => crossbar_out_port(i),
6263     reset => reset,
6264     clk => clk,
6265     wr_en =>crossbar_out_pulse(i),
6266     data_out =>Port_out(i),
6267     fifo_full =>fifo_out_full_signal(i),
6268     data_avalaible => data_available(i),
6269     rd_out_en => data_out_en(i)
6270    );
6271end generate port_out_switch_16x16;
6272
6273end generate port_out_switch16x16;
6274
6275-- intstanciation et connexion des crossbars du  switch en fonction du nombre de ports
6276-- le circuit genere depend du parametre generique nombre de ports
6277-- switch 2 ports
6278crossbar_switch2x2 : if number_of_ports = 2 generate
6279
6280Switch_Crossbar2_2: Crossbar
6281GENERIC MAP(number_of_crossbar_ports =>2)
6282  PORT MAP(
6283   Port1_in => crossbar_in_port(1),
6284   Port2_in => crossbar_in_port(2),
6285   Port3_in => "00000000",
6286   Port4_in => "00000000",
6287   Port5_in => "00000000",
6288   Port6_in => "00000000",
6289   Port7_in => "00000000",
6290   Port8_in => "00000000",
6291   Port9_in => "00000000",
6292   Port10_in => "00000000",
6293   Port11_in => "00000000",
6294   Port12_in => "00000000",
6295   Port13_in => "00000000",
6296   Port14_in => "00000000",
6297   Port15_in => "00000000",
6298   Port16_in => "00000000",
6299   Port1_pulse_in => crossbar_in_pulse(1),
6300   Port2_pulse_in => crossbar_in_pulse(2),
6301   Port3_pulse_in =>'0' ,
6302   Port4_pulse_in =>'0' ,
6303   Port5_pulse_in =>'0' ,
6304   Port6_pulse_in =>'0' ,
6305   Port7_pulse_in =>'0' ,
6306   Port8_pulse_in =>'0' ,
6307   Port9_pulse_in =>'0' ,
6308   Port10_pulse_in =>'0' ,
6309   Port11_pulse_in =>'0' ,
6310   Port12_pulse_in =>'0' ,
6311   Port13_pulse_in =>'0' ,
6312   Port14_pulse_in =>'0' ,
6313   Port15_pulse_in =>'0' ,
6314   Port16_pulse_in =>'0' ,
6315   Port1_pulse_out => crossbar_out_pulse(1),
6316   Port2_pulse_out => crossbar_out_pulse(2),
6317  Port1_out => crossbar_out_port(1),
6318  Port2_out => crossbar_out_port(2),
6319   Ctrl => Grant_signal);
6320end generate crossbar_switch2x2;
6321
6322
6323-- switch 3 ports
6324crossbar_switch3x3 : if number_of_ports = 3 generate
6325
6326Switch_Crossbar3_3: Crossbar
6327GENERIC MAP(number_of_crossbar_ports =>3)
6328  PORT MAP(
6329   Port1_in => crossbar_in_port(1),
6330   Port2_in => crossbar_in_port(2),
6331   Port3_in => crossbar_in_port(3),
6332   Port4_in => "00000000",
6333   Port5_in => "00000000",
6334   Port6_in => "00000000",
6335   Port7_in => "00000000",
6336   Port8_in => "00000000",
6337   Port9_in => "00000000",
6338   Port10_in => "00000000",
6339   Port11_in => "00000000",
6340   Port12_in => "00000000",
6341   Port13_in => "00000000",
6342   Port14_in => "00000000",
6343   Port15_in => "00000000",
6344   Port16_in => "00000000",
6345   Port1_pulse_in => crossbar_in_pulse(1),
6346   Port2_pulse_in => crossbar_in_pulse(2),
6347   Port3_pulse_in => crossbar_in_pulse(3),
6348   Port4_pulse_in =>'0' ,
6349   Port5_pulse_in =>'0' ,
6350   Port6_pulse_in =>'0' ,
6351   Port7_pulse_in =>'0' ,
6352   Port8_pulse_in =>'0' ,
6353   Port9_pulse_in =>'0' ,
6354   Port10_pulse_in =>'0' ,
6355   Port11_pulse_in =>'0' ,
6356   Port12_pulse_in =>'0' ,
6357   Port13_pulse_in =>'0' ,
6358   Port14_pulse_in =>'0' ,
6359   Port15_pulse_in =>'0' ,
6360   Port16_pulse_in =>'0' ,
6361   Port1_pulse_out => crossbar_out_pulse(1),
6362   Port2_pulse_out => crossbar_out_pulse(2),
6363   Port3_pulse_out => crossbar_out_pulse(3),
6364  Port1_out => crossbar_out_port(1),
6365  Port2_out => crossbar_out_port(2),
6366  Port3_out => crossbar_out_port(3),
6367   Ctrl => Grant_signal);
6368end generate crossbar_switch3x3;
6369
6370
6371-- switch 4 ports
6372crossbar_switch4x4 : if number_of_ports = 4 generate
6373
6374Switch_Crossbar4_4: Crossbar
6375GENERIC MAP(number_of_crossbar_ports =>4)
6376  PORT MAP(
6377   Port1_in => crossbar_in_port(1),
6378   Port2_in => crossbar_in_port(2),
6379   Port3_in => crossbar_in_port(3),
6380   Port4_in => crossbar_in_port(4),
6381   Port5_in => "00000000",
6382   Port6_in => "00000000",
6383   Port7_in => "00000000",
6384   Port8_in => "00000000",
6385   Port9_in => "00000000",
6386   Port10_in => "00000000",
6387   Port11_in => "00000000",
6388   Port12_in => "00000000",
6389   Port13_in => "00000000",
6390   Port14_in => "00000000",
6391   Port15_in => "00000000",
6392   Port16_in => "00000000",
6393   Port1_pulse_in => crossbar_in_pulse(1),
6394   Port2_pulse_in => crossbar_in_pulse(2),
6395   Port3_pulse_in => crossbar_in_pulse(3),
6396   Port4_pulse_in => crossbar_in_pulse(4),
6397   Port5_pulse_in =>'0' ,
6398   Port6_pulse_in =>'0' ,
6399   Port7_pulse_in =>'0' ,
6400   Port8_pulse_in =>'0' ,
6401   Port9_pulse_in =>'0' ,
6402   Port10_pulse_in =>'0' ,
6403   Port11_pulse_in =>'0' ,
6404   Port12_pulse_in =>'0' ,
6405   Port13_pulse_in =>'0' ,
6406   Port14_pulse_in =>'0' ,
6407   Port15_pulse_in =>'0' ,
6408   Port16_pulse_in =>'0' ,
6409   Port1_pulse_out => crossbar_out_pulse(1),
6410   Port2_pulse_out => crossbar_out_pulse(2),
6411   Port3_pulse_out => crossbar_out_pulse(3),
6412   Port4_pulse_out => crossbar_out_pulse(4),
6413  Port1_out => crossbar_out_port(1),
6414  Port2_out => crossbar_out_port(2),
6415  Port3_out => crossbar_out_port(3),
6416  Port4_out => crossbar_out_port(4),
6417   Ctrl => Grant_signal);
6418end generate crossbar_switch4x4;
6419
6420
6421-- switch 5 ports
6422crossbar_switch5x5 : if number_of_ports = 5 generate
6423
6424Switch_Crossbar5_5: Crossbar
6425GENERIC MAP(number_of_crossbar_ports =>5)
6426  PORT MAP(
6427   Port1_in => crossbar_in_port(1),
6428   Port2_in => crossbar_in_port(2),
6429   Port3_in => crossbar_in_port(3),
6430   Port4_in => crossbar_in_port(4),
6431   Port5_in => crossbar_in_port(5),
6432   Port6_in => "00000000",
6433   Port7_in => "00000000",
6434   Port8_in => "00000000",
6435   Port9_in => "00000000",
6436   Port10_in => "00000000",
6437   Port11_in => "00000000",
6438   Port12_in => "00000000",
6439   Port13_in => "00000000",
6440   Port14_in => "00000000",
6441   Port15_in => "00000000",
6442   Port16_in => "00000000",
6443   Port1_pulse_in => crossbar_in_pulse(1),
6444   Port2_pulse_in => crossbar_in_pulse(2),
6445   Port3_pulse_in => crossbar_in_pulse(3),
6446   Port4_pulse_in => crossbar_in_pulse(4),
6447   Port5_pulse_in => crossbar_in_pulse(5),
6448   Port6_pulse_in =>'0' ,
6449   Port7_pulse_in =>'0' ,
6450   Port8_pulse_in =>'0' ,
6451   Port9_pulse_in =>'0' ,
6452   Port10_pulse_in =>'0' ,
6453   Port11_pulse_in =>'0' ,
6454   Port12_pulse_in =>'0' ,
6455   Port13_pulse_in =>'0' ,
6456   Port14_pulse_in =>'0' ,
6457   Port15_pulse_in =>'0' ,
6458   Port16_pulse_in =>'0' ,
6459   Port1_pulse_out => crossbar_out_pulse(1),
6460   Port2_pulse_out => crossbar_out_pulse(2),
6461   Port3_pulse_out => crossbar_out_pulse(3),
6462   Port4_pulse_out => crossbar_out_pulse(4),
6463   Port5_pulse_out => crossbar_out_pulse(5),
6464  Port1_out => crossbar_out_port(1),
6465  Port2_out => crossbar_out_port(2),
6466  Port3_out => crossbar_out_port(3),
6467  Port4_out => crossbar_out_port(4),
6468  Port5_out => crossbar_out_port(5),
6469   Ctrl => Grant_signal);
6470end generate crossbar_switch5x5;
6471
6472
6473-- switch 6 ports
6474crossbar_switch6x6 : if number_of_ports = 6 generate
6475
6476Switch_Crossbar6_6: Crossbar
6477GENERIC MAP(number_of_crossbar_ports =>6)
6478  PORT MAP(
6479   Port1_in => crossbar_in_port(1),
6480   Port2_in => crossbar_in_port(2),
6481   Port3_in => crossbar_in_port(3),
6482   Port4_in => crossbar_in_port(4),
6483   Port5_in => crossbar_in_port(5),
6484   Port6_in => crossbar_in_port(6),
6485   Port7_in => "00000000",
6486   Port8_in => "00000000",
6487   Port9_in => "00000000",
6488   Port10_in => "00000000",
6489   Port11_in => "00000000",
6490   Port12_in => "00000000",
6491   Port13_in => "00000000",
6492   Port14_in => "00000000",
6493   Port15_in => "00000000",
6494   Port16_in => "00000000",
6495   Port1_pulse_in => crossbar_in_pulse(1),
6496   Port2_pulse_in => crossbar_in_pulse(2),
6497   Port3_pulse_in => crossbar_in_pulse(3),
6498   Port4_pulse_in => crossbar_in_pulse(4),
6499   Port5_pulse_in => crossbar_in_pulse(5),
6500   Port6_pulse_in => crossbar_in_pulse(6),
6501   Port7_pulse_in =>'0' ,
6502   Port8_pulse_in =>'0' ,
6503   Port9_pulse_in =>'0' ,
6504   Port10_pulse_in =>'0' ,
6505   Port11_pulse_in =>'0' ,
6506   Port12_pulse_in =>'0' ,
6507   Port13_pulse_in =>'0' ,
6508   Port14_pulse_in =>'0' ,
6509   Port15_pulse_in =>'0' ,
6510   Port16_pulse_in =>'0' ,
6511   Port1_pulse_out => crossbar_out_pulse(1),
6512   Port2_pulse_out => crossbar_out_pulse(2),
6513   Port3_pulse_out => crossbar_out_pulse(3),
6514   Port4_pulse_out => crossbar_out_pulse(4),
6515   Port5_pulse_out => crossbar_out_pulse(5),
6516   Port6_pulse_out => crossbar_out_pulse(6),
6517  Port1_out => crossbar_out_port(1),
6518  Port2_out => crossbar_out_port(2),
6519  Port3_out => crossbar_out_port(3),
6520  Port4_out => crossbar_out_port(4),
6521  Port5_out => crossbar_out_port(5),
6522  Port6_out => crossbar_out_port(6),
6523   Ctrl => Grant_signal);
6524end generate crossbar_switch6x6;
6525
6526
6527-- switch 7 ports
6528crossbar_switch7x7 : if number_of_ports = 7 generate
6529
6530Switch_Crossbar7_7: Crossbar
6531GENERIC MAP(number_of_crossbar_ports =>7)
6532  PORT MAP(
6533   Port1_in => crossbar_in_port(1),
6534   Port2_in => crossbar_in_port(2),
6535   Port3_in => crossbar_in_port(3),
6536   Port4_in => crossbar_in_port(4),
6537   Port5_in => crossbar_in_port(5),
6538   Port6_in => crossbar_in_port(6),
6539   Port7_in => crossbar_in_port(7),
6540   Port8_in => "00000000",
6541   Port9_in => "00000000",
6542   Port10_in => "00000000",
6543   Port11_in => "00000000",
6544   Port12_in => "00000000",
6545   Port13_in => "00000000",
6546   Port14_in => "00000000",
6547   Port15_in => "00000000",
6548   Port16_in => "00000000",
6549   Port1_pulse_in => crossbar_in_pulse(1),
6550   Port2_pulse_in => crossbar_in_pulse(2),
6551   Port3_pulse_in => crossbar_in_pulse(3),
6552   Port4_pulse_in => crossbar_in_pulse(4),
6553   Port5_pulse_in => crossbar_in_pulse(5),
6554   Port6_pulse_in => crossbar_in_pulse(6),
6555   Port7_pulse_in => crossbar_in_pulse(7),
6556   Port8_pulse_in =>'0' ,
6557   Port9_pulse_in =>'0' ,
6558   Port10_pulse_in =>'0' ,
6559   Port11_pulse_in =>'0' ,
6560   Port12_pulse_in =>'0' ,
6561   Port13_pulse_in =>'0' ,
6562   Port14_pulse_in =>'0' ,
6563   Port15_pulse_in =>'0' ,
6564   Port16_pulse_in =>'0' ,
6565   Port1_pulse_out => crossbar_out_pulse(1),
6566   Port2_pulse_out => crossbar_out_pulse(2),
6567   Port3_pulse_out => crossbar_out_pulse(3),
6568   Port4_pulse_out => crossbar_out_pulse(4),
6569   Port5_pulse_out => crossbar_out_pulse(5),
6570   Port6_pulse_out => crossbar_out_pulse(6),
6571   Port7_pulse_out => crossbar_out_pulse(7),
6572  Port1_out => crossbar_out_port(1),
6573  Port2_out => crossbar_out_port(2),
6574  Port3_out => crossbar_out_port(3),
6575  Port4_out => crossbar_out_port(4),
6576  Port5_out => crossbar_out_port(5),
6577  Port6_out => crossbar_out_port(6),
6578  Port7_out => crossbar_out_port(7),
6579   Ctrl => Grant_signal);
6580end generate crossbar_switch7x7;
6581
6582
6583-- switch 8 ports
6584crossbar_switch8x8 : if number_of_ports = 8 generate
6585
6586Switch_Crossbar8_8: Crossbar
6587GENERIC MAP(number_of_crossbar_ports =>8)
6588  PORT MAP(
6589   Port1_in => crossbar_in_port(1),
6590   Port2_in => crossbar_in_port(2),
6591   Port3_in => crossbar_in_port(3),
6592   Port4_in => crossbar_in_port(4),
6593   Port5_in => crossbar_in_port(5),
6594   Port6_in => crossbar_in_port(6),
6595   Port7_in => crossbar_in_port(7),
6596   Port8_in => crossbar_in_port(8),
6597   Port9_in => "00000000",
6598   Port10_in => "00000000",
6599   Port11_in => "00000000",
6600   Port12_in => "00000000",
6601   Port13_in => "00000000",
6602   Port14_in => "00000000",
6603   Port15_in => "00000000",
6604   Port16_in => "00000000",
6605   Port1_pulse_in => crossbar_in_pulse(1),
6606   Port2_pulse_in => crossbar_in_pulse(2),
6607   Port3_pulse_in => crossbar_in_pulse(3),
6608   Port4_pulse_in => crossbar_in_pulse(4),
6609   Port5_pulse_in => crossbar_in_pulse(5),
6610   Port6_pulse_in => crossbar_in_pulse(6),
6611   Port7_pulse_in => crossbar_in_pulse(7),
6612   Port8_pulse_in => crossbar_in_pulse(8),
6613   Port9_pulse_in =>'0' ,
6614   Port10_pulse_in =>'0' ,
6615   Port11_pulse_in =>'0' ,
6616   Port12_pulse_in =>'0' ,
6617   Port13_pulse_in =>'0' ,
6618   Port14_pulse_in =>'0' ,
6619   Port15_pulse_in =>'0' ,
6620   Port16_pulse_in =>'0' ,
6621   Port1_pulse_out => crossbar_out_pulse(1),
6622   Port2_pulse_out => crossbar_out_pulse(2),
6623   Port3_pulse_out => crossbar_out_pulse(3),
6624   Port4_pulse_out => crossbar_out_pulse(4),
6625   Port5_pulse_out => crossbar_out_pulse(5),
6626   Port6_pulse_out => crossbar_out_pulse(6),
6627   Port7_pulse_out => crossbar_out_pulse(7),
6628   Port8_pulse_out => crossbar_out_pulse(8),
6629  Port1_out => crossbar_out_port(1),
6630  Port2_out => crossbar_out_port(2),
6631  Port3_out => crossbar_out_port(3),
6632  Port4_out => crossbar_out_port(4),
6633  Port5_out => crossbar_out_port(5),
6634  Port6_out => crossbar_out_port(6),
6635  Port7_out => crossbar_out_port(7),
6636  Port8_out => crossbar_out_port(8),
6637   Ctrl => Grant_signal);
6638end generate crossbar_switch8x8;
6639
6640
6641-- switch 9 ports
6642crossbar_switch9x9 : if number_of_ports = 9 generate
6643
6644Switch_Crossbar9_9: Crossbar
6645GENERIC MAP(number_of_crossbar_ports =>9)
6646  PORT MAP(
6647   Port1_in => crossbar_in_port(1),
6648   Port2_in => crossbar_in_port(2),
6649   Port3_in => crossbar_in_port(3),
6650   Port4_in => crossbar_in_port(4),
6651   Port5_in => crossbar_in_port(5),
6652   Port6_in => crossbar_in_port(6),
6653   Port7_in => crossbar_in_port(7),
6654   Port8_in => crossbar_in_port(8),
6655   Port9_in => crossbar_in_port(9),
6656   Port10_in => "00000000",
6657   Port11_in => "00000000",
6658   Port12_in => "00000000",
6659   Port13_in => "00000000",
6660   Port14_in => "00000000",
6661   Port15_in => "00000000",
6662   Port16_in => "00000000",
6663   Port1_pulse_in => crossbar_in_pulse(1),
6664   Port2_pulse_in => crossbar_in_pulse(2),
6665   Port3_pulse_in => crossbar_in_pulse(3),
6666   Port4_pulse_in => crossbar_in_pulse(4),
6667   Port5_pulse_in => crossbar_in_pulse(5),
6668   Port6_pulse_in => crossbar_in_pulse(6),
6669   Port7_pulse_in => crossbar_in_pulse(7),
6670   Port8_pulse_in => crossbar_in_pulse(8),
6671   Port9_pulse_in => crossbar_in_pulse(9),
6672   Port10_pulse_in =>'0' ,
6673   Port11_pulse_in =>'0' ,
6674   Port12_pulse_in =>'0' ,
6675   Port13_pulse_in =>'0' ,
6676   Port14_pulse_in =>'0' ,
6677   Port15_pulse_in =>'0' ,
6678   Port16_pulse_in =>'0' ,
6679   Port1_pulse_out => crossbar_out_pulse(1),
6680   Port2_pulse_out => crossbar_out_pulse(2),
6681   Port3_pulse_out => crossbar_out_pulse(3),
6682   Port4_pulse_out => crossbar_out_pulse(4),
6683   Port5_pulse_out => crossbar_out_pulse(5),
6684   Port6_pulse_out => crossbar_out_pulse(6),
6685   Port7_pulse_out => crossbar_out_pulse(7),
6686   Port8_pulse_out => crossbar_out_pulse(8),
6687   Port9_pulse_out => crossbar_out_pulse(9),
6688  Port1_out => crossbar_out_port(1),
6689  Port2_out => crossbar_out_port(2),
6690  Port3_out => crossbar_out_port(3),
6691  Port4_out => crossbar_out_port(4),
6692  Port5_out => crossbar_out_port(5),
6693  Port6_out => crossbar_out_port(6),
6694  Port7_out => crossbar_out_port(7),
6695  Port8_out => crossbar_out_port(8),
6696  Port9_out => crossbar_out_port(9),
6697   Ctrl => Grant_signal);
6698end generate crossbar_switch9x9;
6699
6700
6701-- switch 10 ports
6702crossbar_switch10x10 : if number_of_ports = 10 generate
6703
6704Switch_Crossbar10_10: Crossbar
6705GENERIC MAP(number_of_crossbar_ports =>10)
6706  PORT MAP(
6707   Port1_in => crossbar_in_port(1),
6708   Port2_in => crossbar_in_port(2),
6709   Port3_in => crossbar_in_port(3),
6710   Port4_in => crossbar_in_port(4),
6711   Port5_in => crossbar_in_port(5),
6712   Port6_in => crossbar_in_port(6),
6713   Port7_in => crossbar_in_port(7),
6714   Port8_in => crossbar_in_port(8),
6715   Port9_in => crossbar_in_port(9),
6716   Port10_in => crossbar_in_port(10),
6717   Port11_in => "00000000",
6718   Port12_in => "00000000",
6719   Port13_in => "00000000",
6720   Port14_in => "00000000",
6721   Port15_in => "00000000",
6722   Port16_in => "00000000",
6723   Port1_pulse_in => crossbar_in_pulse(1),
6724   Port2_pulse_in => crossbar_in_pulse(2),
6725   Port3_pulse_in => crossbar_in_pulse(3),
6726   Port4_pulse_in => crossbar_in_pulse(4),
6727   Port5_pulse_in => crossbar_in_pulse(5),
6728   Port6_pulse_in => crossbar_in_pulse(6),
6729   Port7_pulse_in => crossbar_in_pulse(7),
6730   Port8_pulse_in => crossbar_in_pulse(8),
6731   Port9_pulse_in => crossbar_in_pulse(9),
6732   Port10_pulse_in => crossbar_in_pulse(10),
6733   Port11_pulse_in =>'0' ,
6734   Port12_pulse_in =>'0' ,
6735   Port13_pulse_in =>'0' ,
6736   Port14_pulse_in =>'0' ,
6737   Port15_pulse_in =>'0' ,
6738   Port16_pulse_in =>'0' ,
6739   Port1_pulse_out => crossbar_out_pulse(1),
6740   Port2_pulse_out => crossbar_out_pulse(2),
6741   Port3_pulse_out => crossbar_out_pulse(3),
6742   Port4_pulse_out => crossbar_out_pulse(4),
6743   Port5_pulse_out => crossbar_out_pulse(5),
6744   Port6_pulse_out => crossbar_out_pulse(6),
6745   Port7_pulse_out => crossbar_out_pulse(7),
6746   Port8_pulse_out => crossbar_out_pulse(8),
6747   Port9_pulse_out => crossbar_out_pulse(9),
6748   Port10_pulse_out => crossbar_out_pulse(10),
6749  Port1_out => crossbar_out_port(1),
6750  Port2_out => crossbar_out_port(2),
6751  Port3_out => crossbar_out_port(3),
6752  Port4_out => crossbar_out_port(4),
6753  Port5_out => crossbar_out_port(5),
6754  Port6_out => crossbar_out_port(6),
6755  Port7_out => crossbar_out_port(7),
6756  Port8_out => crossbar_out_port(8),
6757  Port9_out => crossbar_out_port(9),
6758  Port10_out => crossbar_out_port(10),
6759   Ctrl => Grant_signal);
6760end generate crossbar_switch10x10;
6761
6762
6763-- switch 11 ports
6764crossbar_switch11x11 : if number_of_ports = 11 generate
6765
6766Switch_Crossbar11_11: Crossbar
6767GENERIC MAP(number_of_crossbar_ports =>11)
6768  PORT MAP(
6769   Port1_in => crossbar_in_port(1),
6770   Port2_in => crossbar_in_port(2),
6771   Port3_in => crossbar_in_port(3),
6772   Port4_in => crossbar_in_port(4),
6773   Port5_in => crossbar_in_port(5),
6774   Port6_in => crossbar_in_port(6),
6775   Port7_in => crossbar_in_port(7),
6776   Port8_in => crossbar_in_port(8),
6777   Port9_in => crossbar_in_port(9),
6778   Port10_in => crossbar_in_port(10),
6779   Port11_in => crossbar_in_port(11),
6780   Port12_in => "00000000",
6781   Port13_in => "00000000",
6782   Port14_in => "00000000",
6783   Port15_in => "00000000",
6784   Port16_in => "00000000",
6785   Port1_pulse_in => crossbar_in_pulse(1),
6786   Port2_pulse_in => crossbar_in_pulse(2),
6787   Port3_pulse_in => crossbar_in_pulse(3),
6788   Port4_pulse_in => crossbar_in_pulse(4),
6789   Port5_pulse_in => crossbar_in_pulse(5),
6790   Port6_pulse_in => crossbar_in_pulse(6),
6791   Port7_pulse_in => crossbar_in_pulse(7),
6792   Port8_pulse_in => crossbar_in_pulse(8),
6793   Port9_pulse_in => crossbar_in_pulse(9),
6794   Port10_pulse_in => crossbar_in_pulse(10),
6795   Port11_pulse_in => crossbar_in_pulse(11),
6796   Port12_pulse_in =>'0' ,
6797   Port13_pulse_in =>'0' ,
6798   Port14_pulse_in =>'0' ,
6799   Port15_pulse_in =>'0' ,
6800   Port16_pulse_in =>'0' ,
6801   Port1_pulse_out => crossbar_out_pulse(1),
6802   Port2_pulse_out => crossbar_out_pulse(2),
6803   Port3_pulse_out => crossbar_out_pulse(3),
6804   Port4_pulse_out => crossbar_out_pulse(4),
6805   Port5_pulse_out => crossbar_out_pulse(5),
6806   Port6_pulse_out => crossbar_out_pulse(6),
6807   Port7_pulse_out => crossbar_out_pulse(7),
6808   Port8_pulse_out => crossbar_out_pulse(8),
6809   Port9_pulse_out => crossbar_out_pulse(9),
6810   Port10_pulse_out => crossbar_out_pulse(10),
6811   Port11_pulse_out => crossbar_out_pulse(11),
6812  Port1_out => crossbar_out_port(1),
6813  Port2_out => crossbar_out_port(2),
6814  Port3_out => crossbar_out_port(3),
6815  Port4_out => crossbar_out_port(4),
6816  Port5_out => crossbar_out_port(5),
6817  Port6_out => crossbar_out_port(6),
6818  Port7_out => crossbar_out_port(7),
6819  Port8_out => crossbar_out_port(8),
6820  Port9_out => crossbar_out_port(9),
6821  Port10_out => crossbar_out_port(10),
6822  Port11_out => crossbar_out_port(11),
6823   Ctrl => Grant_signal);
6824end generate crossbar_switch11x11;
6825
6826
6827-- switch 12 ports
6828crossbar_switch12x12 : if number_of_ports = 12 generate
6829
6830Switch_Crossbar12_12: Crossbar
6831GENERIC MAP(number_of_crossbar_ports =>12)
6832  PORT MAP(
6833   Port1_in => crossbar_in_port(1),
6834   Port2_in => crossbar_in_port(2),
6835   Port3_in => crossbar_in_port(3),
6836   Port4_in => crossbar_in_port(4),
6837   Port5_in => crossbar_in_port(5),
6838   Port6_in => crossbar_in_port(6),
6839   Port7_in => crossbar_in_port(7),
6840   Port8_in => crossbar_in_port(8),
6841   Port9_in => crossbar_in_port(9),
6842   Port10_in => crossbar_in_port(10),
6843   Port11_in => crossbar_in_port(11),
6844   Port12_in => crossbar_in_port(12),
6845   Port13_in => "00000000",
6846   Port14_in => "00000000",
6847   Port15_in => "00000000",
6848   Port16_in => "00000000",
6849   Port1_pulse_in => crossbar_in_pulse(1),
6850   Port2_pulse_in => crossbar_in_pulse(2),
6851   Port3_pulse_in => crossbar_in_pulse(3),
6852   Port4_pulse_in => crossbar_in_pulse(4),
6853   Port5_pulse_in => crossbar_in_pulse(5),
6854   Port6_pulse_in => crossbar_in_pulse(6),
6855   Port7_pulse_in => crossbar_in_pulse(7),
6856   Port8_pulse_in => crossbar_in_pulse(8),
6857   Port9_pulse_in => crossbar_in_pulse(9),
6858   Port10_pulse_in => crossbar_in_pulse(10),
6859   Port11_pulse_in => crossbar_in_pulse(11),
6860   Port12_pulse_in => crossbar_in_pulse(12),
6861   Port13_pulse_in =>'0' ,
6862   Port14_pulse_in =>'0' ,
6863   Port15_pulse_in =>'0' ,
6864   Port16_pulse_in =>'0' ,
6865   Port1_pulse_out => crossbar_out_pulse(1),
6866   Port2_pulse_out => crossbar_out_pulse(2),
6867   Port3_pulse_out => crossbar_out_pulse(3),
6868   Port4_pulse_out => crossbar_out_pulse(4),
6869   Port5_pulse_out => crossbar_out_pulse(5),
6870   Port6_pulse_out => crossbar_out_pulse(6),
6871   Port7_pulse_out => crossbar_out_pulse(7),
6872   Port8_pulse_out => crossbar_out_pulse(8),
6873   Port9_pulse_out => crossbar_out_pulse(9),
6874   Port10_pulse_out => crossbar_out_pulse(10),
6875   Port11_pulse_out => crossbar_out_pulse(11),
6876   Port12_pulse_out => crossbar_out_pulse(12),
6877  Port1_out => crossbar_out_port(1),
6878  Port2_out => crossbar_out_port(2),
6879  Port3_out => crossbar_out_port(3),
6880  Port4_out => crossbar_out_port(4),
6881  Port5_out => crossbar_out_port(5),
6882  Port6_out => crossbar_out_port(6),
6883  Port7_out => crossbar_out_port(7),
6884  Port8_out => crossbar_out_port(8),
6885  Port9_out => crossbar_out_port(9),
6886  Port10_out => crossbar_out_port(10),
6887  Port11_out => crossbar_out_port(11),
6888  Port12_out => crossbar_out_port(12),
6889   Ctrl => Grant_signal);
6890end generate crossbar_switch12x12;
6891
6892
6893-- switch 13 ports
6894crossbar_switch13x13 : if number_of_ports = 13 generate
6895
6896Switch_Crossbar13_13: Crossbar
6897GENERIC MAP(number_of_crossbar_ports =>13)
6898  PORT MAP(
6899   Port1_in => crossbar_in_port(1),
6900   Port2_in => crossbar_in_port(2),
6901   Port3_in => crossbar_in_port(3),
6902   Port4_in => crossbar_in_port(4),
6903   Port5_in => crossbar_in_port(5),
6904   Port6_in => crossbar_in_port(6),
6905   Port7_in => crossbar_in_port(7),
6906   Port8_in => crossbar_in_port(8),
6907   Port9_in => crossbar_in_port(9),
6908   Port10_in => crossbar_in_port(10),
6909   Port11_in => crossbar_in_port(11),
6910   Port12_in => crossbar_in_port(12),
6911   Port13_in => crossbar_in_port(13),
6912   Port14_in => "00000000",
6913   Port15_in => "00000000",
6914   Port16_in => "00000000",
6915   Port1_pulse_in => crossbar_in_pulse(1),
6916   Port2_pulse_in => crossbar_in_pulse(2),
6917   Port3_pulse_in => crossbar_in_pulse(3),
6918   Port4_pulse_in => crossbar_in_pulse(4),
6919   Port5_pulse_in => crossbar_in_pulse(5),
6920   Port6_pulse_in => crossbar_in_pulse(6),
6921   Port7_pulse_in => crossbar_in_pulse(7),
6922   Port8_pulse_in => crossbar_in_pulse(8),
6923   Port9_pulse_in => crossbar_in_pulse(9),
6924   Port10_pulse_in => crossbar_in_pulse(10),
6925   Port11_pulse_in => crossbar_in_pulse(11),
6926   Port12_pulse_in => crossbar_in_pulse(12),
6927   Port13_pulse_in => crossbar_in_pulse(13),
6928   Port14_pulse_in =>'0' ,
6929   Port15_pulse_in =>'0' ,
6930   Port16_pulse_in =>'0' ,
6931   Port1_pulse_out => crossbar_out_pulse(1),
6932   Port2_pulse_out => crossbar_out_pulse(2),
6933   Port3_pulse_out => crossbar_out_pulse(3),
6934   Port4_pulse_out => crossbar_out_pulse(4),
6935   Port5_pulse_out => crossbar_out_pulse(5),
6936   Port6_pulse_out => crossbar_out_pulse(6),
6937   Port7_pulse_out => crossbar_out_pulse(7),
6938   Port8_pulse_out => crossbar_out_pulse(8),
6939   Port9_pulse_out => crossbar_out_pulse(9),
6940   Port10_pulse_out => crossbar_out_pulse(10),
6941   Port11_pulse_out => crossbar_out_pulse(11),
6942   Port12_pulse_out => crossbar_out_pulse(12),
6943   Port13_pulse_out => crossbar_out_pulse(13),
6944  Port1_out => crossbar_out_port(1),
6945  Port2_out => crossbar_out_port(2),
6946  Port3_out => crossbar_out_port(3),
6947  Port4_out => crossbar_out_port(4),
6948  Port5_out => crossbar_out_port(5),
6949  Port6_out => crossbar_out_port(6),
6950  Port7_out => crossbar_out_port(7),
6951  Port8_out => crossbar_out_port(8),
6952  Port9_out => crossbar_out_port(9),
6953  Port10_out => crossbar_out_port(10),
6954  Port11_out => crossbar_out_port(11),
6955  Port12_out => crossbar_out_port(12),
6956  Port13_out => crossbar_out_port(13),
6957   Ctrl => Grant_signal);
6958end generate crossbar_switch13x13;
6959
6960
6961-- switch 14 ports
6962crossbar_switch14x14 : if number_of_ports = 14 generate
6963
6964Switch_Crossbar14_14: Crossbar
6965GENERIC MAP(number_of_crossbar_ports =>14)
6966  PORT MAP(
6967   Port1_in => crossbar_in_port(1),
6968   Port2_in => crossbar_in_port(2),
6969   Port3_in => crossbar_in_port(3),
6970   Port4_in => crossbar_in_port(4),
6971   Port5_in => crossbar_in_port(5),
6972   Port6_in => crossbar_in_port(6),
6973   Port7_in => crossbar_in_port(7),
6974   Port8_in => crossbar_in_port(8),
6975   Port9_in => crossbar_in_port(9),
6976   Port10_in => crossbar_in_port(10),
6977   Port11_in => crossbar_in_port(11),
6978   Port12_in => crossbar_in_port(12),
6979   Port13_in => crossbar_in_port(13),
6980   Port14_in => crossbar_in_port(14),
6981   Port15_in => "00000000",
6982   Port16_in => "00000000",
6983   Port1_pulse_in => crossbar_in_pulse(1),
6984   Port2_pulse_in => crossbar_in_pulse(2),
6985   Port3_pulse_in => crossbar_in_pulse(3),
6986   Port4_pulse_in => crossbar_in_pulse(4),
6987   Port5_pulse_in => crossbar_in_pulse(5),
6988   Port6_pulse_in => crossbar_in_pulse(6),
6989   Port7_pulse_in => crossbar_in_pulse(7),
6990   Port8_pulse_in => crossbar_in_pulse(8),
6991   Port9_pulse_in => crossbar_in_pulse(9),
6992   Port10_pulse_in => crossbar_in_pulse(10),
6993   Port11_pulse_in => crossbar_in_pulse(11),
6994   Port12_pulse_in => crossbar_in_pulse(12),
6995   Port13_pulse_in => crossbar_in_pulse(13),
6996   Port14_pulse_in => crossbar_in_pulse(14),
6997   Port15_pulse_in =>'0' ,
6998   Port16_pulse_in =>'0' ,
6999   Port1_pulse_out => crossbar_out_pulse(1),
7000   Port2_pulse_out => crossbar_out_pulse(2),
7001   Port3_pulse_out => crossbar_out_pulse(3),
7002   Port4_pulse_out => crossbar_out_pulse(4),
7003   Port5_pulse_out => crossbar_out_pulse(5),
7004   Port6_pulse_out => crossbar_out_pulse(6),
7005   Port7_pulse_out => crossbar_out_pulse(7),
7006   Port8_pulse_out => crossbar_out_pulse(8),
7007   Port9_pulse_out => crossbar_out_pulse(9),
7008   Port10_pulse_out => crossbar_out_pulse(10),
7009   Port11_pulse_out => crossbar_out_pulse(11),
7010   Port12_pulse_out => crossbar_out_pulse(12),
7011   Port13_pulse_out => crossbar_out_pulse(13),
7012   Port14_pulse_out => crossbar_out_pulse(14),
7013  Port1_out => crossbar_out_port(1),
7014  Port2_out => crossbar_out_port(2),
7015  Port3_out => crossbar_out_port(3),
7016  Port4_out => crossbar_out_port(4),
7017  Port5_out => crossbar_out_port(5),
7018  Port6_out => crossbar_out_port(6),
7019  Port7_out => crossbar_out_port(7),
7020  Port8_out => crossbar_out_port(8),
7021  Port9_out => crossbar_out_port(9),
7022  Port10_out => crossbar_out_port(10),
7023  Port11_out => crossbar_out_port(11),
7024  Port12_out => crossbar_out_port(12),
7025  Port13_out => crossbar_out_port(13),
7026  Port14_out => crossbar_out_port(14),
7027   Ctrl => Grant_signal);
7028end generate crossbar_switch14x14;
7029
7030
7031-- switch 15 ports
7032crossbar_switch15x15 : if number_of_ports = 15 generate
7033
7034Switch_Crossbar15_15: Crossbar
7035GENERIC MAP(number_of_crossbar_ports =>15)
7036  PORT MAP(
7037   Port1_in => crossbar_in_port(1),
7038   Port2_in => crossbar_in_port(2),
7039   Port3_in => crossbar_in_port(3),
7040   Port4_in => crossbar_in_port(4),
7041   Port5_in => crossbar_in_port(5),
7042   Port6_in => crossbar_in_port(6),
7043   Port7_in => crossbar_in_port(7),
7044   Port8_in => crossbar_in_port(8),
7045   Port9_in => crossbar_in_port(9),
7046   Port10_in => crossbar_in_port(10),
7047   Port11_in => crossbar_in_port(11),
7048   Port12_in => crossbar_in_port(12),
7049   Port13_in => crossbar_in_port(13),
7050   Port14_in => crossbar_in_port(14),
7051   Port15_in => crossbar_in_port(15),
7052   Port16_in => "00000000",
7053   Port1_pulse_in => crossbar_in_pulse(1),
7054   Port2_pulse_in => crossbar_in_pulse(2),
7055   Port3_pulse_in => crossbar_in_pulse(3),
7056   Port4_pulse_in => crossbar_in_pulse(4),
7057   Port5_pulse_in => crossbar_in_pulse(5),
7058   Port6_pulse_in => crossbar_in_pulse(6),
7059   Port7_pulse_in => crossbar_in_pulse(7),
7060   Port8_pulse_in => crossbar_in_pulse(8),
7061   Port9_pulse_in => crossbar_in_pulse(9),
7062   Port10_pulse_in => crossbar_in_pulse(10),
7063   Port11_pulse_in => crossbar_in_pulse(11),
7064   Port12_pulse_in => crossbar_in_pulse(12),
7065   Port13_pulse_in => crossbar_in_pulse(13),
7066   Port14_pulse_in => crossbar_in_pulse(14),
7067   Port15_pulse_in => crossbar_in_pulse(15),
7068   Port16_pulse_in =>'0' ,
7069   Port1_pulse_out => crossbar_out_pulse(1),
7070   Port2_pulse_out => crossbar_out_pulse(2),
7071   Port3_pulse_out => crossbar_out_pulse(3),
7072   Port4_pulse_out => crossbar_out_pulse(4),
7073   Port5_pulse_out => crossbar_out_pulse(5),
7074   Port6_pulse_out => crossbar_out_pulse(6),
7075   Port7_pulse_out => crossbar_out_pulse(7),
7076   Port8_pulse_out => crossbar_out_pulse(8),
7077   Port9_pulse_out => crossbar_out_pulse(9),
7078   Port10_pulse_out => crossbar_out_pulse(10),
7079   Port11_pulse_out => crossbar_out_pulse(11),
7080   Port12_pulse_out => crossbar_out_pulse(12),
7081   Port13_pulse_out => crossbar_out_pulse(13),
7082   Port14_pulse_out => crossbar_out_pulse(14),
7083   Port15_pulse_out => crossbar_out_pulse(15),
7084  Port1_out => crossbar_out_port(1),
7085  Port2_out => crossbar_out_port(2),
7086  Port3_out => crossbar_out_port(3),
7087  Port4_out => crossbar_out_port(4),
7088  Port5_out => crossbar_out_port(5),
7089  Port6_out => crossbar_out_port(6),
7090  Port7_out => crossbar_out_port(7),
7091  Port8_out => crossbar_out_port(8),
7092  Port9_out => crossbar_out_port(9),
7093  Port10_out => crossbar_out_port(10),
7094  Port11_out => crossbar_out_port(11),
7095  Port12_out => crossbar_out_port(12),
7096  Port13_out => crossbar_out_port(13),
7097  Port14_out => crossbar_out_port(14),
7098  Port15_out => crossbar_out_port(15),
7099   Ctrl => Grant_signal);
7100end generate crossbar_switch15x15;
7101
7102
7103-- switch 16 ports
7104crossbar_switch16x16 : if number_of_ports = 16 generate
7105
7106Switch_Crossbar16_16: Crossbar
7107GENERIC MAP(number_of_crossbar_ports =>16)
7108  PORT MAP(
7109   Port1_in => crossbar_in_port(1),
7110   Port2_in => crossbar_in_port(2),
7111   Port3_in => crossbar_in_port(3),
7112   Port4_in => crossbar_in_port(4),
7113   Port5_in => crossbar_in_port(5),
7114   Port6_in => crossbar_in_port(6),
7115   Port7_in => crossbar_in_port(7),
7116   Port8_in => crossbar_in_port(8),
7117   Port9_in => crossbar_in_port(9),
7118   Port10_in => crossbar_in_port(10),
7119   Port11_in => crossbar_in_port(11),
7120   Port12_in => crossbar_in_port(12),
7121   Port13_in => crossbar_in_port(13),
7122   Port14_in => crossbar_in_port(14),
7123   Port15_in => crossbar_in_port(15),
7124   Port16_in => crossbar_in_port(16),
7125   Port1_pulse_in => crossbar_in_pulse(1),
7126   Port2_pulse_in => crossbar_in_pulse(2),
7127   Port3_pulse_in => crossbar_in_pulse(3),
7128   Port4_pulse_in => crossbar_in_pulse(4),
7129   Port5_pulse_in => crossbar_in_pulse(5),
7130   Port6_pulse_in => crossbar_in_pulse(6),
7131   Port7_pulse_in => crossbar_in_pulse(7),
7132   Port8_pulse_in => crossbar_in_pulse(8),
7133   Port9_pulse_in => crossbar_in_pulse(9),
7134   Port10_pulse_in => crossbar_in_pulse(10),
7135   Port11_pulse_in => crossbar_in_pulse(11),
7136   Port12_pulse_in => crossbar_in_pulse(12),
7137   Port13_pulse_in => crossbar_in_pulse(13),
7138   Port14_pulse_in => crossbar_in_pulse(14),
7139   Port15_pulse_in => crossbar_in_pulse(15),
7140   Port16_pulse_in => crossbar_in_pulse(16),
7141   Port1_pulse_out => crossbar_out_pulse(1),
7142   Port2_pulse_out => crossbar_out_pulse(2),
7143   Port3_pulse_out => crossbar_out_pulse(3),
7144   Port4_pulse_out => crossbar_out_pulse(4),
7145   Port5_pulse_out => crossbar_out_pulse(5),
7146   Port6_pulse_out => crossbar_out_pulse(6),
7147   Port7_pulse_out => crossbar_out_pulse(7),
7148   Port8_pulse_out => crossbar_out_pulse(8),
7149   Port9_pulse_out => crossbar_out_pulse(9),
7150   Port10_pulse_out => crossbar_out_pulse(10),
7151   Port11_pulse_out => crossbar_out_pulse(11),
7152   Port12_pulse_out => crossbar_out_pulse(12),
7153   Port13_pulse_out => crossbar_out_pulse(13),
7154   Port14_pulse_out => crossbar_out_pulse(14),
7155   Port15_pulse_out => crossbar_out_pulse(15),
7156   Port16_pulse_out => crossbar_out_pulse(16),
7157  Port1_out => crossbar_out_port(1),
7158  Port2_out => crossbar_out_port(2),
7159  Port3_out => crossbar_out_port(3),
7160  Port4_out => crossbar_out_port(4),
7161  Port5_out => crossbar_out_port(5),
7162  Port6_out => crossbar_out_port(6),
7163  Port7_out => crossbar_out_port(7),
7164  Port8_out => crossbar_out_port(8),
7165  Port9_out => crossbar_out_port(9),
7166  Port10_out => crossbar_out_port(10),
7167  Port11_out => crossbar_out_port(11),
7168  Port12_out => crossbar_out_port(12),
7169  Port13_out => crossbar_out_port(13),
7170  Port14_out => crossbar_out_port(14),
7171  Port15_out => crossbar_out_port(15),
7172  Port16_out => crossbar_out_port(16),
7173   Ctrl => Grant_signal);
7174end generate crossbar_switch16x16;
7175-- intstanciation et connexion du scheduler en fonction du nombre de ports
7176-- le circuit genere depend du parametre generique nombre de ports
7177-- switch 2 ports
7178scheduler_switch2x2 : if number_of_ports = 2 generate
7179
7180Scheduler2_2: Scheduler
7181   GENERIC MAP(number_of_ports => 2 ) 
7182   PORT MAP(
7183     Request => Request_signal,
7184     Fifo_full => fifo_out_full_signal,
7185     clk => clk,
7186     priority_rotation =>priority_rotation_signal,
7187     reset => reset,
7188     port_grant => grant_signal
7189    );
7190
7191end generate scheduler_switch2x2;
7192
7193
7194-- switch 3 ports
7195scheduler_switch3x3 : if number_of_ports = 3 generate
7196
7197Scheduler3_3: Scheduler
7198   GENERIC MAP(number_of_ports => 3 ) 
7199   PORT MAP(
7200     Request => Request_signal,
7201     Fifo_full => fifo_out_full_signal,
7202     clk => clk,
7203     priority_rotation =>priority_rotation_signal,
7204     reset => reset,
7205     port_grant => grant_signal
7206    );
7207
7208end generate scheduler_switch3x3;
7209
7210
7211-- switch 4 ports
7212scheduler_switch4x4 : if number_of_ports = 4 generate
7213
7214Scheduler4_4: Scheduler
7215   GENERIC MAP(number_of_ports => 4 ) 
7216   PORT MAP(
7217     Request => Request_signal,
7218     Fifo_full => fifo_out_full_signal,
7219     clk => clk,
7220     priority_rotation =>priority_rotation_signal,
7221     reset => reset,
7222     port_grant => grant_signal
7223    );
7224
7225end generate scheduler_switch4x4;
7226
7227
7228-- switch 5 ports
7229scheduler_switch5x5 : if number_of_ports = 5 generate
7230
7231Scheduler5_5: Scheduler
7232   GENERIC MAP(number_of_ports => 5 ) 
7233   PORT MAP(
7234     Request => Request_signal,
7235     Fifo_full => fifo_out_full_signal,
7236     clk => clk,
7237     priority_rotation =>priority_rotation_signal,
7238     reset => reset,
7239     port_grant => grant_signal
7240    );
7241
7242end generate scheduler_switch5x5;
7243
7244
7245-- switch 6 ports
7246scheduler_switch6x6 : if number_of_ports = 6 generate
7247
7248Scheduler6_6: Scheduler
7249   GENERIC MAP(number_of_ports => 6 ) 
7250   PORT MAP(
7251     Request => Request_signal,
7252     Fifo_full => fifo_out_full_signal,
7253     clk => clk,
7254     priority_rotation =>priority_rotation_signal,
7255     reset => reset,
7256     port_grant => grant_signal
7257    );
7258
7259end generate scheduler_switch6x6;
7260
7261
7262-- switch 7 ports
7263scheduler_switch7x7 : if number_of_ports = 7 generate
7264
7265Scheduler7_7: Scheduler
7266   GENERIC MAP(number_of_ports => 7 ) 
7267   PORT MAP(
7268     Request => Request_signal,
7269     Fifo_full => fifo_out_full_signal,
7270     clk => clk,
7271     priority_rotation =>priority_rotation_signal,
7272     reset => reset,
7273     port_grant => grant_signal
7274    );
7275
7276end generate scheduler_switch7x7;
7277
7278
7279-- switch 8 ports
7280scheduler_switch8x8 : if number_of_ports = 8 generate
7281
7282Scheduler8_8: Scheduler
7283   GENERIC MAP(number_of_ports => 8 ) 
7284   PORT MAP(
7285     Request => Request_signal,
7286     Fifo_full => fifo_out_full_signal,
7287     clk => clk,
7288     priority_rotation =>priority_rotation_signal,
7289     reset => reset,
7290     port_grant => grant_signal
7291    );
7292
7293end generate scheduler_switch8x8;
7294
7295
7296-- switch 9 ports
7297scheduler_switch9x9 : if number_of_ports = 9 generate
7298
7299Scheduler9_9: Scheduler
7300   GENERIC MAP(number_of_ports => 9 ) 
7301   PORT MAP(
7302     Request => Request_signal,
7303     Fifo_full => fifo_out_full_signal,
7304     clk => clk,
7305     priority_rotation =>priority_rotation_signal,
7306     reset => reset,
7307     port_grant => grant_signal
7308    );
7309
7310end generate scheduler_switch9x9;
7311
7312
7313-- switch 10 ports
7314scheduler_switch10x10 : if number_of_ports = 10 generate
7315
7316Scheduler10_10: Scheduler
7317   GENERIC MAP(number_of_ports => 10 ) 
7318   PORT MAP(
7319     Request => Request_signal,
7320     Fifo_full => fifo_out_full_signal,
7321     clk => clk,
7322     priority_rotation =>priority_rotation_signal,
7323     reset => reset,
7324     port_grant => grant_signal
7325    );
7326
7327end generate scheduler_switch10x10;
7328
7329
7330-- switch 11 ports
7331scheduler_switch11x11 : if number_of_ports = 11 generate
7332
7333Scheduler11_11: Scheduler
7334   GENERIC MAP(number_of_ports => 11 ) 
7335   PORT MAP(
7336     Request => Request_signal,
7337     Fifo_full => fifo_out_full_signal,
7338     clk => clk,
7339     priority_rotation =>priority_rotation_signal,
7340     reset => reset,
7341     port_grant => grant_signal
7342    );
7343
7344end generate scheduler_switch11x11;
7345
7346
7347-- switch 12 ports
7348scheduler_switch12x12 : if number_of_ports = 12 generate
7349
7350Scheduler12_12: Scheduler
7351   GENERIC MAP(number_of_ports => 12 ) 
7352   PORT MAP(
7353     Request => Request_signal,
7354     Fifo_full => fifo_out_full_signal,
7355     clk => clk,
7356     priority_rotation =>priority_rotation_signal,
7357     reset => reset,
7358     port_grant => grant_signal
7359    );
7360
7361end generate scheduler_switch12x12;
7362
7363
7364-- switch 13 ports
7365scheduler_switch13x13 : if number_of_ports = 13 generate
7366
7367Scheduler13_13: Scheduler
7368   GENERIC MAP(number_of_ports => 13 ) 
7369   PORT MAP(
7370     Request => Request_signal,
7371     Fifo_full => fifo_out_full_signal,
7372     clk => clk,
7373     priority_rotation =>priority_rotation_signal,
7374     reset => reset,
7375     port_grant => grant_signal
7376    );
7377
7378end generate scheduler_switch13x13;
7379
7380
7381-- switch 14 ports
7382scheduler_switch14x14 : if number_of_ports = 14 generate
7383
7384Scheduler14_14: Scheduler
7385   GENERIC MAP(number_of_ports => 14 ) 
7386   PORT MAP(
7387     Request => Request_signal,
7388     Fifo_full => fifo_out_full_signal,
7389     clk => clk,
7390     priority_rotation =>priority_rotation_signal,
7391     reset => reset,
7392     port_grant => grant_signal
7393    );
7394
7395end generate scheduler_switch14x14;
7396
7397
7398-- switch 15 ports
7399scheduler_switch15x15 : if number_of_ports = 15 generate
7400
7401Scheduler15_15: Scheduler
7402   GENERIC MAP(number_of_ports => 15 ) 
7403   PORT MAP(
7404     Request => Request_signal,
7405     Fifo_full => fifo_out_full_signal,
7406     clk => clk,
7407     priority_rotation =>priority_rotation_signal,
7408     reset => reset,
7409     port_grant => grant_signal
7410    );
7411
7412end generate scheduler_switch15x15;
7413
7414
7415-- switch 16 ports
7416scheduler_switch16x16 : if number_of_ports = 16 generate
7417
7418Scheduler16_16: Scheduler
7419   GENERIC MAP(number_of_ports => 16 ) 
7420   PORT MAP(
7421     Request => Request_signal,
7422     Fifo_full => fifo_out_full_signal,
7423     clk => clk,
7424     priority_rotation =>priority_rotation_signal,
7425     reset => reset,
7426     port_grant => grant_signal
7427    );
7428
7429end generate scheduler_switch16x16;
7430
7431
7432end Behavioral;
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