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2 | <generated_project xmlns="http://www.xilinx.com/XMLSchema" xmlns:xil_pn="http://www.xilinx.com/XMLSchema"> |
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3 | |
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4 | <!-- --> |
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5 | |
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6 | <!-- For tool use only. Do not edit. --> |
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7 | |
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8 | <!-- --> |
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9 | |
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10 | <!-- ProjectNavigator created generated project file. --> |
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11 | |
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12 | <!-- For use in tracking generated file and other information --> |
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13 | |
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14 | <!-- allowing preservation of process status. --> |
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15 | |
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16 | <!-- --> |
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17 | |
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18 | <!-- Copyright (c) 1995-2010 Xilinx, Inc. All rights reserved. --> |
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19 | |
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20 | <version xmlns="http://www.xilinx.com/XMLSchema">11.1</version> |
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21 | |
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22 | <sourceproject xmlns="http://www.xilinx.com/XMLSchema" xil_pn:fileType="FILE_XISE" xil_pn:name="GENERIC_16_16.xise"/> |
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23 | |
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24 | <files xmlns="http://www.xilinx.com/XMLSchema"> |
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25 | <file xil_pn:fileType="FILE_NCD" xil_pn:name="FIFO_256_FWFT_guide.ncd" xil_pn:origination="imported"/> |
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26 | <file xil_pn:fileType="FILE_SYMBOL" xil_pn:name="OUTPUT_PORT_MODULE.sym" xil_pn:origination="imported"/> |
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27 | <file xil_pn:fileType="FILE_NCD" xil_pn:name="SWITCH_GENERIQUE_guide.ncd" xil_pn:origination="imported"/> |
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28 | <file xil_pn:fileType="FILE_NCD" xil_pn:name="SWITCH_GEN_guide.ncd" xil_pn:origination="imported"/> |
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29 | </files> |
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30 | |
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31 | <transforms xmlns="http://www.xilinx.com/XMLSchema"> |
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34 | <status xil_pn:value="ReadyToRun"/> |
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37 | <status xil_pn:value="SuccessfullyRun"/> |
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38 | <status xil_pn:value="ReadyToRun"/> |
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39 | <outfile xil_pn:name="../CORE_MPI/sim_fifo.vhd"/> |
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40 | <outfile xil_pn:name="Arbiter.vhd"/> |
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41 | <outfile xil_pn:name="C:/RomSwitch/testport5.vhd"/> |
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42 | <outfile xil_pn:name="CoreTypes.vhd"/> |
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43 | <outfile xil_pn:name="Crossbar.vhd"/> |
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44 | <outfile xil_pn:name="Crossbit.vhd"/> |
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46 | <outfile xil_pn:name="FIFO_DP.vhd"/> |
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47 | <outfile xil_pn:name="INPUT_PORT_MODULE.vhd"/> |
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48 | <outfile xil_pn:name="OUTPUT_PORT_MODULE.vhd"/> |
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49 | <outfile xil_pn:name="Proto_receiv.vhd"/> |
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65 | <outfile xil_pn:name="SCHEDULER9_9.VHD"/> |
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66 | <outfile xil_pn:name="SWITCH_GEN.vhd"/> |
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67 | <outfile xil_pn:name="SWITCH_GENERIQUE.vhd"/> |
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68 | <outfile xil_pn:name="Scheduler.vhd"/> |
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69 | <outfile xil_pn:name="conv.vhd"/> |
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70 | <outfile xil_pn:name="proto_send.vhd"/> |
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71 | <outfile xil_pn:name="stimuli1.vhd"/> |
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87 | <status xil_pn:value="SuccessfullyRun"/> |
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90 | <outfile xil_pn:name="Arbiter.vhd"/> |
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91 | <outfile xil_pn:name="C:/RomSwitch/testport5.vhd"/> |
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92 | <outfile xil_pn:name="CoreTypes.vhd"/> |
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93 | <outfile xil_pn:name="Crossbar.vhd"/> |
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94 | <outfile xil_pn:name="Crossbit.vhd"/> |
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95 | <outfile xil_pn:name="FIFO_256_FWFT.vhd"/> |
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96 | <outfile xil_pn:name="FIFO_DP.vhd"/> |
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97 | <outfile xil_pn:name="INPUT_PORT_MODULE.vhd"/> |
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98 | <outfile xil_pn:name="OUTPUT_PORT_MODULE.vhd"/> |
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99 | <outfile xil_pn:name="Proto_receiv.vhd"/> |
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118 | <outfile xil_pn:name="Scheduler.vhd"/> |
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121 | <outfile xil_pn:name="stimuli1.vhd"/> |
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128 | </transforms> |
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129 | |
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130 | </generated_project> |
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