source:
PROJECT_SMART_EEG/trunk/hw
Name | Size | Rev | Age | Author | Last Change |
---|---|---|---|---|---|
../ | |||||
waaves | 83 | 10 years | Initial Commit | ||
sync_sys | 89 | 10 years | Added Headline comments for Verilog files explaining their brief … | ||
projects | 88 | 10 years | Updating qsys file |
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