Ignore:
Timestamp:
Jan 15, 2014, 2:40:01 AM (10 years ago)
Author:
rolagamo
Message:
 
Location:
PROJECT_CORE_MPI/CORE_MPI/BRANCHES/v1.00/ipcore_dir
Files:
2 edited

Legend:

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  • PROJECT_CORE_MPI/CORE_MPI/BRANCHES/v1.00/ipcore_dir/coregen.cgc

    r15 r74  
    1515       </xilinx:projectOptions>
    1616       <xilinx:part>
    17          <xilinx:device>xc5vlx50t</xilinx:device>
    18          <xilinx:deviceFamily>virtex5</xilinx:deviceFamily>
    19          <xilinx:package>ff1136</xilinx:package>
     17         <xilinx:device>xc6slx75</xilinx:device>
     18         <xilinx:deviceFamily>spartan6</xilinx:deviceFamily>
     19         <xilinx:package>csg484</xilinx:package>
    2020         <xilinx:speedGrade>-3</xilinx:speedGrade>
    2121       </xilinx:part>

  • PROJECT_CORE_MPI/CORE_MPI/BRANCHES/v1.00/ipcore_dir/coregen.cgp

    r15 r74  
    11SET designentry = VHDL
    22SET BusFormat = BusFormatAngleBracketNotRipped
    3 SET devicefamily = virtex5
    4 SET device = xc5vlx50t
    5 SET package = ff1136
     3SET devicefamily = spartan6
     4SET device = xc6slx75
     5SET package = csg484
    66SET speedgrade = -3
    77SET FlowVendor = Foundation_ISE
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