[747] | 1 | #!/usr/bin/env python |
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[831] | 2 | """This file contains a mapping generator for the tsar_generic_iob platform""" |
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| 3 | |
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[806] | 4 | from math import log |
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[831] | 5 | from mapping import Mapping |
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[747] | 6 | |
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[831] | 7 | ################################################################################ |
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[747] | 8 | # file : arch.py (for the tsar_generic_iob architecture) |
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| 9 | # date : may 2014 |
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| 10 | # author : Alain Greiner |
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| 11 | # |
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[831] | 12 | # modified by: |
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| 13 | # Cesar Fuguet |
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| 14 | # - Adding distributed ROMs used by the distributed reconfiguration |
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| 15 | # procedure |
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| 16 | # |
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| 17 | ################################################################################ |
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| 18 | # This platform includes 6 external peripherals, accessible through two |
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| 19 | # IO_Bridge components located in cluster [0,0] and cluster [x_size-1, |
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| 20 | # y_size-1]. Available peripherals are: TTY, BDV, FBF, ROM, NIC, CMA. |
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| 21 | # |
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[747] | 22 | # The "constructor" parameters are: |
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| 23 | # - x_size : number of clusters in a row |
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| 24 | # - y_size : number of clusters in a column |
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| 25 | # - nb_procs : number of processors per cluster |
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[831] | 26 | # - fbf_width : frame_buffer width = frame_buffer heigth |
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[747] | 27 | # |
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[766] | 28 | # The "hidden" parameters (defined below) are: |
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[831] | 29 | # - NB_TTYS : number of TTY channels |
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| 30 | # - NB_NICS : number of NIC channels |
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| 31 | # - X_IO : cluster_io x coordinate |
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| 32 | # - Y_IO : cluster_io y coordinate |
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| 33 | # - X_WIDTH : number of bits for x coordinate |
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| 34 | # - Y_WIDTH : number of bits for y coordinate |
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[806] | 35 | # - p_width : number of bits for processor local id field |
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[831] | 36 | # - PADDR_WIDTH : number of bits for physical address |
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| 37 | # - IRQ_PER_PROC : number of input IRQs per processor |
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| 38 | # - USE_RAMDISK : use a ramdisk when True |
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| 39 | # - PERI_INCREMENT : virtual address increment for replicated peripherals |
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| 40 | # - PTAB_INCREMENT : virtual address increment for replicated page tables |
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| 41 | # - SCHED_INCREMENT: virtual address increment for replicated schedulers |
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| 42 | ################################################################################ |
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[747] | 43 | |
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[831] | 44 | # define architecture constants |
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| 45 | PADDR_WIDTH = 40 |
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| 46 | NB_TTYS = 1 |
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| 47 | NB_NICS = 2 |
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| 48 | FBF_WIDTH = 128 |
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| 49 | X_WIDTH = 4 |
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| 50 | Y_WIDTH = 4 |
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| 51 | X_IO = 0 |
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| 52 | Y_IO = 0 |
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| 53 | IRQ_PER_PROC = 4 |
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| 54 | USE_RAMDISK = False |
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[747] | 55 | |
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[831] | 56 | # virtual address increment for distributed memory segments in the GietVM OS |
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| 57 | PERI_INCREMENT = 0x10000 |
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| 58 | PTAB_INCREMENT = 0x200000 |
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| 59 | SCHED_INCREMENT = 0x10000 |
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[747] | 60 | |
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[831] | 61 | def pmsb(x, y): |
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| 62 | """This function returns the physical most signicant bits for the |
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| 63 | cluster(x,y)""" |
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[748] | 64 | |
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[831] | 65 | return (x << X_WIDTH) | y |
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[747] | 66 | |
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[831] | 67 | def arch(x_size=2, |
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| 68 | y_size=2, |
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| 69 | nb_procs=4, |
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| 70 | fbf_width=FBF_WIDTH): |
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| 71 | """This function describes the tsar_generic_iob platform and defines its |
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| 72 | parameters""" |
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[747] | 73 | |
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[831] | 74 | p_width = log(nb_procs, 2) |
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[747] | 75 | |
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[831] | 76 | # parameters checking |
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| 77 | assert nb_procs <= 4 |
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[747] | 78 | |
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[831] | 79 | assert ((x_size == 1) or (x_size == 2) or (x_size == 4) or (x_size == 8) or |
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| 80 | (x_size == 16)) |
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[747] | 81 | |
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[831] | 82 | assert ((y_size == 1) or (y_size == 2) or (y_size == 4) or (y_size == 8) or |
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| 83 | (y_size == 16)) |
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[747] | 84 | |
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[831] | 85 | assert NB_TTYS == 1 |
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[748] | 86 | |
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[831] | 87 | assert (((X_IO == 0) and (Y_IO == 0)) or |
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| 88 | ((X_IO == x_size-1) and (Y_IO == y_size-1))) |
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[747] | 89 | |
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[831] | 90 | platform_name = 'reconf-tsar_iob_%d_%d_%d' % (x_size, y_size, nb_procs) |
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[747] | 91 | |
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[831] | 92 | # define physical segments |
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| 93 | ram_base = 0x0000000000 |
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| 94 | if 1: |
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| 95 | ram_size = 0x4000000 # 64 Mbytes |
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| 96 | else: |
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| 97 | ram_size = 0x0040000 # 256 Kbytes |
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[747] | 98 | |
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[831] | 99 | xcu_base = 0x00B0000000 |
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| 100 | xcu_size = 0x1000 # 4 Kbytes |
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[747] | 101 | |
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[831] | 102 | dma_base = 0x00B1000000 |
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| 103 | dma_size = 0x1000 * nb_procs # 4 Kbytes * nb_procs |
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[747] | 104 | |
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[831] | 105 | mmc_base = 0x00B2000000 |
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| 106 | mmc_size = 0x1000 # 4 Kbytes |
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[748] | 107 | |
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[831] | 108 | rom_base = 0x00BFC00000 |
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| 109 | rom_size = 0x8000 # 32 Kbytes |
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[747] | 110 | |
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[831] | 111 | offset_io = pmsb(X_IO, Y_IO) << (PADDR_WIDTH - X_WIDTH - Y_WIDTH) |
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[747] | 112 | |
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[831] | 113 | bdv_base = 0x00B3000000 + offset_io |
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| 114 | bdv_size = 0x1000 # 4 kbytes |
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[747] | 115 | |
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[831] | 116 | tty_base = 0x00B4000000 + offset_io |
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| 117 | tty_size = 0x1000 # 4 Kbytes |
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[747] | 118 | |
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[831] | 119 | nic_base = 0x00B5000000 + offset_io |
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| 120 | nic_size = 0x80000 # 512 kbytes |
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[747] | 121 | |
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[831] | 122 | cma_base = 0x00B6000000 + offset_io |
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| 123 | cma_size = 0x1000 * 2 * NB_NICS # 4 kbytes * 2 * NB_NICS |
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[747] | 124 | |
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[831] | 125 | fbf_base = 0x00B7000000 + offset_io |
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| 126 | fbf_size = fbf_width * fbf_width # fbf_width * fbf_width bytes |
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[747] | 127 | |
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[831] | 128 | pic_base = 0x00B8000000 + offset_io |
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| 129 | pic_size = 0x1000 # 4 Kbytes |
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[769] | 130 | |
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[831] | 131 | sim_base = 0x00B9000000 + offset_io |
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| 132 | sim_size = 0x1000 # 4 kbytes |
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[747] | 133 | |
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[831] | 134 | iob_base = 0x00BE000000 + offset_io |
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| 135 | iob_size = 0x1000 # 4 kbytes |
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[747] | 136 | |
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[831] | 137 | # create mapping |
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| 138 | mapping = Mapping(name=platform_name, |
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| 139 | x_size=x_size, |
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| 140 | y_size=y_size, |
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| 141 | nprocs=nb_procs, |
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| 142 | x_width=X_WIDTH, |
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| 143 | y_width=Y_WIDTH, |
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| 144 | p_width=p_width, |
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| 145 | paddr_width=PADDR_WIDTH, |
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| 146 | coherence=True, |
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| 147 | irq_per_proc=IRQ_PER_PROC, |
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| 148 | use_ramdisk=USE_RAMDISK, |
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| 149 | x_io=X_IO, |
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| 150 | y_io=Y_IO, |
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| 151 | peri_increment=PERI_INCREMENT, |
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| 152 | ram_base=ram_base, |
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| 153 | ram_size=ram_size) |
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[747] | 154 | |
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[831] | 155 | # external peripherals (accessible in cluster[0,0] only for this mapping) |
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| 156 | mapping.addPeriph('IOB', base=iob_base, size=iob_size, |
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| 157 | ptype='IOB') |
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[748] | 158 | |
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[831] | 159 | mapping.addPeriph('BDV', base=bdv_base, size=bdv_size, |
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| 160 | ptype='IOC', subtype='BDV') |
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[747] | 161 | |
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[831] | 162 | mapping.addPeriph('TTY', base=tty_base, size=tty_size, |
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| 163 | ptype='TTY', channels=NB_TTYS) |
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[747] | 164 | |
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[831] | 165 | mapping.addPeriph('NIC', base=nic_base, size=nic_size, |
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| 166 | ptype='NIC', channels=NB_NICS) |
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[747] | 167 | |
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[831] | 168 | mapping.addPeriph('CMA', base=cma_base, size=cma_size, |
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| 169 | ptype='CMA', channels=2*NB_NICS) |
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[747] | 170 | |
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[831] | 171 | mapping.addPeriph('FBF', base=fbf_base, size=fbf_size, |
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| 172 | ptype='FBF', arg=fbf_width) |
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[747] | 173 | |
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[831] | 174 | mapping.addPeriph('SIM', base=sim_base, size=sim_size, |
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| 175 | ptype='SIM') |
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[747] | 176 | |
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[831] | 177 | pic = mapping.addPeriph('PIC', base=pic_base, size=pic_size, |
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| 178 | ptype='PIC', channels=32) |
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[747] | 179 | |
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[831] | 180 | mapping.addIrq(pic, index=0, isrtype='ISR_NIC_RX', channel=0) |
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| 181 | mapping.addIrq(pic, index=1, isrtype='ISR_NIC_RX', channel=1) |
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| 182 | mapping.addIrq(pic, index=2, isrtype='ISR_NIC_TX', channel=0) |
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| 183 | mapping.addIrq(pic, index=3, isrtype='ISR_NIC_TX', channel=1) |
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| 184 | mapping.addIrq(pic, index=4, isrtype='ISR_CMA', channel=0) |
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| 185 | mapping.addIrq(pic, index=5, isrtype='ISR_CMA', channel=1) |
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| 186 | mapping.addIrq(pic, index=6, isrtype='ISR_CMA', channel=2) |
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| 187 | mapping.addIrq(pic, index=7, isrtype='ISR_CMA', channel=3) |
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| 188 | mapping.addIrq(pic, index=8, isrtype='ISR_BDV', channel=0) |
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| 189 | mapping.addIrq(pic, index=9, isrtype='ISR_TTY_RX', channel=0) |
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[747] | 190 | |
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[831] | 191 | # hardware components replicated in all clusters |
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| 192 | for x in xrange(x_size): |
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| 193 | for y in xrange(y_size): |
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| 194 | offset = pmsb(x, y) << (PADDR_WIDTH - X_WIDTH - Y_WIDTH) |
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[747] | 195 | |
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[831] | 196 | mapping.addRam('RAM', base=ram_base + offset, size=ram_size) |
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[747] | 197 | |
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[831] | 198 | mapping.addPeriph('MMC', base=mmc_base + offset, size=mmc_size, |
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| 199 | ptype='MMC') |
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[747] | 200 | |
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[831] | 201 | mapping.addPeriph('ROM', base=rom_base + offset, size=rom_size, |
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| 202 | ptype='ROM') |
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[747] | 203 | |
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[831] | 204 | dma = mapping.addPeriph('DMA', base=dma_base + offset, |
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| 205 | size=dma_size, ptype='DMA', |
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| 206 | channels=nb_procs) |
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[747] | 207 | |
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[831] | 208 | xcu = mapping.addPeriph('XCU', base=xcu_base + offset, |
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| 209 | size=xcu_size, ptype='XCU', |
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| 210 | channels=nb_procs * IRQ_PER_PROC, |
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| 211 | arg=16) |
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[747] | 212 | |
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[831] | 213 | # MMC IRQ replicated in all clusters |
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| 214 | mapping.addIrq(xcu, index=0, isrtype='ISR_MMC') |
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[747] | 215 | |
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[831] | 216 | # DMA IRQ replicated in all clusters |
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| 217 | for i in xrange(dma.channels): |
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| 218 | mapping.addIrq(xcu, index=1+i, isrtype='ISR_DMA', |
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| 219 | channel=i) |
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[747] | 220 | |
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[831] | 221 | # processors |
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| 222 | for p in xrange(nb_procs): |
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| 223 | mapping.addProc(x, y, p) |
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[747] | 224 | |
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[831] | 225 | ############################################################################ |
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| 226 | # GIET_VM specifics |
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[747] | 227 | |
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[831] | 228 | # define bootloader vsegs base addresses |
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| 229 | bmapping_vbase = 0x00001000 # ident |
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| 230 | bmapping_size = 0x0007F000 # 508 Kbytes |
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[769] | 231 | |
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[831] | 232 | bcode_vbase = 0x00080000 # ident |
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| 233 | bcode_size = 0x00040000 # 256 Kbytes |
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[747] | 234 | |
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[831] | 235 | bdata_vbase = 0x000C0000 # ident |
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| 236 | bdata_size = 0x00080000 # 512 Kbytes |
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[747] | 237 | |
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[831] | 238 | bstack_vbase = 0x00140000 # ident |
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| 239 | bstack_size = 0x00050000 # 320 Kbytes |
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[747] | 240 | |
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[831] | 241 | # define kernel vsegs base addresses and sizes |
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| 242 | kcode_vbase = 0x80000000 |
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| 243 | kcode_size = 0x00080000 # 512 Kbytes |
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[747] | 244 | |
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[831] | 245 | kinit_vbase = 0x80800000 |
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| 246 | kinit_size = 0x00080000 # 512 Kbytes |
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[747] | 247 | |
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[831] | 248 | kdata_vbase = 0x80100000 |
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| 249 | kdata_size = 0x00080000 # 512 Kbytes |
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[747] | 250 | |
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[831] | 251 | kuncdata_vbase = 0x80180000 |
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| 252 | kuncdata_size = 0x00001000 # 4 Kbytes |
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[747] | 253 | |
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[831] | 254 | kptab_vbase = 0xC0000000 |
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| 255 | kptab_size = 0x00200000 # 512 Kbytes |
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[747] | 256 | |
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[831] | 257 | ksched_vbase = 0xF0000000 # distributed in all clusters |
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| 258 | ksched_size = 0x2000 * nb_procs # 8 kbytes per processor |
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[747] | 259 | |
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[831] | 260 | # global vsegs for boot_loader / identity mapping |
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| 261 | mapping.addGlobal('seg_boot_mapping', bmapping_vbase, bmapping_size, |
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| 262 | 'CXW_', vtype='BLOB', x=0, y=0, pseg='RAM', |
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| 263 | identity=True, local=False, big=True) |
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[747] | 264 | |
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[831] | 265 | mapping.addGlobal('seg_boot_code', bcode_vbase, bcode_size, |
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| 266 | 'CXW_', vtype='BUFFER', x=0, y=0, pseg='RAM', |
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| 267 | identity=True, local=False, big=True) |
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[747] | 268 | |
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[831] | 269 | mapping.addGlobal('seg_boot_data', bdata_vbase, bdata_size, |
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| 270 | 'CXW_', vtype='BUFFER', x=0, y=0, pseg='RAM', |
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| 271 | identity=True, local=False, big=True) |
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[748] | 272 | |
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[831] | 273 | mapping.addGlobal('seg_boot_stack', bstack_vbase, bstack_size, |
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| 274 | 'CXW_', vtype='BUFFER', x=0, y=0, pseg='RAM', |
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| 275 | identity=True, local=False, big=True) |
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[747] | 276 | |
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[831] | 277 | # the code global vsegs for kernel can be replicated in all clusters |
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| 278 | # if the page tables are distributed in all clusters. |
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| 279 | for x in xrange(x_size): |
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| 280 | for y in xrange(y_size): |
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| 281 | mapping.addGlobal('seg_kernel_code', kcode_vbase, kcode_size, |
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| 282 | 'CXW_', vtype='ELF', x=x, y=y, pseg='RAM', |
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| 283 | binpath='build/kernel/kernel.elf', |
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| 284 | local=True, big=True) |
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[770] | 285 | |
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[831] | 286 | mapping.addGlobal('seg_kernel_init', kinit_vbase, kinit_size, |
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| 287 | 'CXW_', vtype='ELF', x=x, y=y, pseg='RAM', |
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| 288 | binpath='build/kernel/kernel.elf', |
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| 289 | local=True, big=True) |
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[747] | 290 | |
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[831] | 291 | offset = pmsb(x, y) * PTAB_INCREMENT |
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| 292 | mapping.addGlobal('seg_kernel_ptab_%d_%d' % (x, y), |
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| 293 | kptab_vbase + offset, kptab_size, 'C_W_', |
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| 294 | vtype='PTAB', x=x, y=y, pseg='RAM', |
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| 295 | local=False, big=True) |
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[747] | 296 | |
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| 297 | |
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[831] | 298 | offset = pmsb(x, y) * SCHED_INCREMENT |
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| 299 | mapping.addGlobal('seg_kernel_sched_%d_%d' % (x, y), |
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| 300 | ksched_vbase + offset, ksched_size, 'C_W_', |
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| 301 | vtype='SCHED', x=x, y=y, pseg='RAM', |
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| 302 | local=False, big=False) |
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[747] | 303 | |
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[831] | 304 | # shared global vsegs for kernel |
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| 305 | mapping.addGlobal('seg_kernel_data', kdata_vbase, kdata_size, |
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| 306 | 'CXW_', vtype='ELF', x=0, y=0, pseg='RAM', |
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| 307 | binpath='build/kernel/kernel.elf', local=False, |
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| 308 | big=True) |
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[747] | 309 | |
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[831] | 310 | mapping.addGlobal('seg_kernel_uncdata', kuncdata_vbase, kuncdata_size, |
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| 311 | 'CXW_', vtype='ELF', x=0, y=0, pseg='RAM', |
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| 312 | binpath='build/kernel/kernel.elf', local=False, |
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| 313 | big=True) |
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[747] | 314 | |
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[831] | 315 | # global vsegs for external peripherals / identity mapping |
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| 316 | mapping.addGlobal('seg_iob', iob_base, iob_size, '__W_', vtype='PERI', |
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| 317 | x=X_IO, y=Y_IO, pseg='IOB', local=False, big=False) |
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[747] | 318 | |
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[831] | 319 | mapping.addGlobal('seg_bdv', bdv_base, bdv_size, '__W_', vtype='PERI', |
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| 320 | x=X_IO, y=Y_IO, pseg='BDV', local=False, big=False) |
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[747] | 321 | |
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[831] | 322 | mapping.addGlobal('seg_tty', tty_base, tty_size, '__W_', vtype='PERI', |
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| 323 | x=X_IO, y=Y_IO, pseg='TTY', local=False, big=False) |
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[747] | 324 | |
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[831] | 325 | mapping.addGlobal('seg_nic', nic_base, nic_size, '__W_', vtype='PERI', |
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| 326 | x=X_IO, y=Y_IO, pseg='NIC', local=False, big=False) |
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[747] | 327 | |
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[831] | 328 | mapping.addGlobal('seg_cma', cma_base, cma_size, '__W_', vtype='PERI', |
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| 329 | x=X_IO, y=Y_IO, pseg='CMA', local=False, big=False) |
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[747] | 330 | |
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[831] | 331 | mapping.addGlobal('seg_fbf', fbf_base, fbf_size, '__W_', vtype='PERI', |
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| 332 | x=X_IO, y=Y_IO, pseg='FBF', local=False, big=True) |
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[747] | 333 | |
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[831] | 334 | mapping.addGlobal('seg_pic', pic_base, pic_size, '__W_', vtype='PERI', |
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| 335 | x=X_IO, y=Y_IO, pseg='PIC', local=False, big=False) |
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[747] | 336 | |
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[831] | 337 | mapping.addGlobal('seg_sim', sim_base, sim_size, '__W_', vtype='PERI', |
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| 338 | x=X_IO, y=Y_IO, pseg='SIM', local=False, big=False) |
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[766] | 339 | |
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[831] | 340 | # global vsegs for internal peripherals |
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| 341 | for x in xrange(x_size): |
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| 342 | for y in xrange(y_size): |
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| 343 | offset = pmsb(x, y) * PERI_INCREMENT |
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[747] | 344 | |
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[831] | 345 | mapping.addGlobal('seg_rom_%d_%d' % (x, y), rom_base + offset, |
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| 346 | rom_size, 'CX__', vtype='PERI', x=x, y=y, |
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| 347 | pseg='ROM', local=False, big=False) |
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[747] | 348 | |
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[831] | 349 | mapping.addGlobal('seg_xcu_%d_%d' % (x, y), xcu_base + offset, |
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| 350 | xcu_size, '__W_', vtype='PERI', x=x, y=y, |
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| 351 | pseg='XCU', local=False, big=False) |
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[747] | 352 | |
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[831] | 353 | mapping.addGlobal('seg_dma_%d_%d' % (x, y), dma_base + offset, |
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| 354 | dma_size, '__W_', vtype='PERI', x=x, y=y, |
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| 355 | pseg='DMA', local=False, big=False) |
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[747] | 356 | |
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[831] | 357 | mapping.addGlobal('seg_mmc_%d_%d' % (x, y), mmc_base + offset, |
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| 358 | mmc_size, '__W_', vtype='PERI', x=x, y=y, |
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| 359 | pseg='MMC', local=False, big=False) |
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[747] | 360 | |
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| 361 | return mapping |
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| 362 | |
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[774] | 363 | def main(x, y, p, hard_path, xml_path): |
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[831] | 364 | """main function: it generates the map.xml and the hard_config.h file based |
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| 365 | on the Mapping object returned by arch()""" |
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| 366 | mapping = arch(x_size=x, |
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| 367 | y_size=y, |
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| 368 | nb_procs=p) |
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[774] | 369 | |
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| 370 | with open(xml_path, "w") as map_xml: |
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| 371 | map_xml.write(mapping.xml()) |
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| 372 | with open(hard_path, "w") as hard_config: |
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| 373 | hard_config.write(mapping.hard_config()) |
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| 374 | |
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[831] | 375 | ################################# platform test ################################ |
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[806] | 376 | import sys |
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[747] | 377 | if __name__ == '__main__': |
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[831] | 378 | main(x=int(sys.argv[1]), |
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| 379 | y=int(sys.argv[2]), |
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| 380 | p=int(sys.argv[3]), |
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| 381 | hard_path="hard_config.test.h", |
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| 382 | xml_path="map.test.xml") |
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[747] | 383 | |
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| 384 | # Local Variables: |
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| 385 | # tab-width: 4; |
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| 386 | # c-basic-offset: 4; |
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| 387 | # c-file-offsets:((innamespace . 0)(inline-open . 0)); |
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| 388 | # indent-tabs-mode: nil; |
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| 389 | # End: |
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| 390 | # |
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| 391 | # vim: filetype=python:expandtab:shiftwidth=4:tabstop=4:softtabstop=4 |
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| 392 | |
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