1 | #include <systemc> |
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2 | #include <sys/time.h> |
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3 | #include <iostream> |
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4 | #include <sstream> |
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5 | #include <cstdlib> |
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6 | #include <cstdarg> |
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7 | #include <stdint.h> |
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8 | #include <fstream> |
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9 | |
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10 | #include "mapping_table.h" |
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11 | #include "mips32.h" |
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12 | #include "vci_simhelper.h" |
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13 | #include "vci_simple_ram.h" |
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14 | #include "vci_multi_tty.h" |
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15 | #include "vci_xicu.h" |
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16 | #include "vci_simple_ring_fast.h" |
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17 | #include "vci_mem_cache_v4.h" |
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18 | #include "vci_cc_xcache_wrapper_v4.h" |
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19 | #include "alloc_elems.h" |
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20 | |
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21 | #include "iss/gdbserver.h" |
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22 | |
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23 | #include "segmentation.h" |
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24 | |
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25 | //=========================================== |
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26 | // Define before include |
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27 | //=========================================== |
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28 | |
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29 | // Parameters |
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30 | // * Platforms |
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31 | # define PARAM_VCI 4,8,32,1,1,1,8,4,4,1 |
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32 | |
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33 | # define USE_OLD_XCACHE 0 |
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34 | # define NB_PROC_MIN 1 |
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35 | # define NB_PROC_MAX 15 |
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36 | // fifo_depth |
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37 | # define PARAM_RING_P 2 |
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38 | # define PARAM_RING_C 2 |
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39 | # define PARAM_RING_X 2 |
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40 | // pti , hwi , wti, irq |
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41 | # define PARAM_XICU nb_proc*nb_cpu_by_cache, nb_proc*nb_cpu_by_cache, 0 , nb_proc*nb_cpu_by_cache |
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42 | //#define PARAM_XICU nb_proc, nb_proc, 0 , nb_proc |
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43 | |
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44 | // * Debug |
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45 | # define DEBUG_TOP 0 |
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46 | # define SOCVIEW 0 |
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47 | # define STOP_SIMULATION_NB_FRZ_CYCLES 100000 |
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48 | |
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49 | // * Simulation |
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50 | # define CONFIG_DEFAULT "configuration/default.cfg" |
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51 | # define NCYCLES_DEFAULT 0 |
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52 | # define SOFT_DEFAULT "soft/bin.soft" |
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53 | //=========================================== |
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54 | |
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55 | void usage (char * funcname) |
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56 | { |
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57 | std::cout << funcname << " [option] " << std::endl; |
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58 | std::cout << " * -NCYCLES int : number of simulated cycle, if 0 then no stop condition." << std::endl; |
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59 | std::cout << " default : " << NCYCLES_DEFAULT << " cycle(s)" << std::endl; |
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60 | std::cout << " * -CFG string : configuration file" << std::endl; |
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61 | std::cout << " - nb_proc," << std::endl; |
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62 | std::cout << " - nb_cpu_by_cache, nb_dcache," << std::endl; |
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63 | std::cout << " - iways, isets, iwords," << std::endl; |
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64 | std::cout << " - dways, dsets, dwords," << std::endl; |
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65 | std::cout << " - wnwords, wnlines, " << std::endl; |
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66 | std::cout << " - memc_nways, memc_nsets, memc_words, memc_heap_size." << std::endl; |
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67 | std::cout << " default : \"" << CONFIG_DEFAULT << "\"" << std::endl; |
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68 | std::cout << " * -SOFT string : software executed by this platform." << std::endl; |
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69 | std::cout << " default : \"" << SOFT_DEFAULT << "\"" << std::endl; |
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70 | |
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71 | exit(1); |
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72 | } |
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73 | |
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74 | int _main(int argc, char *argv[]) |
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75 | { |
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76 | int ncycles = NCYCLES_DEFAULT; |
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77 | char * config = CONFIG_DEFAULT; |
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78 | char * soft = SOFT_DEFAULT; |
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79 | |
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80 | if (argc > 1) |
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81 | { |
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82 | for( int n=1 ; n<argc ; n=n+2 ) |
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83 | { |
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84 | if( (strcmp(argv[n],"-NCYCLES") == 0) && (n+1<argc) ) |
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85 | { |
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86 | ncycles = atoi(argv[n+1]); |
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87 | } |
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88 | else if( (strcmp(argv[n],"-CFG") == 0) && (n+1<argc) ) |
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89 | { |
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90 | // strcpy(config, argv[n+1]); |
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91 | config = argv[n+1]; |
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92 | } |
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93 | else if( (strcmp(argv[n],"-SOFT") == 0) && (n+1<argc) ) |
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94 | { |
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95 | // strcpy(soft, argv[n+1]); |
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96 | soft = argv[n+1]; |
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97 | } |
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98 | else |
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99 | { |
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100 | usage(argv[0]); |
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101 | } |
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102 | } |
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103 | } |
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104 | |
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105 | if (ncycles == 0) |
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106 | ncycles = -1; |
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107 | |
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108 | uint32_t nb_proc; |
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109 | uint32_t nb_cpu_by_cache; |
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110 | uint32_t nb_dcache; |
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111 | uint32_t iways, isets, iwords; |
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112 | uint32_t dways, dsets, dwords; |
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113 | uint32_t wnwords, wnlines; |
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114 | uint32_t memc_nways, memc_nsets, memc_words, memc_heap_size; |
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115 | |
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116 | std::ifstream inFile; |
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117 | const char * filename = config; |
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118 | |
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119 | inFile.open(filename); |
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120 | |
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121 | if (!inFile) |
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122 | { |
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123 | std::cout << "Can't open file : \"" << filename << "\"." << std::endl; |
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124 | usage(argv[0]); |
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125 | } |
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126 | |
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127 | std::string str; |
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128 | if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);} |
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129 | nb_proc =std::atoi(str.c_str()); |
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130 | if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);} |
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131 | nb_cpu_by_cache =std::atoi(str.c_str()); |
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132 | if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);} |
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133 | nb_dcache =std::atoi(str.c_str()); |
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134 | if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);} |
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135 | iways =std::atoi(str.c_str()); |
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136 | if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);} |
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137 | isets =std::atoi(str.c_str()); |
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138 | if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);} |
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139 | iwords =std::atoi(str.c_str()); |
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140 | if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);} |
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141 | dways =std::atoi(str.c_str()); |
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142 | if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);} |
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143 | dsets =std::atoi(str.c_str()); |
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144 | if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);} |
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145 | dwords =std::atoi(str.c_str()); |
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146 | if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);} |
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147 | wnwords =std::atoi(str.c_str()); |
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148 | if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);} |
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149 | wnlines =std::atoi(str.c_str()); |
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150 | if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);} |
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151 | memc_nways =std::atoi(str.c_str()); |
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152 | if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);} |
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153 | memc_nsets =std::atoi(str.c_str()); |
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154 | if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);} |
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155 | memc_words =std::atoi(str.c_str()); |
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156 | if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);} |
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157 | memc_heap_size =std::atoi(str.c_str()); |
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158 | |
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159 | if (((nb_proc*nb_cpu_by_cache)<NB_PROC_MIN) or |
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160 | ((nb_proc*nb_cpu_by_cache)>NB_PROC_MAX)) |
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161 | { |
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162 | std::cout << "Parameters nb_proc is out of bound." << std::endl; |
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163 | usage(argv[0]); |
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164 | } |
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165 | |
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166 | std::cout << " * Parameters : " << std::endl; |
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167 | std::cout << " * nb_proc : " << nb_proc << std::endl; |
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168 | std::cout << " * nb_cpu_by_cache : " << nb_cpu_by_cache << std::endl; |
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169 | std::cout << " * nb_dcache : " << nb_dcache << std::endl; |
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170 | std::cout << " * iways : " << iways << std::endl; |
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171 | std::cout << " * isets : " << isets << std::endl; |
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172 | std::cout << " * iwords : " << iwords << std::endl; |
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173 | std::cout << " * dways : " << dways << std::endl; |
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174 | std::cout << " * dsets : " << dsets << std::endl; |
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175 | std::cout << " * dwords : " << dwords << std::endl; |
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176 | std::cout << " * wnwords : " << wnwords << std::endl; |
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177 | std::cout << " * wnlines : " << wnlines << std::endl; |
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178 | std::cout << " * memc_nways : " << memc_nways << std::endl; |
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179 | std::cout << " * memc_nsets : " << memc_nsets << std::endl; |
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180 | std::cout << " * memc_words : " << memc_words << std::endl; |
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181 | std::cout << " * memc_heap_size : " << memc_heap_size << std::endl; |
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182 | std::cout << " * Simulation : " << std::endl; |
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183 | std::cout << " * ncycles : " << ncycles << std::endl; |
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184 | std::cout << " * soft : " << soft << std::endl; |
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185 | |
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186 | using namespace sc_core; |
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187 | // Avoid repeating these everywhere |
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188 | using soclib::common::IntTab; |
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189 | using soclib::common::Segment; |
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190 | |
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191 | // Define VCI parameters |
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192 | typedef soclib::caba::VciParams<PARAM_VCI> vci_param; |
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193 | typedef soclib::common::GdbServer<soclib::common::Mips32ElIss> proc_iss; |
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194 | // Mapping table |
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195 | |
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196 | soclib::common::MappingTable maptabp(32, IntTab(8), IntTab(8), 0x00300000); // size, level_addr_bits, level_id_bits, cacheability_mask |
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197 | |
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198 | maptabp.add(Segment("reset" , RESET_BASE , RESET_SIZE , IntTab(2), true)); |
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199 | maptabp.add(Segment("excep" , EXCEP_BASE , EXCEP_SIZE , IntTab(2), true)); |
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200 | |
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201 | maptabp.add(Segment("tty" , TTY_BASE , TTY_SIZE , IntTab(1), false)); |
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202 | maptabp.add(Segment("text" , TEXT_BASE , TEXT_SIZE , IntTab(2), true)); |
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203 | maptabp.add(Segment("mc_r" , MC_R_BASE , MC_R_SIZE , IntTab(2), false, true, IntTab(0))); |
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204 | maptabp.add(Segment("mc_m" , MC_M_BASE , MC_M_SIZE , IntTab(2), true)); |
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205 | //maptabp.add(Segment("mc_u" , MC_U_BASE , MC_U_SIZE , IntTab(2), false)); |
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206 | //maptabp.add(Segment("ptba" , PTD_ADDR , TAB_SIZE , IntTab(2), true)); |
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207 | maptabp.add(Segment("xicu" , XICU_BASE , XICU_SIZE , IntTab(3), false)); |
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208 | maptabp.add(Segment("simhelper", SIMHELPER_BASE, SIMHELPER_SIZE, IntTab(4), false)); |
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209 | |
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210 | std::cout << maptabp << std::endl; |
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211 | |
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212 | soclib::common::MappingTable maptabc(32, IntTab(8), IntTab(8), 0x00300000); |
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213 | // for (uint32_t i=0; i<nb_proc; ++i) |
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214 | // for (uint32_t j=0; j<nb_cpu_by_cache; ++j) |
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215 | // { |
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216 | // std::ostringstream str; |
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217 | // str << "c_proc_" << i << "_" << j; |
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218 | // maptabc.add(Segment(str.str().c_str(), C_PROC_BASE+(i*nb_cpu_by_cache+j)*C_PROC_SPAN, C_PROC_SIZE , IntTab(i), false, true, IntTab(i))); |
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219 | // } |
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220 | for (uint32_t i=0; i<nb_proc; ++i) |
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221 | { |
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222 | std::ostringstream str; |
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223 | str << "c_proc_" << i; |
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224 | maptabc.add(Segment(str.str().c_str(), C_PROC_BASE+i*C_PROC_SPAN, C_PROC_SIZE , IntTab(i), false, true, IntTab(i))); |
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225 | } |
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226 | maptabc.add(Segment("mc_r" , MC_R_BASE , MC_R_SIZE , IntTab(nb_proc), false, false)); |
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227 | maptabc.add(Segment("mc_m" , MC_M_BASE , MC_M_SIZE , IntTab(nb_proc), false, false)); |
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228 | // maptabc.add(Segment("mc_u" , MC_U_BASE , MC_U_SIZE , IntTab(nb_proc), false, false)); |
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229 | maptabc.add(Segment("reset" , RESET_BASE , RESET_SIZE , IntTab(nb_proc), false, false)); |
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230 | maptabc.add(Segment("excep" , EXCEP_BASE , EXCEP_SIZE , IntTab(nb_proc), false, false)); |
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231 | maptabc.add(Segment("text" , TEXT_BASE , TEXT_SIZE , IntTab(nb_proc), false, false)); |
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232 | //maptabc.add(Segment("ptba" , PTD_ADDR , TAB_SIZE , IntTab(nb_proc), false, false)); |
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233 | |
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234 | std::cout << maptabc << std::endl; |
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235 | |
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236 | soclib::common::MappingTable maptabx(32, IntTab(8), IntTab(8), 0x00300000); |
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237 | maptabx.add(Segment("xram" , MC_M_BASE , MC_M_SIZE , IntTab(0), false)); |
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238 | // maptabx.add(Segment("uram" , MC_U_BASE , MC_U_SIZE , IntTab(0), false)); |
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239 | maptabx.add(Segment("reset", RESET_BASE, RESET_SIZE, IntTab(0), false)); |
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240 | maptabx.add(Segment("excep", EXCEP_BASE, EXCEP_SIZE, IntTab(0), false)); |
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241 | maptabx.add(Segment("text" , TEXT_BASE , TEXT_SIZE , IntTab(0), false)); |
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242 | // maptabx.add(Segment("ptba" , PTD_ADDR , TAB_SIZE , IntTab(0), false)); |
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243 | |
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244 | std::cout << maptabx << std::endl; |
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245 | |
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246 | // Signals |
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247 | sc_clock signal_clk("clk"); |
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248 | sc_signal<bool> signal_resetn("resetn"); |
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249 | |
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250 | sc_signal<bool> *** signal_proc_it = soclib::common::alloc_elems<sc_signal<bool> >("proc_it", nb_proc, nb_cpu_by_cache, 6); |
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251 | |
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252 | soclib::caba::VciSignals<vci_param> * signal_vci_ini_rw_proc = soclib::common::alloc_elems<soclib::caba::VciSignals<vci_param> >("vci_ini_rw_proc", nb_proc); |
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253 | soclib::caba::VciSignals<vci_param> * signal_vci_ini_c_proc = soclib::common::alloc_elems<soclib::caba::VciSignals<vci_param> >("vci_ini_c_proc" , nb_proc); |
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254 | soclib::caba::VciSignals<vci_param> * signal_vci_tgt_proc = soclib::common::alloc_elems<soclib::caba::VciSignals<vci_param> >("vci_tgt_proc" , nb_proc); |
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255 | |
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256 | soclib::caba::VciSignals<vci_param> signal_vci_tgt_tty("vci_tgt_tty"); |
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257 | |
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258 | soclib::caba::VciSignals<vci_param> signal_vci_tgt_simhelper("signal_vci_tgt_simhelper"); |
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259 | |
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260 | soclib::caba::VciSignals<vci_param> signal_vci_tgt_rom("vci_tgt_rom"); |
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261 | |
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262 | soclib::caba::VciSignals<vci_param> signal_vci_tgt_xram("vci_tgt_xram"); |
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263 | |
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264 | soclib::caba::VciSignals<vci_param> signal_vci_tgt_xicu("vci_tgt_xicu"); |
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265 | |
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266 | soclib::caba::VciSignals<vci_param> signal_vci_ixr_memc("vci_ixr_memc"); |
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267 | soclib::caba::VciSignals<vci_param> signal_vci_ini_memc("vci_ini_memc"); |
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268 | soclib::caba::VciSignals<vci_param> signal_vci_tgt_memc("vci_tgt_memc"); |
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269 | soclib::caba::VciSignals<vci_param> signal_vci_tgt_cleanup_memc("vci_tgt_cleanup_memc"); |
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270 | |
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271 | sc_signal<bool> ** signal_tty_irq = soclib::common::alloc_elems<sc_signal<bool> >("signal_tty_irq", nb_proc, nb_cpu_by_cache); |
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272 | |
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273 | soclib::common::Loader loader(soft); |
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274 | |
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275 | soclib::common::GdbServer<soclib::common::Mips32ElIss>::set_loader(loader); |
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276 | |
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277 | soclib::caba::VciCcXCacheWrapperV4<vci_param, proc_iss > * proc [nb_proc]; |
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278 | for (uint32_t i=0; i<nb_proc; ++i) |
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279 | { |
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280 | uint32_t num_cpu = i*nb_cpu_by_cache; |
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281 | |
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282 | std::ostringstream str; |
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283 | str << "proc_" << num_cpu; |
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284 | |
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285 | proc[i] = new soclib::caba::VciCcXCacheWrapperV4<vci_param, proc_iss > (str.str().c_str(), num_cpu, maptabp, maptabc, IntTab(i),IntTab(i),IntTab(i) |
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286 | #if USE_OLD_XCACHE |
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287 | ,iways, isets, iwords |
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288 | ,dways, dsets, dwords |
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289 | #else |
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290 | ,nb_cpu_by_cache |
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291 | ,nb_dcache |
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292 | ,iways*nb_cpu_by_cache, isets, iwords |
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293 | ,dways*nb_cpu_by_cache, dsets, dwords |
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294 | ,wnwords, wnlines*nb_cpu_by_cache |
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295 | #endif |
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296 | ); |
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297 | |
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298 | #if not USE_OLD_XCACHE |
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299 | proc[i]->stop_simulation(STOP_SIMULATION_NB_FRZ_CYCLES); |
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300 | #endif |
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301 | } |
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302 | |
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303 | soclib::caba::VciSimpleRam<vci_param> |
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304 | rom ("rom", IntTab(0), maptabp, loader); |
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305 | |
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306 | soclib::caba::VciSimpleRam<vci_param> |
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307 | xram("xram", IntTab(0), maptabx, loader); |
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308 | |
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309 | // x_init c_init p_tgt c_tgt |
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310 | soclib::caba::VciMemCacheV4<vci_param> |
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311 | memc("memc",maptabp,maptabc,maptabx,IntTab(0),IntTab(nb_proc),IntTab(2),IntTab(nb_proc), memc_nways, memc_nsets, memc_words, memc_heap_size); |
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312 | |
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313 | std::vector<std::string> tty_name; |
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314 | for (uint32_t i=0; i<nb_proc*nb_cpu_by_cache; ++i) |
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315 | { |
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316 | std::ostringstream str; |
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317 | str << "tty_" << i; |
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318 | |
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319 | tty_name.push_back(str.str()); |
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320 | } |
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321 | |
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322 | soclib::caba::VciMultiTty<vci_param> |
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323 | tty("tty",IntTab(1),maptabp,tty_name); |
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324 | |
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325 | soclib::caba::VciXicu<vci_param> |
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326 | xicu("xicu", maptabp, IntTab(3), PARAM_XICU); |
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327 | |
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328 | // soclib::caba::VciTimer<vci_param> |
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329 | // timer("timer", IntTab(3), maptabp, nb_proc); |
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330 | |
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331 | soclib::caba::VciSimhelper<vci_param> |
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332 | simhelper("simhelper", IntTab(4), maptabp); |
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333 | |
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334 | // initiatior | target |
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335 | // interconnect_p : proc | rom, tty, memc, xicu, simhelper |
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336 | // interconnect_c : proc, memc | proc, memc |
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337 | // interconnect_x : memc | xram |
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338 | |
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339 | soclib::caba::VciSimpleRingFast<vci_param,40,33> |
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340 | interconnect_p("interconnect_p",maptabp, IntTab(), PARAM_RING_P,nb_proc , 5 ); |
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341 | |
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342 | soclib::caba::VciSimpleRingFast<vci_param,40,33> |
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343 | interconnect_c("interconnect_c",maptabc, IntTab(), PARAM_RING_C,nb_proc+1, nb_proc+1); |
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344 | |
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345 | soclib::caba::VciSimpleRingFast<vci_param,40,33> |
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346 | interconnect_x("interconnect_x",maptabx, IntTab(), PARAM_RING_X,1 , 1 ); |
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347 | |
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348 | // Net-List |
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349 | for (uint32_t i=0; i<nb_proc; ++i) |
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350 | { |
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351 | proc[i]->p_clk(signal_clk); |
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352 | proc[i]->p_resetn(signal_resetn); |
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353 | for (uint32_t j=0; j<nb_cpu_by_cache; ++j) |
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354 | { |
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355 | proc[i]->p_irq[j][0](signal_proc_it[i][j][0]); |
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356 | proc[i]->p_irq[j][1](signal_proc_it[i][j][1]); |
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357 | proc[i]->p_irq[j][2](signal_proc_it[i][j][2]); |
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358 | proc[i]->p_irq[j][3](signal_proc_it[i][j][3]); |
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359 | proc[i]->p_irq[j][4](signal_proc_it[i][j][4]); |
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360 | proc[i]->p_irq[j][5](signal_proc_it[i][j][5]); |
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361 | } |
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362 | proc[i]->p_vci_ini_rw(signal_vci_ini_rw_proc[i]); |
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363 | proc[i]->p_vci_ini_c(signal_vci_ini_c_proc[i]); |
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364 | proc[i]->p_vci_tgt(signal_vci_tgt_proc[i]); |
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365 | } |
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366 | |
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367 | rom.p_clk(signal_clk); |
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368 | rom.p_resetn(signal_resetn); |
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369 | rom.p_vci(signal_vci_tgt_rom); |
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370 | |
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371 | tty.p_clk(signal_clk); |
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372 | tty.p_resetn(signal_resetn); |
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373 | tty.p_vci(signal_vci_tgt_tty); |
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374 | for (uint32_t i=0; i<nb_proc; ++i) |
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375 | for (uint32_t j=0; j<nb_cpu_by_cache; ++j) |
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376 | tty.p_irq[i*nb_cpu_by_cache+j](signal_tty_irq[i][j]); |
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377 | |
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378 | xicu.p_clk(signal_clk); |
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379 | xicu.p_resetn(signal_resetn); |
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380 | xicu.p_vci(signal_vci_tgt_xicu); |
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381 | for (uint32_t i=0; i<nb_proc; ++i) |
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382 | for (uint32_t j=0; j<nb_cpu_by_cache; ++j) |
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383 | { |
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384 | xicu.p_hwi[i*nb_cpu_by_cache+j](signal_tty_irq[i][j]); |
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385 | xicu.p_irq[i*nb_cpu_by_cache+j](signal_proc_it[i][j][0]); |
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386 | } |
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387 | |
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388 | simhelper.p_clk(signal_clk); |
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389 | simhelper.p_resetn(signal_resetn); |
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390 | simhelper.p_vci(signal_vci_tgt_simhelper); |
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391 | |
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392 | memc.p_clk(signal_clk); |
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393 | memc.p_resetn(signal_resetn); |
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394 | memc.p_vci_tgt(signal_vci_tgt_memc); |
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395 | memc.p_vci_tgt_cleanup(signal_vci_tgt_cleanup_memc); |
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396 | memc.p_vci_ini(signal_vci_ini_memc); |
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397 | memc.p_vci_ixr(signal_vci_ixr_memc); |
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398 | |
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399 | xram.p_clk(signal_clk); |
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400 | xram.p_resetn(signal_resetn); |
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401 | xram.p_vci(signal_vci_tgt_xram); |
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402 | |
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403 | interconnect_p.p_clk(signal_clk); |
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404 | interconnect_p.p_resetn(signal_resetn); |
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405 | |
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406 | for (uint32_t i=0; i<nb_proc; ++i) |
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407 | interconnect_p.p_to_initiator[i](signal_vci_ini_rw_proc[i]); |
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408 | |
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409 | interconnect_p.p_to_target[0](signal_vci_tgt_rom); |
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410 | interconnect_p.p_to_target[1](signal_vci_tgt_tty); |
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411 | interconnect_p.p_to_target[2](signal_vci_tgt_memc); |
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412 | interconnect_p.p_to_target[3](signal_vci_tgt_xicu); |
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413 | interconnect_p.p_to_target[4](signal_vci_tgt_simhelper); |
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414 | |
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415 | interconnect_c.p_clk(signal_clk); |
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416 | interconnect_c.p_resetn(signal_resetn); |
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417 | |
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418 | for (uint32_t i=0; i<nb_proc; ++i) |
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419 | interconnect_c.p_to_initiator[i](signal_vci_ini_c_proc[i]); |
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420 | interconnect_c.p_to_initiator[nb_proc](signal_vci_ini_memc); |
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421 | |
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422 | for (uint32_t i=0; i<nb_proc; ++i) |
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423 | interconnect_c.p_to_target[i](signal_vci_tgt_proc[i]); |
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424 | interconnect_c.p_to_target[nb_proc](signal_vci_tgt_cleanup_memc); |
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425 | |
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426 | interconnect_x.p_clk(signal_clk); |
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427 | interconnect_x.p_resetn(signal_resetn); |
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428 | |
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429 | interconnect_x.p_to_initiator[0](signal_vci_ixr_memc); |
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430 | |
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431 | interconnect_x.p_to_target[0](signal_vci_tgt_xram); |
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432 | |
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433 | sc_start(sc_core::sc_time(0, SC_NS)); |
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434 | signal_resetn = false; |
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435 | sc_start(sc_core::sc_time(1, SC_NS)); |
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436 | signal_resetn = true; |
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437 | |
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438 | #if SOCVIEW |
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439 | debug(); |
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440 | #elif DEBUG_TOP |
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441 | |
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442 | uint32_t num_cycle=0; |
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443 | while(1) |
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444 | { |
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445 | std::cout << std::endl |
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446 | << std::dec << "===== [ cycle " << num_cycle << " ]======" << std::endl |
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447 | << std::endl; |
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448 | |
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449 | sc_start(sc_core::sc_time(1, SC_NS)); |
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450 | |
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451 | // for (uint32_t i=0; i<nb_proc; ++i) |
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452 | // proc[i]->print_trace(1); |
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453 | num_cycle ++; |
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454 | } |
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455 | #else |
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456 | if (ncycles==-1) |
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457 | sc_start(); |
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458 | else |
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459 | sc_start(sc_core::sc_time(ncycles, SC_NS)); |
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460 | |
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461 | // sc_start(sc_core::sc_time(1013000, SC_NS)); |
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462 | // uint32_t num_cycle=1013000 ; |
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463 | |
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464 | // for (uint32_t i=0; i<600; ++i) |
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465 | // { |
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466 | // std::cout << std::endl |
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467 | // << std::dec << "===== [ cycle " << num_cycle << " ]======" << std::endl |
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468 | // << std::endl; |
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469 | // sc_start(sc_core::sc_time(1, SC_NS)); |
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470 | // interconnect_p.print_trace(); |
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471 | // num_cycle ++; |
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472 | // } |
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473 | |
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474 | // std::cout << "Hit ENTER to end simulation" << std::endl; |
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475 | // char buf[1]; |
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476 | // std::cin.getline(buf,1); |
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477 | #endif |
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478 | for (uint32_t i=0; i<nb_proc; ++i) |
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479 | proc[i]->print_cpi(); |
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480 | for (uint32_t i=0; i<nb_proc; ++i) |
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481 | proc[i]->print_stats(); |
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482 | |
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483 | soclib::common::dealloc_elems<sc_signal<bool> >(signal_tty_irq , nb_proc, nb_cpu_by_cache); |
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484 | soclib::common::dealloc_elems<soclib::caba::VciSignals<vci_param> >(signal_vci_tgt_proc , nb_proc); |
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485 | soclib::common::dealloc_elems<soclib::caba::VciSignals<vci_param> >(signal_vci_ini_c_proc , nb_proc); |
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486 | soclib::common::dealloc_elems<soclib::caba::VciSignals<vci_param> >(signal_vci_ini_rw_proc , nb_proc); |
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487 | soclib::common::dealloc_elems<sc_signal<bool> >(signal_proc_it , nb_proc, nb_cpu_by_cache, 6); |
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488 | |
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489 | for (uint32_t i=0; i<nb_proc; ++i) |
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490 | delete proc[i]; |
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491 | |
---|
492 | return EXIT_SUCCESS; |
---|
493 | } |
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494 | |
---|
495 | int sc_main (int argc, char *argv[]) |
---|
496 | { |
---|
497 | try { |
---|
498 | return _main(argc, argv); |
---|
499 | } catch (std::exception &e) { |
---|
500 | std::cout << e.what() << std::endl; |
---|
501 | } catch (...) { |
---|
502 | std::cout << "Unknown exception occured" << std::endl; |
---|
503 | throw; |
---|
504 | } |
---|
505 | return 1; |
---|
506 | } |
---|