source: trunk/platforms/caba-ring-ccxcachev4_memcachev4-mips32el/top.cpp@ 167

Last change on this file since 167 was 167, checked in by kane, 15 years ago

delete all timeout reference (multi write buffer)
  • Property svn:executable set to *
File size: 21.4 KB
Line 
1#include <systemc>
2#include <sys/time.h>
3#include <iostream>
4#include <sstream>
5#include <cstdlib>
6#include <cstdarg>
7#include <stdint.h>
8#include <fstream>
9
10#include "mapping_table.h"
11#include "mips32.h"
12#include "vci_simhelper.h"
13#include "vci_simple_ram.h"
14#include "vci_multi_tty.h"
15#include "vci_xicu.h"
16#include "vci_simple_ring_fast.h"
17#include "vci_mem_cache_v4.h"
18#include "vci_cc_xcache_wrapper_v4.h"
19#include "alloc_elems.h"
20
21#include "iss/gdbserver.h"
22
23#include "segmentation.h"
24
25//===========================================
26// Define before include
27//===========================================
28
29// Parameters
30// * Platforms
31# define PARAM_VCI 4,8,32,1,1,1,8,4,4,1
32
33# define USE_OLD_XCACHE 0
34# define USE_VGMN 1
35# define NB_PROC_MIN 1
36# define NB_PROC_MAX 15
37// fifo_depth
38# define PARAM_RING_P 2
39# define PARAM_RING_C 2
40# define PARAM_RING_X 2
41// pti , hwi , wti, irq
42# define PARAM_XICU nb_proc*nb_cpu_by_cache, nb_proc*nb_cpu_by_cache, 0 , nb_proc*nb_cpu_by_cache
43//#define PARAM_XICU nb_proc, nb_proc, 0 , nb_proc
44
45// * Debug
46# define DEBUG_TOP 0
47# define SOCVIEW 0
48# define STOP_SIMULATION_NB_FRZ_CYCLES 100000
49
50// * Simulation
51# define CONFIG_DEFAULT "configuration/default.cfg"
52# define NCYCLES_DEFAULT 0
53# define SOFT_DEFAULT "soft/bin.soft"
54//===========================================
55
56void usage (char * funcname)
57{
58 std::cout << funcname << " [option] " << std::endl;
59 std::cout << " * -NCYCLES int : number of simulated cycle, if 0 then no stop condition." << std::endl;
60 std::cout << " default : " << NCYCLES_DEFAULT << " cycle(s)" << std::endl;
61 std::cout << " * -CFG string : configuration file" << std::endl;
62 std::cout << " - nb_proc," << std::endl;
63 std::cout << " - nb_cpu_by_cache, nb_dcache," << std::endl;
64 std::cout << " - iways, isets, iwords," << std::endl;
65 std::cout << " - dways, dsets, dwords," << std::endl;
66 std::cout << " - wnwords, wnlines, " << std::endl;
67 std::cout << " - memc_nways, memc_nsets, memc_words, memc_heap_size." << std::endl;
68 std::cout << " default : \"" << CONFIG_DEFAULT << "\"" << std::endl;
69 std::cout << " * -SOFT string : software executed by this platform." << std::endl;
70 std::cout << " default : \"" << SOFT_DEFAULT << "\"" << std::endl;
71
72 exit(1);
73}
74
75int _main(int argc, char *argv[])
76{
77 int ncycles = NCYCLES_DEFAULT;
78 char * config = CONFIG_DEFAULT;
79 char * soft = SOFT_DEFAULT;
80
81 if (argc > 1)
82 {
83 for( int n=1 ; n<argc ; n=n+2 )
84 {
85 if( (strcmp(argv[n],"-NCYCLES") == 0) && (n+1<argc) )
86 {
87 ncycles = atoi(argv[n+1]);
88 }
89 else if( (strcmp(argv[n],"-CFG") == 0) && (n+1<argc) )
90 {
91 // strcpy(config, argv[n+1]);
92 config = argv[n+1];
93 }
94 else if( (strcmp(argv[n],"-SOFT") == 0) && (n+1<argc) )
95 {
96 // strcpy(soft, argv[n+1]);
97 soft = argv[n+1];
98 }
99 else
100 {
101 usage(argv[0]);
102 }
103 }
104 }
105
106 if (ncycles == 0)
107 ncycles = -1;
108
109 uint32_t nb_proc;
110 uint32_t nb_cpu_by_cache;
111 uint32_t nb_dcache;
112 uint32_t iways, isets, iwords;
113 uint32_t dways, dsets, dwords;
114 uint32_t wnwords, wnlines;
115 uint32_t memc_nways, memc_nsets, memc_words, memc_heap_size;
116
117 std::ifstream inFile;
118 const char * filename = config;
119
120 inFile.open(filename);
121
122 if (!inFile)
123 {
124 std::cout << "Can't open file : \"" << filename << "\"." << std::endl;
125 usage(argv[0]);
126 }
127
128 std::string str;
129 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
130 nb_proc =std::atoi(str.c_str());
131 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
132 nb_cpu_by_cache =std::atoi(str.c_str());
133 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
134 nb_dcache =std::atoi(str.c_str());
135 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
136 iways =std::atoi(str.c_str());
137 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
138 isets =std::atoi(str.c_str());
139 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
140 iwords =std::atoi(str.c_str());
141 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
142 dways =std::atoi(str.c_str());
143 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
144 dsets =std::atoi(str.c_str());
145 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
146 dwords =std::atoi(str.c_str());
147 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
148 wnwords =std::atoi(str.c_str());
149 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
150 wnlines =std::atoi(str.c_str());
151 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
152 memc_nways =std::atoi(str.c_str());
153 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
154 memc_nsets =std::atoi(str.c_str());
155 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
156 memc_words =std::atoi(str.c_str());
157 if (not (inFile >> str)){std::cout << "Invalid parameters number in configuration file." << std::endl; usage(argv[0]);}
158 memc_heap_size =std::atoi(str.c_str());
159
160 if (((nb_proc*nb_cpu_by_cache)<NB_PROC_MIN) or
161 ((nb_proc*nb_cpu_by_cache)>NB_PROC_MAX))
162 {
163 std::cout << "Parameters nb_proc is out of bound." << std::endl;
164 usage(argv[0]);
165 }
166
167 std::cout << " * Parameters : " << std::endl;
168 std::cout << " * nb_proc : " << nb_proc << std::endl;
169 std::cout << " * nb_cpu_by_cache : " << nb_cpu_by_cache << std::endl;
170 std::cout << " * nb_dcache : " << nb_dcache << std::endl;
171 std::cout << " * iways : " << iways << std::endl;
172 std::cout << " * isets : " << isets << std::endl;
173 std::cout << " * iwords : " << iwords << std::endl;
174 std::cout << " * dways : " << dways << std::endl;
175 std::cout << " * dsets : " << dsets << std::endl;
176 std::cout << " * dwords : " << dwords << std::endl;
177 std::cout << " * wnwords : " << wnwords << std::endl;
178 std::cout << " * wnlines : " << wnlines << std::endl;
179 std::cout << " * memc_nways : " << memc_nways << std::endl;
180 std::cout << " * memc_nsets : " << memc_nsets << std::endl;
181 std::cout << " * memc_words : " << memc_words << std::endl;
182 std::cout << " * memc_heap_size : " << memc_heap_size << std::endl;
183 std::cout << " * Simulation : " << std::endl;
184 std::cout << " * ncycles : " << ncycles << std::endl;
185 std::cout << " * soft : " << soft << std::endl;
186
187 using namespace sc_core;
188 // Avoid repeating these everywhere
189 using soclib::common::IntTab;
190 using soclib::common::Segment;
191
192 // Define VCI parameters
193 typedef soclib::caba::VciParams<PARAM_VCI> vci_param;
194 typedef soclib::common::GdbServer<soclib::common::Mips32ElIss> proc_iss;
195 // Mapping table
196
197 soclib::common::MappingTable maptabp(32, IntTab(8), IntTab(8), 0x00300000); // size, level_addr_bits, level_id_bits, cacheability_mask
198
199 maptabp.add(Segment("reset" , RESET_BASE , RESET_SIZE , IntTab(2), true));
200 maptabp.add(Segment("excep" , EXCEP_BASE , EXCEP_SIZE , IntTab(2), true));
201
202 maptabp.add(Segment("tty" , TTY_BASE , TTY_SIZE , IntTab(1), false));
203 maptabp.add(Segment("text" , TEXT_BASE , TEXT_SIZE , IntTab(2), true));
204 maptabp.add(Segment("mc_r" , MC_R_BASE , MC_R_SIZE , IntTab(2), false, true, IntTab(0)));
205 maptabp.add(Segment("mc_m" , MC_M_BASE , MC_M_SIZE , IntTab(2), true));
206 //maptabp.add(Segment("mc_u" , MC_U_BASE , MC_U_SIZE , IntTab(2), false));
207 //maptabp.add(Segment("ptba" , PTD_ADDR , TAB_SIZE , IntTab(2), true));
208 maptabp.add(Segment("xicu" , XICU_BASE , XICU_SIZE , IntTab(3), false));
209 maptabp.add(Segment("simhelper", SIMHELPER_BASE, SIMHELPER_SIZE, IntTab(4), false));
210
211 std::cout << maptabp << std::endl;
212
213 soclib::common::MappingTable maptabc(32, IntTab(8), IntTab(8), 0x00300000);
214 // for (uint32_t i=0; i<nb_proc; ++i)
215 // for (uint32_t j=0; j<nb_cpu_by_cache; ++j)
216 // {
217 // std::ostringstream str;
218 // str << "c_proc_" << i << "_" << j;
219 // maptabc.add(Segment(str.str().c_str(), C_PROC_BASE+(i*nb_cpu_by_cache+j)*C_PROC_SPAN, C_PROC_SIZE , IntTab(i), false, true, IntTab(i)));
220 // }
221 for (uint32_t i=0; i<nb_proc; ++i)
222 {
223 std::ostringstream str;
224 str << "c_proc_" << i;
225 maptabc.add(Segment(str.str().c_str(), C_PROC_BASE+i*C_PROC_SPAN, C_PROC_SIZE , IntTab(i), false, true, IntTab(i)));
226 }
227 maptabc.add(Segment("mc_r" , MC_R_BASE , MC_R_SIZE , IntTab(nb_proc), false, false));
228 maptabc.add(Segment("mc_m" , MC_M_BASE , MC_M_SIZE , IntTab(nb_proc), false, false));
229 // maptabc.add(Segment("mc_u" , MC_U_BASE , MC_U_SIZE , IntTab(nb_proc), false, false));
230 maptabc.add(Segment("reset" , RESET_BASE , RESET_SIZE , IntTab(nb_proc), false, false));
231 maptabc.add(Segment("excep" , EXCEP_BASE , EXCEP_SIZE , IntTab(nb_proc), false, false));
232 maptabc.add(Segment("text" , TEXT_BASE , TEXT_SIZE , IntTab(nb_proc), false, false));
233 //maptabc.add(Segment("ptba" , PTD_ADDR , TAB_SIZE , IntTab(nb_proc), false, false));
234
235 std::cout << maptabc << std::endl;
236
237 soclib::common::MappingTable maptabx(32, IntTab(8), IntTab(8), 0x00300000);
238 maptabx.add(Segment("xram" , MC_M_BASE , MC_M_SIZE , IntTab(0), false));
239 // maptabx.add(Segment("uram" , MC_U_BASE , MC_U_SIZE , IntTab(0), false));
240 maptabx.add(Segment("reset", RESET_BASE, RESET_SIZE, IntTab(0), false));
241 maptabx.add(Segment("excep", EXCEP_BASE, EXCEP_SIZE, IntTab(0), false));
242 maptabx.add(Segment("text" , TEXT_BASE , TEXT_SIZE , IntTab(0), false));
243 // maptabx.add(Segment("ptba" , PTD_ADDR , TAB_SIZE , IntTab(0), false));
244
245 std::cout << maptabx << std::endl;
246
247 // Signals
248 sc_clock signal_clk("clk");
249 sc_signal<bool> signal_resetn("resetn");
250
251 sc_signal<bool> *** signal_proc_it = soclib::common::alloc_elems<sc_signal<bool> >("proc_it", nb_proc, nb_cpu_by_cache, 6);
252
253 soclib::caba::VciSignals<vci_param> * signal_vci_ini_rw_proc = soclib::common::alloc_elems<soclib::caba::VciSignals<vci_param> >("vci_ini_rw_proc", nb_proc);
254 soclib::caba::VciSignals<vci_param> * signal_vci_ini_c_proc = soclib::common::alloc_elems<soclib::caba::VciSignals<vci_param> >("vci_ini_c_proc" , nb_proc);
255 soclib::caba::VciSignals<vci_param> * signal_vci_tgt_proc = soclib::common::alloc_elems<soclib::caba::VciSignals<vci_param> >("vci_tgt_proc" , nb_proc);
256
257 soclib::caba::VciSignals<vci_param> signal_vci_tgt_tty("vci_tgt_tty");
258
259 soclib::caba::VciSignals<vci_param> signal_vci_tgt_simhelper("signal_vci_tgt_simhelper");
260
261 soclib::caba::VciSignals<vci_param> signal_vci_tgt_rom("vci_tgt_rom");
262
263 soclib::caba::VciSignals<vci_param> signal_vci_tgt_xram("vci_tgt_xram");
264
265 soclib::caba::VciSignals<vci_param> signal_vci_tgt_xicu("vci_tgt_xicu");
266
267 soclib::caba::VciSignals<vci_param> signal_vci_ixr_memc("vci_ixr_memc");
268 soclib::caba::VciSignals<vci_param> signal_vci_ini_memc("vci_ini_memc");
269 soclib::caba::VciSignals<vci_param> signal_vci_tgt_memc("vci_tgt_memc");
270 soclib::caba::VciSignals<vci_param> signal_vci_tgt_cleanup_memc("vci_tgt_cleanup_memc");
271
272 sc_signal<bool> ** signal_tty_irq = soclib::common::alloc_elems<sc_signal<bool> >("signal_tty_irq", nb_proc, nb_cpu_by_cache);
273
274 soclib::common::Loader loader(soft);
275
276 soclib::common::GdbServer<soclib::common::Mips32ElIss>::set_loader(loader);
277
278 soclib::caba::VciCcXCacheWrapperV4<vci_param, proc_iss > * proc [nb_proc];
279 for (uint32_t i=0; i<nb_proc; ++i)
280 {
281 uint32_t num_cpu = i*nb_cpu_by_cache;
282
283 std::ostringstream str;
284 str << "proc_" << num_cpu;
285
286 proc[i] = new soclib::caba::VciCcXCacheWrapperV4<vci_param, proc_iss > (str.str().c_str(), num_cpu, maptabp, maptabc, IntTab(i),IntTab(i),IntTab(i)
287#if USE_OLD_XCACHE
288 ,iways, isets, iwords
289 ,dways, dsets, dwords
290#else
291 ,nb_cpu_by_cache
292 ,nb_dcache
293 ,iways*nb_cpu_by_cache, isets, iwords
294 ,dways*nb_cpu_by_cache, dsets, dwords
295 ,wnwords, wnlines*nb_cpu_by_cache
296#endif
297 );
298
299#if not USE_OLD_XCACHE
300 proc[i]->stop_simulation(STOP_SIMULATION_NB_FRZ_CYCLES);
301#endif
302 }
303
304 soclib::caba::VciSimpleRam<vci_param>
305 rom ("rom", IntTab(0), maptabp, loader);
306
307 soclib::caba::VciSimpleRam<vci_param>
308 xram("xram", IntTab(0), maptabx, loader);
309
310 // x_init c_init p_tgt c_tgt
311 soclib::caba::VciMemCacheV4<vci_param>
312 memc("memc",maptabp,maptabc,maptabx,IntTab(0),IntTab(nb_proc),IntTab(2),IntTab(nb_proc), memc_nways, memc_nsets, memc_words, memc_heap_size);
313
314 std::vector<std::string> tty_name;
315 for (uint32_t i=0; i<nb_proc*nb_cpu_by_cache; ++i)
316 {
317 std::ostringstream str;
318 str << "tty_" << i;
319
320 tty_name.push_back(str.str());
321 }
322
323 soclib::caba::VciMultiTty<vci_param>
324 tty("tty",IntTab(1),maptabp,tty_name);
325
326 soclib::caba::VciXicu<vci_param>
327 xicu("xicu", maptabp, IntTab(3), PARAM_XICU);
328
329 // soclib::caba::VciTimer<vci_param>
330 // timer("timer", IntTab(3), maptabp, nb_proc);
331
332 soclib::caba::VciSimhelper<vci_param>
333 simhelper("simhelper", IntTab(4), maptabp);
334
335 // initiatior | target
336 // interconnect_p : proc | rom, tty, memc, xicu, simhelper
337 // interconnect_c : proc, memc | proc, memc
338 // interconnect_x : memc | xram
339
340 soclib::caba::VciSimpleRingFast<vci_param,40,33>
341 interconnect_p("interconnect_p",maptabp, IntTab(), PARAM_RING_P,nb_proc , 5 );
342
343 soclib::caba::VciSimpleRingFast<vci_param,40,33>
344 interconnect_c("interconnect_c",maptabc, IntTab(), PARAM_RING_C,nb_proc+1, nb_proc+1);
345
346 soclib::caba::VciSimpleRingFast<vci_param,40,33>
347 interconnect_x("interconnect_x",maptabx, IntTab(), PARAM_RING_X,1 , 1 );
348
349 // Net-List
350 for (uint32_t i=0; i<nb_proc; ++i)
351 {
352 proc[i]->p_clk(signal_clk);
353 proc[i]->p_resetn(signal_resetn);
354 for (uint32_t j=0; j<nb_cpu_by_cache; ++j)
355 {
356 proc[i]->p_irq[j][0](signal_proc_it[i][j][0]);
357 proc[i]->p_irq[j][1](signal_proc_it[i][j][1]);
358 proc[i]->p_irq[j][2](signal_proc_it[i][j][2]);
359 proc[i]->p_irq[j][3](signal_proc_it[i][j][3]);
360 proc[i]->p_irq[j][4](signal_proc_it[i][j][4]);
361 proc[i]->p_irq[j][5](signal_proc_it[i][j][5]);
362 }
363 proc[i]->p_vci_ini_rw(signal_vci_ini_rw_proc[i]);
364 proc[i]->p_vci_ini_c(signal_vci_ini_c_proc[i]);
365 proc[i]->p_vci_tgt(signal_vci_tgt_proc[i]);
366 }
367
368 rom.p_clk(signal_clk);
369 rom.p_resetn(signal_resetn);
370 rom.p_vci(signal_vci_tgt_rom);
371
372 tty.p_clk(signal_clk);
373 tty.p_resetn(signal_resetn);
374 tty.p_vci(signal_vci_tgt_tty);
375 for (uint32_t i=0; i<nb_proc; ++i)
376 for (uint32_t j=0; j<nb_cpu_by_cache; ++j)
377 tty.p_irq[i*nb_cpu_by_cache+j](signal_tty_irq[i][j]);
378
379 xicu.p_clk(signal_clk);
380 xicu.p_resetn(signal_resetn);
381 xicu.p_vci(signal_vci_tgt_xicu);
382 for (uint32_t i=0; i<nb_proc; ++i)
383 for (uint32_t j=0; j<nb_cpu_by_cache; ++j)
384 {
385 xicu.p_hwi[i*nb_cpu_by_cache+j](signal_tty_irq[i][j]);
386 xicu.p_irq[i*nb_cpu_by_cache+j](signal_proc_it[i][j][0]);
387 }
388
389 simhelper.p_clk(signal_clk);
390 simhelper.p_resetn(signal_resetn);
391 simhelper.p_vci(signal_vci_tgt_simhelper);
392
393 memc.p_clk(signal_clk);
394 memc.p_resetn(signal_resetn);
395 memc.p_vci_tgt(signal_vci_tgt_memc);
396 memc.p_vci_tgt_cleanup(signal_vci_tgt_cleanup_memc);
397 memc.p_vci_ini(signal_vci_ini_memc);
398 memc.p_vci_ixr(signal_vci_ixr_memc);
399
400 xram.p_clk(signal_clk);
401 xram.p_resetn(signal_resetn);
402 xram.p_vci(signal_vci_tgt_xram);
403
404 interconnect_p.p_clk(signal_clk);
405 interconnect_p.p_resetn(signal_resetn);
406
407 for (uint32_t i=0; i<nb_proc; ++i)
408 interconnect_p.p_to_initiator[i](signal_vci_ini_rw_proc[i]);
409
410 interconnect_p.p_to_target[0](signal_vci_tgt_rom);
411 interconnect_p.p_to_target[1](signal_vci_tgt_tty);
412 interconnect_p.p_to_target[2](signal_vci_tgt_memc);
413 interconnect_p.p_to_target[3](signal_vci_tgt_xicu);
414 interconnect_p.p_to_target[4](signal_vci_tgt_simhelper);
415
416 interconnect_c.p_clk(signal_clk);
417 interconnect_c.p_resetn(signal_resetn);
418
419 for (uint32_t i=0; i<nb_proc; ++i)
420 interconnect_c.p_to_initiator[i](signal_vci_ini_c_proc[i]);
421 interconnect_c.p_to_initiator[nb_proc](signal_vci_ini_memc);
422
423 for (uint32_t i=0; i<nb_proc; ++i)
424 interconnect_c.p_to_target[i](signal_vci_tgt_proc[i]);
425 interconnect_c.p_to_target[nb_proc](signal_vci_tgt_cleanup_memc);
426
427 interconnect_x.p_clk(signal_clk);
428 interconnect_x.p_resetn(signal_resetn);
429
430 interconnect_x.p_to_initiator[0](signal_vci_ixr_memc);
431
432 interconnect_x.p_to_target[0](signal_vci_tgt_xram);
433
434 sc_start(sc_core::sc_time(0, SC_NS));
435 signal_resetn = false;
436 sc_start(sc_core::sc_time(1, SC_NS));
437 signal_resetn = true;
438
439#if SOCVIEW
440 debug();
441#elif DEBUG_TOP
442
443 uint32_t num_cycle=0;
444 while(1)
445 {
446 std::cout << std::endl
447 << std::dec << "===== [ cycle " << num_cycle << " ]======" << std::endl
448 << std::endl;
449
450 sc_start(sc_core::sc_time(1, SC_NS));
451
452 // for (uint32_t i=0; i<nb_proc; ++i)
453 // proc[i]->print_trace(1);
454 num_cycle ++;
455 }
456#else
457 if (ncycles==-1)
458 sc_start();
459 else
460 sc_start(sc_core::sc_time(ncycles, SC_NS));
461
462 // std::cout << "Hit ENTER to end simulation" << std::endl;
463 // char buf[1];
464 // std::cin.getline(buf,1);
465#endif
466 for (uint32_t i=0; i<nb_proc; ++i)
467 proc[i]->print_cpi();
468 for (uint32_t i=0; i<nb_proc; ++i)
469 proc[i]->print_stats();
470
471 soclib::common::dealloc_elems<sc_signal<bool> >(signal_tty_irq , nb_proc, nb_cpu_by_cache);
472 soclib::common::dealloc_elems<soclib::caba::VciSignals<vci_param> >(signal_vci_tgt_proc , nb_proc);
473 soclib::common::dealloc_elems<soclib::caba::VciSignals<vci_param> >(signal_vci_ini_c_proc , nb_proc);
474 soclib::common::dealloc_elems<soclib::caba::VciSignals<vci_param> >(signal_vci_ini_rw_proc , nb_proc);
475 soclib::common::dealloc_elems<sc_signal<bool> >(signal_proc_it , nb_proc, nb_cpu_by_cache, 6);
476
477 for (uint32_t i=0; i<nb_proc; ++i)
478 delete proc[i];
479
480 return EXIT_SUCCESS;
481}
482
483int sc_main (int argc, char *argv[])
484{
485 try {
486 return _main(argc, argv);
487 } catch (std::exception &e) {
488 std::cout << e.what() << std::endl;
489 } catch (...) {
490 std::cout << "Unknown exception occured" << std::endl;
491 throw;
492 }
493 return 1;
494}
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