[342] | 1 | ////////////////////////////////////////////////////////////////////////////// |
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| 2 | // File: tsar_cluster_mmu.c |
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| 3 | // Author: Alain Greiner |
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| 4 | // Copyright: UPMC/LIP6 |
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| 5 | // Date : march 2011 |
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| 6 | // This program is released under the GNU public license |
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| 7 | ////////////////////////////////////////////////////////////////////////////// |
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| 8 | // This file define a TSAR cluster architecture with virtual memory: |
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| 9 | // - It uses the virtual_dspin_router as distributed global interconnect |
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| 10 | // - It uses the vci_local_crossbar as local interconnect |
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| 11 | // - It uses the vci_cc_vcache_wrapper |
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| 12 | // - It uses the vci_mem_cache |
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| 13 | // - It contains a private RAM with a variable latency to emulate the L3 cache |
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| 14 | // - It can contains 1, 2 or 4 processors |
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| 15 | // - Each processor has a private dma channel (vci_multi_dma) |
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| 16 | // - It uses the vci_xicu interrupt controller |
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| 17 | // - The peripherals MTTY, BDEV, FBUF, and the boot BROM are in the cluster |
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| 18 | // containing address 0xBFC00000. |
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| 19 | // - The Multi-TTY component controls up to 15 terminals. |
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| 20 | // - Each Multi-DMA component controls up to 8 DMA channels. |
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| 21 | // - The DMA IRQs are connected to IRQ_IN[8]...IRQ_IN[15] |
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| 22 | // - The TTY IRQs are connected to IRQ_IN[16]...IRQ_IN[30] |
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| 23 | // - The BDEV IRQ is connected to IRQ_IN[31] |
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| 24 | ////////////////////////////////////////////////////////////////////////////////// |
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| 25 | |
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| 26 | #include "../include/tsar_cluster_mmu.h" |
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| 27 | |
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| 28 | namespace soclib { |
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| 29 | namespace caba { |
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| 30 | |
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| 31 | ////////////////////////////////////////////////////////////////////////// |
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| 32 | // Constructor |
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| 33 | ////////////////////////////////////////////////////////////////////////// |
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| 34 | template<typename vci_param, typename iss_t, int cmd_width, int rsp_width> |
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| 35 | TsarClusterMmu<vci_param, iss_t, cmd_width, rsp_width>::TsarClusterMmu( |
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| 36 | sc_module_name insname, |
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| 37 | size_t nb_procs, |
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| 38 | size_t nb_ttys, |
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| 39 | size_t nb_dmas, |
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| 40 | size_t x_id, |
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| 41 | size_t y_id, |
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| 42 | size_t cluster_id, |
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| 43 | const soclib::common::MappingTable &mtd, |
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| 44 | const soclib::common::MappingTable &mtx, |
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| 45 | size_t x_width, |
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| 46 | size_t y_width, |
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[351] | 47 | size_t l_width, |
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[342] | 48 | size_t tgtid_memc, |
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| 49 | size_t tgtid_xicu, |
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| 50 | size_t tgtid_mdma, |
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| 51 | size_t tgtid_fbuf, |
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| 52 | size_t tgtid_mtty, |
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| 53 | size_t tgtid_brom, |
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| 54 | size_t tgtid_mnic, |
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| 55 | size_t tgtid_bdev, |
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| 56 | size_t memc_ways, |
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| 57 | size_t memc_sets, |
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| 58 | size_t l1_i_ways, |
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| 59 | size_t l1_i_sets, |
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| 60 | size_t l1_d_ways, |
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| 61 | size_t l1_d_sets, |
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| 62 | size_t xram_latency, |
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| 63 | bool io, |
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| 64 | size_t xfb, |
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| 65 | size_t yfb, |
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| 66 | char* disk_name, |
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| 67 | size_t block_size, |
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| 68 | size_t nic_channels, |
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| 69 | char* nic_rx_name, |
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| 70 | char* nic_tx_name, |
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| 71 | uint32_t nic_timeout, |
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| 72 | const Loader &loader, |
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| 73 | uint32_t frozen_cycles, |
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| 74 | uint32_t debug_start_cycle, |
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| 75 | bool memc_debug_ok, |
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| 76 | bool proc_debug_ok) |
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| 77 | : soclib::caba::BaseModule(insname), |
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| 78 | p_clk("clk"), |
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| 79 | p_resetn("resetn") |
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| 80 | |
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| 81 | { |
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| 82 | // Vectors of ports definition |
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| 83 | |
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| 84 | p_cmd_in = alloc_elems<DspinInput<cmd_width> >("p_cmd_in", 2, 4); |
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| 85 | p_cmd_out = alloc_elems<DspinOutput<cmd_width> >("p_cmd_out", 2, 4); |
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| 86 | p_rsp_in = alloc_elems<DspinInput<rsp_width> >("p_rsp_in", 2, 4); |
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| 87 | p_rsp_out = alloc_elems<DspinOutput<rsp_width> >("p_rsp_out", 2, 4); |
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| 88 | |
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| 89 | // Components definition |
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| 90 | |
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| 91 | // on direct network : local srcid[proc] in [0..nb_procs-1] |
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| 92 | // on direct network : local srcid[mdma] = nb_procs |
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| 93 | // on direct network : local srcid[bdev] = nb_procs + 1 |
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| 94 | |
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| 95 | // on coherence network : local srcid[proc] in [0...nb_procs-1] |
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| 96 | // on coherence network : local srcid[memc] = nb_procs |
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| 97 | |
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| 98 | std::cout << " - building proc_" << x_id << "_" << y_id << "-*" << std::endl; |
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| 99 | |
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| 100 | for (size_t p = 0; p < nb_procs; p++) |
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| 101 | { |
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| 102 | std::ostringstream sproc; |
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| 103 | sproc << "proc_" << x_id << "_" << y_id << "_" << p; |
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| 104 | proc[p] = new VciCcVCacheWrapper<vci_param, iss_t>( |
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| 105 | sproc.str().c_str(), |
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| 106 | cluster_id*nb_procs + p, |
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| 107 | mtd, // Mapping Table Direct |
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| 108 | IntTab(cluster_id,p), // SRCID_D |
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[351] | 109 | (cluster_id << l_width) + p, // CC_GLOBAL_ID |
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[342] | 110 | 8, // ITLB ways |
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| 111 | 8, // ITLB sets |
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| 112 | 8, // DTLB ways |
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| 113 | 8, // DTLB sets |
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| 114 | l1_i_ways,l1_i_sets,16, // ICACHE size |
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| 115 | l1_d_ways,l1_d_sets,16, // DCACHE size |
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| 116 | 4, // WBUF nlines |
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| 117 | 4, // WBUF nwords |
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| 118 | x_width, |
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| 119 | y_width, |
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| 120 | frozen_cycles, // max frozen cycles |
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| 121 | debug_start_cycle, |
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| 122 | proc_debug_ok); |
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| 123 | } |
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| 124 | |
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| 125 | std::cout << " - building memc_" << x_id << "_" << y_id << std::endl; |
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| 126 | |
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| 127 | std::ostringstream smemc; |
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| 128 | smemc << "memc_" << x_id << "_" << y_id; |
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| 129 | memc = new VciMemCache<vci_param>( |
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| 130 | smemc.str().c_str(), |
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[351] | 131 | mtd, mtx, |
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[342] | 132 | IntTab(cluster_id), // SRCID_X |
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| 133 | IntTab(cluster_id, tgtid_memc), // TGTID_D |
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[351] | 134 | (cluster_id << l_width) + nb_procs, // CC_GLOBAL_ID |
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[342] | 135 | memc_ways, memc_sets, 16, // CACHE SIZE |
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[351] | 136 | 3, // MAX NUMBER OF COPIES |
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[342] | 137 | 256, // HEAP SIZE |
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| 138 | 8, // TRANSACTION TABLE DEPTH |
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| 139 | 8, // UPDATE TABLE DEPTH |
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| 140 | debug_start_cycle, |
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| 141 | memc_debug_ok); |
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| 142 | |
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| 143 | std::cout << " - building xram_" << x_id << "_" << y_id << std::endl; |
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| 144 | |
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| 145 | std::ostringstream sxram; |
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| 146 | sxram << "xram_" << x_id << "_" << y_id; |
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| 147 | xram = new VciSimpleRam<vci_param>( |
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| 148 | sxram.str().c_str(), |
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| 149 | IntTab(cluster_id), |
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| 150 | mtx, |
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| 151 | loader, |
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| 152 | xram_latency); |
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| 153 | |
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| 154 | std::cout << " - building xicu_" << x_id << "_" << y_id << std::endl; |
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| 155 | |
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| 156 | std::ostringstream sicu; |
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| 157 | sicu << "xicu_" << x_id << "_" << y_id; |
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| 158 | xicu = new VciXicu<vci_param>( |
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| 159 | sicu.str().c_str(), |
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| 160 | mtd, // mapping table |
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| 161 | IntTab(cluster_id, tgtid_xicu), // TGTID_D |
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| 162 | nb_procs, // number of timer IRQs |
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| 163 | 32, // number of hard IRQs |
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[343] | 164 | 32, // number of soft IRQs |
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[342] | 165 | nb_procs); // number of output IRQs |
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| 166 | |
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| 167 | std::cout << " - building dma_" << x_id << "_" << y_id << std::endl; |
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| 168 | |
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| 169 | std::ostringstream sdma; |
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| 170 | sdma << "dma_" << x_id << "_" << y_id; |
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| 171 | mdma = new VciMultiDma<vci_param>( |
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| 172 | sdma.str().c_str(), |
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| 173 | mtd, |
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| 174 | IntTab(cluster_id, nb_procs), // SRCID |
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| 175 | IntTab(cluster_id, tgtid_mdma), // TGTID |
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| 176 | 64, // burst size |
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| 177 | nb_dmas); // number of IRQs |
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| 178 | |
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| 179 | std::cout << " - building xbard_" << x_id << "_" << y_id << std::endl; |
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| 180 | |
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| 181 | size_t nb_direct_initiators = nb_procs + 1; |
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| 182 | size_t nb_direct_targets = 3; |
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| 183 | if ( io ) |
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| 184 | { |
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| 185 | nb_direct_initiators = nb_procs + 2; |
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| 186 | nb_direct_targets = 8; |
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| 187 | } |
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| 188 | std::ostringstream sd; |
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| 189 | sd << "xbard_" << x_id << "_" << y_id; |
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| 190 | xbard = new VciLocalCrossbar<vci_param>( |
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| 191 | sd.str().c_str(), |
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| 192 | mtd, |
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| 193 | IntTab(cluster_id), // cluster initiator index |
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| 194 | IntTab(cluster_id), // cluster target index |
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| 195 | nb_direct_initiators, // number of initiators |
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| 196 | nb_direct_targets); // number of targets |
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| 197 | |
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| 198 | std::cout << " - building ringc_" << x_id << "_" << y_id << std::endl; |
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| 199 | |
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| 200 | std::ostringstream sc; |
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| 201 | sc << "ringc_" << x_id << "_" << y_id; |
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| 202 | //ringc = new soclib::caba::DspinLocalRingFastC<vci_param, 40, 33>(sc.str().c_str(),mtc, IntTab(cluster_id), 2, 2, 2, nb_procs + 1, x_width, y_width); |
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[351] | 203 | // |
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| 204 | // coherence network |
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| 205 | // - tgtid_c_proc = srcid_c_proc = local procid |
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| 206 | // - tgtid_c_memc = srcid_c_memc = NB_PROCS_MAX |
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| 207 | #define address_width 32 |
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| 208 | #define srcid_width 14 |
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| 209 | #include "../../../../giet_vm/hard_config.h" |
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| 210 | #define cluster(x,y) (y + CLUSTER_Y*x) |
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| 211 | MappingTable maptabc(address_width, |
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| 212 | IntTab(x_width + y_width, srcid_width - x_width - y_width), |
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| 213 | IntTab(x_width + y_width, srcid_width - x_width - y_width), |
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| 214 | 0x00FF0000); |
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[342] | 215 | |
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[351] | 216 | for (size_t x = 0; x < CLUSTER_X; x++) |
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| 217 | { |
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| 218 | for (size_t y = 0; y < CLUSTER_Y; y++) |
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| 219 | { |
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| 220 | sc_uint<address_width> offset = cluster(x,y) << (address_width-x_width-y_width); |
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| 221 | |
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| 222 | // cleanup requests must be routed to the memory cache |
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| 223 | std::ostringstream sh; |
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| 224 | sh << "c_seg_memc_" << x << "_" << y; |
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| 225 | maptabc.add(Segment(sh.str(), (NB_PROCS_MAX << (address_width - srcid_width)) + offset, |
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| 226 | 0x10, IntTab(cluster(x,y), NB_PROCS_MAX), false)); |
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| 227 | |
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| 228 | // update & invalidate requests must be routed to the proper processor |
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| 229 | for ( size_t p = 0 ; p < NB_PROCS_MAX ; p++) |
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| 230 | { |
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| 231 | std::ostringstream sp; |
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| 232 | sp << "c_seg_proc_" << x << "_" << y << "_" << p; |
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| 233 | maptabc.add( Segment( sp.str() , (p << (address_width - srcid_width)) + offset , |
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| 234 | 0x10 , IntTab(cluster(x,y), p) , false)); |
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| 235 | } |
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| 236 | } |
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| 237 | } |
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| 238 | std::cout << maptabc << std::endl; |
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| 239 | // |
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| 240 | // |
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| 241 | // |
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| 242 | ringc = new soclib::caba::DspinLocalRingFastC<vci_param, 40, 33>(sc.str().c_str(),maptabc, IntTab(cluster_id), 2, 2, 1, nb_procs, x_width, y_width); |
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| 243 | |
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[342] | 244 | std::cout << " - building wrappers in cluster_" << x_id << "_" << y_id << std::endl; |
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| 245 | |
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| 246 | std::ostringstream wid; |
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| 247 | wid << "iniwrapperd_" << x_id << "_" << y_id; |
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| 248 | iniwrapperd = new VciVdspinInitiatorWrapper<vci_param,cmd_width,rsp_width>( |
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| 249 | wid.str().c_str(), |
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| 250 | 4, // cmd fifo depth |
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| 251 | 4); // rsp fifo depth |
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| 252 | |
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| 253 | std::ostringstream wtd; |
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| 254 | wtd << "tgtwrapperd_" << x_id << "_" << y_id; |
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| 255 | tgtwrapperd = new VciVdspinTargetWrapper<vci_param,cmd_width,rsp_width>( |
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| 256 | wtd.str().c_str(), |
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| 257 | 4, // cmd fifo depth |
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| 258 | 4); // rsp fifo depth |
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| 259 | |
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| 260 | std::cout << " - building cmdrouter_" << x_id << "_" << y_id << std::endl; |
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| 261 | |
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| 262 | std::ostringstream scmd; |
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| 263 | scmd << "cmdrouter_" << x_id << "_" << y_id; |
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| 264 | cmdrouter = new VirtualDspinRouter<cmd_width>( |
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| 265 | scmd.str().c_str(), |
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| 266 | x_id,y_id, // coordinate in the mesh |
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| 267 | x_width, y_width, // x & y fields width |
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| 268 | 4,4); // input & output fifo depths |
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| 269 | |
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| 270 | std::cout << " - building rsprouter_" << x_id << "_" << y_id << std::endl; |
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| 271 | |
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| 272 | std::ostringstream srsp; |
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| 273 | srsp << "rsprouter_" << x_id << "_" << y_id; |
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| 274 | rsprouter = new VirtualDspinRouter<rsp_width>( |
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| 275 | srsp.str().c_str(), |
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| 276 | x_id,y_id, // coordinates in mesh |
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| 277 | x_width, y_width, // x & y fields width |
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| 278 | 4,4); // input & output fifo depths |
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| 279 | |
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| 280 | // IO cluster components |
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| 281 | if ( io ) |
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| 282 | { |
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| 283 | std::cout << " - building brom" << std::endl; |
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| 284 | |
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| 285 | brom = new VciSimpleRam<vci_param>( |
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| 286 | "brom", |
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| 287 | IntTab(cluster_id, tgtid_brom), |
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| 288 | mtd, |
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| 289 | loader); |
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| 290 | |
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| 291 | std::cout << " - building fbuf" << std::endl; |
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| 292 | |
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| 293 | fbuf = new VciFrameBuffer<vci_param>( |
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| 294 | "fbuf", |
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| 295 | IntTab(cluster_id, tgtid_fbuf), |
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| 296 | mtd, |
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| 297 | xfb, yfb); |
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| 298 | |
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| 299 | std::cout << " - building fbuf" << std::endl; |
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| 300 | |
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| 301 | bdev = new VciBlockDeviceTsarV4<vci_param>( |
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| 302 | "bdev", |
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| 303 | mtd, |
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| 304 | IntTab(cluster_id, nb_procs+1), |
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| 305 | IntTab(cluster_id, tgtid_bdev), |
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| 306 | disk_name, |
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| 307 | block_size, |
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| 308 | 64); // burst size |
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| 309 | |
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| 310 | std::cout << " - building mnic" << std::endl; |
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| 311 | |
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| 312 | mnic = new VciMultiNic<vci_param>( |
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| 313 | "mnic", |
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| 314 | IntTab(cluster_id, tgtid_mnic), |
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| 315 | mtd, |
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| 316 | nic_channels, |
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| 317 | nic_rx_name, |
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| 318 | nic_tx_name, |
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| 319 | 0, // default mac address MAC4 |
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| 320 | 0 ); // default mac address MAC2 |
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| 321 | |
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| 322 | std::cout << " - building mtty" << std::endl; |
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| 323 | |
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| 324 | std::vector<std::string> vect_names; |
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| 325 | for( size_t tid = 0 ; tid < (nb_ttys) ; tid++ ) |
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| 326 | { |
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| 327 | std::ostringstream term_name; |
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| 328 | term_name << "term" << tid; |
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| 329 | vect_names.push_back(term_name.str().c_str()); |
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| 330 | } |
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| 331 | mtty = new VciMultiTty<vci_param>( |
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| 332 | "mtty", |
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| 333 | IntTab(cluster_id, tgtid_mtty), |
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| 334 | mtd, |
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| 335 | vect_names); |
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| 336 | } |
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| 337 | |
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| 338 | std::cout << std::endl; |
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| 339 | |
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| 340 | //////////////////////////////////// |
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| 341 | // Connections are defined here |
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| 342 | //////////////////////////////////// |
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| 343 | |
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| 344 | // CMDROUTER and RSPROUTER |
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| 345 | cmdrouter->p_clk (this->p_clk); |
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| 346 | cmdrouter->p_resetn (this->p_resetn); |
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| 347 | rsprouter->p_clk (this->p_clk); |
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| 348 | rsprouter->p_resetn (this->p_resetn); |
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| 349 | for (int x = 0; x < 2; x++) |
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| 350 | { |
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| 351 | for(int y = 0; y < 4; y++) |
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| 352 | { |
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| 353 | cmdrouter->p_out[x][y] (this->p_cmd_out[x][y]); |
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| 354 | cmdrouter->p_in[x][y] (this->p_cmd_in[x][y]); |
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| 355 | rsprouter->p_out[x][y] (this->p_rsp_out[x][y]); |
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| 356 | rsprouter->p_in[x][y] (this->p_rsp_in[x][y]); |
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| 357 | } |
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| 358 | } |
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| 359 | |
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| 360 | cmdrouter->p_out[0][4] (signal_dspin_cmd_g2l_d); |
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| 361 | cmdrouter->p_out[1][4] (signal_dspin_cmd_g2l_c); |
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| 362 | cmdrouter->p_in[0][4] (signal_dspin_cmd_l2g_d); |
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| 363 | cmdrouter->p_in[1][4] (signal_dspin_cmd_l2g_c); |
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| 364 | |
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| 365 | rsprouter->p_out[0][4] (signal_dspin_rsp_g2l_d); |
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| 366 | rsprouter->p_out[1][4] (signal_dspin_rsp_g2l_c); |
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| 367 | rsprouter->p_in[0][4] (signal_dspin_rsp_l2g_d); |
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| 368 | rsprouter->p_in[1][4] (signal_dspin_rsp_l2g_c); |
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| 369 | |
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| 370 | std::cout << " - CMD & RSP routers connected" << std::endl; |
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| 371 | |
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| 372 | // VCI/DSPIN WRAPPERS |
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| 373 | iniwrapperd->p_clk (this->p_clk); |
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| 374 | iniwrapperd->p_resetn (this->p_resetn); |
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| 375 | iniwrapperd->p_vci (signal_vci_l2g_d); |
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| 376 | iniwrapperd->p_dspin_out (signal_dspin_cmd_l2g_d); |
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| 377 | iniwrapperd->p_dspin_in (signal_dspin_rsp_g2l_d); |
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| 378 | |
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| 379 | tgtwrapperd->p_clk (this->p_clk); |
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| 380 | tgtwrapperd->p_resetn (this->p_resetn); |
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| 381 | tgtwrapperd->p_vci (signal_vci_g2l_d); |
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| 382 | tgtwrapperd->p_dspin_out (signal_dspin_rsp_l2g_d); |
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| 383 | tgtwrapperd->p_dspin_in (signal_dspin_cmd_g2l_d); |
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| 384 | |
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| 385 | std::cout << " - VCI/DSPIN wrappers connected" << std::endl; |
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| 386 | |
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| 387 | // CROSSBAR direct |
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| 388 | xbard->p_clk (this->p_clk); |
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| 389 | xbard->p_resetn (this->p_resetn); |
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| 390 | xbard->p_initiator_to_up (signal_vci_l2g_d); |
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| 391 | xbard->p_target_to_up (signal_vci_g2l_d); |
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| 392 | |
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| 393 | xbard->p_to_target[tgtid_memc] (signal_vci_tgt_d_memc); |
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| 394 | xbard->p_to_target[tgtid_xicu] (signal_vci_tgt_d_xicu); |
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| 395 | xbard->p_to_target[tgtid_mdma] (signal_vci_tgt_d_mdma); |
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| 396 | |
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| 397 | xbard->p_to_initiator[nb_procs] (signal_vci_ini_d_mdma); |
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| 398 | |
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| 399 | for (size_t p = 0; p < nb_procs; p++) |
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| 400 | { |
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| 401 | xbard->p_to_initiator[p] (signal_vci_ini_d_proc[p]); |
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| 402 | } |
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| 403 | |
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| 404 | if ( io ) |
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| 405 | { |
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| 406 | xbard->p_to_target[tgtid_mtty] (signal_vci_tgt_d_mtty); |
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| 407 | xbard->p_to_target[tgtid_brom] (signal_vci_tgt_d_brom); |
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| 408 | xbard->p_to_target[tgtid_bdev] (signal_vci_tgt_d_bdev); |
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| 409 | xbard->p_to_target[tgtid_fbuf] (signal_vci_tgt_d_fbuf); |
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| 410 | xbard->p_to_target[tgtid_mnic] (signal_vci_tgt_d_mnic); |
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| 411 | |
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| 412 | xbard->p_to_initiator[nb_procs+1] (signal_vci_ini_d_bdev); |
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| 413 | } |
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| 414 | |
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| 415 | std::cout << " - Direct crossbar connected" << std::endl; |
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| 416 | |
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| 417 | // RING coherence |
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| 418 | ringc->p_clk (this->p_clk); |
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| 419 | ringc->p_resetn (this->p_resetn); |
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| 420 | //ringc procs |
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| 421 | for (size_t p = 0; p < nb_procs; p++) |
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| 422 | { |
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| 423 | ringc->p_rsp_in[p](signal_dspin_c_from_proc[p]); |
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| 424 | ringc->p_cmd_out[p](signal_dspin_c_to_proc[p]); |
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| 425 | } |
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| 426 | //ringc memc |
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| 427 | ringc->p_cmd_in[0](signal_dspin_c_from_memc); |
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| 428 | ringc->p_rsp_out[0](signal_dspin_c_to_memc); |
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| 429 | //ringc router |
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| 430 | ringc->p_cmd_in[1](signal_dspin_cmd_g2l_c); |
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| 431 | ringc->p_rsp_in[nb_procs](signal_dspin_rsp_g2l_c); |
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| 432 | ringc->p_cmd_out[nb_procs](signal_dspin_cmd_l2g_c); |
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| 433 | ringc->p_rsp_out[1](signal_dspin_rsp_l2g_c); |
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| 434 | |
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| 435 | std::cout << " - Coherence ring connected" << std::endl; |
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| 436 | |
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| 437 | // Processors |
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| 438 | for (size_t p = 0; p < nb_procs; p++) |
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| 439 | { |
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| 440 | proc[p]->p_clk (this->p_clk); |
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| 441 | proc[p]->p_resetn (this->p_resetn); |
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[351] | 442 | proc[p]->p_vci (signal_vci_ini_d_proc[p]); |
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[342] | 443 | proc[p]->p_dspin_in (signal_dspin_c_to_proc[p]); |
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| 444 | proc[p]->p_dspin_out (signal_dspin_c_from_proc[p]); |
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| 445 | proc[p]->p_irq[0] (signal_proc_it[p]); |
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| 446 | for ( size_t j = 1 ; j < 6 ; j++) |
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| 447 | { |
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| 448 | proc[p]->p_irq[j] (signal_false); |
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| 449 | } |
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| 450 | } |
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| 451 | |
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| 452 | std::cout << " - Processors connected" << std::endl; |
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| 453 | |
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| 454 | // XICU |
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| 455 | xicu->p_clk (this->p_clk); |
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| 456 | xicu->p_resetn (this->p_resetn); |
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| 457 | xicu->p_vci (signal_vci_tgt_d_xicu); |
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| 458 | for ( size_t p=0 ; p<nb_procs ; p++) |
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| 459 | { |
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| 460 | xicu->p_irq[p] (signal_proc_it[p]); |
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| 461 | } |
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| 462 | for ( size_t i=0 ; i<32 ; i++) |
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| 463 | { |
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| 464 | if ( io ) // I/O cluster |
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| 465 | { |
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| 466 | if (i < 8) xicu->p_hwi[i] (signal_false); |
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| 467 | else if (i < (8 + nb_dmas)) xicu->p_hwi[i] (signal_irq_mdma[i-8]); |
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| 468 | else if (i < 16) xicu->p_hwi[i] (signal_false); |
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| 469 | else if (i < (16 + nb_ttys)) xicu->p_hwi[i] (signal_irq_mtty[i-16]); |
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| 470 | else if (i < 31) xicu->p_hwi[i] (signal_false); |
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| 471 | else xicu->p_hwi[i] (signal_irq_bdev); |
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| 472 | } |
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| 473 | else // other clusters |
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| 474 | { |
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| 475 | if (i < 8) xicu->p_hwi[i] (signal_false); |
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| 476 | else if (i < (8 + nb_dmas)) xicu->p_hwi[i] (signal_irq_mdma[i-8]); |
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| 477 | else xicu->p_hwi[i] (signal_false); |
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| 478 | } |
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| 479 | } |
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| 480 | |
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| 481 | std::cout << " - XICU connected" << std::endl; |
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| 482 | |
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| 483 | // MEMC |
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| 484 | memc->p_clk (this->p_clk); |
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| 485 | memc->p_resetn (this->p_resetn); |
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| 486 | memc->p_vci_ixr (signal_vci_xram); |
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| 487 | memc->p_vci_tgt (signal_vci_tgt_d_memc); |
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| 488 | memc->p_dspin_in (signal_dspin_c_to_memc); |
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| 489 | memc->p_dspin_out (signal_dspin_c_from_memc); |
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| 490 | |
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| 491 | std::cout << " - MEMC connected" << std::endl; |
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| 492 | |
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| 493 | // XRAM |
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| 494 | xram->p_clk (this->p_clk); |
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| 495 | xram->p_resetn (this->p_resetn); |
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| 496 | xram->p_vci (signal_vci_xram); |
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| 497 | |
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| 498 | std::cout << " - XRAM connected" << std::endl; |
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| 499 | |
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| 500 | // CDMA |
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| 501 | mdma->p_clk (this->p_clk); |
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| 502 | mdma->p_resetn (this->p_resetn); |
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| 503 | mdma->p_vci_target (signal_vci_tgt_d_mdma); |
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| 504 | mdma->p_vci_initiator (signal_vci_ini_d_mdma); |
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| 505 | for (size_t i=0 ; i<nb_dmas ; i++) |
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| 506 | { |
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| 507 | mdma->p_irq[i] (signal_irq_mdma[i]); |
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| 508 | } |
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| 509 | |
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| 510 | std::cout << " - MDMA connected" << std::endl; |
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| 511 | |
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| 512 | // Components in I/O cluster |
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| 513 | |
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| 514 | if ( io ) |
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| 515 | { |
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| 516 | // BDEV |
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| 517 | bdev->p_clk (this->p_clk); |
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| 518 | bdev->p_resetn (this->p_resetn); |
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| 519 | bdev->p_irq (signal_irq_bdev); |
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| 520 | bdev->p_vci_target (signal_vci_tgt_d_bdev); |
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| 521 | bdev->p_vci_initiator (signal_vci_ini_d_bdev); |
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| 522 | |
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| 523 | std::cout << " - BDEV connected" << std::endl; |
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| 524 | |
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| 525 | // FBUF |
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| 526 | fbuf->p_clk (this->p_clk); |
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| 527 | fbuf->p_resetn (this->p_resetn); |
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| 528 | fbuf->p_vci (signal_vci_tgt_d_fbuf); |
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| 529 | |
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| 530 | std::cout << " - FBUF connected" << std::endl; |
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| 531 | |
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| 532 | // MNIC |
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| 533 | mnic->p_clk (this->p_clk); |
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| 534 | mnic->p_resetn (this->p_resetn); |
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| 535 | mnic->p_vci (signal_vci_tgt_d_mnic); |
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| 536 | for ( size_t i=0 ; i<nic_channels ; i++ ) |
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| 537 | { |
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| 538 | mnic->p_rx_irq[i] (signal_irq_mnic_rx[i]); |
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| 539 | mnic->p_tx_irq[i] (signal_irq_mnic_tx[i]); |
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| 540 | } |
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| 541 | |
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| 542 | std::cout << " - MNIC connected" << std::endl; |
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| 543 | |
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| 544 | // BROM |
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| 545 | brom->p_clk (this->p_clk); |
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| 546 | brom->p_resetn (this->p_resetn); |
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| 547 | brom->p_vci (signal_vci_tgt_d_brom); |
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| 548 | |
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| 549 | std::cout << " - BROM connected" << std::endl; |
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| 550 | |
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| 551 | // MTTY |
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| 552 | mtty->p_clk (this->p_clk); |
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| 553 | mtty->p_resetn (this->p_resetn); |
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| 554 | mtty->p_vci (signal_vci_tgt_d_mtty); |
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| 555 | for ( size_t i=0 ; i<nb_ttys ; i++ ) |
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| 556 | { |
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| 557 | mtty->p_irq[i] (signal_irq_mtty[i]); |
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| 558 | } |
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| 559 | |
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| 560 | std::cout << " - MTTY connected" << std::endl; |
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| 561 | } |
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| 562 | } // end constructor |
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| 563 | |
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| 564 | /////////////////////////////////////////////////////////////////////////// |
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| 565 | // destructor |
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| 566 | /////////////////////////////////////////////////////////////////////////// |
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| 567 | template<typename vci_param, typename iss_t, int cmd_width, int rsp_width> |
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| 568 | TsarClusterMmu<vci_param, iss_t, cmd_width, rsp_width>::~TsarClusterMmu() {} |
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| 569 | |
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| 570 | } |
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| 571 | } |
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| 572 | |
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| 573 | |
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| 574 | // Local Variables: |
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| 575 | // tab-width: 3 |
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| 576 | // c-basic-offset: 3 |
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| 577 | // c-file-offsets:((innamespace . 0)(inline-open . 0)) |
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| 578 | // indent-tabs-mode: nil |
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| 579 | // End: |
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| 580 | |
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| 581 | // vim: filetype=cpp:expandtab:shiftwidth=3:tabstop=3:softtabstop=3 |
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| 582 | |
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| 583 | |
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| 584 | |
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